Preparation method of vertical incidence type Si-based Si / SiGe HPT with periodic light control unit
By introducing a periodic light control unit design into SiGe/Si HPT, the contradiction between responsiveness and characteristic frequency of traditional HPT is solved, and the effect of efficient absorption and high-speed operation is achieved.
Patent Information
- Application Number
- CN202411694020.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-25
- Publication Date
- 2025-03-04
AI Technical Summary
Traditional vertically incident SiGe/Si HPT has a contradiction between improving responsiveness and characteristic frequency, making it difficult to take into account both efficient absorption and high-speed operation.
Using the preparation method of a vertical incident Si-based Si/SiGe HPT with a periodic light control unit, through the design of epitaxial materials and devices, the periodic light control unit is used to couple the vertical incident plane waves into transverse transmission waves, and the surface reflectivity of incident light of a specific band is reduced.
On the premise that the thickness of the absorption zone remains unchanged, the absorption capacity of the detector is improved in a specific band of incident light and can achieve high-speed operation, solving the contradiction between the responsiveness and characteristic frequency of traditional HPT.
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Figure CN119562638A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductor optoelectronic technology, and in particular relates to a method for preparing a vertically incident Si-based Si / SiGe heterojunction phototransistor (HPT) with a periodic light control unit. Background Art
[0002] With the rapid growth of communication data service demand, the requirements for data communication rate are constantly increasing. Traditional electrical interconnection is limited by physical bottlenecks and cannot meet the requirements of signal delay, transmission distance, and energy consumption in data transmission and processing. Optical interconnection technology can better meet these requirements and has recently attracted the attention of researchers. As the core device for optical transceiver modules to receive optical signals, the performance of photodetectors significantly affects the performance of the entire optical module. However, there is a certain contradiction between the traditional vertical incidence SiGe / Si HPT in improving the responsivity and the characteristic frequency. Summary of the invention
[0003] In view of the shortcomings of the prior art, the object of the present invention is to provide a method for preparing a vertical-incidence Si-based Si / SiGe HPT with a periodic light control unit that takes into account both efficient absorption and high-speed operation.
[0004] The present invention provides a method for preparing a vertical-incidence Si-based Si / SiGe HPT having a periodic light control unit and taking into account both efficient absorption and high-speed operation, comprising the following steps:
[0005] (1) On the p-type Si substrate, the n-type Si sub-collector region, the Si collector region, the p-type Si and the p-type Si are sequentially grown. 1-x Ge x It constitutes a composite base region and a p-type polycrystalline Si emitter region.
[0006] (2) Deposition of mask layer.
[0007] (3) After the periodic light control unit is made of the n-type Si sub-collector region, the n-type Si collector region, the composite base region and the n-type polycrystalline Si emitter region, the mask layer is removed.
[0008] (4) Etch the mesa composed of the emitter region and the p-type Si base region, and then etch the p-type Si 1-x Ge x The mesa composed of the base region and the collector region.
[0009] (5) Deposition of electrical isolation layer.
[0010] (6) Make optical windows and contact holes.
[0011] (7) After engraving the metal pattern, sputtering the metal film.
[0012] (8) Remove the adhesive from the metal electrode and anneal it to form an ohmic contact.
[0013] Furthermore, the composite base region in step (1) is a p-type Si layer having a thickness of 40 nm to 80 nm from bottom to top. 1-x Ge x Base region, p-type Si base region with a thickness of 30-50nm, and a total thickness of 70nm-130nm.
[0014] Furthermore, the mask layer in step (2) is a SiO2 thin film.
[0015] Furthermore, the method for making the periodic light control unit in step (3) is electron beam exposure.
[0016] Furthermore, the etching method in step (4) includes ICP etching and KOH mixed solution wet etching.
[0017] Furthermore, the electrical isolation layer in step (5) is a SiO2 or Si3N4 film.
[0018] Furthermore, the etching method in step (6) is dry etching first and then wet etching.
[0019] Furthermore, the preparation method in step (7) is magnetron sputtering, the metal is Ti / Au, and the thickness is twice the thickness of the electrical isolation layer.
[0020] Furthermore, the annealing method in step (8) is rapid thermal annealing (RTA).
[0021] Compared with the prior art, the beneficial technical effects of the present invention are:
[0022] The present invention provides a method for preparing a vertical-incidence Si-based Si / SiGe HPT with a periodic light-control unit. Through the design of epitaxial materials and devices, the method has the following advantages compared with the traditional vertical-incidence Si / SiGe HPT: the ability of the periodic light-control unit to couple the vertically incident plane wave into a transversely transmitted wave and the characteristics of reducing the surface reflectivity of the incident light in a specific band are utilized, thereby improving the absorption capacity of the detector for incident light in a specific band under the premise that the thickness of the absorption zone remains unchanged.
[0023] The present invention provides a method for preparing a vertical-incidence Si-based Si / SiGe HPT with a periodic light control unit that takes into account both efficient absorption and high-speed operation. The preparation process is simple, the cost is low, the implementation is easy, and the method can be promoted on a large scale. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 It is a schematic diagram of the epitaxial structure after the Si sub-collector region, Si collector region, composite base region and polycrystalline Si emitter region are epitaxially grown on a p-type Si substrate according to the present invention.
[0025] Figure 2 FIG. 4 is a top view of a vertical-incidence Si-based Si / SiGe HPT having periodic light control units in an embodiment.
[0026] Figure 3 4 is a cross-sectional view of a vertical-incidence Si-based Si / SiGe HPT with periodic light control units in an embodiment.
[0027] Figure 4 FIG. 4 is a three-dimensional diagram of a vertical-incidence Si-based Si / SiGe HPT having a periodic light control unit in an embodiment.
[0028] In the figure: 1-Si substrate; 2-Si secondary collector region; 3-Si collector region; 4-composite base region; 401-Si 1-x Ge x Base region; 402-Si base region; 5-polycrystalline Si emitter region; 6-metal electrode; 601-collector region electrode; 602-base region electrode; 603-emitter region electrode; 7-periodic light control unit; 701-dielectric material; 702-air hole. DETAILED DESCRIPTION
[0029] The technical solutions in the embodiments of the present invention will be described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0030] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0031] The present invention provides a method for preparing a vertical-incidence Si-based Si / SiGe HPT having a periodic light control unit and taking into account both efficient absorption and high-speed operation, comprising the following steps:
[0032] (1) On the p-type Si substrate 1, the Si sub-collector region 2, the Si collector region 3, and the composite base region (401-Si 1-x Ge x Base region and 402-Si base region) 4, polycrystalline Si emitter region 5.
[0033] (2) Deposition of mask layer.
[0034] (3) After the periodic light control unit 7 is made of the n-type Si sub-collector region, the n-type Si collector region, the composite base region and the n-type polycrystalline Si emitter region, the mask layer is removed.
[0035] (4) Etch the mesa composed of the emitter region 5 and the p-type Si base region 402, and then etch the p-type Si1-x Ge x The base region 401 and the collector region 3 form a mesa.
[0036] (5) Deposition of electrical isolation layer.
[0037] (6) Etching the optical window and contact holes.
[0038] (7) Overlay metal electrode patterns and sputter metal film.
[0039] (8) After the tape is stripped, annealing is performed to form metal electrodes 6 (601 - collector electrode; 602 - base electrode; 603 - emitter electrode)
[0040] Embodiment 1:
[0041] The present invention provides a method for preparing a vertical-incidence Si-based Si / SiGe HPT having a periodic light control unit and taking into account both efficient absorption and high-speed operation, comprising the following steps:
[0042] (1) A 4-inch diameter (100) face Si wafer was selected. The front side was subjected to chemical mechanical polishing (CMP). The surface roughness was less than 1 nm as measured by atomic force microscopy (AFM). The total thickness was about 450 μm. Low pressure chemical vapor deposition (LPCVD) was used to grow n-type Si sub-collector region 2 and n-type Si collector region 3 on the Si wafer. The thicknesses were 500 nm and 700 nm, respectively. SiH4 was used as the Si source and the growth temperature was 700 °C. As was used as the n-type doping impurity source and the doping concentrations were 5×10 19 cm -3 and 1×10 17 cm -3 The specific method of making the composite base region 4 is to grow it on the n-type Si collector region 3 using reduced pressure chemical vapor deposition (RPCVD), with the reaction sources being SiH4 and GeH4, the growth temperature being 600°C, and B being used as a p-type doping impurity source to make p-type Si 0.84 Ge 0.16 Base region 401, thickness is 40nm, doping concentration is 1×10 19 cm -3 , using low pressure chemical vapor deposition (LPCVD) on Si 0.84 Ge 0.16 The surface of the base region 401 is grown, the reaction source is SiH4, the p-type doping impurity source is B, the thickness is 40nm, and the doping concentration is 1×10 18 cm -3 Finally, low pressure chemical vapor deposition (LPCVD) was used to grow an n-type polysilicon emitter region 5 on the p-type Si base region 4 with a thickness of 100 nm, SiH4 as the Si source, a growth temperature of 700 °C, and As as the n-type doping impurity source with a doping concentration of 3×1019 cm -3 .
[0043] (2) Clean the sample, specifically, first use acetone to ultrasonically perform 10 minutes in a 65°C water bath, then use ethanol to ultrasonically perform 10 minutes in a 65°C water bath, and rinse with deionized water. Then soak the sample in a mixed solution of concentrated sulfuric acid and hydrogen peroxide (volume ratio 3:1) for 4 minutes. Soak in a BOE solution composed of a mixture of 49% HF aqueous solution and 40% NH4F aqueous solution = 1:6 (volume ratio) for 10 seconds. Finally, rinse with deionized water.
[0044] (3) A SiO2 film with a thickness of 100 nm is deposited on the surface of the epitaxial wafer prepared in (1) by plasma enhanced chemical vapor deposition (PECVD).
[0045] (4) Electron beam exposure (EBL) and dry etching (ICP) were performed on the surface of the sample with SiO2 deposited in (3) to etch periodic air holes in the SiO2 mask layer, with a hole size of 900nm, a hole depth of 100nm, and a period of 1200nm. In order to ensure the accuracy of the graphic position, periodicity, consistency and dimensional accuracy, and considering the mask thickness required for ICP etching for 110s, the following conditions were selected: AR-P 672.08 was used for electron beam glue, the glue speed was 2500rpm, the pre-baking condition was 150℃ hot plate baking for 3min, the acceleration voltage and aperture stop were 10kV and 30um respectively, and the exposure dose was 110μC / cm 2 The developing conditions are: soaking in AR-600-56 solution at room temperature for 2min30s, fixing with isopropyl alcohol (IPA) for 30s, and post-baking on a hot plate at 130℃ for 1min. Etching conditions: ICP power 800W, RF power 20W, etching gas CHF3, flow rate 20cm 3 / min, etching time 110 seconds.
[0046] (5) Using dry etching (ICP), periodically arranged air holes are processed in the n-type Si sub-collector region, n-type Si collector region, composite base region and n-type polycrystalline Si emitter region as periodic light control units. The air hole diameter is 900nm, the hole depth is 800nm, and the period is 1200nm. Etching conditions: ICP power 1000W, RF power 20W, etching gas SF6, flow rate 85cm 3 / min; Etching passivation gas C4F8, flow rate 50cm 3 / min, etching time 160 seconds. After etching, BOE solution was used to etch for 30 seconds to remove the SiO2 mask layer.
[0047] (6) A layer of SiO2 film is deposited on the surface of the structure by PECVD as a mask layer for subsequent wet etching. The thickness of the SiO2 film is 100 nm.
[0048] (7) Based on the above structure, photolithography is performed and dry etching (ICP) is used to etch the emitter mesa pattern on the SiO2 film. The etching depth is 100nm.
[0049] (8) Based on the above structure, the polysilicon emitter layer and the p-type Si layer are etched by combining dry etching (ICP) and wet etching, with a total etching depth of 140nm to prepare the emitter area table. Dry etching (ICP) conditions: ICP power 1000W, RF power 20W, etching gas SF6, flow rate 85cm 3 / min, etching passivation gas C4F8, flow rate 50cm 3 / min, etching time 22s. Wet etching conditions: Use potassium hydroxide (KOH) and isopropyl alcohol (IPA) aqueous solution (solution ratio is KOH: IPA: H2O = 6g: 5ml: 20ml) in a 60℃ water bath for 25s. During the wet etching process, bubbles will be generated by the reaction. After the bubbles disappear, the etching stops at the Si of the composite base region 4. 0.84 Ge 0.16 Base region 401.
[0050] (9) Then perform photolithography and use dry etching (ICP) to etch the p-type Si 0.84 Ge 0.16 Base and collector regions, prepare base and collector region terraces, etch depth 1.0μm. Etching conditions: ICP power 1000W, RF power 20W, etching gas SF6, flow rate 85cm 3 / min; Etching passivation gas C4F8, flow rate 50cm 3 / min, etching time 200s.
[0051] (10) A layer of SiO2 film is deposited on the surface of the structure in step (9) by PECVD as an electrical isolation layer. The thickness of the SiO2 film is 200 nm.
[0052] (11) Photolithography and wet etching are performed on the SiO2 film to simultaneously etch out contact holes and optical windows. Etching solution: BOE solution is a mixture of 49% HF aqueous solution and 40% NH4F aqueous solution in a volume ratio of 1:6. Etching time is 40 seconds.
[0053] (12) Based on the structure of step (11), photolithography is performed and magnetron sputtering Ti / Au electrode 6 is used to form an ohmic contact with the device. The thickness of each metal layer is: Ti (50nm) / Au (350nm). The deposition conditions are RF power of 300W, Ti target sputtering time of 200s, and Au target sputtering time of 1000s. When stripping the adhesive, use blue film to tear gold, then use acetone water bath heating at 65°C for 10 minutes, use ethanol water bath heating at 65°C for 10 minutes, and rinse with deionized water. Finally, rapid thermal annealing (RTA) is performed at 450°C for 30s to obtain a vertically incident Si-based Si / SiGeHP T with periodic light control units.
[0054] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A method for preparing a vertical-incidence Si-based Si / SiGe HPT with a periodic light control unit, comprising the following steps: (1) epitaxially growing an n-type Si sub-collector region, an n-type Si collector region, a composite base region, and an n-type polycrystalline Si emitter region on a p-type Si substrate; the composite base region includes a p-type Si 1-x Ge x Base region and p-type Si base region, (2) epitaxial growth of SiO2 as a mask for preparing periodic light control units; (3) The periodic light control unit fabrication area includes a portion of an n-type Si sub-collector area, an n-type Si collector area, a composite base area, and an n-type polycrystalline Si emitter area; a periodic light control unit structure is fabricated in the fabrication area, which is composed of periodically arranged air holes and dielectric materials; the air holes have a diameter d of 850-1100 nm, a period p of 1200 nm, and a depth h of 350-850 nm; (4) Etch the mesa composed of the emitter region and the p-type Si base region, and then etch the p-type Si 1-x Ge x The mesa composed of the base region and the collector region; (5) depositing an electrical isolation layer; (6) Etching to make optical windows and contact holes; (7) Overlaying metal patterns and then sputtering metal film; (8) Stripping the tape to make metal electrodes and annealing to form ohmic contacts.
2. The preparation method according to claim 1, characterized in that: The thickness of the n-type polycrystalline Si emitter region in step (1) is in the range of 50-100 nm, and the doping concentration is in the range of 1×10 19 cm -3 -4×10 19 cm -3 ; The composite base region includes p-type Si 1-x Ge x and p-type Si, p-type Si 1-x Ge x The x range is 0.10-0.16, Si 1-x Ge x The thickness ranges from 40 to 80 nm and the doping concentration ranges from 6 × 10 18 cm -3 -1×10 19 cm -3 ; p-type Si thickness is 30-50nm, doping concentration is 1×10 18 cm -3 -9×10 18 cm -3 The total thickness of the composite base region is 70nm-130nm.
3. The preparation method according to claim 1, characterized in that: The thickness of the mask layer deposited in step (2) is 100-200 nm.
4. The preparation method according to claim 1, characterized in that: The periodic light control unit in step (3) must be made by electron beam exposure under the following conditions: select the electron beam photoresist type AR-P 672.08, the coating speed is 2500-3000rpm, the pre-baking condition is 140-160℃, and the baking is carried out on a hot plate for 3min; the electron beam acceleration voltage is 10-20kV, the aperture is 10-30um, and the exposure dose is 90-120μC / cm 2 ; AR-600-56 is selected as the developer, and the developing time is 2-3 min; then the exposed and developed pattern is transferred to the SiO2 mask layer described in step (2) by dry etching (ICP) method, where the dry etching conditions are: ICP power 800 W, RF power 20 W, etching gas CHF3, flow rate 20 cm 3 / min, etching time 100-120s; finally, dry etching (ICP) is used to etch the n-type Si sub-collector region, n-type Si collector region, composite base region and n-type polycrystalline Si emitter region to prepare a periodic light control unit. The dry etching conditions here are: ICP power 850-1000W, RF power 10-20W, etching gas SF6, flow rate 80-90cm 3 / min, etching passivation gas C4F8, flow rate 50-60cm 3 / min, etching time 70-170s.
5. The preparation method according to claim 1, characterized in that: In step (4), the emitter region table is composed of an n-type polycrystalline silicon emitter region and a p-type Si base region. The etching method is a combination of dry etching ICP and wet etching, dry etching the n-type polycrystalline Si emitter region and wet etching the p-type Si base region; dry etching conditions: ICP power 850-1000W, RF power 10-20W, etching gas SF6, flow rate 80-90cm 3 / min, etching passivation gas C4F8, flow rate 50-60cm 3 / min, etching time 15-25s; wet etching conditions: select an aqueous solution of potassium hydroxide (KOH) and isopropyl alcohol (IPA) with a formula of KOH:IPA:H2O=6g:5ml:20ml, and heat in a water bath at 60-65°C for 20-30s.
6. The preparation method according to claim 1, characterized in that: Step (4) The base collector region table is made of p-type Si 1- x Ge x The base region and the n-type Si collector region are composed of dry etching. The etching conditions are: ICP power 850-1000W, RF power 10-20W, etching gas SF6, flow rate 80-90cm 3 / min, etching passivation gas C4F8, flow rate 50-60cm 3 / min, etching time 160-220s.
7. The preparation method according to claim 1, characterized in that: In step (5), the electrical isolation layer is deposited by PECVD with a thickness of 200-300 nm.
8. The preparation method according to claim 1, characterized in that: In step (7), the sputtering method of Ti / Au is magnetron sputtering, the RF power is 250-350W, the sputtering time of Ti target is 150-250s, the sputtering time of Au target is 800-1200s, and the total thickness of the sputtered metal is twice the thickness of the electrical isolation layer in step (5).
9. The preparation method according to claim 1, characterized in that: In step (8), the adhesive stripping process must be performed using a blue film peeling machine, followed by ultrasonic treatment for 10 min in an acetone water bath heated at 60-70°C, and ultrasonic treatment for 10 min in an ethanol water bath heated at 60-70°C, and finally rinsed with deionized water.
Citation Information
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