A single-capacitor temperature sensor based on duty-cycle modulation of a bjt

Abstract

The application discloses a single-capacitance temperature sensor based on duty cycle modulation of BJT and belongs to the field of integrated circuits. In a period, the temperature sensor circuit charges a positive temperature coefficient voltage and a negative temperature coefficient voltage to a capacitor respectively, calculates two charging times, divides the time of charging the positive temperature coefficient voltage by the sum of the two times, and the ratio is proportional to the temperature, that is, the temperature is converted into a duty cycle output. Compared with the method of high-precision ADC quantization, the power consumption and circuit complexity can be greatly reduced. In addition, the circuit is designed as a single-capacitance, that is, the two charging processes are performed on the same capacitor, and only the appropriate proportion of the two charging currents needs to be designed, so that the sum of the two times (i.e. the period time) is independent of the temperature. Since the capacitor usually occupies most of the area of the whole chip, compared with the double-capacitance design, the area is greatly saved, and the error caused by capacitor mismatch can be avoided.

Description

TECHNICAL FIELD

[0001] The application relates to a single-capacitance temperature sensor based on BJT duty cycle modulation and belongs to the field of integrated circuits. BACKGROUND

[0002] In the design of CMOS temperature sensors, commonly used temperature sensing devices include bipolar junction transistors (BJT), MOSFETs and thermistors. Compared with MOSFETs and thermistors, bipolar junction transistors (BJT) have current amplification capability and good linearity, and have good stability and high precision. Therefore, bipolar junction transistors (BJT) are widely used in the design of CMOS temperature sensors. The base-emitter voltage (V BE ) of a bipolar transistor generates a negative temperature coefficient voltage, and the difference (ΔV BE ) between the base-emitter voltages of two bipolar transistors working at different current densities generates a positive temperature coefficient voltage proportional to temperature. By quantifying the positive temperature coefficient voltage (or current) and the negative temperature coefficient voltage (or current), the temperature can be obtained.

[0003] For the obtained voltage or current with temperature characteristics, a high-precision ADC can be designed to convert the analog quantity into a digital quantity, such as a sigma-delta ADC. Although the conversion precision is high, the power consumption is large and the circuit is complex. Therefore, the design of an ADC-free temperature sensor has great attraction due to its low cost and low power consumption. Common design schemes include a duty cycle modulation temperature sensor that converts a temperature signal into a PWM signal and realizes digital measurement and control of temperature by modulating the duty cycle of the PWM signal, or a voltage-to-frequency conversion scheme that converts a voltage varying with temperature into frequency information and realizes measurement of temperature by measuring the frequency. Both methods convert analog signals to the time domain for calculation. Compared with the voltage-to-frequency conversion scheme, the temperature sensor based on duty cycle modulation has the advantages of simple circuit design, strong anti-interference ability, high precision and resolution, and low power consumption.

[0004] Temperature sensors based on duty-cycle modulation typically use an op amp and bipolar transistors to generate positive and negative temperature signals. A capacitor-comparator structure converts the voltage or current into a time-domain signal. The comparator output controls the circuit logic, converting the positive and negative temperature coefficient voltages (or currents) into the high and low level timings of a PWM wave. The op amp and capacitors typically occupy a significant portion of the design area. Zhu et al. proposed a high-accuracy temperature sensor based on time-mode duty-cycle modulation in "High-accuracy time-mode duty-cycle-modulation-based temperature sensor for energy-efficient system applications." While this sensor has high accuracy, its circuit uses a dual-capacitor structure, which occupies a large area. Wang et al. proposed a temperature sensor in "An accurate BJT-based CMOS temperature sensor with duty-cycle-modulated output," which uses only one capacitor but employs two op amps to obtain the PTAT and CTAT currents, respectively. This also results in significant power consumption and area overhead. Although the sensor proposed by Huang et al. in "ABJT-based CMOS temperature sensor with duty-cycle-modulated output and ±0.5°C (3σ) inaccuracy from -40°C to 125°C" utilizes capacitor reuse, it still requires an op amp in addition to the comparator, resulting in significant power consumption. Therefore, there is still room for optimization in terms of area and power consumption. Designing a circuit that uses fewer op amps and capacitors without compromising accuracy is key to saving area and reducing costs. Summary of the Invention

[0005] The present invention focuses on the design of a low-area temperature sensor without an ADC, and provides a single-capacitor temperature sensor with duty cycle modulation based on a BJT, which reuses capacitors as much as possible without affecting accuracy to save area.

[0006] The technical solution adopted in the present invention is as follows:

[0007] A single-capacitor temperature sensor based on duty cycle modulation of BJT, the temperature sensor circuit contains a first PNP bipolar junction transistor Q1, a second PNP bipolar junction transistor Q2, a charging capacitor, a first direct current source Ib1, a second direct current source Ib2, a third direct current source I1, a fourth direct current source I2, a control switch and a comparator module, the first bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 in the circuit are used as temperature sensing devices, the first direct current source Ib1 and the second direct current source Ib2 are used to provide bias current, the third direct current source I1 and the fourth direct current source I2 are used to provide charging current, the control switch is used to select two charging modes and perform reset operation, and the comparator module is used to detect the size of the capacitor voltage, and the circuit state is controlled by the output state to obtain temperature information.

[0008] Optionally, bipolar junction transistors are used as temperature sensing devices to generate voltages with positive and negative temperature coefficients respectively. The base-emitter voltage of a single BJT is negatively related to temperature, the base and collector of Q1 are grounded, and the emitter is connected to the bias current source Ib1, then the base-emitter voltage (V BE1 ) of Q1 is a negative temperature coefficient voltage; two bipolar junction transistors with different areas are biased at the same current, and the difference between their base-emitter voltages is positively related to temperature, the area ratio of Q2 to Q1 is n:1, the base and collector of Q2 are grounded, and the emitter is connected to the bias current source Ib2 (Ib2=Ib1), then the difference between the base-emitter voltages of Q1 and Q2 (ΔV BE ) is a positive temperature coefficient voltage.

[0009] Optionally, the first direct current source Ib1 and the second direct current source Ib2 are used to provide bias current for the first bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2, to ensure that the two transistors are biased at the same current; the third direct current source I1 and the fourth direct current source I2 provide charging current in the two charging processes respectively, the charging time is controlled by controlling the size of the charging current, and the period of zero temperature coefficient is obtained by adjusting the ratio of the sizes of the two charging currents.

[0010] Optionally, the positive input terminal of the comparator is connected to the upper plate of the capacitor, and the negative input terminal of the comparator is connected to the emitter of the first bipolar junction transistor Q1, and the base-emitter voltage of the first bipolar junction transistor Q1 is V BE1 . Initially, the voltage stored on the capacitor is 0; in the first stage, the voltage of the upper and lower plates of the capacitor is reset to 0, then the current source charges the capacitor, and when the voltage of the upper plate reaches V BE1 , the comparator flips, and the output voltage of the comparator is triggered to enter the second stage, and the voltage of the upper and lower plates of the capacitor is reset to the base-emitter voltage V BE2 of the second bipolar junction transistor Q2, and when the voltage of the upper plate reaches VBE1 The time comparator flips, a cycle is completed, and then the process returns to the first stage.

[0011] Alternatively, the alternation of the two stages is realized by controlling switches. The first switch S1 and the second switch S2 control the connection of the third direct current source I1 and the fourth direct current source I2, one end of which is connected to the current source and the other end is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor and the other end of which can be selectively connected to the ground or the emitter of the second bipolar junction transistor Q2; the fourth switch S2N, one end of which is connected to the second direct current source Ib2 and the other end of which is connected to the emitter of the second bipolar junction transistor Q2, is inversely related to the second switch S2; the reset switch S_rst is closed during the reset stage and the two ends thereof are connected to the upper and lower plates of the capacitor, respectively.

[0012] Alternatively, the steps of the circuit during operation are as follows:

[0013] Step one: in the initial stage, the third switch S3 is selected to the ground, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are all in the open state;

[0014] Step two: after the circuit starts to work, it first enters the first stage, the first switch S1 is closed, the states of the remaining switches are unchanged, the third switch S3 remains in the state of being selected to the ground, and the reset switch S_rst is closed. After the reset is completed in 10 ns, the reset switch can be disconnected, and the capacitor starts to accumulate charges. This state lasts until the output signal of the comparator flips.

[0015] Step three: when the output signal of the comparator flips, the circuit enters the second stage, the first switch S1 is disconnected, the second switch S2 is closed (the fourth switch S2N is disconnected accordingly), the third switch S3 is switched to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed, and after the reset is quickly completed, it is disconnected. The capacitor starts to accumulate charges. This state lasts until the output signal of the comparator flips, and a cycle is completed.

[0016] Alternatively, the circuit converts the temperature information into voltage information through the bipolar junction transistor first, and then converts the voltage information into time domain information through the capacitor and the comparator. The output voltage of the comparator is the output of the analog part and is input to the digital part. For any switch S1, S2, S3 or S_rst, the square wave signal of the control switch has a period that is a constant independent of temperature, and the high level (or low level) time is a quantity that is positively correlated with temperature, i.e., the temperature is converted into the duty cycle of the square wave signal, and the temperature value is in a positive proportional relationship with the duty cycle.

[0017] Optionally, the period of the square wave signal controlling the switch is the sum of the durations of the two charging phases, the ratio m of the charging currents and the area ratio n of the first PNP bipolar junction transistor Q1 and the second PNP bipolar junction transistor Q2 are determined by making the derivative of the sum of the two charging phase durations with respect to temperature zero, so that the sum of the two charging phase durations is a temperature-independent value.

[0018] Optionally, only quantifying the positive temperature coefficient can also obtain the temperature, but the absolute size is affected by the capacitance value, the current value, etc., and quantifying as the duty cycle can offset these effects to a certain extent, so that the robustness of the entire design is better.

[0019] Optionally, in the two charging and discharging phases, the same capacitor is charged, and a temperature-independent cycle time is obtained by adjusting the ratio of the charging current size; since there is only one capacitor and two charging processes in a cycle, a reset operation is required before each charging, and the reset time is also included in the cycle and duty cycle calculation, but it does not affect because the reset time is usually very short, about nanoseconds, and the effective high and low level time is usually microseconds, so the error caused by it can be completely ignored. In comparison, the area savings brought by the single-capacitor design are very considerable.

[0020] The beneficial effects of the present application are:

[0021] Firstly, the use of traditional bandgap reference structure, i.e. the structure of operational amplifier plus BJT, to generate positive / negative temperature signal quantity is avoided, and the same effect is achieved by skillfully controlling the connection relationship between the capacitor and the BJT, thereby reducing the area and power consumption to a certain extent; in addition, a capacitor reuse design is adopted, since the capacitor usually occupies the largest area in the entire temperature sensor, therefore, a single-capacitor design can significantly reduce the area, and also avoid the capacitor matching problem existing in the double-capacitor, further reducing the error caused by mismatch. In terms of precision, the present application has similar PWM output as other duty cycle modulated temperature sensors, the period is the zero temperature coefficient, the high level time is the positive temperature coefficient, and the output duty cycle value is independent of the absolute size of the capacitor and the current. Under the condition of determining the proportionality coefficient, the output error is partly caused by the BJT itself and partly caused by the current mirror mismatch. These two parts of error are fixed errors, and the present application does not introduce additional error sources, so the area and power consumption are reduced without reducing the precision. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description only show some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without any creative effort.

[0023] Figure 1 is a schematic diagram of a temperature sensor circuit designed by the present application;

[0024] Figure 2 is a timing diagram when the present application works;

[0025] Figure 3 is a schematic diagram of a digital-analog interface of the present application. DETAILED DESCRIPTION

[0026] In order to make the objects, technical solutions and advantages of the present application more clear, the following will further describe the embodiments of the present application in combination with the drawings.

[0027] Embodiment one

[0028] The present embodiment provides a single-capacitance temperature sensor based on duty cycle modulation of BJT, and the temperature sensor circuit is as shown in Figure 1 , which comprises a first PNP-type bipolar junction transistor Q1, a second PNP-type bipolar junction transistor Q2, a charging capacitor, a first direct current source Ib1, a second direct current source Ib2, a third direct current source I1, a fourth direct current source I2, a control switch and a comparator module. The first bipolar junction transistor Q1 and the second PNP-type bipolar junction transistor Q2 in the circuit are used as temperature sensing devices, the first direct current source Ib1 and the second direct current source Ib2 are used to provide bias current, the third direct current source I1 and the fourth direct current source I2 are used to provide charging current, the control switch is used to select two charging modes and perform reset operation, and the comparator module is used to detect the size of the capacitor voltage, and the output state thereof controls the circuit state to obtain temperature information.

[0029] The bipolar junction transistor is used as a temperature sensing device, and can generate voltages with positive temperature coefficient and negative temperature coefficient, respectively. The base-emitter voltage of a single BJT is negatively related to temperature. The base and collector of Q1 are grounded, and the emitter is connected to the bias current source Ib1. b1 , then the base-emitter voltage (V BE1 ) of Q1 is a negative temperature coefficient voltage. When V BE1 ≈750mV, T=300K,

[0030]

[0031] Two bipolar junction transistors with different areas are biased at the same current, the difference between their base-emitter voltages is positively related to temperature, the area ratio of Q2 to Q1 is n:1, the base and collector of Q2 are grounded, and the emitter is connected to the second DC current source I b2 (I b2 b1 ), then the difference between the base-emitter voltages of Q1 and Q2 (ΔV BE ) is a positive temperature coefficient voltage, and the partial derivative with respect to temperature is:

[0032]

[0033] The first and second DC current sources Ib1 and Ib2 are used to provide bias currents for the first and second PNP bipolar junction transistors Q1 and Q2, ensuring that the two transistors are biased at the same current; the third and fourth DC current sources I1 and I2 provide charging currents during two charging processes, respectively, the charging time is controlled by controlling the size of the charging current, and the period of zero temperature coefficient is obtained by adjusting the ratio of the sizes of the two charging currents.

[0034] The comparator input waveform and the comparator output voltage waveform are shown in Figure 2 , the positive input of the comparator is connected to the upper plate of the capacitor, and the negative input of the comparator is connected to the emitter of the first bipolar junction transistor Q1, and the base-emitter voltage is V BE1 . Initially, the voltage stored on the capacitor is 0; in the first stage, the voltage on the upper and lower plates of the capacitor is reset to 0, then the current source charges the capacitor, and when the voltage on the upper plate reaches V BE1 , the comparator flips, and the comparator output voltage is triggered to enter the second stage, and the voltage on the upper and lower plates of the capacitor is reset to the base-emitter voltage V BE2 of the second bipolar junction transistor Q2, and when the voltage on the upper plate reaches V BE1 , the comparator flips, completing a period, and then returns to the first stage to repeat the process.

[0035] For the first stage, the voltage on the upper plate of the capacitor rises from 0 to V BE1 , the comparator flips, and the charging current in this stage is I1, so the duration of this stage is:

[0036]

[0037] For the second stage, the voltage on the upper plate of the capacitor rises from V BE2 to V BE1 , the comparator flips, and the charging current in this stage is I2, so the duration of this stage is:

[0038] ​

[0039] Therefore, t1 is a quantity inversely proportional to temperature, t2 is a quantity proportional to temperature, and let I1 = m * I2, then:

[0040]

[0041]

[0042] Therefore, by setting reasonable values of m and n, the derivative of t1 + t2 with respect to temperature is 0, that is:

[0043] mlnn≈17.2

[0044] Then t1 + t2 is a value independent of temperature, similar to the design of a bandgap reference source. With this time as the period, t2 as the high level time, t1 as the low level time, and t2 / (t1 + t2) as the duty cycle of the PWM wave, which is a quantity proportional to temperature.

[0045] Quantifying only t1 can also obtain temperature, but the absolute size is affected by the capacitance value, current value, etc. Quantifying as a duty cycle can offset these effects to some extent, making the entire design more robust.

[0046] Embodiment Two

[0047] The embodiment provides a single-capacitor temperature sensor implementation method based on BJT duty cycle modulation. The circuit realizes the alternation of the above two stages by controlling the switches. As shown in the figure, Figure 1 The first switch S1 and the second switch S2 control the connection of the two charging current sources, one end of which is connected to the current source and the other end is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor and the other end of which can be selected to be connected to the ground or the emitter of the second bipolar junction transistor Q2; the fourth switch S2N has one end connected to the second direct current source Ib2 and the other end connected to the emitter of the second bipolar junction transistor Q2, and it is inversely related to the second switch S2; the reset switch S_rst is closed during the reset stage, and the two ends are respectively connected to the upper and lower plates of the capacitor.

[0048] The specific steps of the circuit during operation are as follows:

[0049] Step one, in the initial stage, the third switch S3 is selected to the ground, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are all in the open state;

[0050] Step two, the circuit starts to work first into the first stage, the first switch S1 is closed, the rest of the switch state remains unchanged, the third switch S3 remains selected to the ground state, while the reset switch S_rst is closed, only a short time to complete the reset can be disconnected reset switch, the capacitor begins to accumulate charge, this state lasts until the comparator output signal flips;

[0051] Step three, when the comparator output signal flips, the circuit enters the second stage, the first switch S1 is disconnected, the second switch S2 is closed (the fourth switch S2N is disconnected accordingly), the third switch S3 is switched to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed, and is disconnected after completing the reset quickly, the capacitor begins to accumulate charge, and this state lasts until the comparator output signal flips, completing a cycle.

[0052] The control signal timing of each switch is as shown in Figure 2 , the switch is closed when the high level, and is disconnected when the low level.

[0053] The above control logic can be implemented using digital circuits, so the entire temperature sensor is a digital-analog hybrid module, and the specific digital-analog interface is as shown in Figure 3 . The comparator output voltage is output as an analog part, and is input to the digital part as an input. The state machine in the digital circuit takes it as a trigger signal, and outputs four control signals DA_S1, DA_S2, DA_S3, and DA_S_rst as inputs of the analog part.

[0054] In the initial stage, DA_S1, DA_S2, and DA_S3 are all 0 (S2N, the inverse of S2, is 1), and DA_S_rst is 1; after receiving the enable signal to start, the value of DA_S1 is pulled high, the value of DA_S_rst is pulled low, and the rest remains unchanged; when the comparator output changes, that is, the rising edge of the comparator output voltage, DA_S1 is pulled low, DA_S3 is pulled high, and DA_S_rst is pulled high, and this continues until the capacitor is reset and stable, DA_S_rst is pulled low, and DA_S2 is pulled high; when the next comparator output rising edge comes, DA_S2 is pulled low, DA_S3 is pulled high, and DA_S_rst is pulled high, and this also continues until the capacitor is reset and stable, and DA_S1 is pulled high. The above process is a cycle.

[0055] From Figure 3 , it can be seen that the DA_S1, DA_S2, and DA_S3 periodic PWM waves are recorded by a digital counter to record the high and low level time of the DA_S3 signal, and the duty cycle is calculated, that is, t1 / (t1+t2) described in embodiment one, which is proportional to the temperature, so the temperature value can be obtained according to the value.

[0056] In the two charging and discharging stages, the same capacitor is charged, and a period time independent of temperature is obtained by adjusting the proportion of the charging current size; since there is only one capacitor and two charging processes in a period, a reset operation is required before each charging, and the reset time is also included in the period and duty cycle calculation, but it does not affect because the reset time is usually very short, about nanoseconds, and the effective high and low level time is usually microseconds, so the error caused by it can be completely ignored. In contrast, the area overhead brought by the single capacitor design is very considerable.

[0057] Part of the steps in the embodiments of the application can be implemented by software, and the corresponding software program can be stored in a readable storage medium, such as an optical disc or a hard disk.

[0058] The above is only a preferred embodiment of the present application, and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A single capacitance temperature sensor based on BJT duty cycle modulation, characterized by, The temperature sensor comprises a first bipolar junction transistor Q1, a second bipolar junction transistor Q2, a charging capacitor, a first direct current source Ib1, a second direct current source Ib2, a third direct current source I1, a fourth direct current source I2, a control switch and a comparator module; The first bipolar junction transistor Q1 and the second bipolar junction transistor Q2 are used as temperature sensing devices, the first direct current source Ib1 and the second direct current source Ib2 are used to provide bias current, the third direct current source I1 and the fourth direct current source I2 are used to provide charging current, the control switch is used to select two charging modes and perform reset operation, and the comparator module is used to detect the size of capacitor voltage, and temperature information is obtained by controlling the output state of the control switch. The positive input of the comparator is connected to the upper plate of the capacitor, and is also connected to the third DC current source I1 and the fourth DC current source I2 through the first switch S1 and the second switch S2 respectively; the negative input of the comparator is connected to the emitter of the first bipolar junction transistor Q1, and the voltage is V BE1 ; initially, the voltage stored on the capacitor is 0; in the first stage, the voltage of the upper and lower plates of the capacitor is reset to 0, then the current source charges the capacitor, and when the voltage of the upper plate reaches V BE1 , the comparator flips, and the voltage output by the comparator is triggered to enter the second stage, and the voltage of the upper and lower plates of the capacitor is reset to the base-emitter voltage V BE2 of the second bipolar junction transistor Q2; when the voltage of the upper plate reaches V BE1 , the comparator flips, and a cycle is completed, and then the process returns to the first stage and circulates. The control switch comprises a first switch S1, a second switch S2, a third switch S3, a fourth switch S2N and a reset switch S_rst; the first switch S1 and the second switch S2 control the access of two charging current sources, one end of which is connected to the third direct current source I1 and the fourth direct current source I2, and the other end is connected to the upper plate of the capacitor; the third switch S3 is a single-pole double-throw switch, which is used to control the voltage of the lower plate of the capacitor and the voltage of the upper plate after reset, one end of which is connected to the lower plate of the capacitor, and the other end can be selectively connected to the ground or the emitter of the second bipolar junction transistor Q2; one end of the fourth switch S2N is connected to the second direct current source Ib2, and the other end is connected to the emitter of the second bipolar junction transistor Q2, which is inversely related to the second switch S2; the reset switch S_rst is closed during the reset stage, and the two ends are respectively connected to the upper and lower plates of the capacitor.

2. The sensor of claim 1, wherein, The base and the collector of the first bipolar junction transistor Q1 are grounded, and the emitter is connected to the third direct current source Ib1; the base and the collector of the second bipolar junction transistor Q2 are grounded, and the emitter is connected to the fourth direct current source Ib2; the area ratio of the first bipolar junction transistor Q1 to the second bipolar junction transistor Q2 is 1:n; the third direct current source Ib1 is equal to the fourth direct current source Ib2.

3. The sensor of claim 2, wherein, The third direct current source Ib1 and the fourth direct current source Ib2 are used to provide bias current for the first bipolar junction transistor Q1 and the second bipolar junction transistor Q2, so as to ensure that the two transistors are biased at the same current; the third direct current source I1 and the fourth direct current source I2 respectively provide charging current in the two charging processes.

4. The sensor of claim 3, wherein, The working process of the sensor comprises the following steps: Step one, in the initial stage, the third switch S3 is selected to the ground, the fourth switch S2N is closed, the reset switch S_rst is closed, and the remaining switches are all in the off state; Step two, after the circuit starts to work, it first enters the first stage, the first switch S1 is closed, the remaining switches are unchanged, the third switch S3 still maintains the state of being selected to the ground, and the reset switch S_rst is closed, which only needs 10 ns to complete the reset and then disconnects the reset switch, and the capacitor starts to accumulate charges, which lasts until the comparator output signal flips. Step three, when the comparator output signal flips, the circuit enters the second phase, the first switch S1 is open, the second switch S2 is closed, the fourth switch S2N is open accordingly, the third switch S3 switches to the emitter of the second bipolar junction transistor Q2, the reset switch S_rst is closed and then open after the reset is completed, the capacitor starts to accumulate charges, and this state lasts until the comparator output signal flips, completing a cycle.

5. The sensor of claim 4, wherein, Both charging and discharging phases are performed on the same capacitor.

6. The sensor of claim 5, wherein, The first stage capacitor top plate voltage rises from 0 to V BE1 for a duration of: wherein, C is the capacitance value, V BE1 is the voltage at the base-emitter of the first bipolar junction transistor Q1, I 1 is the charging current of the first stage; The duration of the second phase is: the time for the voltage on the second phase capacitor upper plate to rise from V BE2 to V BE1 . wherein C is the capacitance value, V BE2 is the voltage at the base-emitter of the second bipolar junction transistor Q2, I 2 is the charging current of the second stage; The sum of the time used in the two phases t1+t2 is: wherein m is I 1 and I 2, and I 1= .

7. The sensor of claim 6, wherein, The values of m and n are determined by making the derivative of t1+t2 with respect to temperature equal to 0, i.e.: t1 + t2 as a period, as a high level time, as a low level time, is a duty cycle of the PWM wave.

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