Hot patching method for MIPS architecture software and related equipment

Abstract

The invention discloses a hot patching method and related equipment for MIPS architecture software, and the method comprises the steps: making a hot patch corresponding to a to-be-patched function by using a pre-written patch making script, and compiling the hot patch to a dynamic library; loading the dynamic library, and putting a hot patch corresponding to the dynamic library into a memory of the MIPS architecture software; closing an instruction cache component of each processor in the MIPS architecture software, and reading and writing a memory to obtain a hot patch; and performing patch application on the hot patch to realize hot patch processing for the to-be-patched function. According to the method, hot patching of the MIPS architecture software of the multi-core processor is realized, and software defects can be quickly and safely repaired.

Description

Technical Field

[0001] The present application relates to the technical field of software patches, and in particular to a hot patching method and related equipment for MIPS architecture software. Background Art

[0002] Hotfix, also known as patch, is a low-cost, fast way to fix software version defects. The advantage of hot patch technology is that it can quickly fix or circumvent software defects without interrupting current business and restarting the device, especially when the business is very important and urgent.

[0003] Currently, many common hot patch implementation methods are customized for the kernel. When implementing hot patches, they do not consider multi-core CPU architecture as the hot patch on the application side, which may cause system operation errors and fail to meet the repair requirements of MIPS architecture (Microprocessor without interlocked piped stages architecture, a pun on Million Instructions Per Second - the number of machine language instructions processed per second) software. Summary of the invention

[0004] In order to solve the above technical problems, the embodiments of the present application provide a hot patch method and device for MIPS architecture software, an electronic device, a computer-readable storage medium, and a computer program product.

[0005] In the first aspect, in order to solve the above technical problems, the present application provides a hot patch method for MIPS architecture software, which is applied to MIPS architecture software of a multi-core processor, including:

[0006] Using a pre-written patch making script, a hot patch corresponding to the function to be patched is made, and the hot patch is compiled into a dynamic library;

[0007] Loading the dynamic library, and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software;

[0008] Disabling the instruction cache component of each processor in the MIPS architecture software, reading and writing the memory, and obtaining the hot patch;

[0009] The hot patch is applied to realize hot patch processing for the function to be patched.

[0010] The beneficial effects are:

[0011] In the technical solution provided in the embodiment of the present application, a pre-written patch making script is first used to make a hot patch corresponding to the function to be patched, and the hot patch is compiled into a dynamic library, so that when the patch is applied, the operation can be quickly performed by browsing and analyzing the corresponding dynamic library. When a hot patch is required, the dynamic library is loaded, and the hot patch corresponding to the dynamic library is placed in the memory of the MIPS architecture software; the instruction cache component of each processor in the MIPS architecture software is closed, and the memory is read and written to obtain the hot patch, so that all processors no longer need to search for the cache in the I-cache, and there is no need to synchronously update the copies in the I-cache of multiple processors, but directly read from the memory, thereby realizing support for multi-core CPU architecture, greatly improving the access speed of program instructions and improving the execution efficiency of the program. After that, the hot patch is patched and applied to realize hot patch processing for the function to be patched, that is, a software hot patch based on the MIPS architecture is realized to quickly and safely repair software defects.

[0012] In a second aspect, the present invention provides a hot patch device for MIPS architecture software, including a hot patch making unit, a loading unit, a reading and writing unit, and an application unit;

[0013] A hot patch making unit, used to make a hot patch corresponding to the function to be patched by using a pre-written patch making script, and compile the hot patch into a dynamic library;

[0014] A loading unit, used for loading the dynamic library and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software;

[0015] A read / write unit, used to close the instruction cache component of each processor in the MIPS architecture software, read and write the memory, and obtain the hot patch;

[0016] The application unit is used to apply the hot patch to the function to be patched, so as to implement hot patch processing for the function to be patched.

[0017] In a third aspect, the present application also provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs, when the one or more programs are executed by the one or more processors, the electronic device implements the hot patch method of the MIPS architecture software as described above.

[0018] In a fourth aspect, the present application also provides a computer-readable storage medium having computer-readable instructions stored thereon, which, when executed by a processor of a computer, enables the computer to execute the hot patching method for MIPS architecture software as described above.

[0019] In a fifth aspect, the present application further provides a computer program product or a computer program, the computer program product or the computer program including computer instructions, the computer instructions being stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the MIPS architecture software hot patch method provided in the above-mentioned various optional embodiments.

[0020] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0022] Figure 1 is a flow chart of a hot patch method for MIPS architecture software shown in an exemplary embodiment of the present application;

[0023] Figure 2 It is a synchronous update diagram of modifying the memory program when the instruction cache component is not closed;

[0024] Figure 3 is a schematic diagram of reading and writing memory after turning off the instruction cache component in an exemplary embodiment of the present application;

[0025] Figure 4 is a flow chart of patch execution when executing different commands in an exemplary embodiment of the present application;

[0026] Figure 5 This is a schematic diagram of the MIPS architecture software creating five threads in memory according to business needs;

[0027] Figure 6 It is a flowchart of a parent process and a child process performing patch activation in an exemplary embodiment of the present application;

[0028] Figure 7 is a schematic diagram of the positional relationship between the action position for patch activation and the thread in an exemplary embodiment of the present application;

[0029] Figure 8 This is a schematic diagram of a function call operation process after a patch is activated in a memory in an exemplary embodiment of the present application;

[0030] Fig. 9is a block diagram of a MIPS architecture software hot patch device shown in an exemplary embodiment of the present application;

[0031] Fig.10 It is a structural diagram of a computer system suitable for implementing an electronic device of an embodiment of the present application. DETAILED DESCRIPTION

[0032] Here, exemplary embodiments will be described in detail, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.

[0033] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0034] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0035] The term "multiple" as used in this application refers to two or more than two. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0036] In order to solve the problem that many of the current common hot patch implementation methods are customized for the kernel, and hot patches for multi-core CPU architecture as the application side are not considered when implementing hot patches, which may cause system operation errors, the embodiments of the present application propose a hot patch method and device for MIPS architecture software, an electronic device, and a computer-readable storage medium, which mainly involve hot patch technology for MIPS architecture software included in software patch technology. These embodiments will be described in detail below.

[0037] First see Figure 1 , Figure 1 FIG. 1 is a flow chart of a hot patch method for MIPS architecture software shown in an exemplary embodiment of the present application. Figure 1As shown, in an exemplary embodiment, the hot patch method of the MIPS architecture software may include steps S101 to S104, which are described in detail as follows:

[0038] Step S101, using a pre-written patch making script to make a hot patch corresponding to the function to be patched, and compiling the hot patch into a dynamic library.

[0039] The hot patch method for MIPS architecture software provided in this application is applied to MIPS architecture software of multi-core processors. MIPS is a very popular RISC (Reduced Instruction Set Computer) architecture processor (CPU, Central Processing Unit / Processor) in the world. Its function call is implemented by calling the assembly instruction jalr. Take the following program language as an example:

[0040] void hot_test()

[0041] {

[0042] printf("hello,world.\n");

[0043] return;

[0044] }

[0045] void main()

[0046] {

[0047] hot_test();

[0048] return;

[0049] }

[0050] In this embodiment, a pre-written patch making script is used to pack various data to be patched into a patch, and a hot patch corresponding to the function to be patched is made. Then, the hot patch is compiled and linked to a dynamic library hotfix.so. The following programming language is used as an example:

[0051] void hot_test_patch()

[0052] {

[0053] printf("hello,world,I am hotfix.\n");

[0054] return;

[0055] }

[0056] Step S102, loading the dynamic library, and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software.

[0057] This embodiment puts the corresponding hot patch into the memory of the MIPS architecture software by loading a dynamic library, so as to read the hot patch when applying the patch.

[0058] Step S103, close the instruction cache component of each processor in the MIPS architecture software, read and write the memory, and obtain the hot patch.

[0059] The instruction cache component (I-cache) is a key component inside the processor that is used to cache recently used instructions. When the CPU needs to execute an instruction, it will first check whether the instruction has been cached in the I-cache. If the required instruction is already in the I-cache, the CPU can quickly read the instruction directly from the I-cache without waiting to get it from the memory.

[0060] like Figure 2 As shown, Figure 2 This is a diagram of synchronous update of memory program modification when the instruction cache component is not closed. In a multi-core CPU architecture, because I-cache caches recently used instructions, it will cause multiple copies of program instructions in memory to exist in multiple processors. Therefore, in the MIPS architecture software of multi-core processors, modifying the content of program instructions in memory requires synchronously updating the copies in the I-cache of multiple processors.

[0061] Therefore, in this embodiment, in order to read the hot patch for patch application, the I-cache cache of the page where the content to be modified is located is closed, and the memory is read and written directly. Figure 3 As shown, Figure 3 This is a schematic diagram of reading and writing memory after turning off the instruction cache component in an exemplary embodiment of the present application. When reading a hot patch, the entry instruction content of hot_test in the memory is modified, and the I-cache function of the page where the hot_test function instruction is located is turned off, so that all CPUs no longer search for cache in the I-cache, but read directly from the memory, thereby realizing support for SMP (symmetric multi-processing) mode multi-core CPUs in the multi-core CPU architecture operation mode.

[0062] Step S104, applying the hot patch to implement hot patch processing for the function to be patched.

[0063] As can be seen from the above, in the method provided in this embodiment, on the one hand, a pre-written patch making script is used to make a hot patch corresponding to the function to be patched, and the hot patch is compiled into a dynamic library, so that when the patch is applied, the operation can be quickly performed by browsing and analyzing the corresponding dynamic library. On the other hand, when a hot patch is required, the dynamic library is loaded, and the hot patch corresponding to the dynamic library is placed in the memory of the MIPS architecture software; the instruction cache component of each processor in the MIPS architecture software is closed, and the hot patch is obtained by reading and writing the memory, so that all processors no longer search for the cache in the I-cache, and there is no need to synchronously update the copies in the I-cache of multiple processors, but directly read from the memory, thereby realizing support for multi-core CPU architecture, greatly improving the access speed of program instructions and improving the execution efficiency of the program. Then, the hot patch is applied to realize the hot patch processing for the function to be patched, and the software hot patch based on the MIPS architecture is realized, which can quickly and safely repair software defects.

[0064] In an exemplary embodiment provided by the present application, the specific steps of making a hot patch corresponding to the function to be patched by using a pre-written patch making script may include:

[0065] Using the pre-written patch making script, create a source file, the source file declares a structure, the structure includes a string pointer and a void* pointer;

[0066] Get the function name and original function address of the function to be patched;

[0067] Get a structure array based on the structure, function name and original function address, and add the structure array to the source file to get a hot patch corresponding to the function to be patched;

[0068] Compile the hot patch and other files corresponding to the function to be patched into a dynamic library.

[0069] In this embodiment, a dynamic library is generated using a pre-written patch making script. Specifically, through the execution flow of the patch making script, a source file is first created, a structure is declared in the source file, the structure contains a string pointer and a void* pointer, and a structure array is created; then the function name of the function to be patched is obtained, and the corresponding original function address is found in the corresponding symbol table of the original release software version; then the function name to be patched and the original function address found are used as members of the structure array to form a structure array of the completed body, and the structure array is added to the source file to obtain the hot patch corresponding to the function to be patched. Finally, the structure array is added to the source file to obtain the hot patch corresponding to the function to be patched, and the hot patch and other files corresponding to the function to be patched are compiled into the dynamic library. In this way, when the patch is applied, by traversing the string pointer and void* pointer in the specified structure array of this dynamic library, the function name that needs to be modified and the address of the original software release version can be known.

[0070] As can be seen from the above, in the method provided in the above embodiment, the steps of generating the dynamic library are optimized by using a pre-written patch production script, and the function names to be patched and the function addresses in the original released software version are packaged into the patch using the script flow method, so that when applying the patch, operations can be quickly performed by browsing this information.

[0071] In an exemplary embodiment provided by the present application, the specific steps of placing the hot patch into the memory of the MIPS architecture software may include:

[0072] By calling the dlopen interface, the dynamic library name and dynamic library opening flag corresponding to the MIPS architecture software are obtained;

[0073] Load dynamic libraries based on dynamic library name and dynamic library open flag;

[0074] The hot patch is placed in the memory of the MIPS architecture software, and the patch status of the hot patch is configured to be in an inactive state.

[0075] The function of the dlopen interface is to open the specified dynamic library file in a specified mode. This embodiment obtains the dynamic library name and dynamic library open flag corresponding to the MIPS architecture software by calling the dlopen interface, and loads the dynamic library based on the dynamic library name and dynamic library open flag. After loading the dynamic library, the hot patch therein is placed into the memory of the MIPS architecture software, and the patch state of the hot patch is configured to be converted from the initial state to the inactivated state.

[0076] In an exemplary embodiment provided by the present application, patch application includes patch activation, patch disabling, and patch uninstallation, so the specific steps of applying a hot patch may include:

[0077] Activate the hot patch, redirect the function entry of the original function of the MIPS architecture software using the hot patch in an inactive state, and convert the patch state of the hot patch to an activated state;

[0078] Disable the hot patch in the activated state, restore the original function redirected by the function entry to the state before the redirection, and convert the patch state to the inactivated state;

[0079] The hot patch that is converted from the activated state to the inactivated state and the hot patch that has been put into the memory are uninstalled to make the patch state idle.

[0080] In this embodiment, the patch application steps include patch activation, patch disabling, and patch uninstallation in sequence. After the patch is successfully loaded, function entry redirection is performed on all original functions in the hot patch in the inactive state. For the patch in the initial state, the patch loading operation needs to be performed first, and then the patch activation operation is performed. After the patch is successfully activated, the patch state of the hot patch is switched to the activated state.

[0081] Patch disabling is to restore all original functions redirected by function entry to the state before redirection. When the hot patch is in an inactive state or idle state, no processing will be performed. The specific process executed when the patch is disabled is the same as the process of patch activation except for the following two differences. First, when the patch is disabled, the roles of the detection code segment and the replacement code segment are transformed, that is, the code segment to be detected is changed from the original function entry code to the register jump instruction, and the replacement code segment is changed from the register jump instruction to the original function entry code. Second, after the patch is disabled, the patch status changes from the activated state to the inactivated state.

[0082] Patch uninstallation can be achieved by calling the dlclose interface, which is to uninstall the hot patch that has been activated or loaded into the memory from the memory and make it idle. For the hot patch that has been activated, you need to perform the patch disable operation first to restore the redirected function to the state before the patch.

[0083] See also Figure 4 , Figure 4 FIG. 1 is a flowchart of a patch execution when executing different commands in an exemplary embodiment of the present application. Figure 4 As shown, the steps for the patch are loading the patch, activating the patch, disabling the patch and uninstalling the patch. In this embodiment, the corresponding steps are executed through different commands.

[0084] When the input command is to load a patch, if it is determined that the patch is not loaded, the patch loading process is executed and the corresponding patch loading result is returned; if it is determined that the patch is loaded, the patch loading result indicating successful loading is directly returned. When the input command is to activate a patch, first ensure that the patch is loaded. After successful loading, the patch activation process is executed and the corresponding patch activation result is returned. Otherwise, the patch activation result indicating failed activation is returned. When the input command is to disable a patch, the patch disable process is executed for the activated patch and the corresponding patch disable result is returned. The inactivated patch is not processed and the patch disable result indicating successful disablement is directly returned. When the input command is to uninstall a patch, the patch uninstall process is executed for the inactivated but loaded patch and the corresponding patch uninstall result is returned. For the activated patch, the patch disable process is executed first and then the patch uninstall process is executed and the corresponding patch uninstall result is returned. If the disablement fails, the patch uninstall result indicating failed uninstallation is directly returned. Commands in other cases are invalid inputs.

[0085] In an exemplary embodiment provided by the present application, before the patch activation modifies the function entry instruction, it is necessary to ensure that no thread is executing the instruction to be modified. Therefore, when there is a thread before the patch activation, the specific steps of patch activation for the hot patch may include:

[0086] Read the original function address in the hot patch;

[0087] Create an unnamed pipe for communication between the parent process and the child process;

[0088] Get the thread to be detected, detect and process the thread to be detected through a child process, and obtain the detection result;

[0089] If the detection result indicates a detection failure, the patch activation fails and a failure signal is returned;

[0090] If the detection result indicates that the detection is successful, the detection result is transmitted to the parent process using an unnamed channel;

[0091] The parent process traverses the original function address and uses the inactivated hot patch to redirect the function entry to complete the patch activation.

[0092] During the device startup process, the application software will create multiple threads according to business needs. Before modifying the function entry instruction during patch activation, you need to ensure that no thread is executing the instruction to be modified. Figure 5 As shown, Figure 5 This is a schematic diagram of the MIPS architecture software creating five threads in memory according to business needs. Figure 5The application creates five threads according to business needs (large and complex applications will create more threads). When the patch is activated, it is necessary to traverse all threads to detect whether the thread is executing the entry instruction to be modified. If a thread is executing the instruction to be modified, the modification action needs to be randomly delayed until no thread is executing the instruction to be modified.

[0093] In this embodiment, thread detection and patch activation operations are completed through the parent process and the child process. For details, please refer to Figure 6 , Figure 6 It is a flowchart of a parent process and a child process executing patch activation in an exemplary embodiment of the present application.

[0094] like Figure 6 As shown, firstly, the structure array generated when the patch is made is obtained through the dlsym interface, the original function addresses of all the original released software versions in the mobile hot patch are read and collected, and the pipe interface is called to create an unnamed pipe for process communication between the parent process and the child process.

[0095] After that, the fork interface is called, and the parent process (i.e., the original process) after fork is completed listens to and receives the unnamed pipe. The child process calls the ptrace interface for the thread to be detected specified by the parent process, stops the running of the thread in order, and checks whether the current running PC pointer of the thread is within the original function address range read above, so as to complete the detection process and obtain the detection result. If it is not within the original function address range, check the next thread, otherwise sleep for a while and check the current thread again. If the number of times the current thread is within the specified original function address range exceeds the set maximum number of times, the patch activation operation is terminated directly and failure is returned, and the patch activation failure is notified through the unnamed pipe. When all threads are outside the original function address range, the parent process is notified through the unnamed pipe that the function entry redirection starts, and the unnamed pipe is listened to and waits for the parent process to notify the function entry redirection modification result.

[0096] After the parent process receives the function entry redirection start signal through the unnamed pipe, it traverses the original function address and uses the inactivated hot patch to redirect the function entry. Specifically, the permissions of the page where each function address is located are modified to be writable, readable, and executable through the mprotect interface, and the first three lines of code of each function entry are saved. The first four lines of code of each function entry are modified to MIPS register jump instructions (where the value in the register is the new function address, that is, the same function address in the dynamic library), and after the modification is completed, the page permissions are restored to the previous readable and executable. When all function addresses are redirected, the child process is informed of the completion of the function entry redirection through the unnamed pipe, and the waitpid interface is called to wait for the child process to end.

[0097] When the child process receives the function entry redirection completion signal from the parent process, it wakes up the specified thread of the parent process through the ptrace interface, and then ends the thread. The parent process receives the end status of the child process, and the patch activation is completed.

[0098] In another exemplary embodiment, the patch activation action is placed before the application creates a thread, and the corresponding specific steps of patch activation may include:

[0099] When the device where the MIPS architecture software is located is started, the action position of the hot patch for patch activation is configured based on the preset target activation position, and the target activation position is located before the application creates a thread;

[0100] At the action position, the original function of the MIPS architecture software is redirected to the function entry using the hot patch in an unactivated state to complete the patch activation.

[0101] When the device is restarted, the patch activation is placed at an appropriate stage in the main thread initialization process, so that the detection process of the current thread execution code can be omitted and the function entry code redirection stage can be directly performed. Therefore, in this embodiment, when the device where the MIPS architecture software is located is started, the action position of the hot patch for patch activation is configured based on the preset target activation position, and the target activation position is located before the application creates a thread; at the action position, the original function of the MIPS architecture software is redirected to the function entry using the hot patch in an unactivated state to complete the patch activation.

[0102] like Figure 7 As shown, Figure 7 This is a schematic diagram of the positional relationship between the action position for patch activation and the thread in an exemplary embodiment of the present application. After the application is started at time t1 and the software program creates a necessary thread at time t2 (thread 1 is used as an example here, and there may be multiple threads depending on the specific application), the application immediately performs the action of activating the patch before creating other threads after the application meets the conditions for activating the patch (the specific conditions are related to the software architecture of the specific application).

[0103] As can be seen from the above, in the method provided in the above embodiment, when the device is restarted, by activating the patch at a reasonable stage, the detection of the thread running pointer can be effectively avoided, thereby improving efficiency.

[0104] In an exemplary embodiment provided by the present application, after activating the hot patch, the method further includes:

[0105] Replace the entry assembly instruction in the memory with the jump instruction of the MIPS processor;

[0106] Using the jump instruction, the hot patch is jumped to the hot test patch function in the memory;

[0107] Run hot patching in the hottest patching function.

[0108] In this embodiment, the entry assembly instruction in the memory is modified and replaced with the jump instruction (jalr) of the MIPS processor to jump to hot_test_patch to execute the hot patch. Figure 8 As shown, Figure 8 This is a schematic diagram of a function call execution process after a patch is activated in memory in an exemplary embodiment of the present application.

[0109] The main function should originally call the entry assembly instruction to execute the hot_test function, using the jump instruction.

[0110] At the hot_test entry, the hot patch jumps to the hot test patch function (hot_test_patch) for execution, so as to implement software hot patching based on the MIPS architecture and repair software defects quickly and safely.

[0111] Fig. 9 FIG. 9 is a block diagram of a MIPS architecture software hot patch device 900 shown in an exemplary embodiment of the present application. Fig. 9 As shown, the device comprises:

[0112] The hot patch making unit 901 is used to make a hot patch corresponding to the function to be patched by using a pre-written patch making script, and compile the hot patch into a dynamic library;

[0113] A loading unit 902 is used to load a dynamic library and put a hot patch corresponding to the dynamic library into the memory of the MIPS architecture software;

[0114] The read / write unit 903 is used to disable the instruction cache component of each processor in the MIPS architecture software, read and write the memory, and obtain the hot patch;

[0115] The application unit 904 is used to apply the hot patch to implement hot patch processing for the function to be patched.

[0116] The device applies the hot patch method of the MIPS architecture software provided in this application, and uses the pre-written patch making script through the hot patch making unit 901 to make the hot patch corresponding to the function to be patched, and compiles the hot patch into the dynamic library, so that the hot patch can be quickly operated by browsing and analyzing the corresponding dynamic library when the patch is applied. When a hot patch is needed, the loading unit 902 loads the dynamic library and puts the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software; the read-write unit 903 closes the instruction cache component of each processor in the MIPS architecture software, reads and writes the memory, and obtains the hot patch, so that all processors no longer search for the cache in the I-cache, and do not need to synchronously update the copies in the I-cache of multiple processors, but directly read from the memory, thereby realizing support for multi-core CPU architecture, greatly improving the access speed of program instructions and improving the execution efficiency of the program. After that, the application unit 904 applies the hot patch to implement hot patch processing for the function to be patched, that is, to implement software hot patch based on the MIPS architecture, and quickly and safely repair software defects.

[0117] In another exemplary embodiment, the hot patch production unit 901 is also used to create a source file using a pre-written patch production script, the source file declares a structure, the structure includes a string pointer and a void* pointer; obtains the function name and the original function address of the function to be patched; obtains a structure array based on the structure, the function name and the original function address, and adds the structure array to the source file to obtain a hot patch corresponding to the function to be patched; compiles the hot patch and other files corresponding to the function to be patched into a dynamic library.

[0118] In another exemplary embodiment, the loading unit 902 is also used to obtain the dynamic library name and dynamic library open flag corresponding to the MIPS architecture software by calling the dlopen interface; load the dynamic library based on the dynamic library name and the dynamic library open flag; place the hot patch into the memory of the MIPS architecture software, and configure the patch status of the hot patch to be in an inactivated state.

[0119] In another exemplary embodiment, patch application includes patch activation, patch disabling and patch uninstallation; the application unit 904 is also used to perform patch activation on the hot patch, use the hot patch in an inactivated state to redirect the original function of the MIPS architecture software to a function entry, and convert the patch state of the hot patch to an activated state; perform patch disabling on the hot patch in an activated state, restore the original function whose function entry is redirected to the state before redirection, and convert the patch state to an inactivated state; perform patch uninstallation on the hot patch that is converted from an activated state to an inactivated state, and the hot patch that has been placed in the memory, so that the patch state is an idle state.

[0120] In another exemplary embodiment, the application unit 904 is also used to read the original function address in the hot patch; create an unnamed pipe for communication between the parent process and the child process; obtain the thread to be detected, and perform detection processing on the thread to be detected through the child process to obtain the detection result; if the detection result is characterized as a detection failure, the patch activation fails and a failure signal is returned; if the detection result is characterized as a detection success, the detection result is transmitted to the parent process using the unnamed channel; the parent process traverses the original function address, uses the hot patch in an unactivated state to redirect the function entry, and completes the patch activation.

[0121] In another exemplary embodiment, the application unit 904 is also used to configure the action position of the hot patch for patch activation based on a preset target activation position when the device where the MIPS architecture software is located is started, and the target activation position is located before the application creates a thread; at the action position, the original function of the MIPS architecture software is redirected to the function entry using the hot patch in an unactivated state to complete the patch activation.

[0122] In another exemplary embodiment, the apparatus further comprises:

[0123] The jump unit is used to replace the entry assembly instruction in the memory with the jump instruction of the MIPS processor; use the jump instruction to jump the hot patch to the hot test patch function in the memory; and run the hot patch in the hot test patch function.

[0124] It should be noted that the hot patch device for MIPS architecture software provided in the above embodiment and the hot patch method for MIPS architecture software provided in the above embodiment belong to the same concept, wherein the specific manner in which each module and unit performs operations has been described in detail in the method embodiment and will not be repeated here. In actual applications, the hot patch device for MIPS architecture software provided in the above embodiment can distribute the above functions to different functional modules as needed, that is, divide the internal structure of the device into different functional modules to complete all or part of the functions described above, and this is not limited here.

[0125] An embodiment of the present application also provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs, when the one or more programs are executed by one or more processors, the electronic device implements the hot patch method of the MIPS architecture software provided in the above-mentioned embodiments.

[0126] Fig.10 The structure diagram of the computer system suitable for implementing the electronic device of the embodiment of the present application is shown. It should be noted that: Fig.10 The computer system 1000 of the electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0127] like Fig.10 As shown, the computer system 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1002 or the program loaded from the storage part 1008 to the random access memory (RAM) 1003, such as executing the method in the above embodiment. In the RAM 1003, various programs and data required for system operation are also stored. The CPU 1001, the ROM 1002 and the RAM 1003 are connected to each other through the bus 1004. The input / output (I / O) interface 1005 is also connected to the bus 1004.

[0128] The following components are connected to the I / O interface 1005: an input section 1006 including a keyboard, a mouse, etc.; an output section 1007 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card, a modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I / O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1010 as needed, so that a computer program read therefrom is installed into the storage section 1008 as needed.

[0129] In particular, according to an embodiment of the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a computer program for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication section 1009, and / or installed from a removable medium 1011. When the computer program is executed by a central processing unit (CPU) 1001, various functions defined in the system of the present application are executed.

[0130] It should be noted that the computer-readable medium shown in the embodiment of the present application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium can be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media can include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, wherein a computer-readable computer program is carried. This propagated data signal can take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. A computer program contained on a computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0131] The flowchart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operations of the system, method and computer program product according to various embodiments of the present application. Wherein, each box in the flowchart or block diagram can represent a module, a program segment, or a part of the code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0132] The units involved in the embodiments described in this application may be implemented by software or hardware, and the units described may also be set in a processor. The names of these units do not, in some cases, constitute limitations on the units themselves.

[0133] Another aspect of the present application also provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the hot patch method of the MIPS architecture software as described above is implemented. The computer-readable storage medium can be included in the electronic device described in the above embodiment, or it can exist independently without being assembled into the electronic device.

[0134] Another aspect of the present application also provides a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. A processor of a computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the MIPS architecture software hot patch method provided in each of the above embodiments.

[0135] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions or improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A hot patch method for MIPS architecture software, characterized in that: MIPS architecture software applied to a multi-core processor, the method comprising: Using a pre-written patch making script, a hot patch corresponding to the function to be patched is made, and the hot patch is compiled into a dynamic library; Loading the dynamic library, and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software; Disabling the instruction cache component of each processor in the MIPS architecture software, reading and writing the memory, and obtaining the hot patch; The hot patch is applied to realize hot patch processing for the function to be patched.

2. The method according to claim 1, characterized in that The method of using a pre-written patch making script to make a hot patch corresponding to the function to be patched, and compiling the hot patch into a dynamic library includes: Using a pre-written patch making script, a source file is created, wherein the source file declares a structure, and the structure includes a string pointer and a void* pointer; Get the function name and original function address of the function to be patched; Obtaining a structure array based on the structure, the function name and the original function address, and adding the structure array to the source file to obtain a hot patch corresponding to the function to be patched; The hot patch and other files corresponding to the function to be patched are compiled into a dynamic library.

3. The method according to claim 1, characterized in that: The loading of the dynamic library and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software includes: By calling the dlopen interface, the dynamic library name and dynamic library opening flag corresponding to the MIPS architecture software are obtained; Load the dynamic library based on the dynamic library name and the dynamic library open flag; The hot patch is placed in the memory of the MIPS architecture software, and the patch state of the hot patch is configured to be an inactivated state.

4. The method according to claim 2, characterized in that: The patch application includes patch activation, patch disabling and patch uninstallation; the patch application of the hot patch to implement hot patch processing for the function to be patched includes: Activating the hot patch, redirecting the function entry of the original function of the MIPS architecture software using the hot patch in an inactive state, and converting the patch state of the hot patch to an activated state; Disabling the hot patch in the activated state, restoring the original function redirected by the function entry to the state before the redirection, and converting the patch state to an inactivated state; The hot patch converted from the activated state to the inactivated state and the hot patch already put into the memory are uninstalled to make the patch state an idle state.

5. The method according to claim 4, characterized in that The step of activating the hot patch and redirecting the function entry of the original function of the MIPS architecture software by using the hot patch in an inactivated state includes: Reading the original function address in the hot patch; Create an unnamed pipe for communication between the parent process and the child process; Obtaining a thread to be detected, and performing detection processing on the thread to be detected through the subprocess to obtain a detection result; If the detection result indicates a detection failure, the patch activation fails and a failure signal is returned; If the detection result indicates that the detection is successful, the detection result is transmitted to the parent process by using the unnamed channel; The parent process traverses the original function address, and uses the hot patch in an inactivated state to redirect the function entry, thereby completing patch activation.

6. The method according to claim 4, characterized in that The step of activating the hot patch and redirecting the function entry of the original function of the MIPS architecture software by using the hot patch in an inactivated state includes: When the device where the MIPS architecture software is located is started, the action position of the hot patch for patch activation is configured based on a preset target activation position, and the target activation position is located before the application creates a thread; At the action position, the hot patch in an unactivated state is used to redirect the function entry of the original function of the MIPS architecture software to complete patch activation.

7. The method according to claim 4, characterized in that After activating the hot patch, the method further includes: Replacing the entry assembly instruction in the memory with a jump instruction of the MIPS processor; Using the jump instruction, the hot patch is jumped to the hot test patch function in the memory; The hot patch is run in the hot test patch function.

8. A hot patch device for MIPS architecture software, characterized in that: include: A hot patch making unit, used to make a hot patch corresponding to the function to be patched by using a pre-written patch making script, and compile the hot patch into a dynamic library; A loading unit, used for loading the dynamic library and placing the hot patch corresponding to the dynamic library into the memory of the MIPS architecture software; A read / write unit, used to close the instruction cache component of each processor in the MIPS architecture software, read and write the memory, and obtain the hot patch; The application unit is used to apply the hot patch to the hot patch to implement hot patch processing for the function to be patched.

9. An electronic device, characterized in that: include: one or more processors; A storage device for storing one or more programs, which, when executed by the one or more processors, enables the electronic device to implement the hot patch method for MIPS architecture software as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Computer-readable instructions are stored thereon, and when the computer-readable instructions are executed by a processor of a computer, the computer is caused to execute the hot patch method for MIPS architecture software according to any one of claims 1 to 7.

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