High-speed LED array driving device

Abstract

The invention discloses a high-speed LED array driving device, and belongs to the field of LED high-speed display and imaging. Comprising a circuit composed of row and column driving units with the same number. The driving device is connected with a control module in front, a core device is an FPGA (Field Programmable Gate Array), and after a pattern display instruction is received, pre-stored coded data is read, and row / column control signals with the same number are output; each row / column control signal line of the FPGA is respectively connected with the input of one row / column driving unit, and the current driving capability of each input row / column control signal is enhanced by utilizing a driving device; the driving device is connected with a display module formed by an LED chip array, and the positive / negative electrodes of each row / column of LED chips are connected through the same row / column signal line and are connected with the output of one row / column driving unit; the output row and column driving signals enable all rows and columns of the chip array to be activated at the same time, and a structured light pattern is displayed at a high speed. Compared with a similar structure, the speed is increased by at least three orders of magnitude.

Description

Technical Field

[0001] The invention belongs to the field of LED high-speed display and imaging, and in particular is a high-speed LED array driving device. Background Art

[0002] Structured light devices are widely used in computational correlation imaging, three-dimensional imaging, structured illumination microscopy and Fourier stack imaging. As the core component of the imaging system, structured light devices determine the performance of the imaging system. At present, the slow modulation speed of structured light devices is the main factor limiting the imaging speed of such imaging systems.

[0003] Currently, the commonly used commercial structured light devices are DMD, LCD and LCoS, which have obvious advantages in resolution and pixel pitch, but the modulation speed is not high. Among them, DMD is the fastest commercial structured light device, but its modulation speed can only reach 22kHz at the fastest. Small-pitch LED chips not only have ultra-fast response times of less than tens of MHz, but also have the advantages of low cost and low manufacturing complexity. As the size reaches the micron level, Micro-LED chips can even reach a response speed of GHz, so LED arrays have great potential as high-speed structured light devices for computational correlation imaging systems.

[0004] The main problem of existing LED array devices is slow refresh speed. For example, the maximum refresh rate of commercial low-end LED display screens is generally around 60fps or 120fps, which is the limit of human eye resolution. Although the refresh rate of mid-to-high-end commercial LED display screens can reach up to 3840fps, it is still much lower than DMD. The main reason is that a line scanning display solution is adopted. The line scanning display solution is to activate the rows or columns of the LED array line by line within the time of displaying an image. This results in the speed at which the LED display screen displays a structured light pattern is much lower than the response speed of the LED chip.

[0005] By activating all rows and columns of the LED array within the display time of an image, the pattern refresh rate of the LED array can theoretically be close to the response speed of the LED chip, that is, tens of Mfps. However, the hardware implementation of this display solution has high requirements on the output power of the driving device, making the traditional LED array driving circuit no longer applicable.

[0006] Currently, the LED array driver refreshes the structured light pattern slowly, which is a bottleneck for high-speed measurement of imaging technology with structured light devices as the core device, and is also a difficult problem that needs to be solved urgently in this field. Summary of the invention

[0007] The present invention proposes a high-speed LED array driving device, which can activate all rows and columns of the LED array within the display time of an image from the hardware point of view, thereby realizing high-speed refreshing of the structured light pattern. At the same time, taking the application of the computational correlation imaging system as the core device as an example, the speed of computational correlation imaging is greatly improved compared with the DMD as the core device.

[0008] The high-speed LED array driving device includes a circuit composed of an equal number of row driving units and column driving units;

[0009] The driving device is connected to a control module in front, and FPGA is the core component of the control module. The coded data of several structured light patterns are pre-stored in the BLOCK RAM inside the FPGA; after the FPGA receives the pattern display instruction sent by the host computer, it reads the coded data in the BLOCK RAM and outputs an equal number of row and column control signals to the driving device.

[0010] Each row control signal line of the FPGA is connected to the input of a row driving unit of the driving device, and each column control signal line is connected to the input of a column driving unit; the driving device is used to enhance the current driving capability of each input row and column control signal;

[0011] The driving device is connected to a display module, which is mainly composed of an LED chip array. The positive electrodes of each row of LED chips are connected by the same row signal line and connected to the output of a row driving unit; the negative electrodes of each row of LED chips are connected by the same column signal line and connected to the output of a column driving unit.

[0012] The row and column drive signals output by the driving device enable all rows and columns of the LED chip array of the display module to be activated simultaneously, realizing high-speed display of the structured light pattern. During the display of the same structured light pattern, the control signal remains unchanged; when the current pattern switches to the next pattern, all control signals change simultaneously.

[0013] The driving unit includes a MOSFET gate driver chip, a MOSFET chip and a resistor; wherein the MOSFET gate driver chip includes a power pin, a ground pin, a signal input pin and a signal output pin. The MOSFET chip is divided into a P-MOSFET chip and an N-MOSFET chip, and both chips include a gate pin, a drain pin and a source pin.

[0014] For each row driving unit, the row control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driving chip; the signal output pin is connected to the gate pin of the P-MOSFET chip; the power pin of the MOSFET gate driving chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the P-MOSFET chip is connected to the external power supply VCC; the drain pin of the P-MOSFET chip is connected to the ground through a pull-down resistor, and the drain pin is also connected to a row signal line in the display module, and provides driving current for the LED chip that needs to be lit in this row.

[0015] For each column driver unit, the column control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driver chip; the signal output pin is connected to the gate of the N-MOSFET chip; the power pin of the MOSFET gate driver chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the N-MOSFET chip is connected to the ground; the drain pin of the N-MOSFET chip is connected to the external power supply VCC through a pull-up resistor, and the drain pin is simultaneously connected to a column signal line in the display module, and provides a current return path for the LED chip that needs to be lit in this column.

[0016] Each control signal is input to a single drive unit. In the drive unit, the signal input terminal of the MOSFET gate driver chip receives the control signal. Under the power supply of the external power supply VDD, the high current pulse is output and transmitted to the MOSFET chip for high-speed charging and discharging, thereby realizing high-speed switching of the MOSFET. The MOSFET chip acts as a switch between the positive and negative poles of the LED chip and the power supply or ground. The faster the MOSFET switching speed, the faster the output drive signal, so that all rows and columns of the LED array can be activated within the display time of an image, and the structured light pattern can be refreshed at high speed.

[0017] The advantages of the present invention are:

[0018] The invention proposes a high-speed LED array driving device that can support the LED chip array to display structured light patterns at a refresh rate of 25Mfps in hardware, achieving a speed increase of at least three orders of magnitude compared to the fastest commercial high-speed structured light device DMD. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of the structured light pattern coding and high-speed LED array display pattern according to the present invention;

[0020] Figure 2 A schematic diagram of the structure of a single row driving unit of an LED array driving device of the present invention;

[0021] Figure 3This is a schematic diagram of the structure of a single column driving unit of the LED array driving device of the present invention;

[0022] Figure 4 A circuit schematic diagram of a high-speed LED array driving device of the present invention;

[0023] Figure 5 A schematic diagram of a high-speed LED array device of the present invention applied to a computational correlation imaging system;

[0024] Figure 6 This is a diagram showing the effect of a computational correlation imaging experiment according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0026] The high-speed LED array driving device includes a circuit composed of an equal number of row driving units and column driving units;

[0027] The driving device is connected to a control module in front, and FPGA is the core component of the control module. The coded data of several structured light patterns are pre-stored in the BLOCK RAM inside the FPGA; after the FPGA receives the pattern display instruction sent by the host computer, it reads the coded data in the BLOCK RAM and outputs an equal number of row and column control signals to the driving device.

[0028] The number of row driving units is the same as the number of row control electrical signals, and the number of column driving units is the same as the number of column control electrical signals; each row control signal line of the FPGA is respectively connected to the input of a row driving unit of the driving device, and each column control signal line is respectively connected to the input of a column driving unit; the driving device is used to enhance the current driving capability of each input row and column control signal;

[0029] The driving device is connected to a display module, which is mainly composed of an LED chip array. The positive electrodes of each row of LED chips are connected by the same row signal line and connected to the output of a row driving unit; the negative electrodes of each row of LED chips are connected by the same column signal line and connected to the output of a column driving unit.

[0030] The row and column drive signals output by the driving device enable all rows and columns of the LED chip array of the display module to be activated simultaneously, realizing high-speed display of the structured light pattern. During the display of the same structured light pattern, the control signal remains unchanged; when the current pattern switches to the next pattern, all control signals change simultaneously.

[0031] In order to drive high-resolution LED chip arrays, the driver unit can use a combination of high-power MOSFET chips and resistors that can carry large currents. Although the high-power MOSFET chips used have the ability to carry higher currents, they also bring about the problem of excessive parasitic capacitance. The insufficient current driving capability of the input control signal will cause the MOSFET output capacitance to charge slowly, thereby greatly reducing the switching speed of the MOSFET.

[0032] In order to solve this problem, the row and column driving units of the present invention each include a combination of a MOSFET gate driving chip, a MOSFET chip and a resistor. The MOSFET gate driving chip includes a power pin, a ground pin, a signal input pin and a signal output pin. The MOSFET chip is divided into a P-MOSFET chip and an N-MOSFET chip, and both chips include a gate pin, a drain pin and a source pin.

[0033] For each row driving unit, the row control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driving chip; the signal output pin is connected to the gate pin of the P-MOSFET chip; the power pin of the MOSFET gate driving chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the P-MOSFET chip is connected to the external power supply VCC; the drain pin of the P-MOSFET chip is connected to the ground through a pull-down resistor, and the drain pin is also connected to a row signal line in the display module, and provides driving current for the LED chip that needs to be lit in this row.

[0034] For each column driver unit, the column control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driver chip; the signal output pin is connected to the gate of the N-MOSFET chip; the power pin of the MOSFET gate driver chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the N-MOSFET chip is connected to the ground; the drain pin of the N-MOSFET chip is connected to the external power supply VCC through a pull-up resistor, and the drain pin is simultaneously connected to a column signal line in the display module, and provides a current return path for the LED chip that needs to be lit in this column.

[0035] Each control signal is input to a single drive unit. In the drive unit, the signal input terminal of the MOSFET gate driver chip receives the control signal. Under the power supply of the external power supply VDD, it outputs a high-peak current pulse of up to several amperes of source current and sink current to the MOSFET chip. The MOSFET input capacitor is charged and discharged at a high speed under the stimulation of the pulse current, thereby realizing the high-speed switching of the MOSFET. The MOSFET chip serves as a switch between the positive and negative poles of the LED chip and the power supply or ground. The faster the MOSFET switching speed, the faster the output drive signal. Since the MOSFETEFT chip used also has the ability to carry higher currents, the drive unit can output or input high-speed, high-current drive signals. This can activate all rows and columns of the LED array within the display time of an image and refresh the structured light pattern at a high speed.

[0036] Example:

[0037] For a structured light pattern with a resolution of N×N, the display of each pattern requires N row electrical signals and N column electrical signals to activate all rows and columns of the LED chip array. Figure 1 As shown in the figure, two structured light patterns with a resolution of 4×4 are used as examples to show their display on the LED chip array and their row and column encoding, where the row and column encoding is the logic level of each row and column control signal when the current structured light pattern is displayed. When the current structured light pattern 1 switches to another structured light pattern 2, the logic levels of all control signals change simultaneously.

[0038] The number of row drive units and the number of row control electrical signals are both N, and the number of column drive units and the number of column control electrical signals are both N. One row control signal is only connected to the input of one row drive unit, and one column control signal is only connected to the input of one column drive unit. In order to drive an LED chip array with a resolution of N×N, a single row and column drive unit needs to be able to carry the rated current of N LEDs. Usually, the rated current of a single small-pitch LED is 20mA. When the resolution of the LED array is 32×32, a single row and column driver needs to be able to carry at least 20mA×32=640mA.

[0039] The row driving unit is designed as follows Figure 2 As shown, the row control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driver chip; the signal output pin is connected to the gate of the PMOSFET chip; the power pin is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the PMOSFET chip is connected to the external power supply VCC; the drain pin is connected to the ground through a pull-down resistor, and the drain pin is also connected to one of the row signal lines of the LED chip array.

[0040] The design of the column drive unit is as follows Figure 3 As shown, the column control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driver chip; the signal output pin is connected to the gate of the NMOSFET chip; the power pin is connected to the external power supply VDD; the ground pin is connected to the ground; the drain pin of the NMOSFET chip is connected to the external power supply VCC through a pull-up resistor, and the drain pin is also connected to one of the column signal lines of the LED chip array; the source pin of the NMOSFET chip is connected to the ground.

[0041] In the drive unit, the signal input terminal of the MOSFET gate driver chip receives the control signal. Under the power supply of the external power supply VDD, it outputs a high peak current pulse of several amperes of source current and sink current to the MOSFET chip. The MOSFET input capacitor is charged and discharged at a high speed under the excitation of the pulse current, thereby realizing the high-speed switching of the MOSFET. MOSFET acts as a switch between the positive and negative poles of the LED chip and the power supply or ground. The faster the MOSFET switches, the faster the output drive signal. Since the MOSFETEFT chip used also has the ability to carry higher currents, the drive unit can output or input high-speed, high-current drive signals.

[0042] The circuit diagram of the driving device of the present invention is as follows: Figure 4 As shown, each row and column control signal is input to the row and column drive units respectively; the MOSFET gate drive chips in all row and column drive units share an external power supply VDD; the MOSFET chips in all row and column drive units share an external power supply VCC. The output of the row drive unit is connected to a row signal line of the LED chip array, and provides a drive current for the LED chips that need to be lit in this row; the output of the column drive unit is connected to a column signal line of the LED chip array, and provides a current return path for the LED chips that need to be lit in this column.

[0043] The arrangement and connection of the LED chip array is the same as that of the passive matrix addressing LED array. The positive electrodes of each row of LED chips are connected with the same signal line and driven by a single input row electrical signal. The negative electrodes of each column of LED chips are connected with the same signal line and driven by a single input column electrical signal. When the logic level of the row signal is high and the logic level of the column signal is low, the LED chip at the intersection of the row and column is lit.

[0044] The high-speed LED array driving device of the present invention not only completes the physical production, but also introduces it into the computational correlation imaging system to conduct dynamic imaging experiments on objects in order to verify the refresh speed of the entire high-speed LED array device. Figure 5 As shown, an imaging system based on a high-speed LED array device is demonstrated; the details are as follows:

[0045] The high-speed LED array device 1 displays a series of patterns, and the light passes through the camera lens 2 to be imaged on the target object 3 and sampled. The light passing through the object is converged on the single-pixel detector 5 through the lens 4. The digital oscilloscope 6 obtains the detected electrical signal from the single-pixel detector 5. Combining the information of the modulation pattern and the detected electrical signal, the computer 7 reconstructs the image of the object through the relevant algorithm.

[0046] The LED chip response time used in the high-speed LED array device with a resolution of 32×32 is about 40ns. The high-speed LED array driving device of the present invention can hardware support the LED chip array to refresh the structured light pattern at a speed of up to 25Mfps. In order to improve the imaging frame rate, the computational correlation imaging experiment uses an adaptive compressed sensing algorithm to reduce the number of modulation patterns. The imaging experiment results are shown in Figure 6 As shown, from left to right are the imaging results when the compression ratio is 100%, 50%, and 12.5% ​​respectively. Figure 6 The first row is the static imaging result, and the second row is the dynamic imaging result when the rotating disk of the chopper 8 rotates at 100 revolutions per second. From the experimental results, it can be seen that when the high-speed LED array device refresh rate is 25Mfps and the pattern compression rate is 12.5%, 50kfps computational correlation dynamic imaging can be achieved.

[0047] The high-speed LED driving device provided by the present invention can support the LED chip array to display structured light patterns at a refresh rate of 25Mfps in hardware. Compared with similar high-speed structured light devices, the high-speed LED array device based on the present invention achieves a speed increase of three orders of magnitude compared to the fastest modulation speed DMD.

Claims

1. A high-speed LED array driving device, characterized in that: Specifically, it includes a circuit composed of the same number of row driving units and column driving units; The driving device is connected to a control module in front, and its core device is FPGA. After receiving the pattern display instruction, it reads the pre-stored encoding data and outputs an equal number of row and column control signals; each row control signal line of the FPGA is connected to the input of a row driving unit, and each column control signal line is connected to the input of a column driving unit; the driving device is used to enhance the current driving capability of each input row and column control signal; The driving device is connected to a display module composed of an LED chip array. The positive electrodes of each row of LED chips are connected by the same row signal line and connected to the output of a row driving unit; the negative electrodes of each row of LED chips are connected by the same column signal line and connected to the output of a column driving unit; the row and column driving signals output by the driving device enable all rows and columns of the LED chip array of the display module to be activated simultaneously, thereby realizing high-speed display of structured light patterns.

2. A high-speed LED array driving device as claimed in claim 1, characterized in that: The coded data of several structured light patterns are pre-stored in the BLOCK RAM inside the FPGA; after the FPGA receives the pattern display instruction sent by the host computer, it reads the coded data in the BLOCK RAM and outputs an equal number of row and column control signals to the driving device.

3. A high-speed LED array driving device as claimed in claim 1, characterized in that: During the display of the same structured light pattern, the control signal remains unchanged; when the current pattern switches to the next pattern, all control signals change simultaneously.

4. A high-speed LED array driving device as claimed in claim 1, characterized in that: The driving unit includes a MOSFET gate driving chip, a MOSFET chip and a resistor; wherein the MOSFET gate driving chip includes a power pin, a ground pin, a signal input pin and a signal output pin; the MOSFET chip is divided into a P-MOSFET chip and an N-MOSFET chip, and both chips include a gate pin, a drain pin and a source pin.

5. A high-speed LED array driving device as claimed in claim 4, characterized in that: For each row driving unit, the row control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driving chip; the signal output pin is connected to the gate pin of the P-MOSFET chip; the power pin of the MOSFET gate driving chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the P-MOSFET chip is connected to the external power supply VCC; the drain pin of the P-MOSFET chip is connected to the ground through a pull-down resistor, and the drain pin is also connected to a row signal line in the display module, and provides driving current for the LED chip that needs to be lit in this row; For each column driver unit, the column control signal line from the FPGA is connected to the signal input pin of the MOSFET gate driver chip; the signal output pin is connected to the gate of the N-MOSFET chip; the power pin of the MOSFET gate driver chip is connected to the external power supply VDD; the ground pin is connected to the ground; the source pin of the N-MOSFET chip is connected to the ground; the drain pin of the N-MOSFET chip is connected to the external power supply VCC through a pull-up resistor, and the drain pin is simultaneously connected to a column signal line in the display module, and provides a current return path for the LED chip that needs to be lit in this column.

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