System-on-chip integrated structure based on heterogeneous composite wafer

Abstract

The invention discloses a system-on-chip integrated structure based on a heterogeneous composite wafer. The system-on-chip integrated structure comprises the heterogeneous composite wafer, an auxiliary PCB, a micro connector, a power supply and distribution system and a heat dissipation system, the heat dissipation system comprises a silicon-metal microchannel cold plate and a lower heat dissipation module, the heterogeneous composite wafer, the auxiliary PCB, the micro connector and the power supply and distribution system are all arranged between the silicon-metal microchannel cold plate and the lower heat dissipation module, and the heterogeneous composite wafer comprises a silicon wafer substrate and a carrier wafer. A silicon-metal microchannel cold plate is arranged above the silicon wafer substrate, a carrier wafer is arranged below the silicon wafer substrate, and a micro connector is arranged below the carrier wafer; an auxiliary PCB is arranged below the micro connector, a power supply and distribution system is arranged below the auxiliary PCB, and a lower heat dissipation module is arranged below the power supply and distribution system. The problem that the wafer is easy to damage during assembly is effectively avoided through structures such as the heterogeneous composite wafer, a power supply structure of an existing wafer-level system is optimized through a passive device in the carrier wafer, and the power supply requirement is met through a power supply and distribution system.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an on-wafer system integration structure based on a heterogeneous composite wafer. Background Art

[0002] System on Wafer (SoW) is based on Si and adopts a design structure similar to SoC. It has the characteristics of integrated circuit microsystem process constraints and integrates ultra-high density, heterogeneous and heterogeneous prefabricated parts with different functions and mixed granularity on a single silicon wafer (Wafer). It has an order of magnitude increase in resource scale.

[0003] From the perspective of systems engineering, Jingshang System breaks through the traditional "step-by-step stacking" engineering technology route of "chip-module-casing-rack-system", and expands the wafer, a process platform with economy, maturity and high density, to the system integration level. It integrates chips, devices and components from different chip design companies, foundries, with different feature sizes, different materials and different functions. At the same time, it must consider the integration of a series of physical components such as high power dissipation, high current and low voltage power supply and distribution, and microsystem interconnection, and fully release the natural advantages of wafer integration with high bandwidth, high energy efficiency and low latency, upgrading from the pursuit of miniaturization process technology progress to the pursuit of system-level functions, performance and effectiveness.

[0004] With respect to the integrated structure of silicon-based wafers integrated with heterogeneous heterogeneous preforms, the existing technology has not fully considered the physical properties of the silicon-based wafer such as thickness and warping after the integration of heterogeneous heterogeneous preforms, which makes the silicon-based wafer extremely susceptible to damage during the assembly of the overall system structure. In addition, the decoupling circuit of the existing power supply method is integrated in the power supply part, which is far away from the target functional preform. In the application of small voltage and large current, it cannot reliably meet the power supply requirements. Summary of the invention

[0005] In order to solve the problem that silicon-based wafers in heterogeneous heterogeneous prefabricated parts integration structures are extremely easy to be damaged during assembly and cannot meet power supply requirements under low voltage and high current applications, the present invention provides an on-wafer system integration structure based on heterogeneous composite wafers, which effectively completes system-level high-reliability integration of functional wafers, structural components, power supply and distribution subsystems, heat dissipation circulation subsystems and other components by arranging heterogeneous composite wafers, auxiliary PCBs, microconnectors, power supply and distribution systems and heat dissipation systems, effectively avoids the problem that silicon-based wafers are extremely easy to be damaged during assembly, and solves the problem of power integrity of low voltage and high current wafer systems, thereby ensuring power supply requirements.

[0006] In order to achieve the above object, the technical solution of the present invention is: The present invention proposes a system-on-wafer integration structure based on a heterogeneous composite wafer, comprising: a heterogeneous composite wafer, an auxiliary PCB, a microconnector, a power supply and distribution system, and a heat dissipation system; The heat dissipation system includes a silicon-metal microchannel cold plate and a lower heat dissipation module, the heterogeneous composite wafer, the auxiliary PCB, the microconnector and the power supply and distribution system are all arranged between the silicon-metal microchannel cold plate and the lower heat dissipation module, the heterogeneous composite wafer includes a silicon wafer substrate and a carrier wafer, a silicon-metal microchannel cold plate is arranged above the silicon wafer substrate, and a carrier wafer is arranged below the silicon wafer substrate, and a microconnector is arranged below the carrier wafer for supporting and fixing the heterogeneous composite wafer; An auxiliary PCB is arranged below the micro connector, a power supply and distribution system is arranged below the auxiliary PCB, and a lower heat dissipation module is arranged below the power supply and distribution system.

[0007] Further, the silicon wafer substrate includes a silicon wafer with TSV and RDL and a heterogeneous functional preform, and a plurality of heterogeneous functional preforms are arranged on the silicon wafer with TSV and RDL to realize the main functions of the on-wafer system; The carrier wafer includes a carrier substrate, a cavity, a passive device, a wafer bonding bump and a contact pad. A plurality of cavities are arranged inside the carrier substrate, and passive devices are arranged in the cavities. A wafer bonding bump is arranged on the top of the carrier substrate, and the top of the wafer bonding bump is connected to the silicon wafer substrate. A contact pad is arranged on the bottom of the carrier substrate to facilitate bonding of the carrier wafer and the silicon wafer substrate.

[0008] Furthermore, the carrier substrate is provided with vias inside to facilitate the connection between the silicon wafer substrate and the micro connector, and to perform line transmission between the two to achieve IO interconnection and power supply.

[0009] Furthermore, the microconnector includes a shell and a fur button, a plurality of fur buttons are arranged inside the shell, the tops of the plurality of fur buttons extend out of the shell, and the plurality of fur buttons are electrically connected to the contact pads to realize the connection between the microconnector and the carrier wafer.

[0010] Further, the power supply and distribution system includes a front-stage power supply PCB, a rear-stage power supply module and an external power supply interface, the rear-stage power supply module includes a power conversion layer and a decoupling capacitor layer, the decoupling capacitor layer includes a plurality of filter capacitors, an auxiliary PCB is arranged above the decoupling capacitor layer, and a power conversion layer is arranged below the decoupling capacitor layer, the auxiliary PCB, the decoupling capacitor layer and the power conversion layer are sequentially electrically connected to the front-stage power supply PCB arranged below the power conversion layer for power supply; The front-stage power supply PCB includes a front-stage power supply board and a power supply connector. A power supply connector is arranged above the front-stage power supply board and an external power supply interface is arranged below. The power supply connector is electrically connected to the power conversion layer to meet the power supply requirements.

[0011] Furthermore, the silicon-metal microchannel cold plate includes a heat dissipation cold plate and a silicon-based microfluidic cold plate, a silicon-based microfluidic cold plate is arranged below the heat dissipation cold plate, and a silicon wafer substrate is arranged below the silicon-based microfluidic cold plate for dissipating heat from the silicon wafer substrate; The lower heat dissipation module includes a mechanical heat dissipation structure cold plate and a metal temperature equalizing plate. A mechanical heat dissipation structure cold plate is arranged between the auxiliary PCB and the front-stage power supply PCB. The mechanical heat dissipation structure cold plate surrounds the rear-stage power supply module. A metal temperature equalizing plate is arranged under the front-stage power supply PCB for dissipating heat for the power supply and distribution system.

[0012] Furthermore, the heterogeneous composite wafer is provided with a plurality of positioning pin holes and a plurality of positioning slots, and the silicon-metal microchannel cold plate is also provided with a plurality of positioning pins and a plurality of positioning blocks, wherein the plurality of positioning pins correspond to the positioning pin holes, and the plurality of positioning slots correspond to the positioning blocks, so as to facilitate the fixing of the silicon-metal microchannel cold plate and the heterogeneous composite wafer; The silicon-metal microchannel cold plate is connected with micro-connector pins, which is convenient for fixing the heterogeneous composite wafer and making the overall structure more compact.

[0013] Beneficial effects of the present invention: (1) The present invention proposes an ideal solution for the full system physical integration structure of the wafer system. Starting from the physical properties of the silicon wafer, the heterogeneous composite wafer design is carried out to achieve the support, fixation, power supply, heat dissipation, etc. of the heterogeneous composite wafer.

[0014] (2) The present invention optimizes the existing wafer-level system power supply technology and adopts a vertical, hierarchical and regional power supply method, which is divided into three levels: high voltage level, low voltage level and input level. A filter capacitor is added at the position closest to the preform to maximize the guarantee of the preform's low voltage, high current and ultra-low ripple requirements. It can take into account the current advanced packaging process flow to the greatest extent, while fully considering the heat dissipation problem of the power supply and distribution components, and realize the power supply requirements of heterogeneous and heterogeneous preforms in different application scenarios.

[0015] (3) The present invention effectively completes the system-level high-reliability integration of various components by providing a heterogeneous composite wafer, an auxiliary PCB, a microconnector, a power supply and distribution system, and a heat dissipation system. The carrier wafer supports the silicon wafer substrate, thereby avoiding damage to the silicon wafer substrate during the assembly process. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of an on-wafer system integration structure based on a heterogeneous composite wafer provided in an embodiment of the present invention.

[0017] Figure 2The second schematic diagram of an on-wafer system integration structure based on a heterogeneous composite wafer provided in an embodiment of the present invention.

[0018] Figure 3 A schematic diagram of a longitudinal cross-section of a carrier wafer provided in an embodiment of the present invention.

[0019] Figure 4 A schematic diagram of a power supply and distribution system provided in an embodiment of the present invention.

[0020] Figure 5 A schematic diagram of a heterogeneous composite wafer assembly process provided in an embodiment of the present invention.

[0021] Figure 6 A schematic diagram of positioning holes and positioning pin holes of a heterogeneous composite wafer provided in an embodiment of the present invention.

[0022] The numbers in the accompanying drawings are: 1 is a heat dissipation cold plate, 2 is a silicon-based microfluidic cold plate, 3 is a silicon wafer substrate, 4 is a carrier wafer, 5 is a microconnector, 6 is an auxiliary PCB, 7 is a back-stage power supply module, 8 is a mechanical heat dissipation structure cold plate, 9 is a metal temperature plate, 10 is a power supply connector, 11 is a via, 12 is a cavity, 13 is a passive device, 14 is a contact pad, 15 is an external power supply interface, 16 is a front-stage power supply board, 17 is a power conversion layer, 18 is a decoupling capacitor layer, 19 is a wafer bonding bump, 20 is a pin hole positioning, 21 is a positioning slot, 22 is a front-stage power supply PCB, and 23 is a high-quality composite wafer. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution in the embodiment of the present invention will be clearly described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] Example 1 like Figure 1 and Figure 2 As shown, a system-on-wafer integration structure based on a heterogeneous composite wafer includes: a heterogeneous composite wafer 23, an auxiliary PCB 6, a micro connector 5, a power supply and distribution system, and a heat dissipation system.

[0025] The heat dissipation system includes a silicon-metal microchannel cold plate and a lower heat dissipation module. The silicon-metal microchannel cold plate includes a heat dissipation cold plate 1 and a silicon-based microfluidic cold plate 2. The silicon-based microfluidic cold plate 2 is arranged below the heat dissipation cold plate 1. Specifically, the heat dissipation cold plate 1 and the silicon-based microfluidic cold plate 2 are both existing equipment. The heat dissipation cold plate 1 has a microfluidic interface inside, and is combined with the silicon-based microfluidic cold plate 2 through the microfluidic interface to be responsible for the heat dissipation of the preform on the silicon wafer substrate 3. A silicon wafer substrate 3 is arranged below the silicon-based microfluidic cold plate 2.

[0026] The lower heat dissipation module includes a mechanical heat dissipation structure cold plate 8 and a metal temperature averaging plate 9, and both the mechanical heat dissipation structure cold plate 8 and the metal temperature averaging plate 9 are existing equipment.

[0027] The heterogeneous composite wafer 23, the auxiliary PCB 6, the micro connector 5 and the power supply and distribution system are all arranged between the silicon-metal microchannel cold plate and the lower heat dissipation module.

[0028] The heterogeneous composite wafer 23 includes a silicon wafer substrate 3 and a carrier wafer 4. The silicon wafer substrate 3 includes a silicon wafer with TSV and RDL and a heterogeneous functional preform. The silicon wafer with TSV (through silicon via) and RDL (rewiring layer) is provided with a plurality of heterogeneous functional preforms. Specifically, the silicon wafer substrate 3 uses a silicon wafer as a carrier and integrates multiple types of heterogeneous functional preforms thereon using a D2W mounting process, so that it supports the main functions of the on-wafer system and supports processes such as TSV and DTC (deep trench capacitor technology).

[0029] A silicon-metal microchannel cold plate is arranged above the silicon wafer substrate 3, and a carrier wafer 4 is arranged below. The carrier wafer 4 includes a carrier substrate, a cavity 12, a passive device 13, a wafer bonding bump 19 and a contact pad 14. A plurality of cavities 12 are arranged inside the carrier substrate, and passive devices 13 (MLCC capacitors) are arranged in the cavities 12. Specifically, the carrier substrate has a cavity 12 structure inside, and MLCC capacitors can be buried, which does not affect the bonding of the silicon wafer and the carrier wafer 4, and can also effectively reduce the decoupling path length of the power supply plane. A wafer bonding bump 19 is arranged on the top of the carrier substrate, and the top of the wafer bonding bump 19 is bonded to the silicon wafer substrate 3.

[0030] Preferably, if Figure 3 As shown, a via 11 (Via) is also provided inside the carrier substrate. Specifically, the carrier wafer 4 uses ceramic as the base medium and adopts the HTCC / LTCC process. Through Via and internal multi-layer wiring, line transmission from the bottom of the silicon wafer substrate 3 to the micro connector 5 is realized to achieve IO interconnection and power supply.

[0031] A micro connector 5 is provided under the carrier wafer 4. Specifically, a contact pad 14 is provided at the bottom of the carrier substrate. The contact pad 14 is connected to the micro connector 5 and is used to realize the interconnection between the silicon wafer substrate 3 and the auxiliary PCB 6 through the micro connector 5. It selects the micro contact form (such as spring needles, wool buttons, etc.) that is most suitable for the wafer signal density and material physical properties. The high and low speed I\O and power supply pins of the silicon wafer substrate 3 are led out from the silicon wafer by mechanical crimping, which complies with the signal power integrity and signal integrity characteristics, and meets the position and coplanarity requirements.

[0032] The microconnector 5 includes a shell and fur buttons. A plurality of fur buttons are arranged inside the shell. The tops of the plurality of fur buttons extend out of the shell. The plurality of fur buttons are electrically connected to the contact pads 14, thereby realizing line transmission from the silicon wafer substrate 3 to the contact pads 14 of the microconnector 5.

[0033] An auxiliary PCB 6 is provided below the micro connector 5. The auxiliary PCB 6 is interconnected with the silicon wafer to provide a power supply channel and an external IO circuit for the prefabricated component, external high-speed IO output, and realize full system health management.

[0034] A power supply and distribution system is arranged below the auxiliary PCB6, and the power supply and distribution system includes a front-stage power supply PCB22, a rear-stage power supply module 7 and an external power supply interface 15. The rear-stage power supply module 7 includes a power conversion layer 17 and a decoupling capacitor layer 18. The decoupling capacitor layer 18 includes multiple filter capacitors. The auxiliary PCB6 is arranged above the decoupling capacitor layer 18, and the power conversion layer 17 is arranged below the decoupling capacitor layer 18. The auxiliary PCB, the decoupling capacitor layer 18 and the power conversion layer 17 are electrically connected in sequence, and the front-stage power supply PCB22 is arranged below the power conversion layer 17.

[0035] The front-stage power supply PCB 22 includes a front-stage power supply board 16 and a power supply connector 10 . The front-stage power supply board 16 is provided with the power supply connector 10 above and the external power supply interface 15 below. The power supply connector 10 is electrically connected to the power conversion layer 17 .

[0036] Specifically, Figure 4 As shown, the power supply and distribution system adopts a vertical, hierarchical and regional power supply method, including a front-stage power supply PCB22 and a rear-stage power supply module 7: the front-stage power supply PCB22 completes the conversion of the external input high voltage to low voltage, and supplies the low voltage to the rear-stage power supply module 7 through the power supply connector 10. The rear-stage power supply module 7 is sealed by a multi-layer PCB of a power conversion layer 17 (low voltage stage) + a decoupling capacitor layer 18 (input stage), and is mounted on an auxiliary PCB6 using SMT to supply power according to the power requirements of prefabricated parts in different areas of the silicon wafer.

[0037] In the application scenario of low voltage and high current, the multilayer ceramic capacitor integrated inside the carrier substrate serves as a beneficial supplement to the decoupling capacitor layer 18 of the rear-stage power supply module 7 of the power distribution system, completes the proximal decoupling function, and meets the power integrity requirements of the prefabricated parts.

[0038] A lower heat dissipation module is arranged below the power supply and distribution system. Specifically, a mechanical heat dissipation structure cold plate 8 is arranged between the auxiliary PCB 6 and the front-stage power supply PCB 22. The mechanical heat dissipation structure cold plate 8 surrounds the rear-stage power supply module 7. A metal temperature equalizing plate 9 is arranged below the front-stage power supply PCB 22 to facilitate heat dissipation of the power supply and distribution system.

[0039] Preferably, a plurality of positioning pin holes 20 and a plurality of positioning recesses 21 are provided on the heterogeneous composite wafer 23, and a plurality of positioning pins and a plurality of positioning blocks are also provided on the silicon-metal microchannel cold plate, wherein the plurality of positioning pins correspond to the positioning pin holes 20, and the plurality of positioning recesses 21 correspond to the positioning blocks, for fixing the heterogeneous composite wafer 23.

[0040] The silicon-metal microchannel cold plate is pin-connected to the microconnector 5, which can realize precise alignment and positioning of the system. The positioning pin plays a role in accurately positioning the position of the heterogeneous composite wafer 23 and the microconnector 5, which can ensure that the entire heterogeneous composite wafer 23 is in contact with the shell of the microconnector 5 to reduce the warping of the wafer, and can also provide precise positioning of the microconnector 5 in the vertical direction.

[0041] Example 2 On the basis of the above embodiments, the present invention proposes a stacking sequence of a system-on-wafer integration structure based on a heterogeneous composite wafer, which specifically includes: The heat dissipation cold plate 1 and the silicon-based microchannel cold plate 2 are combined into a silicon-metal microchannel cold plate, and the silicon-metal microchannel cold plate has two positioning pins and three positioning blocks.

[0042] like Figure 5 As shown, the silicon wafer substrate 3 after back thinning, RDL, D2W mounting, and plastic packaging is permanently bonded to the carrier wafer 4 embedded with MLCC capacitors to form a heterogeneous composite wafer 23. Figure 6 As shown, positioning holes are processed on the heterogeneous composite wafer 23, including three positioning holes 21 on the edge and two positioning pin holes 20 inside, which are used for accurate positioning of the wafer.

[0043] The heterogeneous composite wafer 23 is bonded to the surface of the silicon-metal microchannel cold plate and positioned by three positioning holes 21 set on the edge of the wafer and two pin holes on the surface. The top of the heterogeneous composite wafer 23 is initially fixed by the microconnector 5 shell. The position of the heterogeneous composite wafer 23 is adjusted during the fixing process until the three positioning holes 21 on the edge of the heterogeneous composite wafer 23 and the positioning blocks set at the same position of the silicon-metal microchannel cold plate are bonded.

[0044] The wool button and the micro connector 5 housing are assembled to achieve welding of the micro connector 5 and the heterogeneous composite wafer 23 so that they have a certain pre-tightening force.

[0045] The rear power supply module 7 is fixed on the auxiliary PCB 6 by solder ball SMT welding. The auxiliary PCB 6 is precisely positioned above the housing of the micro connector 5 by positioning pins.

[0046] The power supply connector 10 and the mechanical heat dissipation structure cold plate 8 are assembled to form a component, which is then connected to the silicon-metal microchannel cold plate by screws, and sufficient clamping force is applied to ensure that the power supply connector 10 and the subsequent power supply module 7 and the microconnector 5 are fully in contact with the auxiliary PCB 6 and the silicon wafer respectively.

[0047] Use screws to fix the metal temperature plate 9, the front-stage power supply PCB 22 and the mechanical heat dissipation structure cold plate 8 together, and use positioning pins to accurately position the front-stage power supply PCB 22.

[0048] Finally, a physical integration structure of the system on the heterogeneous composite wafer 23 is formed.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A system-on-wafer integration structure based on a heterogeneous composite wafer, characterized in that: include: Heterogeneous composite wafer (23), auxiliary PCB (6), micro connector (5), power supply and distribution system and heat dissipation system; The heat dissipation system comprises a silicon-metal microchannel cold plate and a lower heat dissipation module; the heterogeneous composite wafer (23), the auxiliary PCB (6), the microconnector (5) and the power supply and distribution system are all arranged between the silicon-metal microchannel cold plate and the lower heat dissipation module; the heterogeneous composite wafer (23) comprises a silicon wafer substrate (3) and a carrier wafer (4); a silicon-metal microchannel cold plate is arranged above the silicon wafer substrate (3) and a carrier wafer (4) is arranged below the silicon wafer substrate; and a microconnector (5) is arranged below the carrier wafer (4); An auxiliary PCB (6) is arranged below the micro connector (5), a power supply and distribution system is arranged below the auxiliary PCB (6), and a lower heat dissipation module is arranged below the power supply and distribution system.

2. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 1, characterized in that: The silicon wafer substrate (3) comprises a silicon wafer with TSV and RDL and a heterogeneous functional prefabricated component, wherein a plurality of heterogeneous functional prefabricated components are arranged on the silicon wafer with TSV and RDL; The carrier wafer (4) comprises a carrier substrate, a cavity (12), a passive device (13), a wafer bonding bump (19) and a contact pad (14); a plurality of cavities (12) are arranged inside the carrier substrate; the passive device (13) is arranged in the cavity (12); a wafer bonding bump (19) is arranged on the top of the carrier substrate; the top of the wafer bonding bump (19) is bonded to the silicon wafer substrate (3); and a contact pad (14) is arranged on the bottom of the carrier substrate.

3. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 2, characterized in that: A via (11) is also provided inside the carrier substrate.

4. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 1, characterized in that: The micro connector (5) comprises a shell and fur buttons, a plurality of fur buttons are arranged inside the shell, the tops of the plurality of fur buttons extend out of the shell, and the plurality of fur buttons are electrically connected to the contact pad (14).

5. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 1, characterized in that: The power supply and distribution system comprises a front-stage power supply PCB (22), a rear-stage power supply module (7) and an external power supply interface (15); the rear-stage power supply module (7) comprises a power conversion layer (17) and a decoupling capacitor layer (18); the decoupling capacitor layer (18) comprises a plurality of filter capacitors; an auxiliary PCB (6) is arranged above the decoupling capacitor layer (18) and a power conversion layer (17) is arranged below the decoupling capacitor layer (18); the auxiliary PCB, the decoupling capacitor layer (18) and the power conversion layer (17) are electrically connected in sequence; and a front-stage power supply PCB (22) is arranged below the power conversion layer (17); The front-stage power supply PCB (22) comprises a front-stage power supply board (16) and a power supply connector (10); the front-stage power supply board (16) is provided with a power supply connector (10) above and an external power supply interface (15) below; the power supply connector (10) is electrically connected to a power conversion layer (17).

6. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 4, characterized in that: The silicon-metal microchannel cold plate comprises a heat dissipation cold plate (1) and a silicon-based microfluidic cold plate (2); the silicon-based microfluidic cold plate (2) is arranged below the heat dissipation cold plate (1); and a silicon wafer substrate (3) is arranged below the silicon-based microfluidic cold plate (2); The lower heat dissipation module comprises a mechanical heat dissipation structure cold plate (8) and a metal temperature equalizing plate (9); a mechanical heat dissipation structure cold plate (8) is arranged between the auxiliary PCB (6) and the front-stage power supply PCB (22); the mechanical heat dissipation structure cold plate (8) surrounds the rear-stage power supply module (7); and a metal temperature equalizing plate (9) is arranged below the front-stage power supply PCB (22).

7. The system-on-wafer integration structure based on heterogeneous composite wafer according to claim 1, characterized in that: The heterogeneous composite wafer (23) is provided with a plurality of positioning pin holes (20) and a plurality of positioning slots (21); the silicon-metal microchannel cold plate is also provided with a plurality of positioning pins and a plurality of positioning blocks; the plurality of positioning pins correspond to the positioning pin holes (20), and the plurality of positioning slots (21) correspond to the positioning blocks; The silicon-metal microchannel cold plate is pin-connected to a microconnector (5).

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