Amplifier and amplifier chip

Abstract

The invention provides an amplifier and an amplifier chip, and the amplifier comprises a plurality of amplification circuits, each amplification circuit comprises at least one triode; the collector electrode of the triode in the previous amplifying circuit is connected with the base electrode of the triode in the next amplifying circuit; the base electrode of the triode in the first amplification circuit is connected with external input through a first capacitor; a collector electrode of a triode in the tail amplifying circuit outputs to the outside through a second capacitor; the emitter of the triode in the first amplification circuit is connected with a first inductor and is grounded, and the first inductor is configured to adjust an input signal. A base electrode of a triode in a first amplification circuit is connected with external input through a first capacitor, and an emitting electrode is connected with a first inductor. The on-chip inductor-free design of the input end is realized, the noise contribution caused by parasitic resistance can be reduced, and the noise temperature is improved. Meanwhile, input signals are adjusted through the first inductor, noise matching and input matching are achieved, and the performance of the amplifier is improved.

Description

Technical Field

[0001] The present application relates to the field of amplifiers, and in particular, to an amplifier and an amplifier chip. Background Art

[0002] In the current cryogenic low noise amplifier (LNA) design, in order to achieve noise matching and input matching at the input, passive inductor components are usually selected at the input. At room temperature, the quality factor (Q value) of these inductor components is usually in the range of 10 to 15. They play a key role in the circuit, helping to adjust and optimize the input impedance of the LNA, thereby ensuring that the signal can be transmitted efficiently and reduce reflections, while reducing noise interference.

[0003] However, although these passive inductor components show good performance at room temperature, their performance will be significantly affected when they are placed in a low temperature environment. The parasitic effects and losses of the inductor become an issue that cannot be ignored. Under low temperature conditions, the resistance inside the inductor component will change, resulting in increased losses, which in turn deteriorates the noise performance of the LNA. This deterioration will not only reduce the gain of the LNA, but also increase its noise figure, thus affecting the sensitivity and performance of the entire receiving system. Summary of the invention

[0004] In view of this, an object of the embodiments of the present application is to provide an amplifier and an amplifier chip capable of improving noise temperature.

[0005] In a first aspect, an embodiment of the present application provides an amplifier, comprising: a plurality of amplifier circuits, each of the amplifier circuits comprising at least one transistor; the collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit; the base of the transistor in the first amplifier circuit is connected to an external input via a first capacitor; the collector of the transistor in the tail amplifier circuit is output to the outside via a second capacitor; wherein the emitter of the transistor in the first amplifier circuit is connected to a first inductor and grounded, and the first inductor is configured to adjust the input signal.

[0006] In the above implementation process, by setting the base of the transistor in the first amplifier circuit to be connected to the external input through the first capacitor, the input end is designed without on-chip inductance, which can reduce the noise contribution introduced by the parasitic resistance, provide better noise performance, and improve the noise temperature. In addition, by connecting the emitter of the transistor in the first amplifier circuit to the first inductor, the input signal can be adjusted through the first inductor, thereby achieving noise matching and input matching at the input end, and improving the performance of the amplifier.

[0007] In one embodiment, the collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit through an intermediate capacitor and an intermediate inductor; and / or the collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit through the intermediate capacitor; wherein the intermediate inductor is configured to adjust the inter-stage matching between adjacent amplifier circuits.

[0008] In the above implementation process, by setting a variety of components between the collector of the transistor in the previous amplifier circuit and the base of the transistor in the next amplifier circuit, the corresponding components can be selected to connect the adjacent amplifier circuits according to the matching conditions between the adjacent amplifier circuits, thereby increasing the diversity of the connection between the adjacent amplifier circuits and improving the overall stability of the amplifier.

[0009] In one embodiment, the collector of the transistor in each of the amplifying circuits is connected to an external voltage source via a load inductor and a load resistor; wherein the load inductor and the load resistor are configured to adjust the gain of the corresponding amplifying circuit.

[0010] In the above implementation process, by setting the load inductance, the load inductance can be used to adjust the impedance matching situation, thereby improving the gain of the amplifier circuit.

[0011] In one embodiment, a feedback structure is provided in some or all of the other amplifier circuits except the first amplifier circuit; the feedback structure includes: a feedback capacitor and a feedback resistor; one end of the feedback capacitor is connected to the base of the transistor in the current amplifier circuit, and the other end of the feedback capacitor is connected to one end of the feedback resistor in the current amplifier circuit; the other end of the feedback resistor is connected to the collector of the transistor in the current amplifier circuit.

[0012] In the above implementation process, by connecting a resistor feedback structure in parallel between the base and collector of the transistor, a part of the output signal can be fed back to the input end, which can reduce the response to changes in the external environment, thereby improving the stability and reliability of the amplifier. In addition, by connecting a resistor feedback structure in parallel between the base and collector of the transistor, a part of the output signal can be fed back to the input end, reducing the output slew of the amplifier, improving its linearity, and improving the ability of the amplifier to process signals with a high dynamic range.

[0013] In one embodiment, the base of each transistor in the amplifying circuit is connected to a bias voltage source via a pull-down resistor; wherein the pull-down resistor is configured to adjust the bias voltage of the corresponding transistor.

[0014] In the above implementation process, by setting a pull-down resistor at the base of the transistor, on the one hand, the pull-down resistor can be used to set the base voltage of the transistor to improve the working stability of the transistor. On the other hand, the pull-down resistor can provide a stable DC bias for the base of the transistor to control the transistor to work in a suitable working area.

[0015] In one embodiment, there are three amplifier circuits; wherein the three amplifier circuits include: a first-stage amplifier circuit, a second-stage amplifier circuit and a third-stage amplifier circuit; the base of the transistor in the first-stage amplifier circuit is connected to the external input through the first capacitor; the emitter of the transistor in the first-stage amplifier circuit is connected to the first inductor and grounded; the base of the transistor in the second-stage amplifier circuit is connected to the collector of the transistor in the first-stage amplifier circuit; the collector of the transistor in the first-stage amplifier circuit is connected to the base of the transistor in the third-stage amplifier circuit; the collector of the transistor in the third-stage amplifier circuit is output to the outside through the second capacitor.

[0016] In the above implementation process, by setting up a three-stage amplifier circuit, each stage can increase the amplitude of the input signal, thereby improving the gain of the amplifier. In addition, since the gain of each stage of the amplifier can be accurately controlled, the precision and accuracy of the signal can also be improved.

[0017] In a second aspect, an embodiment of the present application further provides an amplifier chip, comprising: the amplifier in the above-mentioned first aspect, or any one of the embodiments of the first aspect; wherein the material of the amplifier chip comprises SiGe.

[0018] In the above implementation process, by setting the material of the amplifier chip to include SiGe, since SiGe has good electron mobility and carrier mobility, the contribution of electronic thermal noise and other noise sources can be significantly reduced, thereby improving the noise saturation problem of the amplifier chip.

[0019] In one embodiment, the spacing between adjacent transistors in the amplifier is within a set spacing range.

[0020] In the above implementation process, by setting the distance between adjacent transistors within a set distance range, the heat dissipation capacity of the amplifier chip can be improved, thereby achieving a better heat dissipation effect.

[0021] In one embodiment, the set spacing range includes greater than or equal to 170 mm.

[0022] In the above implementation process, by setting the spacing range to be greater than or equal to 170 mm, each device in the amplifier chip can achieve a better heat dissipation effect, thereby improving the overall heat dissipation effect of the amplifier chip.

[0023] In one embodiment, it further includes: a connection port; one end of the connection port is connected to the input end of the amplifier; the connection port is configured to be bonded to one end of a connector; wherein the other end of the connector is configured to be detachably connected to a circuit board provided with an inductor.

[0024] In the above implementation process, by providing a connection port on the amplifier chip, an external inductor can be connected through the connection port as needed to achieve noise matching and input matching, thereby increasing the application scenarios of the amplifier chip. In addition, since the Q value of the off-chip inductor is high, the performance of the amplifier chip can be improved.

[0025] In order to make the above-mentioned objects, features and advantages of the present application more obvious and understandable, embodiments are given below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A circuit diagram of an amplifier provided in an embodiment of the present application;

[0028] Figure 2 A schematic diagram of an amplifier circuit including three amplifier circuits provided in an embodiment of the present application;

[0029] Figure 3 A schematic diagram of low-temperature scattering parameter simulation test results provided in an embodiment of the present application;

[0030] Figure 4 The measurement results of OP1dB of the off-chip input inductor LNA provided in the embodiment of the present application at normal temperature and low temperature;

[0031] Figure 5 The noise temperature and gain of the low-temperature LNA (off-chip input inductor) provided in the embodiment of the present application are measured at a physical temperature of 4.2K.

[0032] Description of the drawings: Q-transistor, Q1-first transistor, R1-first capacitor, Ll1-first load inductor, Rl1-first load resistor, L1-first inductor, Rd1-first pull-down resistor, Q2-second transistor, Cm2-second intermediate capacitor, Lm2-second intermediate inductor, Ll2-second load inductor, Rl2-second load resistor, Rd2-second pull-down resistor, Cf2-second feedback capacitor, Rf2-second feedback resistor, Q3-third transistor, C2-second capacitor, Cm3-third intermediate capacitor, Ll3-third load inductor, Rl3-third load resistor, Rd3-third pull-down resistor, Cf3-third feedback capacitor, Rf3-third feedback resistor, 110-connection port, 120-connecting piece. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application.

[0034] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0035] A cryogenic low noise amplifier (LNA) is an amplifier specially designed to operate at extremely low temperatures and have extremely low noise levels. It is essential in many high-precision and high-sensitivity applications. In quantum computing, the reading of quantum bits is crucial, and cryogenic LNA is used to amplify the weak signals of quantum bits to ensure the accuracy and stability of quantum computer operations.

[0036] RF reflection dispersion quantum state reading is a technology used to read the state of qubits, especially for superconducting qubit systems. Cryogenic LNA can provide high-quality signal amplification to ensure accurate measurement and analysis of qubit reflection signals. In quantum computing systems, cryogenic LNA needs to be effectively integrated with other components (such as qubit control systems, RF transmission lines, etc.) to ensure the performance and stability of the entire system.

[0037] In RF reflection dispersion quantum state reading, an RF signal is first generated by an RF microwave source, and then sent to the quantum system to be measured through an attenuator and an isolator. The state of the subsystem to be measured will reflect the RF microwave signal, and these reflected signals carry the information of the quantum system. In order to effectively read these reflected signals, a low-temperature LNA is required to amplify them. The basic principle is: in order to read the state of the quantum bit, a microwave pulse is usually used to excite the superconducting quantum bit. The frequency of this pulse is usually adjusted to match the energy level transition frequency of the two-level system. When matching, energy level transitions occur, causing reflection and scattering of the microwave signal. This reflection and scattering property can be used to detect the state of the quantum bit. When the superconducting quantum bit is at different energy levels, its reflection and scattering characteristics for microwave signals will also change. This change is called the dispersion effect, and the state of the quantum bit can be detected by measuring the phase and amplitude of the microwave signal.

[0038] The noise of quantum state reading is mainly determined by the preamplifier. In order to improve the signal-to-noise ratio and reduce interconnection complexity, delay and power consumption, the microwave signal generation, low-noise amplification, signal sampling and quantum decision algorithm required for quantum reading are all integrated on a silicon-based integrated circuit chip working at low temperature (0.1~4K).

[0039] However, the inventors of the present application have found through long-term research that the passive inductor components integrated on the chip have poor Q values, which greatly deteriorates the noise.

[0040] In view of this, the present application proposes an amplifier, which realizes a design without on-chip inductance at the input end by setting the base of the transistor in the first amplifier circuit to be connected to the external input through the first capacitor, thereby reducing the noise contribution introduced by the parasitic resistance, providing better noise performance, and improving the noise temperature. In addition, by connecting the first inductor to the emitter of the transistor in the first amplifier circuit, the input signal can be adjusted through the first inductor, thereby realizing noise matching and input matching at the input end, and improving the performance of the amplifier.

[0041] To facilitate understanding of this embodiment, the amplifier disclosed in the embodiment of the present application is first introduced in detail.

[0042] like Figure 1 As shown, it is a circuit diagram of an amplifier, including: a plurality of amplifier circuits, each amplifier circuit including at least one transistor Q.

[0043] Among them, the collector of the transistor Q in the previous amplifier circuit is connected to the base of the transistor Q in the next amplifier circuit; the base of the transistor Q in the first amplifier circuit is connected to the external input through the first capacitor R1; the collector of the transistor Q in the tail amplifier circuit is output to the outside through the second capacitor C2; the emitter of the transistor Q in the first amplifier circuit is connected to the first inductor L1 and grounded.

[0044] The amplifier circuit here is an electronic circuit used to enhance the amplitude of the input signal. It can provide energy through the power supply to amplify the weak input signal to a larger output signal while maintaining the same change law as the original input signal.

[0045] Optionally, the amplifier circuit may include one or more of the following components: a signal source, a transistor Q, a base bias resistor, a collector resistor, a coupling capacitor, a load, etc. The specific structure of the amplifier circuit may be selected according to actual conditions.

[0046] The multiple amplifier circuits in the above amplifier are connected in sequence, and the multiple amplifier circuits are configured to perform multi-stage amplification on the signal input to the amplifier.

[0047] Optionally, the amplifier may include 2 amplifying circuits, 3 amplifying circuits, 4 amplifying circuits, etc., corresponding to performing 2-stage amplification, 3-stage amplification, 4-stage amplification, etc. on the signal input to the amplifier. The number of amplifying circuits in the amplifier may be selected according to actual conditions.

[0048] It should be understood that in the current low-temperature LNA design, in order to achieve noise matching and input matching at the input end, passive inductor components are usually set at the input end. The Q value of these passive inductor components is usually between 10 and 15°C at room temperature. Since the parasitic and loss of the inductor are the main reasons for noise deterioration, if passive inductor components are set at the input stage, the noise will be greatly deteriorated.

[0049] In the embodiment of the present application, the base of the transistor Q in the first amplifier circuit is connected to the external input only through the first capacitor R1, and no inductor element is provided at the input end, thereby reducing the noise contribution introduced by the parasitic resistance of the inductor at the input end, providing better noise performance and improving the noise temperature in a low temperature environment.

[0050] The first inductor L1 is configured to adjust an input signal, wherein the input signal may include a noise signal, a current signal, a voltage signal, etc., and the input signal may be selected according to actual conditions.

[0051] It can be understood that the emitter of the transistor Q in the first amplifier circuit is connected to the first inductor L1, and the input signal at the input end can be adjusted by adjusting the first inductor L1, thereby achieving noise matching and input matching at the input end. Since the first inductor L1 is arranged at the emitter of the transistor Q, no or very little parasitic resistance is generated, thereby reducing the introduced noise contribution.

[0052] The transistor Q in each of the above-mentioned amplifier circuits is configured to receive an input signal through the base and output an amplified signal through the collector to achieve signal amplification.

[0053] The first capacitor R1 is configured to filter out high-frequency noise at the input end and stabilize the amplifier circuit. The second capacitor C2 is configured to remove high-frequency noise or interference in the signal and improve the quality of the signal.

[0054] In the above implementation process, by setting the base of the transistor Q in the first amplifier circuit to be connected to the external input through the first capacitor R1, the input end is designed without on-chip inductance, which can reduce the noise contribution introduced by the parasitic resistance, provide better noise performance, and improve the noise temperature. In addition, by connecting the emitter of the transistor Q in the first amplifier circuit to the first inductor L1, the input signal can be adjusted through the first inductor L1, thereby achieving noise matching and input matching at the input end, and improving the performance of the amplifier.

[0055] In one possible implementation, the collector of the transistor Q in the previous amplifier circuit is connected to the base of the transistor Q in the next amplifier circuit through an intermediate capacitor and an intermediate inductor; and / or, the collector of the transistor Q in the previous amplifier circuit is connected to the base of the transistor Q in the next amplifier circuit through an intermediate capacitor.

[0056] It can be understood that when the matching conditions between the previous amplifier circuit and the next amplifier circuit are different, the element used to connect the previous amplifier circuit and the next amplifier circuit may need to be adjusted accordingly.

[0057] Exemplarily, when the gain matching of adjacent amplifier circuits does not meet the matching requirements, the collector of the transistor Q in the previous amplifier circuit is connected to the base of the transistor Q in the next amplifier circuit through the intermediate capacitor and the intermediate inductor. When the gain matching of adjacent amplifier circuits meets the matching requirements, the collector of the transistor Q in the previous amplifier circuit is connected to the base of the transistor Q in the next amplifier circuit through the intermediate capacitor.

[0058] The gain matching here is to match the input impedance, output impedance and impedance of the intermediate circuit of the circuit with the characteristic impedance of the transmission line or component to maximize the gain of the signal.

[0059] The above matching requirement may be a gain matching range for achieving maximum power gain, or a gain matching range for achieving optimal noise matching, etc. The matching requirement may be selected according to actual conditions.

[0060] The intermediate inductor is configured to adjust the inter-stage matching between adjacent amplifying circuits.

[0061] It should be understood that when the gain matching of adjacent amplifier circuits does not meet the matching requirements, by setting an intermediate inductor between the collector of the transistor Q in the previous amplifier circuit and the base of the transistor Q in the next amplifier circuit, and by adjusting the inductance value of the intermediate inductor, the impedance matching between the previous amplifier circuit and the next amplifier circuit can be adjusted, thereby improving the inter-stage matching capability between the adjacent amplifier circuits.

[0062] The intermediate capacitor here is configured to isolate the DC current between adjacent amplifying circuits to avoid mutual influence of the DC operating points between the various levels of the circuit.

[0063] In the above implementation process, by setting a variety of components between the collector of the transistor Q in the previous amplifier circuit and the base of the transistor Q in the next amplifier circuit, the corresponding components can be selected to connect the adjacent amplifier circuits according to the matching conditions between the adjacent amplifier circuits, thereby increasing the diversity of the connection between the adjacent amplifier circuits and improving the overall stability of the amplifier.

[0064] In a possible implementation, the collector of the transistor Q in each amplifier circuit is connected to an external voltage source via a load inductor and a load resistor.

[0065] The load inductor and the load resistor are configured to adjust the gain of the corresponding amplifier circuit.

[0066] It can be understood that the inductor can change the impedance characteristics of the circuit and help achieve impedance matching. By adjusting the value of the inductor, the output impedance of the transistor Q can be matched with the load impedance, thereby improving the power transmission efficiency. Among them, when the load impedance matches the source impedance, the circuit can obtain the maximum power from the signal source, thereby improving the gain.

[0067] In one embodiment, one end of the load inductor is connected to the collector of the corresponding transistor Q, one end of the load inductor is connected to one end of the load resistor, and the other end of the load resistor is connected to an external voltage source.

[0068] The above-mentioned load resistor is configured to limit the current flow in the circuit, thereby protecting the corresponding transistor Q.

[0069] In the above implementation process, by setting the load inductance, the load inductance can be used to adjust the impedance matching situation, thereby improving the gain of the amplifier circuit.

[0070] In a possible implementation manner, a feedback structure is provided in some or all of the amplifier circuits except the first amplifier circuit.

[0071] The feedback structure here is a structure in the control system that adjusts the control object by sending part or all of the output signal back to the input end, comparing it with the input signal and generating a deviation signal.

[0072] Optionally, a feedback structure is provided in one amplifier circuit other than the first amplifier circuit, a feedback structure is provided in two amplifier circuits other than the first amplifier circuit, or a feedback structure is provided in all amplifier circuits other than the first amplifier circuit. The amplifier circuit with the feedback structure can be selected according to actual conditions.

[0073] The above feedback structure can introduce a feedback current or voltage related to the output signal. This feedback signal can in turn affect the input signal, thereby offsetting the fluctuation of the input signal to a certain extent and improving the stability of the circuit.

[0074] In addition, the feedback structure can also change the gain of the transistor Q. For example, negative feedback usually reduces the gain of the circuit, while positive feedback may increase the gain of the circuit. By adjusting the parameters of the feedback network, the gain of the circuit can be precisely controlled.

[0075] The feedback structure includes a feedback capacitor and a feedback resistor.

[0076] In one embodiment, one end of the feedback capacitor is connected to the base of the transistor Q in the current amplifier circuit, and the other end of the feedback capacitor is connected to one end of the feedback resistor in the current amplifier circuit; the other end of the feedback resistor is connected to the collector of the transistor Q in the current amplifier circuit.

[0077] It should be understood that by connecting a resistor feedback structure in parallel between the base and collector of transistor Q, the stability of the LNA can be improved and the sensitivity to load and environmental changes can be reduced. Feeding back a portion of the output signal to the input can reduce the response to external environmental changes, thereby improving the stability and reliability of the amplifier. In addition, by connecting a resistor feedback structure in parallel between the base and collector of transistor Q, the linearity of the LNA can be improved and nonlinear distortion can be reduced. By feeding back a portion of the output signal to the input, the output slew of the amplifier can be reduced, thereby improving its linearity and making it more suitable for processing signals with a high dynamic range.

[0078] The feedback capacitor is configured to affect the frequency response characteristics of the circuit, and the feedback capacitor is also configured to suppress high-frequency noise in the circuit. By selecting the appropriate capacitance value and connection method, the signal within a specific frequency range can be enhanced or weakened, thereby adjusting the frequency characteristics of the circuit.

[0079] The feedback resistor is configured to change the gain of the circuit. By adjusting the resistance of the feedback resistor, the gain of the circuit can be accurately controlled.

[0080] In the above implementation process, by connecting a resistor feedback structure in parallel between the base and collector of the transistor Q, a part of the output signal can be fed back to the input end, which can reduce the response to changes in the external environment, thereby improving the stability and reliability of the amplifier. In addition, by connecting a resistor feedback structure in parallel between the base and collector of the transistor Q, a part of the output signal can be fed back to the input end, reducing the output slew of the amplifier, improving its linearity, and improving the ability of the amplifier to process signals with a high dynamic range.

[0081] In a possible implementation, the base of the transistor Q in each amplifying circuit is connected to a bias voltage source via a pull-down resistor.

[0082] The pull-down resistor is configured to adjust the bias voltage of the corresponding transistor Q.

[0083] The pull-down resistor here can be used to set the base voltage of transistor Q, thereby stabilizing its operating point. Without the pull-down resistor, the base voltage may be affected by external interference or noise, resulting in unstable working state of transistor Q.

[0084] In addition, the pull-down resistor can provide a stable DC bias for the base of the transistor Q, making it operate in the appropriate operating area.

[0085] In the above implementation process, by setting a pull-down resistor at the base of the transistor Q, on the one hand, the pull-down resistor can be used to set the base voltage of the transistor Q and improve the working stability of the transistor Q. On the other hand, the pull-down resistor can provide a stable DC bias for the base of the transistor Q and control the transistor Q to work in a suitable working area.

[0086] In a possible implementation, there are three amplification circuits.

[0087] The three amplifier circuits include: a first-stage amplifier circuit, a second-stage amplifier circuit and a third-stage amplifier circuit.

[0088] In one embodiment, the base of the transistor Q in the first-stage amplifier circuit is connected to the external input through the first capacitor R1; the emitter of the transistor Q in the first-stage amplifier circuit is connected to the first inductor L1 and grounded; the base of the transistor Q in the second-stage amplifier circuit is connected to the collector of the transistor Q in the first-stage amplifier circuit; the collector of the transistor Q in the first-stage amplifier circuit is connected to the base of the transistor Q in the third-stage amplifier circuit; the collector of the transistor Q in the third-stage amplifier circuit is output to the outside through the second capacitor C2.

[0089] Here, the gain matching between the first-stage amplifier circuit and the second-stage amplifier circuit does not meet the matching requirements, and the base of the transistor Q in the second-stage amplifier circuit is connected to the collector of the transistor Q in the first-stage amplifier circuit through an intermediate capacitor and an intermediate inductor.

[0090] The gain matching of the second-stage amplifier circuit and the third-stage amplifier circuit meets the matching requirements, and the base of the transistor Q in the second-stage amplifier circuit is connected to the collector of the transistor Q in the third-stage amplifier circuit through an intermediate capacitor.

[0091] In one embodiment, both the second-stage amplifier circuit and the third-stage amplifier circuit are provided with a feedback structure.

[0092] For example, Figure 2 As shown, the first-stage amplifier circuit includes a first transistor Q1, a first capacitor R1, a first load inductor Ll1, a first load resistor Rl1, a first inductor L1 and a first pull-down resistor Rd1; the second-stage amplifier circuit includes a second transistor Q2, a second intermediate capacitor Cm2, a second intermediate inductor Lm2, a second load inductor Ll2, a second load resistor Rl2, a second pull-down resistor Rd2, a second feedback capacitor Cf2 and a second feedback resistor Rf2; the third-stage amplifier circuit includes a third transistor Q3, a second capacitor C2, a third intermediate capacitor Cm3, a third load inductor Ll3, a third load resistor Rl3, a third pull-down resistor Rd3, a third feedback capacitor Cf3 and a third feedback resistor Rf3.

[0093] The base of the first transistor Q1 is connected to one end of the first capacitor R1 and one end of the first pull-down resistor Rd1, the other end of the first capacitor R1 is connected to the external input, and the other end of the first pull-down resistor Rd1 is connected to the first pull-down voltage; the emitter of the first transistor Q1 is connected to one end of the first inductor L1, and the other end of the first inductor L1 is grounded; the collector of the first transistor Q1 is connected to one end of the second intermediate capacitor Cm2 and one end of the first load inductor Ll1, and the other end of the second intermediate capacitor Cm2 is connected to the second intermediate inductor Lm 2, the other end of the first load inductor Ll1 is connected to one end of the first load resistor Rl1; the other end of the first load resistor Rl1 is connected to the first pull-up voltage; the other end of the second intermediate inductor Lm2 is connected to the base of the second triode and one end of the second feedback capacitor Cf2; the base of the second triode Q2 is connected to one end of the second pull-down resistor Rd2, and the other end of the second pull-down resistor Rd2 is connected to the second pull-down voltage; the collector of the second triode Q2 is connected to one end of the second feedback resistor Rf2, the base of the second triode Q2 is connected to one end of the second load inductor Ll2, and the base of the second triode Q2 is connected to one end of the second feedback resistor Rf2. one end and one end of the third intermediate capacitor Cm3; the other end of the second feedback resistor Rf2 is connected to the other end of the second feedback capacitor Cf2; the other end of the second load inductor Ll2 is connected to one end of the second load resistor Rl2, and the other end of the second load resistor Rl2 is connected to the second pull-up voltage; the emitter of the second triode Q2 is grounded; one end of the third intermediate capacitor Cm3 is connected to the base of the third triode Q3 and one end of the third intermediate capacitor Cm3, and the other end of the third intermediate capacitor Cm3 is connected to one end of the third intermediate inductor; the base of the third triode Q3 is connected to one end of the third pull-down resistor Rd3, and the other end of the third pull-down resistor Rd3 is connected to the third pull-down voltage; the collector of the third triode Q3 is connected to the other end of the third intermediate capacitor Cm3, one end of the third load inductor Ll3 and one end of the second capacitor C2; the other end of the third load inductor Ll3 is connected to one end of the third load resistor Rl3, and the other end of the third load resistor Rl3 is connected to the third pull-up voltage; the other end of the second capacitor C2 is connected to the external output, and the emitter of the third triode Q3 is grounded.

[0094] In the above implementation process, by setting up a three-stage amplifier circuit, each stage can increase the amplitude of the input signal, thereby improving the gain of the amplifier. In addition, since the gain of each stage of the amplifier can be accurately controlled, the precision and accuracy of the signal can also be improved.

[0095] like Figure 2 As shown, it is a circuit diagram of an amplifier chip, including: the amplifier in the above embodiment.

[0096] The material of the amplifier chip includes SiGe.

[0097] Here, SiGe is a compound semiconductor material composed of two elements, silicon and germanium.

[0098] Understandably, since CMOS (Complementary Metal Oxide Semiconductor) devices will produce noise saturation in low temperature environments (i.e., the noise of CMOS devices no longer decreases as the temperature decreases), SiGe material itself has better electron mobility and carrier mobility than pure silicon, which can significantly reduce the contribution of electronic thermal noise and other noise sources. By setting the material of the amplifier chip to include SiGe, the noise problem at low temperatures can be improved.

[0099] The above amplifier is arranged on a wafer, wherein various devices in the amplifier can be arranged on the wafer by etching, photolithography, etc.

[0100] In the above implementation process, by setting the material of the amplifier chip to include SiGe, since SiGe has good electron mobility and carrier mobility, the contribution of electronic thermal noise and other noise sources can be significantly reduced, thereby improving the noise saturation problem of the amplifier chip.

[0101] In a possible implementation, the spacing between adjacent transistors Q in the amplifier is within a set spacing range.

[0102] The set distance here refers to the distance that can ensure good heat dissipation between adjacent transistors Q.

[0103] Understandably, in ultra-low temperature environments, it is difficult for chip-level LNAs to dissipate heat and they usually have higher power consumption. By setting the spacing between adjacent transistors Q within a set spacing range, the heat dissipation capacity of the amplifier chip can be improved, thereby achieving a better heat dissipation effect.

[0104] Optionally, the set spacing range can be determined by multiple experiments or by setting an algorithm. The method for determining the set spacing range can be selected according to actual conditions.

[0105] In the above implementation process, by setting the distance between adjacent transistors Q within a set distance range, the heat dissipation capacity of the amplifier chip can be improved, thereby achieving a better heat dissipation effect.

[0106] In a possible implementation, the spacing range is set to be greater than or equal to 170 mm.

[0107] It can be understood that when the spacing range is set to be greater than or equal to 170 mm, each device in the amplifier chip can achieve a better heat dissipation effect.

[0108] In the above implementation process, by setting the spacing range to be greater than or equal to 170 mm, each device in the amplifier chip can achieve a better heat dissipation effect, thereby improving the overall heat dissipation effect of the amplifier chip.

[0109] In a possible implementation manner, the amplifier chip further includes: a connection port 110 .

[0110] One end of the connection port 110 is connected to the input end of the amplifier; the connection port 110 is configured to be bonded to one end of the connector 120 .

[0111] The connection port 110 here refers to the connection between the internal circuit of the chip and the peripheral circuit. These connection ports 110 are connected to the external circuit through wires to realize signal input, output, control and other functions. The connection port 110 is a bridge for connection and information exchange between the chip and the external circuit or device.

[0112] The other end of the connecting member 120 is configured to be detachably connected to a circuit board provided with an inductor.

[0113] The connector 120 may be a wire, a cable, a socket or other element, and the connector 120 may be selected according to actual needs.

[0114] It is understandable that if the amplifier chip works in a 4K low temperature environment, due to the performance change of the device, an inductor needs to be added to the input end to achieve noise matching and input matching, and a circuit board with an inductor can be connected through the connection port 110. That is, it is implemented in an off-chip form, and the Q value of the off-chip inductor is usually higher, which can provide better performance. For example, lower loss and higher Q value to reduce the contribution of thermal noise.

[0115] The following are several simulation examples to further verify the working effect of the amplifier in the embodiment of the present application:

[0116] Example 1: Figure 3 As shown, Figure 3 The simulation test results of low-temperature scattering parameters are shown (with an off-chip input inductor). In this example, the low-temperature LNA achieves a gain S21 greater than 33dB, an input return loss S11, and an output return loss S22 less than -8dB at a physical temperature of 4K in the frequency band of 2 to 14GHz. At a physical temperature of 300K, the gain S21 is greater than 30dB, and the output return loss S22 is less than -10dB.

[0117] Example 2: Figure 4 As shown, Figure 4The OP1dB measurement results of the LNA with external input inductance at room temperature and low temperature are shown. In this example, the 1dB compression point of the output at room temperature is about 0dBm, and the 1dB compression point of the output at low temperature is about -5dBm.

[0118] Example 3: Figure 5 Show, Figure 5 The noise temperature and gain of the low-temperature LNA (off-chip input inductor) are measured at a physical temperature of 4.2 K. In this example, within the frequency band of 2 to 14 GHz, the gain is greater than 33 dB, the noise temperature is around 3 K, and the minimum noise temperature can reach 2.8 K at a frequency of 7.9 GHz.

[0119] It can be further seen from the above examples that the amplifier in the embodiment of the present application can significantly reduce the contribution of electronic thermal noise and other noise sources, and improve the noise temperature in a low-temperature environment.

[0120] In the above implementation process, by providing the connection port 110 on the amplifier chip, an external inductor can be connected through the connection port 110 as needed to achieve noise matching and input matching, thereby increasing the application scenarios of the amplifier chip. In addition, since the Q value of the off-chip inductor is high, the performance of the amplifier chip can be improved.

[0121] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application. It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0122] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An amplifier, characterized in that: include: A plurality of amplifier circuits, each of which includes at least one triode; The collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit; The base of the transistor in the first amplifier circuit is connected to the external input through the first capacitor; The collector of the triode in the tail amplifier circuit is output to the outside through the second capacitor; The emitter of the transistor in the first amplifying circuit is connected to a first inductor and grounded, and the first inductor is configured to adjust an input signal.

2. The amplifier according to claim 1, characterized in that The collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit via an intermediate capacitor and an intermediate inductor; and / or The collector of the transistor in the previous amplifier circuit is connected to the base of the transistor in the next amplifier circuit through the intermediate capacitor; Wherein, the intermediate inductor is configured to adjust the inter-stage matching between adjacent amplifying circuits.

3. The amplifier according to claim 1, characterized in that The collector of each transistor in the amplifying circuit is connected to an external voltage source via a load inductor and a load resistor; Wherein, the load inductor and the load resistor are configured to adjust the gain of the corresponding amplifying circuit.

4. The amplifier according to claim 1, characterized in that Some or all of the other amplifier circuits except the first amplifier circuit are provided with feedback structures; The feedback structure includes: a feedback capacitor and a feedback resistor; One end of the feedback capacitor is connected to the base of the transistor in the current amplifier circuit, and the other end of the feedback capacitor is connected to one end of the feedback resistor in the current amplifier circuit; The other end of the feedback resistor is connected to the collector of the transistor in the current amplifying circuit.

5. The amplifier according to claim 1, characterized in that The base of each transistor in the amplifying circuit is connected to a bias voltage source via a pull-down resistor; Wherein, the pull-down resistor is configured to adjust the bias voltage of the corresponding transistor.

6. The amplifier according to any one of claims 1 to 5, characterized in that: There are three amplifier circuits; The three amplifier circuits include: a first-stage amplifier circuit, a second-stage amplifier circuit and a third-stage amplifier circuit; The base of the transistor in the first-stage amplifier circuit is connected to an external input via the first capacitor; The emitter of the transistor in the first-stage amplifier circuit is connected to the first inductor and grounded; The base of the transistor in the second-stage amplifier circuit is connected to the collector of the transistor in the first-stage amplifier circuit; The collector of the triode in the first-stage amplifying circuit is connected to the base of the triode in the third-stage amplifying circuit; The collector of the transistor in the third-stage amplifier circuit outputs to the outside through the second capacitor.

7. An amplifier chip, characterized in that: include: The amplifier according to any one of claims 1 to 6; Wherein, the material of the amplifier chip includes SiGe.

8. The amplifier chip according to claim 7, characterized in that: The spacing between adjacent triodes in the amplifier is within a set spacing range.

9. The amplifier chip according to claim 8, characterized in that: in, The set spacing range includes greater than or equal to 170 mm.

10. The amplifier chip according to claim 7, characterized in that: Also includes: Connection ports; One end of the connection port is connected to the input end of the amplifier; The connection port is configured to be bonded to one end of the connection member; Wherein, the other end of the connecting piece is configured to be detachably connected to a circuit board provided with an inductor.

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