Amplifier circuit and differential amplifier circuit

Abstract

The invention relates to an amplifier circuit, a differential amplifier circuit, a receiving circuit and a signal link. An amplifier circuit of the present application comprises: a current source; the first end of the current source is connected with the first power supply end; an input pipe; the drain end of the input tube is connected with the second end of the current source, and the input tube is configured as the signal output end of the amplifier circuit; any one of the source end and the grid end of the input tube is configured as a signal input end of the amplifier circuit; and the capacitance-inductance resonance body is coupled between the source end of the input tube and the second power supply end in series, and is used for enabling the gain of the amplifier circuit to form an extreme value at a set frequency. According to the invention, the CMT event can be filtered, and the influence of the CMT event on the signal link is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of isolated channel communication, and in particular to an amplifier circuit and a differential amplifier circuit. Background Art

[0002] Usually, there is a need to transmit signals or data between two systems in different voltage domains. For example, a system in one voltage domain (such as the low-voltage side) provides one or more control signals and transmits them to a system in another voltage domain (such as the high-voltage side) through a signal link to control the high-voltage side system. Then, digital isolators, such as capacitive isolated digital isolators, are usually set on the signal link to achieve isolation between different voltage domains.

[0003] However, this type of digital isolator using capacitor isolation is easily affected by common mode transient (CMT) events, resulting in signal interruption, loss, etc. Therefore, it is crucial to be able to resist CMT events and prevent the transmission of signals or data from being affected. Summary of the invention

[0004] In view of this, embodiments of the present application provide an amplifier circuit and a differential amplifier circuit to solve at least one problem existing in the background technology.

[0005] In a first aspect, an embodiment of the present application provides an amplifier circuit, the amplifier circuit comprising:

[0006] A current source; a first end of the current source is connected to a first power supply end;

[0007] an input tube; a drain end of the input tube is connected to the second end of the current source and is configured as a signal output end of the amplifier circuit; any one of a source end and a gate end of the input tube is configured as a signal input end of the amplifier circuit; and

[0008] Capacitor-inductor resonant body; the capacitor-inductor resonant body is coupled in series between the source end of the input tube and the second power supply end, and is used to make the gain of the amplifier circuit form an extreme value at a set frequency.

[0009] In combination with the first aspect, in an optional implementation,

[0010] The source end of the input tube is configured as the signal input end of the amplifier circuit; the gate end of the input tube is configured to obtain a bias voltage;

[0011] The capacitor-inductor resonant body is coupled in series between the signal input terminal and the second power supply terminal, so as to make the gain of the amplifier circuit reach a maximum value at a set frequency.

[0012] In combination with the first aspect, in an optional implementation,

[0013] The set frequency is equal to the carrier frequency of the signal received by the signal input end of the amplifier circuit, so that the signal chain in which the amplifier circuit is located limits the transmission of signals outside the passband including the set frequency, and transmits and amplifies the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator.

[0014] In combination with the first aspect, in an optional implementation,

[0015] The gate terminal of the input tube is configured as the signal input terminal of the amplifier circuit, so that the gain of the amplifier circuit forms a minimum value at a set frequency.

[0016] In combination with the first aspect, in an optional implementation,

[0017] The set frequency is less than the carrier frequency of the signal received at the signal input end of the amplifier circuit, so that the signal link in which the amplifier circuit is located limits the transmission of signals within the stop band containing the set frequency and transmits the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator and the high-pass characteristics of the signal link.

[0018] In a second aspect, an embodiment of the present application provides a differential amplifier circuit, the differential amplifier circuit comprising:

[0019] A first current source; a first end of the first current source is connected to a first power supply end;

[0020] A second current source; a first terminal of the second current source is connected to the first power supply terminal;

[0021] a first input tube; a drain end of the first input tube is connected to the second end of the first current source and is configured as a first signal output end of the differential amplifier circuit; any one of a source end and a gate end of the first input tube is configured as a first signal input end of the differential amplifier circuit;

[0022] a second input tube; a drain terminal of the second input tube is connected to the second terminal of the second current source and is configured as a second signal output terminal of the differential amplifier circuit; one of the source terminal and the gate terminal of the second input tube corresponding to the first signal input terminal is configured as a second signal input terminal of the differential amplifier circuit; and

[0023] Capacitor-inductor resonant body; the capacitor-inductor resonant body is respectively coupled in series between the source end and the second power supply end of the first input tube, and between the source end and the second power supply end of the second input tube, so as to make the gain of the differential amplifier circuit form an extreme value at a set frequency.

[0024] In conjunction with the second aspect, in an optional implementation,

[0025] The source end of the first input tube is configured as the first signal input end of the differential amplifier circuit; the source end of the second input tube is configured as the second signal input end of the differential amplifier circuit; the gate end of the first input tube and the gate end of the second input tube are respectively configured to obtain bias voltage;

[0026] The capacitor and inductor resonant bodies are respectively coupled in series between the first signal input terminal and the second power supply terminal, and between the second signal input terminal and the second power supply terminal, so as to make the gain of the differential amplifier circuit form a maximum value at a set frequency.

[0027] In conjunction with the second aspect, in an optional implementation,

[0028] The set frequency is equal to the carrier frequency of the signal received by the first signal input terminal or the second signal input terminal of the differential amplifier circuit, so that the signal link where the differential amplifier circuit is located limits the transmission of signals outside the passband including the set frequency, and transmits and amplifies the received signal; and the differential amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator.

[0029] In conjunction with the second aspect, in an optional implementation,

[0030] The gate end of the first input tube is configured as the first signal input end of the differential amplifier circuit, and the gate end of the second input tube is configured as the second signal input end of the differential amplifier circuit, so that the gain of the differential amplifier circuit forms a minimum value at a set frequency.

[0031] In conjunction with the second aspect, in an optional implementation,

[0032] The set frequency is less than the carrier frequency of the signal received by the first signal input terminal or the second signal input terminal of the differential amplifier circuit, so that the differential amplifier circuit limits the transmission of the signal within the stop band containing the set frequency and transmits the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator and the high-pass characteristics of the signal link.

[0033] In conjunction with the second aspect, in an optional implementation,

[0034] The capacitor-inductor resonator comprises a first capacitor, a first inductor and a second inductor;

[0035] The first end of the first capacitor is connected to the first end of the first inductor, and is connected to the source end of the first input tube as the first terminal of the capacitor-inductor resonator;

[0036] The second end of the first capacitor is connected to the first end of the second inductor and is connected to the source end of the second input tube as the second terminal of the capacitor-inductor resonator;

[0037] The second end of the first inductor and the second end of the second inductor are respectively connected to the second power supply end as the third connection terminal of the capacitor-inductor resonator.

[0038] In conjunction with the second aspect, in an optional implementation,

[0039] The differential amplifier circuit comprises a first MOS tube and a second MOS tube;

[0040] The source of the first MOS transistor is respectively connected to the first end of the first capacitor and the first end of the first inductor, and is configured as the first signal input end of the differential amplifier circuit; the source of the second MOS transistor is respectively connected to the second end of the first capacitor and the first end of the second inductor, and is configured as the second signal input end of the differential amplifier circuit;

[0041] The gate of the first MOS tube and the gate of the second MOS tube are respectively configured to obtain a bias voltage;

[0042] The drain of the first MOS tube is connected to the second end of the first current source and is configured as the first signal output end of the differential amplifier circuit; the drain of the second MOS tube is connected to the second end of the second current source and is configured as the second signal output end of the differential amplifier circuit.

[0043] In conjunction with the second aspect, in an optional implementation,

[0044] The differential amplifier circuit includes a third MOS tube and a fourth MOS tube;

[0045] The source of the third MOS tube is respectively connected to the first end of the first capacitor and the first end of the first inductor; the source of the fourth MOS tube is respectively connected to the second end of the first capacitor and the first end of the second inductor;

[0046] The gate of the third MOS transistor is configured as the first signal input terminal of the differential amplifier circuit; the gate of the fourth MOS transistor is configured as the second signal input terminal of the differential amplifier circuit;

[0047] The drain of the third MOS tube is connected to the second end of the first current source and is configured as the first signal output end of the differential amplifier circuit; the drain of the fourth MOS tube is connected to the second end of the second current source and is configured as the second signal output end of the differential amplifier circuit.

[0048] The beneficial effects brought about by the technical solution provided in the embodiments of the present application include: the amplifier circuit includes a current source, an input tube and a capacitor-inductor resonator coupled in series between a first power supply terminal and a second power supply terminal, so that the capacitor-inductor resonator is connected to the source end of the input tube to constitute a part of the amplifier; and any one of the source end and the gate end of the input tube is configured as the signal input end of the amplifier circuit, and the drain end of the input tube is configured as the signal output end of the amplifier circuit, so that the gain of the amplifier circuit forms an extreme value at a set frequency, and can form a bandpass or band-stop circuit, which is used in a signal link to block or filter a low-frequency CMT signal, thereby avoiding transmission interruption or loss of received signals or data, thereby filtering CMT events and reducing the impact of CMT events on the signal link.

[0049] Additional aspects and advantages of the embodiments of the present application will be given in part in the description below and in part will become apparent from the description below or will be learned through the practice of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0051] Figure 1 A schematic diagram of a specific example of the impact of a CMT event on a signal link;

[0052] Figure 2 A circuit diagram of a specific example of a signal link;

[0053] Figure 3 A schematic diagram of a principle block diagram of an amplifier circuit consistent with at least one embodiment of the present invention;

[0054] Figure 4 is a schematic diagram of a principle block diagram of a differential amplifier circuit consistent with at least one embodiment of the present invention;

[0055] Figure 5 1 is a circuit diagram of Example 1 of a differential amplifier circuit in an embodiment of the present application;

[0056] Figure 6 To adopt Figure 5 A simulation schematic diagram of a specific example of a differential amplifier circuit forming a bandpass circuit;

[0057] Figure 7 1 is a circuit diagram of Example 2 of the differential amplifier circuit in the embodiment of the present application;

[0058] Figure 8 To adopt Figure 7 The differential amplifier circuit shown is a simulation schematic diagram of a specific example of a band-stop circuit. DETAILED DESCRIPTION

[0059] In order to make the technical solutions and beneficial effects of the present invention more clearly understandable, the following is a detailed description by listing specific embodiments. The drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application belongs.

[0060] The embodiments of the present application are not exhaustive, but are only illustrative of some embodiments, and are not intended to be a specific limitation on the scope of protection of the present application. In the absence of contradiction, each step in a certain embodiment can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, in a certain embodiment, the solution after removing some steps can also be implemented as an independent embodiment, and the order of the steps in a certain embodiment can be arbitrarily exchanged. In addition, the optional implementations in a certain embodiment can be arbitrarily combined; in addition, the embodiments can be arbitrarily combined, for example, some or all of the steps of different embodiments can be arbitrarily combined, and a certain embodiment can be arbitrarily combined with the optional implementations of other embodiments.

[0061] In each embodiment of the present application, unless otherwise specified or there is a logical conflict, the terms and / or descriptions between the embodiments are consistent and can be referenced to each other. The technical features in different embodiments can be combined to form a new embodiment based on their internal logical relationships.

[0062] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0063] In the embodiments of the present application, unless otherwise specified, elements expressed in the singular form, such as "a", "an", "the", "above", "said", "aforementioned", "this", etc., may mean "one and only one", or "one or more", "at least one", etc. For example, when using articles such as "a", "an", "the" in English in translation, the noun after the article may be understood as a singular expression or a plural expression.

[0064] In the embodiments of the present application, "plurality" refers to two or more.

[0065] In some embodiments, the terms "at least one", "one or more", "a plurality of", "multiple", etc. can be used interchangeably.

[0066] The prefixes such as "first" and "second" in the embodiments of the present application are only used to distinguish different description objects, and do not constitute restrictions on the position, order, priority, value or content of the description objects. The statement of the description object refers to the description in the context of the claims or embodiments, and should not constitute unnecessary restrictions due to the use of prefixes. For example, the numerical value of the description object is not limited by the ordinal number, and can be one or more. Take "first device" as an example, where the numerical value of "device" can be one or more. In addition, the objects modified by different prefixes can be the same or different. For example, if the description object is "device", the "first device" and the "second device" can be the same device or different devices, and their types can be the same or different.

[0067] In some embodiments, the term "connection" may indicate that an electrical signal or data is transmitted between a connected end and a connected end, and may be understood as "electrical connection", "communication connection", etc. "Connection" may be a direct connection between two components, an indirect connection established through other components, internal communication between two components, or any other possible connection form.

[0068] In some embodiments, terms such as "greater than", "greater than or equal to", "not less than", "more than", "more than or equal to", "not less than", "higher than", "higher than or equal to", "not less than", "above", and "exceed" can be replaced with each other, and terms such as "less than", "less than or equal to", "not greater than", "less than", "less than or equal to", "no more than", "lower than", "lower than or equal to", "not higher than", and "below" can be replaced with each other.

[0069] In some embodiments, high voltage and low voltage, or high voltage and low voltage, may be relative values ​​and are not limited to absolute values.

[0070] Figure 1 A schematic diagram of a specific example of the impact of a CMT event on a signal link is shown. As shown in the figure, the first switch tube Q1 and the second switch tube Q2 are connected in series between the power input terminal VIN and the ground terminal GND. The connection node A between the first switch tube Q1 and the second switch tube Q2 is used to provide a working signal V SW , to control or adjust the working state of the lower-level load (such as motor, etc.).

[0071] Through the high-side driving module, the first switch tube Q1 can be turned on or off under the control of the first control signal PWM_T; through the low-side driving module, the second switch tube Q2 can be turned on or off under the control of the second control signal PWM_B to obtain the working signal V SW .

[0072] Since there may be a large DC or transient voltage difference between the power domain VCC of the first circuit for receiving the first control signal PWM_T and the power domain VCC_T of the second circuit for providing the control signal of the first switch tube Q1 in the high-side driver module, an isolation function circuit such as a capacitive isolation digital isolator is connected in series between the first circuit and the second circuit. Then, when transmitting signals normally, the first control signal PWM_T is modulated into a high-frequency signal by the modulator Mod so that it can be transmitted through the isolation capacitor or equivalent isolation capacitor C IO The signal is transmitted through the isolation functional circuit and reaches the amplifier Amp, and then is demodulated by the demodulator Demod to obtain the control signal of the first switch tube Q1 to control the on or off of the first switch tube Q1.

[0073] Figure 2 The circuit diagram of a specific example of a signal chain is shown. As shown in the figure, the signal or data DATA can be input from the input terminal IN of the signal chain, and can be transmitted through the modulator Mod, the first isolation capacitor C IO1 , the second isolation capacitor C IO2 After the amplifier Amp and the demodulator Demod, the signal is output from the output terminal OUT of the signal chain. In an exemplary application, the signal chain can implement signal or data transmission based on on-off keying modulation (OOK), or can also be based on other communication protocols.

[0074] Exemplarily, the first isolation capacitor C IO1 , the second isolation capacitor C IO2 It can be a discrete capacitor connected to both ends of the bonding wire; or, only one of them can be used in the signal chain; or, it can be a digital isolator with an equivalent isolation capacitor, such as being set at the front end of the amplifier Amp, and this application is not limited. In an exemplary application, the signal chain may include a transmitting circuit 201 and a receiving circuit 202; wherein the transmitting circuit 201 may include a modulator Mod and a first isolation capacitor C IO1 , the receiving circuit 202 may include a second isolation capacitor C IO2(or digital isolator), amplifier Amp and demodulator Demod. In an exemplary embodiment, the high-side driver module may be included in a separate package. At least one transmitting circuit 201 and at least one receiving circuit 202 may be integrated circuits of a multi-chip module, respectively, and are respectively arranged in separate packages of the high-side driver module. Among them, the transmitting circuit 201 and the receiving circuit 202 may be formed on one integrated circuit die, or may also be formed on different integrated circuit dies. In other exemplary embodiments, the transmitting circuit 201 and the receiving circuit 202 may also be independently included in separate packages.

[0075] refer to Figure 1 and Figure 2 When the first switch tube Q1 is controlled to be turned on, the working signal V SW A step from low level to high level will occur, and the signal of this step (low frequency signal) will pass through Figure 1 The arrow loop shown in the figure (a specific loop diagram showing the impact of CMT events on the signal chain) has an impact on the isolation capacitor C IO Charging may cause signal interruption or loss, which may be considered as the occurrence of the CMT event described in this application.

[0076] To this end, an embodiment of the present application provides an amplifier circuit that can be used in a signal chain, such as in a signal transmission path of a capacitively isolated digital isolator, to filter CMT events and reduce the impact of CMT events on the signal chain. In an exemplary application, the amplifier circuit can be used as an amplifier Amp in a signal chain, disposed at the front end of a demodulator Demod, but is not limited thereto.

[0077] Figure 3 A schematic block diagram of an amplifier circuit consistent with at least one embodiment of the present invention is shown. As shown in the figure, the amplifier circuit of the embodiment of the present application includes:

[0078] A current source 301; a first terminal of the current source 301 is connected to a first power supply terminal VDD;

[0079] an input tube 302; a drain end of the input tube 302 is connected to the second end of the current source 301 and is configured as a signal output end Vout of the amplifier circuit; any one of a source end and a gate end of the input tube 302 is configured as a signal input end Vin of the amplifier circuit; and

[0080] Capacitor-inductor resonant body 303; the capacitor-inductor resonant body 303 is coupled in series between the source end of the input tube 302 and the second power supply end VSS, so as to make the gain of the amplifier circuit form an extreme value at a set frequency.

[0081] In the embodiment of the present application, the first power supply terminal VDD and the second power supply terminal VSS are respectively used as power supply terminals of the circuit, and the voltage values ​​provided can be set according to actual needs. In an exemplary embodiment, the first power supply terminal VDD can provide a positive power supply voltage, and the second power supply terminal VSS can be grounded to provide a 0V voltage.

[0082] The input tube 302 may include at least one of the following transistors: MOSFET (Metal Oxide Semiconductor Field Effect Transistor, referred to as MOS tube; wherein N-type MOS tube is referred to as NMOS tube, and P-type MOS tube is referred to as PMOS tube); BJT (Triode); GTO (Gate Turn-Off Thyristor); IGBT (Insulated Gate Bipolar Transistor); MCT (MOS Controlled Thyristor); SIT (Static Induction Transistor). Accordingly, in some embodiments, the drain, source and gate of the input tube 302 may correspond to the drain D, source S and gate G of the MOS tube, respectively; or the collector C, emitter E and base B of the BJT. The input tube 302 may be a single transistor; or may be a plurality of transistors connected in series and / or in parallel, and each pole corresponding to a single transistor is formed, and also has the same working state as a single transistor, such as the on state and the off state. The input tube 302 may be used as an amplifier tube of an amplifier circuit.

[0083] The capacitor-inductor resonator 303 may include one or more groups of resonant units mainly composed of capacitors and inductors. Each resonant unit may include a capacitor and an inductor connected in series and in parallel, and a first end and a second end are formed at both ends of the resonant unit; then, the first end may be used as the first connection end of the capacitor-inductor resonator 303, and the second end may be used as the second connection end of the capacitor-inductor resonator 303. The first connection end of the capacitor-inductor resonator 303 may be connected to the source end of the input tube 302, and the second connection end of the capacitor-inductor resonator 303 may be connected to the second power supply end VSS, so the capacitor-inductor resonator 303 may become the load of the input tube 302, that is, the source end of the input tube 302 is connected to the capacitor-inductor resonator 303 load. And the drain end of the input tube 302 is configured as the signal output end Vout of the amplifier circuit, and any one of the source end and the gate end of the input tube 302 is configured as the signal input end Vin of the amplifier circuit, that is, the first port X1 or the second port X2 may be the signal input end Vin. In this way, the gain of the amplifier circuit can be set at the frequency f k An extreme value is formed at the capacitor-inductor resonator. The extreme value may be a maximum value or a minimum value. In an exemplary embodiment, the capacitor-inductor resonator 303 may include a capacitor and an inductor connected in series. Then, by connecting the inductor to the second power supply terminal VSS (such as grounding), when a CMT event occurs, the energy of the CMT large signal passes through the capacitor-inductor resonator, thereby filtering the CMT event and reducing the impact of the CMT event on the signal link.

[0084] If the gain of the amplifier circuit is set at the frequency f k The maximum value is formed at the point where the amplifier circuit can be used to form a frequency that includes the set frequency f k The passband f ON Bandpass circuit. Passband f ON The frequency range includes the carrier frequency f of the signal received by the signal input terminal Vin of the amplifier circuit. c , such as f k =f c , so the passband f ON The energy in the frequency range outside the range is blocked or filtered, and the received signal can be transmitted smoothly; among them, the passband f ON The frequency range outside of φ includes the frequency of the CMT signal (such as the above-mentioned step) generated by the CMT event.

[0085] If the gain of the amplifier circuit is set at the frequency f k The minimum value is formed at the point where the amplifier circuit can be used to form a frequency that includes the set frequency f k The stop band f OFF The signal input terminal Vin of the amplifier circuit receives the carrier frequency f of the signal. c Can be higher than the stop band f OFF Any frequency in k <f c Then, the stop band f OFF The energy within a certain frequency range is blocked or filtered, and the high-pass characteristics of the signal link itself can block a lot of CMT's low-frequency signal energy, so the link can receive the signal and transmit it smoothly. Set the frequency f k It is mainly determined by factors such as the resonant frequency of the capacitor and inductor resonator, and can be set according to actual needs.

[0086] In this way, the embodiment of the present application includes an amplifier circuit including a current source, an input tube and a capacitor-inductor resonator coupled in series between a first power supply terminal and a second power supply terminal, so that the capacitor-inductor resonator is connected to the source end of the input tube to constitute a part of the amplifier; and any one of the source end and the gate end of the input tube is configured as the signal input end of the amplifier circuit, and the drain end of the input tube is configured as the signal output end of the amplifier circuit, so that the gain of the amplifier circuit forms an extreme value at a set frequency, and can form a bandpass or bandstop circuit, which is used in a signal link to block or filter low-frequency CMT signals, thereby avoiding transmission interruption or loss of received signals or data, thereby filtering CMT events and reducing the impact of CMT events on the signal link.

[0087] In an optional implementation, the source end of the input tube 302 is configured as the signal input end Vin of the amplifier circuit; the gate end of the input tube 302 is configured to obtain a bias voltage Vbias;

[0088] The capacitor-inductor resonant body 303 is coupled in series between the signal input terminal Vin and the second power supply terminal VSS, and is used to make the gain of the amplifier circuit at the set frequency f k The maximum value is formed.

[0089] In an optional implementation, the set frequency f k is equal to the carrier frequency f of the signal received by the signal input terminal Vin of the amplifier circuit c , so that the amplifier circuit is located in a signal chain including the set frequency f k The passband f ON The signal other than the capacitor and the inductor is restricted from transmission, and the received signal is amplified; and the amplifier circuit forms a low-resistance channel based on the inductance in the capacitor and the inductor resonator.

[0090] In this way, the signal chain in which the amplifier circuit is located only amplifies the set frequency f k , limit signals other than the transmission frequency, transmit and amplify the received signal. At the same time, the inductor forms a low-resistance channel for the low-frequency CMT signal, and most of the energy of the CMT signal is released from the inductor. Then, the embodiment of the present application can make the gain of the amplifier circuit form a maximum value at the set frequency by inputting the received signal from the source end of the input tube, thereby forming a bandpass circuit. In addition, by setting the frequency at which the amplifier gain is maximum to the carrier frequency of the received signal, such as the frequency of the OOK signal carrier frequency, while filtering the CMT events, it also greatly improves the accuracy and success rate of the signal link transmission.

[0091] In an exemplary embodiment, the bias voltage Vbias input to the gate terminal of the input tube 302 can be provided by a bias circuit, but is not limited thereto and can be set according to actual needs. The bias circuit itself is not the inventive point of the present invention and will not be described in detail here.

[0092] In an optional embodiment, the gate terminal of the input tube 302 is configured as the signal input terminal Vin of the amplifier circuit, so that the gain of the amplifier circuit is set at the set frequency f k The minimum value is formed.

[0093] In an optional implementation, the set frequency f k is less than the carrier frequency f of the signal received by the signal input terminal Vin of the amplifier circuit c , so that the amplifier circuit is located in a signal chain including the set frequency f k The stop band f OFFThe signal within the capacitor and the inductor is limited to be transmitted, and the received signal is transmitted; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor and the inductor resonant body and the high-pass characteristic of the signal link.

[0094] Thus, the amplifier circuit can reduce the stop band f OFF The energy within a certain frequency range is blocked or filtered, and the high-pass characteristics of the signal link itself can block a lot of CMT's low-frequency signal energy. At the same time, most of the energy of the CMT signal is released from the inductor to form a low-resistance channel, so that the link can receive the signal and transmit it smoothly. Then, the embodiment of the present application can make the gain of the amplifier circuit form a minimum value at the set frequency by inputting the received signal from the gate end of the input tube, thereby forming a band-stop circuit. In addition, by setting the frequency at which the amplifier's gain is minimum to be lower than the carrier frequency of the received signal, such as the frequency of the OOK signal carrier frequency, while filtering the CMT event, it also avoids the impact on the normal transmission of the received signal, greatly improving the accuracy and success rate of the signal link transmission.

[0095] Figure 4 A schematic diagram of a principle block diagram of a differential amplifier circuit consistent with at least one embodiment of the present invention is shown. As shown in the figure, the embodiment of the present application also provides a differential amplifier circuit, the differential amplifier circuit comprising:

[0096] A first current source 411; a first terminal of the first current source 411 is connected to a first power supply terminal VDD;

[0097] A second current source 412; a first terminal of the second current source 412 is connected to the first power supply terminal VDD;

[0098] a first input tube 421; a drain terminal of the first input tube 421 is connected to the second terminal of the first current source 411 and is configured as a first signal output terminal Voutp of the differential amplifier circuit; any one of a source terminal and a gate terminal of the first input tube 421 is configured as a first signal input terminal Vinp of the differential amplifier circuit;

[0099] a second input tube 422; a drain terminal of the second input tube 422 is connected to the second terminal of the second current source 412 and is configured as a second signal output terminal Voutn of the differential amplifier circuit; one of a source terminal and a gate terminal of the second input tube 422 corresponding to the first signal input terminal Vinp is configured as a second signal input terminal Vinn of the differential amplifier circuit; and

[0100] The capacitor-inductor resonant body 430 is respectively coupled in series between the source end and the second power supply end VSS of the first input tube 421, and between the source end and the second power supply end VSS of the second input tube 422, so as to form an extreme value of the gain of the differential amplifier circuit at a set frequency.

[0101] In the embodiment of the present application, the configuration of the first input tube 421 and the second input tube 422 may refer to the above-mentioned input tube 302; wherein, the first input tube 421 and the second input tube 422 may constitute an input pair of tubes of a differential amplifier circuit.

[0102] The configuration of the capacitor-inductor resonator 430 may refer to the above-mentioned capacitor-inductor resonator 303, and will not be described in detail here. Exemplarily, in order for the capacitor-inductor resonator 430 to become a common load of the input pair of tubes, the capacitor-inductor resonator 430 may have two first connection ends, the source end of the first input tube 421 may be connected to one of the two first connection ends of the capacitor-inductor resonator 430, and the source end of the second input tube 422 may be connected to the other of the two first connection ends of the capacitor-inductor resonator 430, so that the source ends of the input pair of tubes are respectively connected to the capacitor-inductor resonator 430 load. In an exemplary embodiment, the capacitor-inductor resonator 430 may include two groups of resonant units, and the two groups of resonant units may respectively use different capacitor and inductor devices, and there are no shared devices; or, there may be partially shared devices, which can be configured according to actual needs.

[0103] refer to Figure 4 , the first signal output terminal Voutp can be the positive output terminal of the differential amplifier circuit, and the second signal output terminal Voutn can be the negative output terminal of the differential amplifier circuit; the first port X11 (gate terminal) or the second port X21 (source terminal) can be the first signal input terminal Vinp, which can be the positive input terminal of the differential amplifier circuit, and correspondingly, the first port X12 (gate terminal) or the second port X22 (source terminal) can be the second signal input terminal Vinn, which can be the negative input terminal of the differential amplifier circuit.

[0104] The differential amplifier circuit is set at frequency f k The gain extreme value formed at the position can be the maximum value or the minimum value, so that a differential amplifier circuit can be used to form a gain having a setting frequency f k The passband f ON A bandpass circuit or a circuit having a set frequency f k The stop band f OFF Similar to the principle of using the amplifier circuit to block or filter the CMT signal, the differential amplifier circuit can also block or filter the CMT signal and ensure the smooth transmission of the received signal.

[0105] Thus, the embodiment of the present application includes a current source (first current source and second current source) coupled in series between the first power supply terminal and the second power supply terminal, an input tube (first input tube and second input tube, i.e., input pair tube) and a capacitor-inductor resonant body through a differential amplifier circuit, so that the capacitor-inductor resonant body is respectively connected to the source end of the input pair tube to form a part of the differential amplifier; and any pair of the pair of source ends and the pair of gate ends of the input pair tube is configured as a pair of signal input ends of the differential amplifier circuit, and the pair of drain ends of the input pair tube is configured as a pair of signal output ends of the differential amplifier circuit, so that the gain of the differential amplifier circuit forms an extreme value at the set frequency, and can form a bandpass or band-stop circuit, which is used in the signal link to block or filter the low-frequency CMT signal, thereby avoiding the transmission interruption or loss of the received signal or data, and filtering the CMT event, reducing the impact of the CMT event on the signal link. And through the differential amplifier circuit, the anti-interference ability and signal amplification accuracy are improved, and it has the advantage of high common mode rejection ratio.

[0106] In an exemplary embodiment, the current source 301, the first current source 411, and the second current source 412 can provide a constant current that is substantially independent of or related to changes in process, voltage, and temperature. The current source itself is not the inventive point of the present invention and will not be described in detail here.

[0107] In an optional implementation, the source end of the first input tube 421 is configured as the first signal input end Vinp of the differential amplifier circuit; the source end of the second input tube 422 is configured as the second signal input end Vinn of the differential amplifier circuit; the gate end of the first input tube 421 and the gate end of the second input tube 422 are respectively configured to obtain a bias voltage Vbias;

[0108] The capacitor-inductor resonant body 430 is respectively coupled in series between the first signal input terminal Vinp and the second power supply terminal VSS, and between the second signal input terminal Vinn and the second power supply terminal VSS, for making the gain of the differential amplifier circuit at the set frequency f k The maximum value is formed.

[0109] In an optional implementation, the set frequency f k is equal to the carrier frequency f of the signal received by the first signal input terminal Vinp or the second signal input terminal Vinn of the differential amplifier circuit c , so that the signal chain in which the differential amplifier circuit is located includes the set frequency f k The passband f ON The invention also provides a method for transmitting and amplifying the received signal, and for enabling the differential amplifier circuit to form a low-impedance channel based on the inductance in the capacitor-inductor resonator.

[0110] In this way, the signal link in which the differential amplifier circuit is located limits signals other than the transmission frequency, transmits and amplifies the received signal, and at the same time, the inductor forms a low-resistance channel for the low-frequency CMT signal, and most of the energy of the CMT signal is released from the inductor. Then, the embodiment of the present application can make the gain of the differential amplifier circuit form a maximum value at a set frequency by inputting the received signal from the source end of the input pair tube, thereby forming a bandpass circuit. In addition, by setting the frequency at which the differential amplifier gain is maximum to the carrier frequency of the received signal, such as the frequency of the OOK signal carrier frequency, while filtering the CMT events, the accuracy and success rate of the signal link transmission are greatly improved.

[0111] In an optional embodiment, the gate end of the first input tube 421 is configured as the first signal input end Vinp of the differential amplifier circuit, and the gate end of the second input tube 422 is configured as the second signal input end Vinn of the differential amplifier circuit, so that the gain of the amplifier circuit is set at the set frequency f k The minimum value is formed.

[0112] In an optional implementation, the set frequency f k is less than the carrier frequency f of the signal received by the first signal input terminal Vinp or the second signal input terminal Vinn of the differential amplifier circuit. c , so that the signal chain in which the differential amplifier circuit is located includes the set frequency f k The stop band f OFF The signal within the capacitor and the inductor is limited to be transmitted, and the received signal is transmitted; and the differential amplifier circuit forms a low-impedance channel based on the inductance in the capacitor and the inductor resonant body and the high-pass characteristic of the signal link.

[0113] Thus, the differential amplifier circuit can stop the band f OFF The energy within a certain frequency range is blocked or filtered, and the high-pass characteristics of the signal link itself can block a lot of CMT's low-frequency signal energy. At the same time, most of the energy of the CMT signal is released from the inductor to form a low-resistance channel, so that the link can receive the signal and transmit it smoothly. Then, the embodiment of the present application can make the gain of the differential amplifier circuit form a minimum value at the set frequency by receiving the signal from the gate end of the input pair of tubes, thereby forming a band-stop circuit. In addition, by setting the frequency at which the differential amplifier has the minimum gain to be lower than the carrier frequency of the received signal, such as the frequency of the OOK signal carrier frequency, while filtering the CMT events, it also avoids the impact on the normal transmission of the received signal, greatly improving the accuracy and success rate of the signal link transmission.

[0114] Figure 5The circuit diagram of Example 1 of the differential amplifier circuit in the embodiment of the present application is shown. As shown in the figure, in an optional implementation, the capacitor-inductor resonant body 430 includes a first capacitor C1, a first inductor L1 and a second inductor L2;

[0115] The first end of the first capacitor C1 is connected to the first end of the first inductor L1, and is connected to the source end of the first input tube 421 as the first terminal of the capacitor-inductor resonator 430;

[0116] The second end of the first capacitor C1 is connected to the first end of the second inductor L2, and is connected to the source end of the second input tube 422 as the second connection terminal of the capacitor-inductor resonator 430;

[0117] The second end of the first inductor L1 and the second end of the second inductor L2 are respectively connected to the second power supply terminal VSS as the third connection terminal of the capacitor-inductor resonator 430 .

[0118] In this way, the embodiment of the present application can form a first group of resonance units through the first capacitor C1 and the first inductor L1, and can form a second group of resonance units through the first capacitor C1 and the second inductor L2, wherein there is a shared first capacitor C1, thereby reducing the use of devices, reducing the layout area, facilitating miniaturization, and saving costs.

[0119] In an exemplary embodiment, the first capacitor C1 can be a single capacitor, or a plurality of capacitors connected in series and / or in parallel; similarly, the first inductor L1 and the second inductor L2 can be single inductors, or a plurality of inductors connected in series and / or in parallel. In the differential amplifier circuit, the first inductor L1 and the second inductor L2 can be center-tapped differential inductors, or single-ended inductors.

[0120] In an optional implementation, the differential amplifier circuit includes a first MOS transistor M1 and a second MOS transistor M2;

[0121] The source of the first MOS transistor M1 is respectively connected to the first end of the first capacitor C1 and the first end of the first inductor L1, and is configured as the first signal input terminal Vinp of the differential amplifier circuit; the source of the second MOS transistor M2 is respectively connected to the second end of the first capacitor C1 and the first end of the second inductor L2, and is configured as the second signal input terminal Vinn of the differential amplifier circuit;

[0122] The gate of the first MOS transistor M1 and the gate of the second MOS transistor M2 are respectively configured to obtain a bias voltage Vbias;

[0123] The drain of the first MOS transistor M1 is connected to the second end of the first current source 411 and is configured as the first signal output terminal Voutp of the differential amplifier circuit; the drain of the second MOS transistor M2 is connected to the second end of the second current source 412 and is configured as the second signal output terminal Voutn of the differential amplifier circuit.

[0124] Figure 6 Shows the use of Figure 5 The differential amplifier circuit shown in FIG. 1 is a simulation schematic diagram of a specific example of a bandpass circuit. As shown in the figure, the output voltage of the first signal output terminal Voutp is at a set frequency f k There is a maximum gain at f k can be equal to f c , using the passband frequency response characteristics of the differential amplifier circuit and the inductance in the capacitor-inductor resonant body, most of the energy of the CMT signal can be released, thereby blocking or filtering out most of the energy of the CMT signal whose frequency is on the left side of the passband, and the carrier frequency f is not attenuated. c Useful reception signal around.

[0125] Figure 7 The circuit diagram of Example 2 of the differential amplifier circuit in the embodiment of the present application is shown. As shown in the figure, in an optional implementation, the differential amplifier circuit includes a third MOS tube M3 and a fourth MOS tube M4;

[0126] The source of the third MOS tube M3 is connected to the first end of the first capacitor C1 and the first end of the first inductor L1 respectively; the source of the fourth MOS tube M4 is connected to the second end of the first capacitor C1 and the first end of the second inductor L2 respectively;

[0127] The gate of the third MOS transistor M3 is configured as the first signal input terminal Vinp of the differential amplifier circuit; the fourth MOS transistor M4 is configured as the second signal input terminal Vinn of the differential amplifier circuit;

[0128] The drain of the third MOS transistor M3 is connected to the second end of the first current source 411 and is configured as the first signal output end Voutp of the differential amplifier circuit; the drain of the fourth MOS transistor M4 is connected to the second end of the second current source 412 and is configured as the second signal output end Voutn of the differential amplifier circuit.

[0129] Figure 8 Shows the use of Figure 7 The differential amplifier circuit shown in the figure is a simulation schematic diagram of a specific example of a band-stop circuit. As shown in the figure, the output voltage of the first signal output terminal Voutp is at a set frequency f k There is a gain minimum at f c Can be located at fk In an exemplary embodiment, the band-stop frequency response characteristics of the differential amplifier circuit and the high-pass filter characteristics of the signal chain can be utilized, and the inductance in the capacitor-inductor resonant body can release most of the energy of the CMT signal, so that most of the energy of the CMT signal can be blocked or filtered out without attenuating the carrier frequency f c Useful reception signal around.

[0130] In an optional implementation manner, the first MOS transistor M1 and the second MOS transistor M2 are NMOS transistors or PMOS transistors;

[0131] The third MOS tube M3 and the fourth MOS tube M4 are NMOS tubes or PMOS tubes.

[0132] Exemplarily, the source of the PMOS tube is connected to the capacitor and inductor resonator, the drain is configured as the output end of the differential amplifier circuit and connected to the current source, and the gate or source of the PMOS tube is the input end of the differential amplifier circuit.

[0133] In an optional implementation, the first current source 411 and the second current source 412 include at least one of the following: a constant current source; a resistor.

[0134] Exemplarily, the current source may be a resistor, a current source (constant current source), or the like.

[0135] refer to Figure 2 , Figure 3 and Figure 4 , an embodiment of the present application further provides a receiving circuit, the receiving circuit comprising at least one of the following:

[0136] The amplifier circuit as described in the above embodiment;

[0137] The differential amplifier circuit as described in the above embodiment.

[0138] refer to Figure 1 , Figure 2 , Figure 3 and Figure 4 , an embodiment of the present application further provides a signal link, the signal link comprising a transmitting circuit and a receiving circuit as described in the above embodiment.

[0139] In an exemplary embodiment, a signal chain may include:

[0140] A modulator, for modulating a communication signal into a high-frequency signal using a carrier signal;

[0141] An isolation functional circuit, used for isolating high voltage and transmitting the high frequency signal;

[0142] The amplifier circuit as described in the above embodiment, and / or the differential amplifier circuit as described in the above embodiment, is used to filter signals (such as CMT signals) with frequencies lower than a set frequency, and transmit the high-frequency signal (the amplifier circuit or the differential amplifier circuit receives the signal); and

[0143] The demodulator is used to demodulate the high frequency signal to obtain a demodulated signal corresponding to the communication signal.

[0144] When the amplifier circuit or the differential amplifier circuit forms a band-stop circuit, the high-pass characteristic of the link and the effect of the inductance in the capacitor-inductor resonator can be combined to filter signals with frequencies lower than the set frequency.

[0145] In this way, the circuit structure of the embodiment of the present application is simple. The resonant body composed of inductors and capacitors is connected to the source end of the MOS tube to form a part of the amplifier and is used in the signal transmission path of the digital isolation chip. It achieves filtering of CMT events, reduces the impact of CMT events on the signal link, and can greatly reduce the amplitude of common-mode transient interference, thereby greatly improving the probability of successful OOK demodulation.

[0146] It should be understood that the above embodiments are exemplary and are not intended to include all possible implementations. Various modifications and changes may also be made on the basis of the above embodiments without departing from the scope of the present disclosure. Similarly, the various technical features of the above embodiments may also be combined arbitrarily to form other embodiments of the present application that may not be clearly described. Therefore, the above embodiments only express several implementations of the present application and do not limit the scope of protection of the patent of this application.

Claims

1. An amplifier circuit, characterized in that: The amplifier circuit comprises: A current source; a first end of the current source is connected to a first power supply end; an input tube; a drain end of the input tube is connected to the second end of the current source and is configured as a signal output end of the amplifier circuit; any one of a source end and a gate end of the input tube is configured as a signal input end of the amplifier circuit; and Capacitor-inductor resonant body; the capacitor-inductor resonant body is coupled in series between the source end of the input tube and the second power supply end, and is used to make the gain of the amplifier circuit form an extreme value at a set frequency.

2. The amplifier circuit according to claim 1, characterized in that The source end of the input tube is configured as the signal input end of the amplifier circuit; the gate end of the input tube is configured to obtain a bias voltage; The capacitor-inductor resonant body is coupled in series between the signal input terminal and the second power supply terminal, so as to make the gain of the amplifier circuit reach a maximum value at a set frequency.

3. The amplifier circuit according to claim 2, characterized in that The set frequency is equal to the carrier frequency of the signal received by the signal input end of the amplifier circuit, so that the signal chain in which the amplifier circuit is located limits the transmission of signals outside the passband including the set frequency, and transmits and amplifies the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator.

4. The amplifier circuit according to claim 1, characterized in that The gate terminal of the input tube is configured as the signal input terminal of the amplifier circuit, so that the gain of the amplifier circuit forms a minimum value at a set frequency.

5. The amplifier circuit according to claim 4, characterized in that The set frequency is less than the carrier frequency of the signal received at the signal input end of the amplifier circuit, so that the signal link in which the amplifier circuit is located limits the transmission of signals within the stop band containing the set frequency and transmits the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator and the high-pass characteristics of the signal link.

6. A differential amplifier circuit, characterized in that: The differential amplifier circuit comprises: A first current source; a first end of the first current source is connected to a first power supply end; A second current source; a first terminal of the second current source is connected to the first power supply terminal; a first input tube; a drain end of the first input tube is connected to the second end of the first current source and is configured as a first signal output end of the differential amplifier circuit; any one of a source end and a gate end of the first input tube is configured as a first signal input end of the differential amplifier circuit; a second input tube; a drain terminal of the second input tube is connected to the second terminal of the second current source and is configured as a second signal output terminal of the differential amplifier circuit; one of the source terminal and the gate terminal of the second input tube corresponding to the first signal input terminal is configured as a second signal input terminal of the differential amplifier circuit; and Capacitor-inductor resonant body; the capacitor-inductor resonant body is respectively coupled in series between the source end and the second power supply end of the first input tube, and between the source end and the second power supply end of the second input tube, so as to make the gain of the differential amplifier circuit form an extreme value at a set frequency.

7. The differential amplifier circuit according to claim 6, characterized in that: The source end of the first input tube is configured as the first signal input end of the differential amplifier circuit; the source end of the second input tube is configured as the second signal input end of the differential amplifier circuit; the gate end of the first input tube and the gate end of the second input tube are respectively configured to obtain bias voltage; The capacitor and inductor resonant bodies are respectively coupled in series between the first signal input terminal and the second power supply terminal, and between the second signal input terminal and the second power supply terminal, so as to make the gain of the differential amplifier circuit form a maximum value at a set frequency.

8. The differential amplifier circuit according to claim 7, characterized in that: The set frequency is equal to the carrier frequency of the signal received by the first signal input terminal or the second signal input terminal of the differential amplifier circuit, so that the signal link where the differential amplifier circuit is located limits the transmission of signals outside the passband including the set frequency, and transmits and amplifies the received signal; and the differential amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator.

9. The differential amplifier circuit according to claim 6, wherein: The gate end of the first input tube is configured as the first signal input end of the differential amplifier circuit, and the gate end of the second input tube is configured as the second signal input end of the differential amplifier circuit, so that the gain of the differential amplifier circuit forms a minimum value at a set frequency.

10. The differential amplifier circuit according to claim 9, characterized in that: The set frequency is less than the carrier frequency of the signal received by the first signal input terminal or the second signal input terminal of the differential amplifier circuit, so that the differential amplifier circuit limits the transmission of the signal within the stop band containing the set frequency and transmits the received signal; and the amplifier circuit forms a low-impedance channel based on the inductance in the capacitor-inductor resonator and the high-pass characteristics of the signal link.

11. The differential amplifier circuit according to any one of claims 6 to 10, characterized in that: The capacitor-inductor resonator comprises a first capacitor, a first inductor and a second inductor; The first end of the first capacitor is connected to the first end of the first inductor, and is connected to the source end of the first input tube as the first terminal of the capacitor-inductor resonator; The second end of the first capacitor is connected to the first end of the second inductor and is connected to the source end of the second input tube as the second terminal of the capacitor-inductor resonator; The second end of the first inductor and the second end of the second inductor are respectively connected to the second power supply end as the third connection terminal of the capacitor-inductor resonator.

12. The differential amplifier circuit according to claim 11, characterized in that: The differential amplifier circuit comprises a first MOS tube and a second MOS tube; The source of the first MOS transistor is respectively connected to the first end of the first capacitor and the first end of the first inductor, and is configured as the first signal input end of the differential amplifier circuit; the source of the second MOS transistor is respectively connected to the second end of the first capacitor and the first end of the second inductor, and is configured as the second signal input end of the differential amplifier circuit; The gate of the first MOS tube and the gate of the second MOS tube are respectively configured to obtain a bias voltage; The drain of the first MOS tube is connected to the second end of the first current source and is configured as the first signal output end of the differential amplifier circuit; the drain of the second MOS tube is connected to the second end of the second current source and is configured as the second signal output end of the differential amplifier circuit.

13. The differential amplifier circuit according to claim 11, wherein: The differential amplifier circuit includes a third MOS tube and a fourth MOS tube; The source of the third MOS tube is respectively connected to the first end of the first capacitor and the first end of the first inductor; the source of the fourth MOS tube is respectively connected to the second end of the first capacitor and the first end of the second inductor; The gate of the third MOS transistor is configured as the first signal input terminal of the differential amplifier circuit; the gate of the fourth MOS transistor is configured as the second signal input terminal of the differential amplifier circuit; The drain of the third MOS tube is connected to the second end of the first current source and is configured as the first signal output end of the differential amplifier circuit; the drain of the fourth MOS tube is connected to the second end of the second current source and is configured as the second signal output end of the differential amplifier circuit.

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