A switch chip

Abstract

The present application relates to the field of semiconductors, and in particular to a switch chip, including a power transistor unit, including a first transistor; a switching unit; a voltage clamping unit; a state detection unit; a control unit; and a driving unit; during the shutdown process of the inductive load, when the state detection unit detects that the current flowing through the power transistor unit is greater than or equal to a first threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the power transistor unit to be equal to the clamping voltage; when the state detection unit detects that the current flowing through the power transistor unit is less than the first threshold, the control unit controls the switching unit to avalanche the first transistor, and the avalanche voltage is greater than the clamping voltage. The present application relates to an electronic device. The present application relates to a working method of a switch chip. The switch chip of the present application takes into account the scenarios of the inductive load being shut down at high current and low current, so that the power transistor in the switch chip can withstand greater inductive load energy under the same conditions.

Description

Technical Field

[0001] The present application relates to the field of semiconductors, and in particular to a switch chip. Background Art

[0002] An inductive load is any load that can store magnetic energy when electrically connected to a power source, usually consisting of an inductor and a resistor in series. Common inductive loads include relays, motors, solenoid valves, etc. In practical applications, power transistors are generally used to control the on and off of inductive loads.

[0003] When the inductive load is turned off, that is, the electrical connection with the power supply is disconnected, the magnetic energy stored in the inductor will generate the inductor current to flow, thereby increasing the voltage across the power transistor as a switch. During the entire shutdown process, the power transistor needs to withstand higher voltage and current, and at the same time generate a lot of heat. If this instantaneous high temperature exceeds the tolerance of the power transistor, it will cause the power transistor to burn out. The larger the inductance value of the inductive load, the larger the operating current, the more energy stored, and the greater the challenge to the tolerance of the power transistor. Summary of the invention

[0004] In view of the technical problems existing in the prior art, the present application proposes a switch chip, comprising: a power transistor unit, electrically connected between a power supply and a ground, configured to control the on and off of an inductive load, and comprising at least a first transistor, wherein the first transistor is a power transistor; a switching unit, electrically connected between a gate and a source of the first transistor; a voltage clamping unit, connected in parallel with the power transistor unit, configured to control the voltage across the power transistor unit to be equal to a clamping voltage during the off process of the inductive load; a state detection unit, electrically connected to the power transistor unit, configured to detect a current flowing through the power transistor unit; a control unit, electrically connected to the state detection unit and the switching unit, respectively, and configured to receive an enable signal and control the working state of the switching unit; a driving unit; and a switching unit. element, electrically connected between the gate and source of the first transistor, configured to receive the enable signal, and control the working state of the first transistor according to the enable signal and then control the on-off state of the inductive load; wherein, during the shutdown process of the inductive load when the enable signal fails, when the state detection unit detects that the current flowing through the power transistor unit is greater than or equal to a preset first threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the power transistor unit to be equal to the clamping voltage; when the state detection unit detects that the current flowing through the power transistor unit is less than the preset first threshold, the control unit controls the switching unit to cause the first transistor to avalanche, wherein the avalanche voltage of the first transistor is greater than the clamping voltage.

[0005] In particular, the inductive load is electrically connected between the switch chip and the ground.

[0006] In particular, the inductive load is electrically connected between a power source and the switch chip.

[0007] In particular, the switching unit includes a second transistor, a drain of which is electrically connected to the gate of the first transistor, and a source of which is electrically connected to the source of the first transistor; wherein the type of the second transistor is consistent with the type of the first transistor.

[0008] In particular, the voltage clamping unit includes: a Zener diode, whose cathode is electrically connected to the drain of the first transistor; a second resistor and a third resistor connected in series; wherein the first end of the second resistor is electrically connected to the anode of the Zener diode, the second end of the second resistor is electrically connected to the first end of the third resistor, and the second end of the third resistor is electrically connected to the source of the first transistor; wherein the gate of the first transistor is electrically connected to a node between the second resistor and the third resistor.

[0009] In particular, the state detection unit includes: a third transistor, whose gate is electrically connected to the gate of the first transistor, whose drain is electrically connected to the drain of the first transistor, and whose source is configured to output a detection current; wherein the type of the third transistor is consistent with the type of the first transistor and the second transistor; wherein the size of the third transistor is a proportional reduction of the size of the first transistor; wherein the proportional relationship between the detection current and the current flowing through the power transistor unit is equal to the proportional relationship between the size of the third transistor and the size of the first transistor.

[0010] In particular, the state detection unit also includes: an operational amplifier, whose positive input terminal is electrically connected to the source of the first transistor, and whose negative input terminal is electrically connected to the source of the third transistor; a fourth transistor, whose gate is electrically connected to the output terminal of the operational amplifier, and whose source is electrically connected to the negative input terminal of the operational amplifier; wherein the type of the fourth transistor is complementary to the types of the first transistor, the second transistor, and the third transistor.

[0011] In particular, the state detection unit further includes: a comparator, whose negative input terminal is electrically connected to the drain of the fourth transistor; a fourth resistor, whose first end is electrically connected to the drain of the fourth transistor and the negative input terminal of the comparator, and whose second end is grounded; a voltage source, electrically connected between the positive input terminal of the comparator and the ground, and configured to provide a preset second threshold to the comparator; wherein the proportional relationship between the current corresponding to the second threshold and the first threshold is equal to the proportional relationship between the size of the third transistor and the size of the first transistor; during the shutdown process of the inductive load when the enable signal fails, when the voltage at the negative input terminal of the comparator is greater than or equal to the second threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the first power transistor to be equal to the clamping voltage; when the voltage at the negative input terminal of the comparator is less than the second threshold, the control unit controls the switching unit so that the first transistor avalanches.

[0012] The present application also proposes an electronic device, comprising the switch chip as described above and an inductive load.

[0013] The present application also proposes a working method of a switch chip, wherein the switch chip includes a power transistor, and the load controlled by the switch chip is an inductive load. The working method of the switch chip includes: when the enable signal of the power transistor fails and the inductive load is turned off, and when the current flowing through the power transistor is greater than or equal to a preset first threshold, using a voltage clamping unit to control the voltage across the power transistor to be equal to a clamping voltage; when the current flowing through the power transistor is less than the preset first threshold, causing the power transistor to avalanche; wherein the avalanche voltage of the power transistor is greater than the clamping voltage.

[0014] The switch chip proposed in this application can take into account the scenarios where the inductive load is turned off at high current and low current, so that the power transistor in the switch chip can withstand greater inductive load energy under the same conditions with less impact on the overall cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Below, the preferred embodiments of the present application will be further described in detail with reference to the accompanying drawings, wherein:

[0016] Figure 1 is a schematic structural diagram of a switch chip according to an embodiment of the present application;

[0017] Figure 2 is a circuit diagram of a switch chip according to an embodiment of the present application;

[0018] Figure 3 is a schematic diagram of the working timing of a switch chip according to an embodiment of the present application;

[0019] Figure 4 is a schematic structural diagram of a switch chip according to another embodiment of the present application;

[0020] Figure 5 is a circuit diagram of a switch chip according to another embodiment of the present application;

[0021] Figure 6 2 is a schematic diagram of the working timing of a switch chip according to another embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0023] In the following detailed description, reference may be made to the various specification drawings that are part of the present application and are used to illustrate specific embodiments of the present application. In the accompanying drawings, similar reference numerals describe substantially similar components in different figures. The various specific embodiments of the present application are described below in sufficient detail so that a person of ordinary skill in the art with relevant knowledge and skills in the art can implement the technical solutions of the present application. It should be understood that other embodiments may also be used or structural, logical or electrical changes may be made to the embodiments of the present application.

[0024] The technologies, methods and devices known to those skilled in the art may not be discussed in detail, but where appropriate, the technologies, methods and devices shall be considered as part of the specification. The lines between the units in the drawings are only for the convenience of explanation, indicating that at least the units at both ends of the lines are communicating with each other, and are not intended to limit the unconnected units from being unable to communicate. In addition, the number of lines between two units is intended to indicate at least the number of signals involved in the communication between the two units or at least the output terminals, and is not intended to limit the two units to only be able to communicate with each other through the signals shown in the figure.

[0025] A transistor may refer to a transistor of any structure, such as a field effect transistor (FET) or a bipolar junction transistor (BJT). When the transistor is a field effect transistor, it may be hydrogenated amorphous silicon, metal oxide, low temperature polysilicon, organic transistor, etc., depending on the channel material. Depending on whether the carrier is an electron or a hole, it can be divided into an N-type transistor and a P-type transistor, wherein the control electrode refers to the gate of the field effect transistor, the first electrode may be the drain or source of the field effect transistor, and the corresponding second electrode may be the source or drain of the field effect transistor; when the transistor is a bipolar transistor, the control electrode refers to the base of the bipolar transistor, the first electrode may be the collector or emitter of the bipolar transistor, and the corresponding second electrode may be the emitter or collector of the bipolar transistor. The transistor may be manufactured using amorphous silicon, polycrystalline silicon, oxide semiconductor, organic semiconductor, NMOS / PMOS process or CMOS process.

[0026] In the past switch chip circuits, the voltage across the power transistor is often limited by adding a voltage clamp circuit to improve the power transistor's ability to withstand large current cutoffs. However, due to the natural threshold voltage temperature characteristics of the power transistor, this approach has certain limitations in the relatively small inductive load freewheeling current operating range.

[0027] Specifically, when the voltage clamp circuit is working, it will generate a voltage between the gate and source of the power transistor, causing the power transistor to work in the saturation region, and the inductive load freewheeling current will flow through the power supply, power transistor, the output end of the switch chip, and the inductive load. When the freewheeling current flowing through the power transistor is relatively large, the power transistor works in the negative temperature coefficient range. When the temperature rises, the power transistor current will decrease, thereby reducing the temperature and achieving thermal stability; however, when the freewheeling current flowing through the power transistor is relatively small, the power transistor will work in the positive temperature coefficient range. When the temperature rises, the power transistor current will increase instead, causing the power transistor to further heat up, resulting in thermal instability, which will cause the power transistor to experience thermal runaway and then be damaged prematurely.

[0028] The relatively large or relatively small freewheeling current mentioned here refers to the current level when the power transistor is turned on. This current level determines the starting level of the freewheeling current of the inductive load when the system requires the power transistor to be disconnected. Due to the limited application types in the past, the introduction of a voltage clamp circuit alone was able to meet the application needs at the time. With the continuous enrichment of application types, the types of inductive loads are also increasing. The inductance and resistance values ​​of some inductive loads may be very small. In extreme cases, for example, it can be just a wire. Therefore, the structure of traditional switch chips cannot meet the requirements of various types of inductive loads with a wide distribution of sizes.

[0029] For example, the normal operating current of the inductive load commonly found in electric vehicles is usually below a few amperes. If only a voltage clamp circuit is used to withstand the energy of the inductive load, it is easy to trigger thermal instability, causing premature damage to the power transistor. To solve this problem, existing solutions include increasing the area of ​​the power transistor, adding thick metal to the package surface of the power transistor to help dissipate heat, and adding a freewheeling circuit outside the switch circuit chip, but these solutions will increase the system design area or cost.

[0030] On the other hand, the practice of relying solely on power transistor avalanche to withstand the energy generated by the inductive load will have certain limitations in the relatively large inductive load freewheeling current working range. When a power transistor avalanches in a high current scenario, it may cause the internal parasitic diode of the power transistor to conduct, causing the power transistor to be damaged prematurely. In addition, since the avalanche voltage of the power transistor is relatively high, if there is a relatively large inductive load freewheeling current at the same time, the instantaneous power of the power transistor is very large, which is also a reason for the premature damage of the power transistor.

[0031] For example, electric vehicle applications place higher demands on the short-circuit reliability of the system. The wiring harnesses in electric vehicles are complex and may cause a short circuit to the ground during the loading process, or the insulation of the wiring harness may be worn due to long-term use, which may also cause a short circuit. The wiring harness in an electric vehicle can be equivalent to an inductive load (inductor and resistor in series). When a short circuit occurs, the current on the wiring harness may reach tens of amperes or even hundreds of amperes. At this time, if the power transistor avalanche is relied on alone to withstand the energy of the inductive load, the power transistor will be easily damaged.

[0032] In order to solve the aforementioned technical problems, the present application proposes a switching chip. After the inductive load starts to shut down, when the inductive current of the inductive load is relatively large, a voltage clamping unit is used to bear the energy of the inductive load. When it is detected that the inductive current of the inductive load is less than a certain threshold or the temperature rise of the power transistor is higher than a certain threshold, the power transistor avalanche is relied upon to bear the remaining inductive load energy.

[0033] The switch chip proposed in the present application can take into account the scenarios in which the inductive load is shut down at high current and low current, so that the power transistor in the switch chip can withstand greater inductive load energy under the same conditions. The switch chip does not need to increase the area of ​​the power transistor, or add thick metal to the packaging surface of the power transistor, or add additional freewheeling protection circuits outside the switch chip, and can support larger inductive loads or higher operating currents with less impact on the overall cost.

[0034] Figure 1 It is a schematic diagram of the structure of a switch chip according to an embodiment of the present application.

[0035] According to one embodiment, Figure 1 The switch chip 100 shown can be a high-side switch chip, that is, the switch chip 100 is electrically connected between the inductive load 101 and the power supply 102, and controls the path from the positive electrode of the power supply 102 to the inductive load 101; when the path from the power supply 102 to the inductive load 101 is connected, the inductive load 101 is turned on, and when the path from the power supply 102 to the inductive load 101 is disconnected, the inductive load 101 is turned off.

[0036] According to one embodiment, Figure 1 The switch chip 100 shown may include an output pin P OUT1 , electrically connected to the inductive load 101.

[0037] According to one embodiment, the inductive load 101 may include an inductor L1 and a first resistor R1 connected in series, wherein the inductor L1 is grounded through the first resistor R1 and the other end is electrically connected to the output pin P of the switch chip 100. OUT1 .

[0038] According to one embodiment, Figure 1 The switch chip 100 shown may include a power pin P VS1 , electrically connected to the positive electrode of the power source 102, and configured to receive the power supply voltage VS.

[0039] According to one embodiment, Figure 1 The switch chip 100 shown may include an enable pin P EN1 , configured to receive an enable signal EN.

[0040] According to one embodiment, Figure 1 The illustrated switch chip 100 may include a power transistor unit 110 .

[0041] According to one embodiment, the power transistor unit 110 may include at least a first transistor M11; the first transistor M11 may be an N-type power transistor, the drain of which is electrically connected to the power pin P VS1 , whose source and substrate are electrically connected to the output pin P OUT1 The first transistor M11 is configured to control the inductive load 101 to be turned on and off.

[0042] According to one embodiment, Figure 1 The switch chip 100 shown may include a switching unit 160 .

[0043] According to one embodiment, the switching unit 160 may include a second transistor M12 ; the second transistor M12 may be an N-type transistor whose drain is electrically connected to the gate of the first transistor M11 and whose source and substrate are electrically connected to the source and substrate of the first transistor M11 .

[0044] According to one embodiment, the first transistor M11 and the second transistor M12 are of the same type.

[0045] According to one embodiment, the first transistor M11 and the second transistor M12 may be metal oxide semiconductor field effect transistors (MOSFETs).

[0046] According to one embodiment, Figure 1 The switch chip 100 shown may include a voltage clamping unit 130 electrically connected between the drain and source of the first transistor M11. The voltage clamping unit 130 is configured to clamp the voltage across the drain and source of the first transistor M11 when the inductive load 101 is turned off.

[0047] According to one embodiment, Figure 1 The switch chip 100 shown may include a driving unit 120, which is electrically connected between the gate and source of the first transistor M11 and is configured to enable the first transistor M11 through the enable pin P EN1 An enable signal EN is received, and the first transistor M11 is controlled to be turned on and off according to the enable signal EN.

[0048] According to one embodiment, when the enable signal EN is at a high level, the driving unit 120 controls the first transistor M11 to be turned on and to work in the linear region, and then controls the inductive load 101 to be turned on. At this time, the output pin P OUT1 Potential V OUT1 Equal to the power pin P VS1 The potential VS (i.e., the power supply voltage) and the inductor current I flowing through the inductor L1 L The size of is equal to VS / R1 (the on-resistance of the first transistor M11 is usually very small and can be ignored).

[0049] According to one embodiment, when the enable signal EN is at a low level, the drive unit 120 controls the first transistor M11 to start turning off, and then controls the inductive load 101 to start turning off, and the inductive current I L The magnitude of VS / R1 gradually decreases to 0, and the inductive load 101 is completely turned off. During the entire turn-off process of the inductive load 101, the inductor current I L At the same time, it also flows through the first transistor M11. At this time, the first transistor M11 operates in the saturation region. When the inductive load 101 is completely turned off (the inductor current I L When the value of φ drops to 0), the first transistor M11 is also completely turned off.

[0050] According to one embodiment, Figure 1The switch chip 100 shown may include a state detection unit 140 electrically connected to the power transistor unit 110 and configured to detect a state of the first transistor M11 , such as current, temperature rise, etc.

[0051] According to one embodiment, Figure 1 The switch chip 100 shown may include a control unit 150, which is electrically connected to the gate of the second transistor M12 and the state detection unit 140, and is enabled through the enable pin P EN1 Receive enable signal EN.

[0052] According to one embodiment, when the state detection unit 140 detects that the current of the first transistor M11 is greater than or equal to a preset first threshold (wherein the first threshold may be a threshold current), or the temperature rise of the first transistor M11 is lower than a preset temperature rise threshold, the state detection unit 140 outputs a low level to the control unit 150; otherwise, the state detection unit 140 outputs a high level to the control unit 150.

[0053] According to one embodiment, the control unit 150 is configured to output a control signal CTRL to control the on and off of the second transistor M12 according to the enable signal EN and the level signal provided by the state detection unit 140 .

[0054] According to one embodiment, when the enable signal EN is at a high level, the control signal CTRL output by the control unit 150 is always at a low level, and the second transistor M12 is controlled to be turned off.

[0055] At this time, since the enable signal EN is at a high level, the driving unit 120 controls the first transistor M11 to turn on and operate in the linear region, and then controls the inductive load 101 to turn on. The potentials at both ends of the voltage clamping unit 130 are both the power supply voltage VS. No current flows through the voltage clamping unit 130, and it will not have any effect on the voltage at both ends of the drain and source of the first transistor M11.

[0056] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 140 outputs a low level to the control unit 150 , the control signal CTRL output by the control unit 150 is also at a low level, and the second transistor M12 is controlled to be turned off.

[0057] At this time, since the enable signal EN is at a low level, the driving unit 120 controls the first transistor M11 to start turning off, and then controls the inductive load 101 to start turning off. The inductive load 101 continues to flow, and the inductive current I flowing through the inductor L1 is L At the same time, it also flows through the first transistor M11. At this time, the first transistor M11 operates in the saturation region and the output pin P OUT1 Potential V OUT1The voltage level of the inductive load 101 is pulled down to a level lower than the ground level, and the voltage clamping unit 130 starts to work. The first transistor M11 withstands the energy of the inductive load 101 through voltage clamping.

[0058] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 140 outputs a high level to the control unit 150, the control signal CTRL output by the control unit 150 is also at a high level, the second transistor M12 is controlled to be turned on, the voltage clamping unit 130 has no effect on the voltage across the drain and source of the first transistor M11, and the first transistor M11 enters an avalanche state to withstand the remaining energy of the inductive load 101.

[0059] It should be noted that, when the inductive load 101 is turned off, the inductor current I L A portion of the current I flowing through the voltage clamp unit 130 will also flow through the voltage clamp unit 130, but will be different from the inductor current I flowing through the first transistor M11. L It is very small in comparison and can be ignored.

[0060] Figure 2 is a circuit diagram of a switch chip according to an embodiment of the present application.

[0061] According to one embodiment, Figure 2 The switch chip 200 shown can be a high-side switch chip, that is, the switch chip 200 is electrically connected between the inductive load 201 and the power supply 202, and controls the path from the positive electrode of the power supply 202 to the inductive load 201; when the path from the power supply 202 to the inductive load 201 is connected, the inductive load 201 is turned on, and when the path from the power supply 202 to the inductive load 201 is disconnected, the inductive load 201 is disconnected.

[0062] According to one embodiment, Figure 2 The switch chip 200 shown may include an output pin P OUT2 , electrically connected to the inductive load 201.

[0063] According to one embodiment, the inductive load 201 may include an inductor L2 and a first resistor R21 connected in series, wherein the inductor L2 is grounded through the first resistor R21 and the other end is electrically connected to the output pin P of the switch chip 200. OUT2 .

[0064] According to one embodiment, Figure 2 The switch chip 200 shown may include a power pin P VS2 , electrically connected to the positive electrode of the power source 202, and configured to receive the power supply voltage VS.

[0065] According to one embodiment, Figure 2 The switch chip 200 shown may include an enable pin P EN2 , configured to receive an enable signal EN.

[0066] According to one embodiment, Figure 2 The illustrated switch chip 200 may include a power transistor unit 210 .

[0067] According to one embodiment, the power transistor unit 210 may include at least a first transistor M21; the first transistor M21 may be an N-type power transistor, the drain of which is electrically connected to the power pin P VS2 , whose source and substrate are electrically connected to the output pin P OUT2 The first transistor M21 is configured to control the inductive load 201 to be turned on and off.

[0068] According to one embodiment, Figure 2 The switch chip 200 shown may include a switching unit 260 .

[0069] According to one embodiment, the switching unit 260 may include a second transistor M22 ; the second transistor M22 may be an N-type transistor whose drain is electrically connected to the gate of the first transistor M21 and whose source and substrate are electrically connected to the source and substrate of the first transistor M21 .

[0070] According to one embodiment, the first transistor M21 and the second transistor M22 are of the same type.

[0071] According to one embodiment, the first transistor M21 and the second transistor M22 may be metal oxide semiconductor field effect transistors (MOSFETs).

[0072] According to one embodiment, Figure 2 The switch chip 200 shown may include a voltage clamping unit 230 configured to clamp and control the voltage V across the drain and source of the first transistor M21 during the process of turning off the inductive load 201. DS21 .

[0073] According to one embodiment, the voltage clamping unit 230 may include a Zener diode Z2 , a cathode of which is electrically connected to the drain of the first transistor M21 .

[0074] According to one embodiment, the voltage clamping unit 230 may include a second resistor R22 and a third resistor R23 connected in series. The first end of the second resistor R22 is electrically connected to the anode of the Zener diode Z2, the second end is electrically connected to the first end of the third resistor R23, and the second end of the third resistor R23 is electrically connected to the source and substrate of the first transistor M21. The gate of the first transistor M21 is electrically connected to a node between the second end of the second resistor R22 and the first end of the third resistor R23.

[0075] According to one embodiment, the voltage between the cathode of the Zener diode Z2 and the second end of the third resistor R23 is the clamping voltage V of the voltage clamping unit 230. DSCLAMP .

[0076] According to one embodiment, Figure 2 The switch chip 200 shown may include a driving unit 220, which is electrically connected between the gate and source of the first transistor M21 and is configured to enable the first transistor M21 through the enable pin P EN2 An enable signal EN is received, and the on / off state of the first transistor M21 is controlled according to the enable signal EN.

[0077] According to one embodiment, when the enable signal EN is at a high level, the driving unit 220 controls the first transistor M21 to be turned on and to work in the linear region, and then controls the inductive load 201 to be turned on. At this time, the output pin P OUT2 Potential V OUT2 Equal to the power pin P VS1 The potential VS (i.e., the power supply voltage) and the inductor current I flowing through the inductor L2 L The size of is equal to VS / R21 (the on-resistance of the first transistor M21 is usually very small and can be ignored).

[0078] According to one embodiment, when the enable signal EN is at a low level, the drive unit 220 controls the first transistor M21 to start turning off, and then controls the inductive load 201 to start turning off, and the inductive current I L The magnitude of VS / R21 gradually decreases to 0, and the inductive load 201 is completely turned off. During the entire turn-off process of the inductive load 201, the inductor current I L At the same time, it also flows through the first transistor M21. At this time, the first transistor M21 operates in the saturation region. When the inductive load 201 is completely turned off (the inductor current I L When the value of φ drops to 0), the first transistor M21 is also completely turned off.

[0079] According to one embodiment, Figure 2 The switch chip 200 shown may include a state detection unit 240 configured to detect the current of the first transistor M21.

[0080] According to one embodiment, the state detection unit 240 may include a third transistor M23, whose gate is electrically connected to the gate of the first transistor M21, whose drain is electrically connected to the drain of the first transistor M21, and whose source is configured to output the detection current I SNS .

[0081] According to one embodiment, the type of the third transistor M23 is consistent with the type of the first transistor M21 and the second transistor M22.

[0082] According to one embodiment, the third transistor M23 may be a metal oxide semiconductor field effect transistor (MOSFET).

[0083] According to one embodiment, the state detection unit 240 may include an operational amplifier 242 , a positive input terminal of which is electrically connected to the source of the first transistor M21 , and a negative input terminal of which is electrically connected to the source of the third transistor M23 .

[0084] According to one embodiment, the first transistor M21 and the third transistor M23 form a current mirror, and the size of the third transistor M23 is proportionally reduced to the size of the first transistor M21.

[0085] According to one embodiment, the state detection unit 240 may include a fourth transistor M24 , which may be a P-type transistor having a gate electrically connected to the output terminal of the operational amplifier 242 and a source and a substrate electrically connected to the negative input terminal of the operational amplifier 242 .

[0086] According to one embodiment, the type of the fourth transistor M24 is complementary to the types of the first transistor M21 , the second transistor M22 , and the third transistor M23 .

[0087] According to one embodiment, the fourth transistor M24 may be a metal oxide semiconductor field effect transistor (MOSFET).

[0088] According to one embodiment, the output terminal of the operational amplifier 242 is electrically connected to the gate of the fourth transistor M24, and the source of the fourth transistor M24 is electrically connected to the negative input terminal of the operational amplifier 242, forming a negative feedback structure. Through such a negative feedback structure, the operational amplifier 242 is configured to control the voltage of the source of the first transistor M21 to be equal to the voltage of the source of the third transistor M23. The gate and drain of the first transistor M21 and the third transistor M23 are electrically connected together, so that the voltages at the gate and source of the first transistor M21 and the third transistor M23, and the voltages at the drain and source are equal. In addition, the size of the third transistor M23 is proportionally reduced to the size of the first transistor M21, so that the detection current I output from the source of the third transistor M23 is equal to the detection current I output from the source of the third transistor M23. SNS is the inductor current I flowing from the source of the first transistor M21 L The detection current I SNS Can be used to reflect the inductor current I L The detection current I SNS and the inductor current I L The proportional relationship between the sizes of the third transistor M23 and the first transistor M21 is equal to the proportional relationship between the sizes of the third transistor M23 and the first transistor M21.

[0089] According to one embodiment, the state detection unit 240 may include a comparator 241 , a negative input terminal of which is electrically connected to the drain of the fourth transistor M24 .

[0090] According to one embodiment, the state detection unit 240 may include a fourth resistor R24 ​​, a first end of which is electrically connected to the drain of the fourth transistor M24 and the negative input terminal of the comparator 241 , and a second end of which is grounded.

[0091] According to one embodiment, the state detection unit 240 may include a voltage source 243, whose positive electrode is electrically connected to the positive input terminal of the comparator 241 and whose negative electrode is grounded, and is configured to provide a preset second threshold to the comparator 241; wherein the second threshold may be a threshold voltage V IL（th） .

[0092] According to one embodiment, the negative input terminal of the comparator 241 is configured to receive the detection current I SNS The voltage generated by the fourth resistor R24 ​​has a positive input terminal configured to receive a threshold voltage V IL（th） The second threshold (threshold voltage V IL（th） ) corresponds to the threshold current I L（th） = V IL（th） / R24.

[0093] According to one embodiment, Figure 2 The switch chip 200 shown in the figure may include a control unit 250, which is electrically connected to the gate of the second transistor M22 and the output end of the comparator 241 in the state detection unit 240, and at the same time enables the pin P EN2 Receive enable signal EN.

[0094] According to one embodiment, when the detection current I SNS The voltage generated by the fourth resistor R24 ​​is greater than or equal to the threshold voltage V IL（th） , that is, the detection current I SNS Greater than or equal to the threshold current I L（th） (with V IL（th） The corresponding current) represents the inductor current I flowing through the first transistor M21. L is greater than or equal to a preset first threshold), the comparator 241 outputs a low level to the control unit 250; when the detection current I SNS The voltage generated by the fourth resistor R24 ​​is less than the threshold voltage V IL（th） , that is, the detection current I SNS Less than the threshold current I L（th） When (represents the inductor current I flowing through the first transistor M21 L is less than a preset first threshold), the comparator 241 outputs a high level to the control unit 250. The first threshold may be a threshold current, and the second threshold (threshold voltage VIL（th） ) corresponds to the threshold current I L（th） The proportional relationship with the first threshold is equal to the proportional relationship between the size of the third transistor M23 and the size of the first transistor M21.

[0095] According to one embodiment, the control unit 250 is configured to output a control signal CTRL to control the on and off of the second transistor M22 according to the enable signal EN and a level signal received from the output terminal of the comparator 241 in the state detection unit 240 .

[0096] According to one embodiment, when the enable signal EN is at a high level, the control signal CTRL output by the control unit 250 is always at a low level, and the second transistor M22 is controlled to be turned off.

[0097] At this time, since the enable signal EN is at a high level, the driving unit 220 controls the first transistor M21 to be turned on and work in the linear region, and then controls the inductive load 201 to be turned on. The potentials of the cathode of the Zener diode Z2 and the second end of the third resistor R23 in the voltage clamping unit 230 are both the power supply voltage VS. No current flows through the voltage clamping unit 230, and the voltage V across the drain and source of the first transistor M21 is not affected. DS21 have any impact.

[0098] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 240 outputs a low level to the control unit 250 , the control signal CTRL output by the control unit 250 is also at a low level, and the second transistor M22 is controlled to be turned off.

[0099] At this time, since the enable signal EN is at a low level, the driving unit 220 controls the first transistor M21 to start turning off, and then controls the inductive load 201 to start turning off. The inductive current I L At the same time, the current flows through the first transistor M21. At this time, the first transistor M21 operates in the saturation region, and the output pin P OUT2 Potential V OUT2 The voltage level of the voltage clamping unit 230 is pulled down to less than the ground level, and the Zener diode Z2 in the voltage clamping unit 230 breaks down, and the voltage clamping unit 230 starts to work. At this time, the voltage between the cathode of the Zener diode Z2 and the second end of the third resistor R23 is the clamping voltage V of the voltage clamping unit 230. DSCLAMP The voltage clamping unit 230 clamps and controls the voltage V between the drain and source of the first transistor M21. DS21 , so that V DS21 =V DSCLAMP , the first transistor M21 withstands the energy of the inductive load 201 by voltage clamping.

[0100] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 240 outputs a high level to the control unit 250 , the control signal CTRL output by the control unit 250 is also at a high level to control the second transistor M22 to be turned on.

[0101] At this time, the second transistor M22 is turned on, forcing the gate voltage of the first transistor M21 to be lowered, and the voltage V DS21 The voltage of the first transistor M21 increases to the level of the avalanche voltage, and the first transistor M21 enters the avalanche state; at the same time, since the second transistor M22 is turned on, the third resistor R23 in the voltage clamping unit 230 is short-circuited, and the current flowing through the second resistor R22 increases, and the voltage between the cathode of the Zener diode Z2 and the second end of the second resistor R22 is equal to the avalanche voltage, and the avalanche voltage is greater than the clamping voltage V of the voltage clamping unit 230. DSCLAMP The voltage clamping unit 230 clamps the voltage V across the drain and source of the first transistor M21. DS21 There is no longer any influence, therefore, at this time, the first transistor M21 enters the avalanche state by itself to bear the remaining energy of the inductive load 201.

[0102] It should be noted that, when the inductive load 201 is turned off, the inductor current I L A portion of the current I flowing through the voltage clamp unit 230 will also flow through the voltage clamp unit 230, but it is different from the inductor current I flowing through the first transistor M21. L It is very small in comparison and can be ignored.

[0103] Figure 3 It is a schematic diagram of the working timing of a switch chip according to an embodiment of the present application. Figure 3 Shows Figure 2 The working timing of the switch chip 200 is shown as follows: Figure 3 As shown:

[0104] Time t0: It is the default initial state, the enable signal EN is at a low level, the control signal CTRL output by the control unit 250 is at a high level, the driving unit 220 controls the first transistor M21 to be in an off state, the inductive load 201 is also in an off state, and no inductive current I is generated. L , that is I L =0.

[0105] At time t1: the enable signal EN is at a high level. At this time, no matter what level of signal the control unit 250 receives from the state detection unit 240, the output control signal CTRL is always at a low level, so that the second transistor M22 is in the off state;

[0106] At the same time, at time t1, the enable signal EN is at a high level, and the driving unit 220 controls the first transistor M21 to start conducting, and then controls the inductive load 201 to start conducting and generate an inductive current I L , inductor current I L The size starts from 0 and increases to VS / R21.

[0107] At time t2: the enable signal EN is at a low level, the drive unit 220 controls the first transistor M21 to start turning off, and then controls the inductive load 201 to start turning off, the inductive load 201 continues to flow, and the inductor current I L The size of the inductor current I L It will also flow through the first transistor M21. At this time, the first transistor M21 works in the saturation region, and the voltage V DS21 Rising, the temperature rises rapidly.

[0108] from Figure 3 It can be seen that the detection current I at time t2 SNS Greater than or equal to the threshold current I L（th） , the comparator 241 in the state detection unit 240 outputs a low level, so that the control signal CTRL output by the control unit 250 is still at a low level, the second transistor M22 is still in the off state, and the inductive load 201 continues to flow, and the output pin P OUT2 Potential V OUT2 is pulled down to less than the ground level, causing the Zener diode Z2 in the voltage clamping unit 230 to break down, and the voltage clamping unit 230 works, V DS21 The voltage clamped by the voltage clamping unit 230 is V DSCLAMP .

[0109] At t3: At this time, the enable signal EN is still at a low level, and the inductor current I L Still continuing to decrease, when the detection current I SNS Less than the threshold current I L（th） , the comparator 241 in the state detection unit 240 outputs a high level, which in turn makes the control signal CTRL output by the control unit 250 a high level, controls the second transistor M22 to be turned on, forces the gate voltage of the first transistor M21 to be pulled down, and makes the voltage V DS21 increases, and the first transistor M21 enters an avalanche state.

[0110] At the same time, since the second transistor M22 is turned on, the third resistor R23 in the voltage clamping unit 230 is short-circuited, the current flowing through the second resistor R22 increases, and the voltage between the cathode of the Zener diode Z2 and the second end of the second resistor R22 is equal to the avalanche voltage, and the avalanche voltage is greater than the clamping voltage V of the voltage clamping unit 230.DSCLAMP , the voltage clamping unit 230 is connected to V DS21 There is no longer any influence, therefore, at this moment, the first transistor M21 enters the avalanche state by itself to bear the remaining energy of the inductive load 201 .

[0111] At t4: the inductive current I of the inductive load 201 L The magnitude of drops to 0, the inductive load 201 and the first transistor M21 are completely turned off, and all signals return to the initial state.

[0112] According to an embodiment, the power transistor unit 210 and the state detection unit 240 may detect the current of the first transistor M21 using other circuits, and output a level signal to the control unit 250 according to a comparison result between the current and a preset first threshold.

[0113] According to an embodiment, the power transistor unit 210 and the state detection unit 240 may detect the temperature rise of the first transistor M21 using other circuits, and output a level signal to the control unit 250 according to the comparison result between the temperature rise and a preset temperature rise threshold.

[0114] Figure 4 is a schematic structural diagram of a switch chip according to another embodiment of the present application.

[0115] According to one embodiment, Figure 4 The switch chip 400 shown can be a low-side switch chip, that is, the switch chip 400 is electrically connected between the inductive load 401 and the ground to control the path from the inductive load 401 to the ground; when the path from the inductive load 401 to the ground is connected, the inductive load 401 is turned on, and when the path from the inductive load 401 to the ground is disconnected, the inductive load 101 is turned off.

[0116] According to one embodiment, Figure 4 The switch chip 400 shown may include an output pin P OUT4 , coupled to the inductive load 401.

[0117] According to one embodiment, the inductive load 401 may include an inductor L4 and a first resistor R4 connected in series, wherein the inductor L4 is electrically connected between the first resistor R4 and the power source 402, and is electrically connected to the output pin P of the switch chip 400 through the first resistor R4. OUT4 .

[0118] According to one embodiment, Figure 4 The switch chip 400 shown may include a ground pin P GND4 , configured to receive ground level.

[0119] According to one embodiment, Figure 4The switch chip 400 shown may include an enable pin P EN4 , configured to receive an enable signal EN.

[0120] According to one embodiment, Figure 4 The illustrated switch chip 400 may include a power transistor unit 410 .

[0121] According to one embodiment, the power transistor unit 410 may include at least a first transistor M41; the first transistor M41 may be an N-type power transistor, the drain of which is electrically connected to the output pin P OUT4 , whose source and substrate are electrically connected to the ground pin P GND4 The first transistor M41 is configured to control the inductive load 401 to be turned on and off.

[0122] According to one embodiment, Figure 4 The switch chip 400 shown may include a switching unit 460 .

[0123] According to one embodiment, the switching unit 460 may include a second transistor M42 ; the second transistor M42 may be an N-type transistor whose drain is electrically connected to the gate of the first transistor M41 and whose source and substrate are electrically connected to the source and substrate of the first transistor M41 .

[0124] According to one embodiment, the first transistor M41 and the second transistor M42 are of the same type.

[0125] According to one embodiment, the first transistor M41 and the second transistor M42 may be metal oxide semiconductor field effect transistors (MOSFETs).

[0126] According to one embodiment, Figure 4 The switch chip 400 shown may include a voltage clamp unit 430 electrically connected between the drain of the first transistor M41 and the source of the first transistor M41 . The voltage clamp unit 430 is configured to clamp the voltage across the drain and source of the first transistor M41 when the inductive load 401 is turned off.

[0127] According to one embodiment, Figure 4 The switch chip 400 shown may include a driving unit 420, which is electrically connected between the gate and source of the first transistor M41 and configured to enable the first transistor M41 through the enable pin P EN4 An enable signal EN is received, and the on / off state of the first transistor M41 is controlled according to the enable signal EN.

[0128] According to one embodiment, when the enable signal EN is at a high level, the driving unit 420 controls the first transistor M41 to be turned on and to work in the linear region, and then controls the inductive load 401 to be turned on. At this time, the output pin POUT4 Potential V OUT4 =Equal to the power supply voltage VS, the inductor current I flowing through the inductor L4 L The size of is equal to VS / R4 (the on-resistance of the first transistor M41 is usually very small and can be ignored).

[0129] According to one embodiment, when the enable signal EN is at a low level, the drive unit 420 controls the first transistor M41 to start turning off, and then controls the inductive load 401 to start turning off, and the inductive current I L The magnitude of VS / R4 gradually decreases to 0, and the inductive load 401 is completely turned off. During the entire turn-off process of the inductive load 401, the inductor current I L At the same time, it also flows through the first transistor M41. At this time, the first transistor M41 operates in the saturation region. When the inductive load 401 is completely turned off (the inductor current I L When the value of φ drops to 0), the first transistor M41 is also completely turned off.

[0130] According to one embodiment, Figure 4 The switch chip 400 shown may include a state detection unit 440 electrically connected to the power transistor unit 410 and configured to detect the state of the first transistor M41 , such as current, temperature rise, etc.

[0131] According to one embodiment, Figure 4 The switch chip 400 shown may include a control unit 450, which is electrically connected to the gate of the second transistor M42 and the state detection unit 440, and is enabled by the enable pin P EN4 Receive enable signal EN.

[0132] According to one embodiment, when the state detection unit 440 detects that the current of the first transistor M41 is greater than or equal to a preset first threshold (where the first threshold may be a threshold current), or the temperature rise of the first transistor M41 is lower than a preset temperature rise threshold, the state detection unit 440 outputs a low level to the control unit 450; otherwise, the state detection unit 440 outputs a high level to the control unit 450.

[0133] According to one embodiment, the control unit 450 is configured to output a control signal CTRL to control the on and off of the second transistor M42 according to the enable signal EN and the level signal provided by the state detection unit 440 .

[0134] According to one embodiment, when the enable signal EN is at a high level, the control signal CTRL output by the control unit 450 is always at a low level, and the second transistor M42 is controlled to be turned off.

[0135] At this time, since the enable signal EN is at a high level, the driving unit 420 controls the first transistor M41 to turn on and operate in the linear region, and then controls the inductive load 401 to turn on. The potentials at both ends of the voltage clamping unit 430 are both the power supply voltage VS. No current flows through the voltage clamping unit 430, and it will not have any effect on the voltage at both ends of the drain and source of the first transistor M41.

[0136] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 440 outputs a low level to the control unit 450 , the control signal CTRL output by the control unit 450 is also at a low level, and the second transistor M42 is controlled to be turned off.

[0137] At this time, since the enable signal EN is at a low level, the driving unit 420 controls the first transistor M41 to start turning off, and then controls the inductive load 401 to start turning off. The inductive load 401 continues to flow, and the inductive current I flowing through the inductor L4 is L At the same time, the current flows through the first transistor M41. At this time, the first transistor M41 operates in the saturation region, and the output pin P OUT4 Potential V OUT4 is pulled high, the voltage clamping unit 430 starts to work, and the first transistor M41 withstands the energy of the inductive load 401 through voltage clamping.

[0138] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 440 outputs a high level to the control unit 450, the control signal CTRL output by the control unit 450 is also at a high level, the second transistor M42 is controlled to be turned on, the voltage clamping unit 430 has no effect on the voltage across the drain and source of the first transistor M41, and the first transistor M41 enters an avalanche state to withstand the remaining energy of the inductive load 401.

[0139] It should be noted that, when the inductive load 401 is turned off, the inductor current I L A portion of the current I flows through the voltage clamp unit 430, but is different from the inductor current I flowing through the first transistor M41. L It is very small in comparison and can be ignored.

[0140] Figure 5 is a circuit diagram of a switch chip according to another embodiment of the present application.

[0141] According to one embodiment, Figure 5 The switch chip 500 shown can be a low-side switch chip, that is, the switch chip 500 is electrically connected between the inductive load 501 and the ground, and controls the path from the inductive load 501 to the ground; when the path from the inductive load 501 to the ground is connected, the inductive load 501 is turned on, and when the path from the inductive load 501 to the ground is disconnected, the inductive load 501 is disconnected.

[0142] According to one embodiment, Figure 5 The switch chip 500 shown may include an output pin P OUT5 , electrically connected to the inductive load 501.

[0143] According to one embodiment, the inductive load 501 may include an inductor L5 and a first resistor R51 connected in series, wherein the inductor L5 is electrically connected between the first resistor R51 and the power source 502, and is electrically connected to the output pin P of the switch chip 500 through the first resistor R51. OUT5 .

[0144] According to one embodiment, Figure 5 The switch chip 500 shown may include a ground pin P GND5 , configured to receive ground level.

[0145] According to one embodiment, Figure 5 The switch chip 500 shown may include an enable pin P EN5 , configured to receive an enable signal EN.

[0146] According to one embodiment, Figure 5 The illustrated switch chip 500 may include a power transistor unit 510 .

[0147] According to one embodiment, the power transistor unit 510 may include at least a first transistor M51; the first transistor M51 may be an N-type power transistor, the drain of which is electrically connected to the output pin P OUT5 , whose source and substrate are electrically connected to the ground pin P GND5 The first transistor M51 is configured to control the inductive load 501 to be turned on and off.

[0148] According to one embodiment, Figure 5 The switch chip 500 shown may include a switching unit 560 .

[0149] According to one embodiment, the switching unit 560 may include a second transistor M52 ; the second transistor M52 may be an N-type transistor whose drain is electrically connected to the gate of the first transistor M51 and whose source and substrate are electrically connected to the source and substrate of the first transistor M51 .

[0150] According to one embodiment, the first transistor M51 and the second transistor M52 are of the same type.

[0151] According to one embodiment, the first transistor M51 and the second transistor M52 may be metal oxide semiconductor field effect transistors (MOSFETs).

[0152] According to one embodiment, Figure 5The switch chip 500 shown may include a voltage clamping unit 530 configured to clamp and control the voltage V across the drain and source of the first transistor M51 during the process of turning off the inductive load 501. DS51 .

[0153] According to one embodiment, the voltage clamping unit 530 may include a Zener diode Z5 , a cathode of which is electrically connected to the drain of the first transistor M51 .

[0154] According to one embodiment, the voltage clamping unit 530 may include a second resistor R52 and a third resistor R53 connected in series. The first end of the second resistor R52 is electrically connected to the anode of the Zener diode Z5, the second end is electrically connected to the first end of the third resistor R53, and the second end of the third resistor R53 is electrically connected to the source and substrate of the first transistor M51. The gate of the first transistor M51 is electrically connected to a node between the second end of the second resistor R52 and the first end of the third resistor R53.

[0155] According to one embodiment, the voltage between the cathode of the Zener diode Z5 and the second end of the third resistor R53 is the clamping voltage V of the voltage clamping unit 530. DSCLAMP .

[0156] According to one embodiment, Figure 5 The switch chip 500 shown may include a driving unit 520, which is electrically connected between the gate and source of the first transistor M51 and is configured to enable the first transistor M51 through the enable pin P EN5 An enable signal EN is received, and the on / off state of the first transistor M51 is controlled according to the enable signal EN.

[0157] According to one embodiment, when the enable signal EN is at a high level, the driving unit 520 controls the first transistor M51 to be turned on and to work in the linear region, and then controls the inductive load 501 to be turned on. At this time, the output pin P OUT5 Potential V OUT5 =Equal to the power supply voltage VS, the inductor current I flowing through the inductor L5 L The size of is equal to VS / R51 (the on-resistance of the first transistor M51 is usually very small and can be ignored).

[0158] According to one embodiment, when the enable signal EN is at a low level, the driving unit 520 controls the first transistor M51 to start turning off, and then controls the inductive load 501 to start turning off, and the inductive current I L The magnitude of VS / R51 gradually decreases to 0, and the inductive load 501 is completely turned off. During the entire turn-off process of the inductive load 501, the inductive current I LAt the same time, it also flows through the first transistor M51. At this time, the first transistor M51 operates in the saturation region. When the inductive load 501 is completely turned off (the inductor current I L When the value of φ drops to 0), the first transistor M51 is also completely turned off.

[0159] According to one embodiment, Figure 5 The switch chip 500 shown may include a state detection unit 540 configured to detect the current of the first transistor M51.

[0160] According to one embodiment, the state detection unit 540 may include a third transistor M53, whose gate is electrically connected to the gate of the first transistor M51, whose drain is electrically connected to the drain of the first transistor M51, and whose source is configured to output the detection current I SNS .

[0161] According to one embodiment, the type of the third transistor M53 is consistent with the type of the first transistor M51 and the second transistor M52.

[0162] According to one embodiment, the third transistor M53 may be a metal oxide semiconductor field effect transistor (MOSFET).

[0163] According to one embodiment, the state detection unit 540 may include an operational amplifier 542 , a positive input terminal of which is electrically connected to the source of the first transistor M51 , and a negative input terminal of which is electrically connected to the source of the third transistor M53 .

[0164] According to one embodiment, the first transistor M51 and the third transistor M53 form a current mirror, and the size of the third transistor M53 is proportionally reduced to the size of the first transistor M51.

[0165] According to one embodiment, the state detection unit 540 may include a fourth transistor M54 , which may be a P-type transistor having a gate electrically connected to the output terminal of the operational amplifier 542 and a source and a substrate electrically connected to the negative input terminal of the operational amplifier 542 .

[0166] According to one embodiment, the type of the fourth transistor M54 is complementary to the types of the first transistor M51 , the second transistor M52 , and the third transistor M53 .

[0167] According to one embodiment, the fourth transistor M54 may be a metal oxide semiconductor field effect transistor (MOSFET).

[0168] According to one embodiment, the output terminal of the operational amplifier 542 is electrically connected to the gate of the fourth transistor M54, and the source of the fourth transistor M54 is electrically connected to the negative input terminal of the operational amplifier 542, forming a negative feedback structure. Through such a negative feedback structure, the operational amplifier 542 is configured to control the voltage of the source of the first transistor M51 to be equal to the voltage of the source of the third transistor M53. The gate and drain of the first transistor M51 and the third transistor M53 are electrically connected together, so that the voltages at the gate and source of the first transistor M51 and the third transistor M53, and the voltages at the drain and source are equal. In addition, the size of the third transistor M53 is proportionally reduced to the size of the first transistor M51, so that the detection current I output from the source of the third transistor M53 is equal to the detection current I output from the source of the third transistor M53. SNS is the inductor current I flowing from the source of the first transistor M51 L The detection current I SNS Can be used to reflect the inductor current I L The detection current I SNS and the inductor current I L The proportional relationship between the sizes of the third transistor M53 and the first transistor M51 is equal to the proportional relationship between the sizes of the third transistor M53 and the first transistor M51.

[0169] According to one embodiment, the state detection unit 540 may include a comparator 541 , a negative input terminal of which is electrically connected to the drain of the fourth transistor M54 .

[0170] According to one embodiment, the state detection unit 540 may include a fourth resistor R54 , a first end of which is electrically connected to the drain of the fourth transistor M54 and the negative input terminal of the comparator 541 , and a second end of which is grounded.

[0171] According to one embodiment, the state detection unit 540 may include a voltage source 543, whose positive electrode is electrically connected to the positive input terminal of the comparator 541 and whose negative electrode is grounded, and is configured to provide a preset second threshold to the comparator 541; wherein the second threshold may be a threshold voltage V IL（th） .

[0172] According to one embodiment, the negative input terminal of the comparator 541 is configured to receive the detection current I SNS The voltage generated by the fourth resistor R54 is configured to receive the threshold voltage V IL（th） The second threshold (threshold voltage V IL（th） ) corresponds to the threshold current I L（th） = V IL（th） / R54.

[0173] According to one embodiment, Figure 5The switch chip 500 shown may include a control unit 550, which is electrically connected to the gate of the second transistor M52 and the output end of the comparator 541 in the state detection unit 540, and is enabled by the enable pin P EN5 Receive enable signal EN.

[0174] According to one embodiment, when the detection current I SNS The voltage generated by the fourth resistor R54 is greater than or equal to the threshold voltage V IL（th） , that is, the detection current I SNS Greater than or equal to the threshold current I L（th） (with V IL（th） The corresponding current) represents the inductor current I flowing through the first transistor M51. L is greater than or equal to a preset first threshold), the comparator 541 outputs a low level to the control unit 550; when the detection current I SNS The voltage generated by the fourth resistor R54 is less than the threshold voltage V IL（th） , that is, the detection current I SNS Less than the threshold current I L（th） When (represents the inductor current I flowing through the first transistor M51 L is less than a preset first threshold), the comparator 541 outputs a high level to the control unit 550. The first threshold may be a threshold current, and the second threshold (threshold voltage V IL（th） ) corresponds to the threshold current I L（th） The proportional relationship with the first threshold is equal to the proportional relationship between the size of the third transistor M53 and the size of the first transistor M51.

[0175] According to one embodiment, the control unit 550 is configured to output a control signal CTRL to control the on and off of the second transistor M52 according to the enable signal EN and a level signal received from the output terminal of the comparator 541 in the state detection unit 540 .

[0176] According to one embodiment, when the enable signal EN is at a high level, the control signal CTRL output by the control unit 550 is always at a low level, and the second transistor M52 is controlled to be turned off.

[0177] At this time, since the enable signal EN is at a high level, the driving unit 520 controls the first transistor M51 to be turned on and to work in the linear region, and then controls the inductive load 501 to be turned on. The potentials of the cathode of the Zener diode Z5 and the second end of the third resistor R53 in the voltage clamping unit 530 are both the power supply voltage VS. No current flows through the voltage clamping unit 530, and the voltage V across the drain and source of the first transistor M51 will not be affected. DS51 have any impact.

[0178] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 540 outputs a low level to the control unit 550 , the control signal CTRL output by the control unit 550 is also at a low level, and the second transistor M22 is controlled to be turned off.

[0179] At this time, since the enable signal EN is at a low level, the driving unit 520 controls the first transistor M51 to start turning off, and then controls the inductive load 501 to start turning off. The freewheeling current I L At the same time, it also flows through the first transistor M51. At this time, the first transistor M51 operates in the saturation region and the output pin P OUT5 Potential V OUT5 The voltage clamping unit 530 is pulled high, causing the Zener diode Z5 in the voltage clamping unit 530 to break down, and the voltage clamping unit 530 starts to work. At this time, the voltage between the cathode of the Zener diode Z5 and the second end of the third resistor R53 is the clamping voltage V of the voltage clamping unit 530. DSCLAMP The voltage clamping unit 530 clamps and controls the voltage V across the drain and source of the first transistor M51. DS51 , so that V DS51 =V DSCLAMP , the first transistor M51 withstands the energy of the inductive load 501 by voltage clamping.

[0180] According to one embodiment, when the enable signal EN is at a low level and the state detection unit 540 outputs a high level to the control unit 550 , the control signal CTRL output by the control unit 550 is also at a high level to control the second transistor M52 to be turned on.

[0181] At this time, the second transistor M52 is turned on, forcing the gate voltage of the first transistor M51 to be lowered, and the voltage V DS51 The voltage of the first transistor M51 increases to the level of the avalanche voltage, and the first transistor M51 enters the avalanche state; at the same time, since the second transistor M52 is turned on, the third resistor R53 in the voltage clamping unit 530 is short-circuited, and the current flowing through the second resistor R52 increases, and the voltage between the cathode of the Zener diode Z5 and the second end of the second resistor R52 is equal to the avalanche voltage, and the avalanche voltage is greater than the clamping voltage V of the voltage clamping unit 530. DSCLAMP The voltage clamping unit 530 clamps the voltage V across the drain and source of the first transistor M51. DS51 There is no longer any influence, therefore, at this time, the first transistor M51 enters the avalanche state by itself to bear the remaining energy of the inductive load 501.

[0182] It should be noted that, when the inductive load 501 is turned off, the inductor current I LA portion of the current I flowing through the voltage clamp unit 530 and the third transistor M53 will also flow through the voltage clamp unit 530 and the third transistor M53, but will be different from the inductor current I flowing through the first transistor M51. L It is very small in comparison and can be ignored.

[0183] Figure 6 2 is a schematic diagram of the working timing of a switch chip according to another embodiment of the present application. Figure 6 Shows Figure 5 The working timing of the switch chip 500 is shown as follows: Figure 6 As shown:

[0184] Time t0: It is the default initial state, the enable signal EN is at a low level, the control signal CTRL output by the control unit 550 is at a high level, the driving unit 520 controls the first transistor M51 to be in an off state, the inductive load 501 is also in an off state, and no inductive current I is generated. L , that is I L =0.

[0185] At time t1: the enable signal EN is at a high level. At this time, no matter what level of signal the control unit 550 receives from the state detection unit 540, the output control signal CTRL is always at a low level, so that the second transistor M52 is in the off state;

[0186] At the same time, at time t1, the enable signal EN is at a high level, and the driving unit 520 controls the first transistor M51 to start conducting, and then controls the inductive load 501 to start conducting and generate an inductive current I L , inductor current I L The size starts from 0 and increases to VS / R51.

[0187] At time t2: the enable signal EN is at a low level, the drive unit 520 controls the first transistor M51 to start turning off, and then controls the inductive load 501 to start turning off, the inductive load 501 continues to flow, and the inductive current I L The size of the inductor current I L It will also flow through the first transistor M51. At this time, the first transistor M51 works in the saturation region, and the voltage V DS51 Rising, the temperature rises rapidly.

[0188] from Figure 6 It can be seen that the detection current I at time t2 SNS Greater than or equal to the threshold current I L（th） , the comparator 541 in the state detection unit 540 outputs a low level, so that the control signal CTRL output by the control unit 550 is still at a low level, the second transistor M52 is still in the off state, and the inductive load 501 continues to flow, and the output pin P OUT5The potential of is pulled up, causing the Zener diode Z5 in the voltage clamping unit 530 to break down, and the voltage clamping unit 530 works, V DS51 The voltage clamped by the voltage clamping unit 530 is V DSCLAMP .

[0189] Time t3: At this time, the enable signal EN is still at a low level, and the inductor current I L Still continuing to decrease, when the detection current I SNS Less than the threshold current I L（th） , the comparator 541 in the state detection unit 540 outputs a high level, which in turn makes the control signal CTRL output by the control unit 550 high level, controls the second transistor M52 to be turned on, forces the gate voltage of the first transistor M51 to be pulled down, and makes the voltage V DS51 increases, and the first transistor M51 enters an avalanche state.

[0190] At the same time, since the second transistor M52 is turned on, the third resistor R53 in the voltage clamping unit 530 is short-circuited, the current flowing through the second resistor R52 increases, and the voltage between the cathode of the Zener diode Z5 and the second end of the second resistor R52 is equal to the avalanche voltage, and the avalanche voltage is greater than the clamping voltage V of the voltage clamping unit 530. DSCLAMP , the voltage clamping unit 530 is V DS51 There is no longer any influence, therefore, at this moment, the first transistor M51 enters an avalanche state by itself to bear the remaining energy of the inductive load 501 .

[0191] At t4: the inductive current I of the inductive load 501 L The magnitude of drops to 0, the inductive load 501 and the first transistor M51 are completely turned off, and all signals return to the initial state.

[0192] According to an embodiment, the power transistor unit 510 and the state detection unit 540 may detect the current of the first transistor M51 using other circuits, and output a level signal to the control unit 550 according to a comparison result between the current and a preset first threshold.

[0193] According to an embodiment, the power transistor unit 510 and the state detection unit 540 may detect the temperature rise of the first transistor M51 using other circuits, and output a level signal to the control unit 550 according to the comparison result between the temperature rise and a preset temperature rise threshold.

[0194] The present application also proposes an electronic device, comprising any one of the switch chips described above and an inductive load.

[0195] The present application also proposes a working method of a switch chip.

[0196] The switch chip may include a power transistor, and the load controlled by the switch chip is an inductive load. The working method of the switch chip includes:

[0197] When the enable signal of the power transistor in the switch chip fails during the inductive load shutdown process and when the current flowing through the power transistor is greater than or equal to a preset first threshold, the voltage clamping unit is used to control the voltage across the power transistor unit to be equal to the clamping voltage.

[0198] When the current flowing through the power transistor is less than a preset first threshold, the power transistor is caused to avalanche.

[0199] The avalanche voltage of the power transistor is greater than the clamping voltage of the voltage clamping unit.

[0200] With the development of technology, different types of applications may require different inductive loads, and the operating current of the switch chip and the corresponding level of the inductive load freewheeling current are also different. This application is aware of this demand, and the switch chip provided by this application can be applied to various types of inductive loads, more comprehensively avoiding damage to the power transistor in the switch chip caused by excessive or too small freewheeling current, and can be better applied to different types of application scenarios.

[0201] The above embodiments are only used to illustrate the present application, and are not intended to limit the present application. Ordinary technicians in the relevant technical field may make various changes and modifications without departing from the scope of the present application. Therefore, all equivalent technical solutions should also fall within the scope disclosed in the present application.

Claims

1. A switch chip, characterized in that: include: A power transistor unit, electrically connected between a power supply and a ground, configured to control the on and off of an inductive load, and comprising at least a first transistor, wherein the first transistor is a power transistor; a switching unit, electrically connected between the gate and the source of the first transistor; a voltage clamping unit connected in parallel with the power transistor unit and configured to control the voltage across the power transistor unit to be equal to a clamping voltage during the shutdown process of the inductive load; a state detection unit, electrically connected to the power transistor unit and configured to detect a current flowing through the power transistor unit; a control unit, electrically connected to the state detection unit and the switching unit, respectively, and configured to receive an enable signal and control a working state of the switching unit; a driving unit, electrically connected between the gate and source of the first transistor, configured to receive the enable signal, and control the working state of the first transistor according to the enable signal and then control the on / off state of the inductive load; Wherein, during the shutdown process of the inductive load when the enable signal fails, when the state detection unit detects that the current flowing through the power transistor unit is greater than or equal to a preset first threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the power transistor unit to be equal to the clamping voltage; when the state detection unit detects that the current flowing through the power transistor unit is less than the preset first threshold, the control unit controls the switching unit to cause the first transistor to avalanche, wherein the avalanche voltage of the first transistor is greater than the clamping voltage.

2. The switch chip according to claim 1, characterized in that: The inductive load is electrically connected between the switch chip and ground.

3. The switch chip according to claim 1, characterized in that: The inductive load is electrically connected between a power source and the switch chip.

4. The switch chip according to claim 2 or 3, characterized in that: The switching unit includes a second transistor, a drain of which is electrically connected to the gate of the first transistor, and a source of which is electrically connected to the source of the first transistor; wherein the type of the second transistor is consistent with the type of the first transistor.

5. The switch chip according to claim 4, characterized in that: The voltage clamping unit comprises: a Zener diode having a cathode electrically connected to the drain of the first transistor; a second resistor and a third resistor connected in series; wherein a first end of the second resistor is electrically connected to an anode of the Zener diode, a second end of the second resistor is electrically connected to a first end of the third resistor, and a second end of the third resistor is electrically connected to a source of the first transistor; The gate of the first transistor is electrically connected to a node between the second resistor and the third resistor.

6. The switch chip according to claim 5, characterized in that: The state detection unit comprises: a third transistor having a gate electrically connected to the gate of the first transistor, a drain electrically connected to the drain of the first transistor, and a source configured to output a detection current; Wherein, the type of the third transistor is consistent with the types of the first transistor and the second transistor; Wherein, the size of the third transistor is a proportional reduction of the size of the first transistor; The proportional relationship between the detection current and the current flowing through the power transistor unit is equal to the proportional relationship between the size of the third transistor and the size of the first transistor.

7. The switch chip according to claim 6, characterized in that: The state detection unit also includes: an operational amplifier, a positive input terminal of which is electrically connected to the source of the first transistor, and a negative input terminal of which is electrically connected to the source of the third transistor; a fourth transistor, a gate of which is electrically connected to the output terminal of the operational amplifier, and a source of which is electrically connected to the negative input terminal of the operational amplifier; The type of the fourth transistor is complementary to the types of the first transistor, the second transistor, and the third transistor.

8. The switch chip according to claim 7, characterized in that: The state detection unit also includes: a comparator having a negative input terminal electrically connected to the drain of the fourth transistor; a fourth resistor, a first end of which is electrically connected to the drain of the fourth transistor and the negative input terminal of the comparator, and a second end of which is grounded; a voltage source, electrically connected between the positive input terminal of the comparator and ground, and configured to provide a preset second threshold value to the comparator; wherein the proportional relationship between the current corresponding to the second threshold and the first threshold is equal to the proportional relationship between the size of the third transistor and the size of the first transistor; During the shutdown process of the inductive load when the enable signal fails, when the voltage at the negative input terminal of the comparator is greater than or equal to the second threshold, the control unit controls the switching unit so that the voltage clamping unit controls the voltage across the first transistor to be equal to the clamping voltage; when the voltage at the negative input terminal of the comparator is less than the second threshold, the control unit controls the switching unit so that the first transistor avalanches.

9. An electronic device, characterized in that: It comprises a switch chip as described in any one of claims 1 to 8 and an inductive load.

10. A method for operating a switch chip, characterized in that: The switch chip is the switch chip according to any one of claims 1 to 8, and the working method of the switch chip includes: When the enable signal of the power transistor fails and the inductive load is turned off, and when the current flowing through the power transistor is greater than or equal to a preset first threshold, using a voltage clamping unit to control the voltage across the power transistor to be equal to a clamping voltage; When the current flowing through the power transistor is less than a preset first threshold, causing the power transistor to avalanche; Wherein, the avalanche voltage of the power transistor is greater than the clamping voltage.

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