Adaptive routing for power efficient switching

Abstract

The invention discloses adaptive routing for power efficient switching. A device, a communication system and a method are provided. In one example, a system for routing traffic is described that includes a plurality of ports to facilitate communication over a network. The system also includes a controller to determine, for a first port of the plurality of ports, a bandwidth of the first port and a bandwidth history of the first port, compare the bandwidth of the first port and the bandwidth history of the first port to a threshold, and change a configuration of the first port based on the comparison of the bandwidth and the bandwidth history to the threshold.

Description

Technical Field

[0001] The present disclosure is generally directed to networking, and more particularly to networking devices, switches, and methods of operating the same. Background Art

[0002] Switches and similar network devices represent core components of many communications, security, and computing networks. Switches are often used to connect multiple devices, device types, networks, and network types.

[0003] Devices (including but not limited to personal computers, servers, or other types of computing devices) can be interconnected using network devices such as switches. These interconnected entities form a network that enables data communication and resource sharing between nodes. Typically, there may be multiple potential paths for data flow between any pair of devices. This feature is often referred to as multipath routing, allowing data (usually encapsulated in packets) to traverse different routes from the source device to the destination device. This network design enhances the robustness and flexibility of data communications because it provides alternatives in the event of path failures, congestion, or other adverse conditions. In addition, it facilitates load balancing across the network, thereby optimizing overall network performance and efficiency. However, managing multipath routing and ensuring optimal path selection can pose significant challenges, requiring advanced mechanisms and algorithms for network control and data routing, and power consumption can be unnecessarily high, especially during low traffic periods. Summary of the invention

[0004] According to one or more embodiments described herein, a computing system (e.g., a switch) can enable various systems (e.g., switches, servers, personal computers, and other computing devices) to communicate across a network. The ports of the computing system can be used as communication endpoints, allowing the computing system to manage multiple simultaneous network connections with one or more nodes.

[0005] Each port of a computing system can be considered as a lane and can be associated with an egress queue of data (e.g., in the form of packets) waiting to be sent through the port. In practice, each port can be used as an independent channel for data communication to and from the computing system. Each port of a computing system can be connected to one or more ports of one or more other computing systems. Ports allow concurrent network communications, enabling a computing system to perform multiple data exchanges with different network nodes at the same time.

[0006] As described herein, ports of a computing system may be selectively activated or deactivated. Deactivating a port may include directing data to another port that is directed to the same destination as the deactivated port by placing the data in a queue associated with the other port, as described in more detail below. In other words, deactivating a particular port may include determining whether a packet to be sent to the destination should be sent via the other port, and in response to the determination, storing the packet in a queue associated with the other port.

[0007] As described herein, ports of a computing system may be selectively activated or deactivated based on a number of factors. As described in more detail below, such factors may include the current bandwidth of a particular port, the bandwidth history of the port, utilization of system buffers, system activity (e.g., the percentage of system ports that are currently active), and / or other factors.

[0008] The present disclosure discusses a system and method for enabling a switch or other computing system to activate or deactivate one or more ports based on a plurality of such factors. Embodiments of the present disclosure are intended to address the above-mentioned shortcomings and other problems by implementing an improved routing method. The system and method described herein reduces power consumption while avoiding data speed issues.

[0009] The routing methods shown and described herein may be applied to switches, routers, or any other suitable type of networking device known or yet to be developed. In an illustrative example, a system is disclosed that includes circuitry for providing adaptive routing, the circuitry for determining, for a first port of a plurality of ports, a bandwidth of the first port and a bandwidth history of the first port; comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds; and changing a configuration of the first port based on the comparison of the bandwidth and the bandwidth history to the one or more thresholds.

[0010] In another example, a system is disclosed that includes one or more circuits for changing a configuration of a first port among a plurality of ports based on a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization of a computing system, and a comparison of system activity associated with the plurality of ports to one or more thresholds.

[0011] In another example, a switch is disclosed that includes one or more circuits to: determine system activity and buffer utilization; determine bandwidth and historical bandwidth for each of a plurality of ports; compare the bandwidth, historical bandwidth, buffer utilization, and system activity to one or more thresholds for each of the plurality of ports; and based on comparing the bandwidth, bandwidth history, buffer utilization, and system activity to the one or more thresholds for each of the plurality of ports, transmit a packet via a port of the plurality of ports.

[0012] Any of the above example aspects includes where changing the configuration of the first port results in a change in system power consumption.

[0013] Any of the above example aspects include, wherein the configuration of the first port includes one or more of a score and a rank of the first port, and wherein changing the configuration of the first port includes changing one or more of the score and the rank of the first port. Any of the above example aspects include, wherein changing the configuration of the first port includes disabling the first port.

[0014] Any of the above example aspects include where changing the configuration of the first port includes enabling the first port.

[0015] Any of the above example aspects includes determining system activity, wherein the system activity is a percentage of active ports.

[0016] Any of the above example aspects include where the bandwidth history of the first port comprises a moving weighted average.

[0017] Any of the above example aspects include where comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds includes: determining that a sum of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is below one of the one or more thresholds.

[0018] Any of the above example aspects include where in response to determining that a total of a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization, and a system activity is below one of the one or more thresholds, adjusting the configuration of the first port includes disabling the first port.

[0019] Any of the above example aspects include where comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds includes determining that a total value of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is above one of the one or more thresholds.

[0020] Any of the above example aspects include where in response to determining that a total of a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization, and a system activity is above one of the one or more thresholds, adjusting the configuration of the first port includes enabling the first port.

[0021] Any of the above example aspects includes where the first port is selected from the plurality of ports using a round robin algorithm.

[0022] Any of the above example aspects includes where the respective configuration of each of the plurality of ports is changed successively in a loop.

[0023] Any of the above example aspects includes where after changing the respective configuration of each of the plurality of ports, a sleep time elapses before re-changing the respective configuration of each of the plurality of ports.

[0024] Any of the above example aspects includes that one or more circuits are further used to: determine, for a second port among the plurality of ports, a bandwidth of the second port and a bandwidth history of the second port; compare the bandwidth of the second port and the bandwidth history of the second port with one or more thresholds; and adjust a configuration of the second port based on comparing the bandwidth of the second port and the bandwidth history of the second port with the one or more thresholds.

[0025] Any of the above example aspects includes where each of the plurality of ports is eligible for adaptive routing.

[0026] Any of the above example aspects includes wherein the one or more circuits are further configured to send the packet via a port of the plurality of ports based at least in part on a rank of each port.

[0027] Any of the above example aspects includes wherein the one or more circuits are further configured to determine system activity and buffer utilization, and wherein changing the configuration of the first port is further based on a comparison of the system activity and buffer utilization to one or more thresholds.

[0028] Additional features and advantages are described herein, and will be apparent from the following description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The present disclosure is described in conjunction with the accompanying drawings, which are not necessarily drawn to scale:

[0030] Figure 1 is a block diagram depicting an illustrative configuration of a computing system in accordance with at least some embodiments of the present disclosure;

[0031] Figure 2 illustrates a computing system and a network of nodes in accordance with at least some embodiments of the present disclosure;

[0032] Figure 3 illustrates a computing system and a network of nodes in accordance with at least some embodiments of the present disclosure;

[0033] Figure 4 illustrates a computing system and a network of nodes in accordance with at least some embodiments of the present disclosure;

[0034] Figure 5 is a flow chart illustrating a method according to at least some embodiments of the present disclosure; and

[0035] Figure 6is a flow chart illustrating a method in accordance with at least some embodiments of the present disclosure. DETAILED DESCRIPTION

[0036] The following description provides only embodiments and is not intended to limit the scope, applicability or configuration of the claims. Instead, the following description will provide a feasible description for those skilled in the art to implement the embodiments. It should be understood that various changes may be made to the functions and arrangements of the elements without departing from the spirit and scope of the appended claims.

[0037] It will be appreciated from the following description that, for reasons of computational efficiency, the components of the system may be arranged in any suitable locations in a distributed network of components without affecting the operation of the system.

[0038] In addition, it should be understood that the various links connecting the elements can be wired, trace or wireless links, or any suitable combination thereof, or any other suitable known or later developed elements capable of providing data to and / or transmitting data from the connected elements. For example, the transmission medium used as a link can be any suitable electrical signal carrier, including coaxial cable, copper wire and optical fiber, electrical traces on a printed circuit board (PCB), etc.

[0039] As used herein, the phrases "at least one", "one or more", "or", and "and / or" are open-ended expressions that are both conjunctions and disjuncts in operation. For example, each of the expressions "at least one of A, B, and C", "at least one of A, B, or C", "one or more of A, B, and C", "one or more of A, B, or C", "A, B and / or C", and "A, B, or C" means: A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together.

[0040] As used herein, the term "automatic" and variations thereof refer to any suitable process or operation that can be accomplished without substantial human input when the process or operation is performed. However, if input is received prior to the performance of the process or operation, then the process or operation may be automatic, even if the performance of the process or operation uses substantial or insubstantial human input. Human input is considered substantial if it affects the manner in which the process or operation is performed. Human input that consents to the performance of the process or operation is not considered "substantial."

[0041] As used herein, the terms "determine," "compute," and "calculate" and variations thereof may be used interchangeably and include any suitable type of method, process, operation, or technique.

[0042] Various aspects of the disclosure are described herein with reference to the accompanying drawings, which are schematic illustrations of idealized configurations.

[0043] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology and the present disclosure.

[0044] As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that when the terms "include", "comprises", and / or "contains" are used in this specification, the presence of the features, integers, steps, operations, elements, and / or components is specified, but the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof is not excluded. The term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] Reference now Figures 1 to 6 , various systems and methods for routing packets between communication nodes will be described. The concepts of packet routing depicted and described herein can be applied to routing information from one computing device to another computing device. The term "packet" as used herein should be interpreted as any appropriate discrete amount of digitized information. The information being routed can be in the form of a single packet or multiple packets without departing from the scope of the present disclosure. In addition, certain embodiments will be described in conjunction with systems configured to make centralized routing decisions, while other embodiments will be described in conjunction with systems configured to make distributed and possibly uncoordinated routing decisions. It should be understood that the features and functions of a centralized architecture can be applied to or used in a distributed architecture, or vice versa.

[0046] According to one or more embodiments described herein, Figure 1 The computing system 103 shown can enable various systems (such as switches, servers, personal computers and other computing devices) to communicate across a network. Such a computing system 103 described herein can be a switch or any computing device including multiple ports 106a-d for connecting to nodes on a network.

[0047] The ports 106a-d of the computing system 103 may be used as communication endpoints, allowing the computing system 103 to manage multiple simultaneous network connections with one or more nodes. Each port 106a-d may be used to transmit data associated with one or more flows. Each port 106a-d may be associated with a queue 121a-d, thereby enabling the port 106a-d to handle incoming and outgoing data packets associated with a flow.

[0048] Each port 106a-d of the computing system can be viewed as a path and is associated with a corresponding egress queue 121a-d for data (e.g., in the form of packets) waiting to be sent through the port 106a-d. In effect, each port 106 can be used as an independent channel for data communication with the computing system 103. The ports 106 allow for concurrent network communications, enabling the computing system 103 to conduct multiple data exchanges with different network nodes at the same time. When a packet or other form of data is ready to be sent from the computing system 103, the packet can be assigned to the port 106 from which it will be sent by storing the packet in the queue 121 associated with the port 106.

[0049] The ports 106a-d of the computing system 103 may be physical connection points that allow a network cable (e.g., an Ethernet cable) to connect the computing system 103 to one or more network nodes. Each port 106a-d may be of a different type, including, for example, a 100 Mbps, 1000 Mbps, or 10 Gigabit Ethernet port, each providing a different level of bandwidth.

[0050] As described herein, ports 106a-d of a computing system 103 may be selectively activated or deactivated. As described in more detail below, deactivating a port 106a-d may include directing data to another port 106a-d leading to the same destination as the deactivated port 106a-d by placing the data in a queue 121a-d associated with the other port 106a-d. As described in more detail below, activating a port 106a-d may include directing data to the port 106a-d by placing the data in a queue 121a-d associated with the port 106a-d.

[0051] As described herein, a particular port 106 of a computing system 103 may be selectively activated or deactivated based on a number of factors. These factors may include, for example, the current bandwidth of the port 106. The bandwidth of a port 106 may be the number of packets stored in a queue 121 associated with the port 106, or may be a number associated with the amount of traffic sent through the port 106 over a period of time (e.g., over the last second). The bandwidth of the ports 106a-d may be stored in the memory 118 of the computing system as port bandwidth data 124. For example, the processor 115 of the computing system may poll the bandwidth of each port 106a-d and store the bandwidth in the memory 118. Polling the bandwidth of the ports 106a-d may, in some implementations, include reading the amount of data in each queue 121a-d or by tracking the amount of data written to and / or read from each queue 121a-d.

[0052] Factors used to determine whether a particular port 106 should be activated or deactivated may also include the bandwidth history of the port 106. For example, the port bandwidth data 124 for each port 106 may be tracked over time. In some implementations, calculations may be performed to determine trends or other statistics related to the port bandwidth history. For example, a weighted moving average may be calculated. The bandwidth history of each port may be determined over a given time period or over the entire life cycle of the computing system 103. Determining the bandwidth history may be performed by the processor 115 of the system 103, for example, by reading the amount of data stored in each queue 121, the amount of data written to each queue 121 and / or read from each queue 121, and / or the port bandwidth data 124 stored in the memory 118 and calculating based on the data.

[0053] Factors used to determine whether a particular port 106 should be activated or deactivated may also include buffer utilization of the buffer 112 of the system 103. Buffer utilization data 127 may be stored in the memory 118 of the system 103. The buffer utilization may be the current amount of data stored in the buffer 112, or may be the percentage of the capacity of the buffer 112 that is currently occupied. The data stored in the buffer 112 may be data waiting to be allocated to the port 106 by being written or stored in the queue 121. The buffer utilization data 127 may be created by the processor 115, for example, by reading the amount of data stored in the buffer 112 or by tracking the data written to and / or read from the buffer 112 and performing calculations based on that data.

[0054] Factors used to determine whether a particular port 106 should be activated or deactivated may also include a measurement or representation of system activity. System activity data 130 may be stored in memory 118. System activity may be a percentage of currently active ports 106a-d of the system. For example, the processor 115 of the system 103 may divide the number of currently active ports 106a-d by the total number of ports 106a-d.

[0055] Although the above calculations are described as being performed by processor 115 and stored in memory 118, it should be understood that in some implementations, such calculations may be performed by hardware circuits forming logic configured to perform the necessary calculations. Furthermore, the results of such calculations need not be stored in memory 118, but may be derived on the fly as needed when making a determination as to whether any port should be activated or deactivated.

[0056] The switching hardware 109 of the computing system may include an internal fabric or path within the computing system 103 through which data travels between the two ports 106a-d. In some embodiments, the switching hardware 109 may include one or more network interface cards (NICs). For example, in some embodiments, each port 106a-d may be associated with a different NIC. The NIC or NICs may include hardware and / or circuitry that may be used to transmit data between the ports 106a-d.

[0057] The switching hardware 109 may also or alternatively include one or more application specific integrated circuits (ASICs) for performing tasks such as determining which port a received packet should be sent to. The switching hardware 109 may include various components, for example, including port controllers that manage the operation of each port, network interface cards that facilitate data transmission, and internal data paths that direct data flows within the computing system 103. The switching hardware 109 may also include memory elements for temporarily storing data and management software for controlling the operation of the hardware. This configuration enables the switching hardware 109 to accurately track port usage and provide data to the processor 115 upon request.

[0058] Packets received by computing system 103 may be placed in buffer 112 until placed in queue 121a-d and then transmitted by corresponding port 106a-d. Buffer 112 may effectively be an ingress queue where received data packets may be temporarily stored. As described herein, the port 106a-d through which a given packet is to be sent may be determined based on a number of factors.

[0059] like Figure 1 As shown, the computing system 103 may also include a processor 115, such as a CPU, a microprocessor, or any circuit or device capable of reading instructions from the memory 118 and performing actions. The processor 115 may execute software instructions to control the operation of the computing system 103.

[0060] Processor 115 may serve as the central processing unit of computing system 103 and is essential to the ability to perform the system's operations. Processor 115 communicates with other components of computing system 103 to manage and execute computing operations, ensuring optimal system functionality and performance.

[0061] In more detail, processor 115 can be designed to perform a wide range of computing tasks. The functions of the processor can include executing program instructions, managing data within the system, and controlling the operation of other hardware components such as switching hardware 109. Processor 115 can be a single-core or multi-core processor, and may include one or more processing units, depending on the specific design and requirements of computing system 103. The architectural design of processor 115 can allow efficient instruction execution, data processing, and overall system management, thereby enhancing the performance and practicality of computing system 103 in various applications. In addition, processor 115 can be programmed or adjusted to perform specific tasks and operations according to application requirements, thereby potentially enhancing the versatility and adaptability of computing system 103.

[0062] The computing system 103 may also include one or more memory 118 components. The memory 118 may be configured to communicate with the processor 115 of the computing system 103. The communication between the memory 118 and the processor 115 may enable various operations, including but not limited to data exchange, command execution, and memory management. According to the implementation described herein, the memory 118 may be used to store data, such as port bandwidth data 124 related to the use of the ports 106a-d of the computing system 103, buffer utilization data 127 related to the use of the buffers 112 of the computing system 103, and system activity data 130 related to the use of the ports 106a-d of the computing system 103.

[0063] The memory 118 may be comprised of a variety of physical components, depending on the specific type and design. At the core, the memory 118 may include one or more storage cells capable of storing data in the form of binary information. These storage cells may be comprised of transistors, capacitors, or other suitable electronic components, depending on the memory type, such as DRAM, SRAM, or flash memory. To enable data transfer and communication with other parts of the computing system 103, the memory 118 may also include data lines or buses, address lines, and control lines. These physical components may collectively comprise the memory 118, contributing to its ability to store and manage data such as port bandwidth data 124, buffer utilization data 127, and system activity data 130.

[0064] The data stored in the memory 118 may include information about various aspects of port, buffer, and system usage. Such information may include data about active connections, the amount of data in the queues 121a-d, the amount of data in the buffer 112, the status of each port within the ports 106a-d, etc. The data may include, for example, buffer occupancy, the number of active ports 106a-d, the total number of ports 106a-d, and the queue depth or length of each port 106a-d, as described in more detail herein. The processor 115 may store, access, and utilize data to manage port operations and network communications. For example, the processor 115 may utilize the data in the memory 118 to manage network traffic, determine priorities, or otherwise control the flow of data through the computing system 103, as described in more detail herein. Therefore, the memory 118 may, in conjunction with the processor 115, play a key role in optimizing the use and performance of the ports 106 of the computing system 103.

[0065] In one or more embodiments of the present disclosure, a processor 115 of a computing system 103 (e.g., a switch) may perform a polling operation to retrieve data related to the activity of ports 106a-d and buffers 112, such as by polling the switching hardware 109. As used herein, polling may involve the processor 115 periodically querying or requesting data from the switching hardware 109. The polling process may include the processor 115 sending a request to the switching hardware 109 to retrieve the desired data. Upon receiving the request, the switching hardware 109 may compile the requested port and / or buffer usage data and send it back to the processor 115.

[0066] The data stored in the memory 118 may include various indicators, such as the amount of data or the number of packets in each queue 121a-d, the amount of data or the number of packets in the buffer 112, and / or other information, such as the data transmission rate, error rate, and status of each port. After receiving the data, the processor 115 may perform further operations based on the obtained information, such as optimizing port usage, balancing network loads, or troubleshooting problems, as described herein.

[0067] The data described herein may include an indication of one or more groups associated with each port 106a-d. As described in more detail below, the ports 106a-d may be grouped according to which destinations are reachable through the ports 106a-d. For example, ports 106a-d that can be used to communicate with a first specific node may be located in a first group, while ports 106a-d that can be used to communicate with a second specific node may be located in a second group. It should be understood that, as described below, a port 106a-d may be located in one or more groups.

[0068] The data described herein may include the current queue depth of each port 106. The current queue depth of the port 106 may be the amount of data, the number of packets, the percentage of queue space used, or other variables that the processor 115 may use to determine the usage of each port 106.

[0069] In one or more embodiments of the present disclosure, the processor 115 of the computing system 103 may poll data from the buffer 112 to determine the utilization of the buffer 112. As used herein, the buffer utilization may refer to the amount of data or number of packets currently stored in the buffer 112 and / or the amount of free space in the buffer 112 that can be used for data storage.

[0070] Processor 115 may obtain buffer utilization information by, for example, periodically sending a request to buffer 112 to retrieve information about the current utilization of the buffer or by periodically reading a register or memory location in which an indication of the amount of data in the buffer is stored. The buffer utilization information may include the number of data packets currently stored in buffer 112 and / or the amount of available space remaining in buffer 112.

[0071] In some embodiments, the buffer 112 from which the processor 115 polls data may include a memory cell or area designated for temporarily storing data packets awaiting processing or transmission. The buffer 112 may also contain or communicate with control logic or management software that tracks the occupancy status of the buffer 112.

[0072] In some embodiments, the processor 115 may perform calculations related to buffer utilization. It should be appreciated that the fewer the number of active ports 106, the greater the risk of packets being dropped due to the buffer reaching capacity, as the reduced number of outbound ports creates a bottleneck. Generally, when buffer utilization is high or close to full, more active ports are needed to reduce the risk of dropping packets.

[0073] In one or more embodiments of the present disclosure, the processor 115 of the computing system 103 may perform operations to determine the number of active and inactive ports within the computing system 103 and determine a system activity level. As used herein, "active" may indicate that a port is currently transmitting or receiving data, while inactive may indicate that a port is not currently participating in data transfer activities.

[0074] In some embodiments, the processor 115 may issue requests or commands to components of the computing system 103 (e.g., the switching hardware 109) to obtain the operating status of each port 106a-d or queue 121a-d. Upon receiving these requests, the components may provide the required data to the processor 115. Such data may include the current activity status of each port 106a-d, such as whether the port 106a-d is active or inactive.

[0075] In some embodiments, the processor 115 may also perform a calculation to calculate a percentage representation of active ports. Such a calculation may involve dividing the number of active ports by the total number of ports. The percentage obtained may be used as a quantitative measure of system activity.

[0076] As used herein, system activity may refer to the percentage of active ports at any given time. System activity may provide an overview of system utilization for performance monitoring, system optimization, and capacity planning, such as according to the systems and methods described herein. In general, when a small percentage of ports are active, the system 103 may be more likely to drop bursts of packets or data than when a high percentage of ports are active.

[0077] In one or more embodiments of the present disclosure, the processor 115 can use the collected data related to port activity to monitor and maintain the historical bandwidth of each queue 121a-d associated with the port 106a-d. This information can be stored in the memory 118, such as a portion of the port data 124, to form a historical record of the port bandwidth. In some implementations, the processor 115 can periodically update the historical bandwidth of each port. The update frequency may vary depending on the specific requirements and design considerations of the system 103. Each update may involve polling the latest port usage data, recalculating the bandwidth, and storing the new bandwidth data 124 in the memory 118. The updated data can replace the existing data or be appended to the existing data.

[0078] In one or more embodiments of the present disclosure, after obtaining relevant data related to port bandwidth, system activity, historical bandwidth of each port, buffer utilization, and / or other information, the processor 115 may store the information in the memory 118 as port bandwidth data 124, buffer utilization data 127, and system activity data 130. The data may include, for example, parameters and indicators related to port usage, buffer occupancy, system activity level, queue depth, etc.

[0079] In one or more embodiments of the present disclosure, a computing system 103 (eg, a switch) may communicate with a plurality of network nodes 200a-200g, such as Figure 2As shown. Each network node 200a-200g can be a computing system with the ability to send and receive data. Each node 200a-200g can be any of a variety of devices, including but not limited to a switch, a personal computer, a server, or any other device capable of sending and receiving data in packet form.

[0080] Computing system 103 may establish a communication channel through its port with network node 200. Such a channel may support data transmission in the form of a packet stream, following a predetermined protocol governing the format, size, transmission method, and other aspects of the packets.

[0081] Each network node 200a-200g may interact with computing system 103 in a variety of ways. Node 200 may send data packets to computing system 103 for processing, transmission, or other operations, or forwarded to another node 200. Conversely, each node 200 may receive data from computing system 103, either originating from computing system 103 itself or from other network nodes 200a-200g via computing system 103. In this way, computing system 103 and nodes 200a-200g may collectively form a network, thereby facilitating data exchange, resource sharing, and a range of other collaborative operations.

[0082] like Figure 3 As shown, nodes 200a-200i can be connected to multiple computing systems 103a-103b described herein, thereby forming a network of nodes 200a-200i and computing systems 103a-103b. For example, the systems and methods described herein may include multiple interconnected switches. Multiple computing systems 103a-103b (e.g., switches) can be interconnected in various topologies, such as star, ring, or mesh, depending on the specific requirements and resilience required of the network. For example, in a star topology, multiple switches can be connected to a central switch, while in a ring topology, each switch can be connected to two other switches in a closed loop. In a mesh topology, each switch can be interconnected to every other switch in the network. These robust structures provide a degree of redundancy because data has multiple propagation paths, ensuring that network functionality can be maintained even in the event of a switch failure. For example, as Figure 3 As shown, for a packet to be sent from node 200a to node 200h, since computing system 103a is integrated with computing system 103b through multiple ports, the packet can be transmitted from computing system 103a to computing system 103b through any one of nodes 200c-200g.

[0083] Although computing systems 103a and 103b are shown as being connected through nodes 200c-200g, it should be understood that separate nodes 200c-200g may be omitted and computing systems 103a-103b may be directly interconnected through any number of one or more ports.

[0084] Integrating multiple ports of the first computing system 103a with the second computing system 103b provides a number of benefits compared to using a single port connection, most notably increased bandwidth and redundancy. The aggregation of multiple connections between the two switches effectively increases the available data pipe size, thereby achieving greater throughput. This is particularly useful in high-demand environments with heavy data traffic. In addition, establishing multiple connections can enhance network resiliency. If one connection fails, the network can continue to operate normally using the remaining active connections.

[0085] exist Figure 3 In the example shown, node 200a is connected to port 106a of computing system 103a, node 200b is connected to port 106b of computing system 103a, node 200c is connected to port 106c of computing system 103a and port 106h of computing system 103b, node 200d is connected to port 106d of computing system 103a and port 106i of computing system 103b, node 200e is connected to port 106e of computing system 103a and port 106j of computing system 103b, node 200f is connected to port 106f of computing system 103a and port 106k of computing system 103b, node 200g is connected to port 106g of computing system 103a and port 1061 of computing system 103b, node 200h is connected to port 106m of computing system 103b, and node 200i is connected to port 106n of computing system 103b. Thus, any node 200a-200i can communicate with other nodes in the nodes 200a-200i through one or both of the computing systems 103a-103b. For example, the computing system 103a can send a packet from the node 200a to the node 200h or 200i using any one of the ports 106c-106g.

[0086] Because not every port 106a-106g of computing system 103a may be used to communicate with every possible node 200, each port 106a-106g may be considered to be part of one or more port groups based on the nodes that may be served by the port 106a-106g. Figure 3 In the example shown, each of ports 106c-g can be used to communicate with nodes 200h and 200i. Figure 3 In the example embodiment, each of the ports 106c-g may be located in a common group.

[0087] Because data may follow multiple paths to reach a particular destination, one or more ports 106 of computing system 103 may be activated or deactivated without degrading the flow of data.

[0088] like Figure 3 As shown, the flow between node 200a and node 200h can propagate through any port 106c-g of computing system 103a. If ports 106c and 106d are disabled, the flow can continue to propagate through ports 106e-106g. If the data rate does not exceed the capacity of ports 106e-106g, the flow can continue to propagate without being substantially affected by the disabled ports 106c and 106d. Figure 4 As shown, the dotted lines connecting port 106c and node 200c, port 106d and node 200d, node 200c and port 106h, and node 200d and port 106i represent disabled paths. It should be understood that although these paths are disabled, there are still other paths to allow communication through any one of nodes 200a, 200b, 200e, 200f, 200g, 200h, and 200i.

[0089] Since multiple ports 106 of computing system 103 may lead to the same destination, one or more ports may be unnecessary except in high traffic situations. Under normal operating conditions, ports may be underutilized or unused. Using conventional routing methods, traffic is evenly distributed across all hardware ports, resulting in the maximum amount of hardware involved in routing decisions, regardless of buffer utilization, port bandwidth, and system activity.

[0090] On the other hand, using the system described herein, the power efficiency of a computing system (e.g., in a data center network) can be improved by considering port bandwidth and bandwidth history, buffer utilization, and system activity without affecting performance. The systems and methods described herein relate to routing traffic using an optimal number of ports, thereby reducing power consumption. Using the system or method described herein, unneeded ports can be disabled or deactivated, and unneeded ports can be re-enabled when other ports are needed. When port 106 is active, port 106 can be among the optional ports 106 for sending data. The routing mechanism may be able to select an active port 106 to forward packets, and the packets may be forwarded by storing the packets in a queue associated with the active port 106. Disabling or deactivating port 106 as described herein may involve stopping forwarding packets through the port 106 to be disabled. For example, a disabled port 106 may be removed from a list of optional ports 106 for forwarding packets. Port 106 of computing system 103 may be removed from a list of ports that can be selected for transmitting data, such as by shielding the port from a group associated with a data destination, thereby causing the port to be closed. In some embodiments, the closing of a port may occur due to an autonomous port mechanism that can close the port. In addition, when traffic is very low, the entire switch / device may enter a sleep mode to minimize power usage. For example, Figure 4 As shown, because computing systems 103a and 103b stop sending packets to nodes 200c and 200d, nodes 200c and 200d (which may be switches) may be deactivated.

[0091] like Figure 5 As shown, and according to Figure 1 The computing system 103 shown and described herein may perform method 500 to add or remove ports as needed, thereby reducing power consumption of the computing system 103. Although the description of method 500 provided herein describes the steps of method 500 as being performed by a processor 115 of the computing system 103, the steps of method 500 may be performed by one or more processors 115, switching hardware 109, one or more controllers or circuits in the computing system 103, or some combination thereof. It should be understood that method 500 may be implemented in hardware or software. As a result of method 500, based on current and historical port usage, buffer utilization, system activity, and / or other factors, the computing system 103 may determine that one or more ports should be added or removed to enable traffic flow while maximizing the power efficiency of the system 103. Port addition following method 500 may be performed as described below with respect to Figure 6 The method 600 described is implemented as follows. Figure 5The method 500 may be performed separately for each of the one or more port groups. For example, the method 500 may be performed in parallel for each group, or may be performed in series for each group.

[0092] At 503, the processor 115 of the computing system 103 can traverse the list of currently active ports. The currently active port can be a port that is currently transmitting data from the system 103. In some implementations, the list of currently active ports can be stored in a memory of the system. The list of currently active ports can be a table or a vector with one entry for each port or each active port. Traversing the list can include executing a loop mechanism. For example, the loop mechanism can start from the first port and then traverse each port.

[0093] Executing the loop described herein may involve selecting a first port in the current active port list. The first port may be the first port in the list or another position in the list. In some implementations, the first port may be randomly selected. The value of a counter, pointer, or register may be used to indicate the selected first port. When a packet is to be sent from computing system 103, the first packet may be sent through the currently selected port. Once a packet has been sent through the selected port, the selected port may increase one or another value. For example, the value of a counter, pointer, or register may increase with the sending of each packet. The next packet may be sent through the current value of a counter, pointer, or register. When the current value of a counter, pointer, or register reaches the end of the current active port list, the counter, pointer, or register may return to the top of the list.

[0094] At 506, the processor 115 of the computing system 103 may obtain information related to port and buffer usage. As described above, the processor 115 of the computing system may be configured to poll data, such as port bandwidth history, buffer utilization data, and system activity from the switching hardware 109 and / or the memory 118. Such information may include data about active ports 106, the amount of data in the queues 121, the amount of data in the buffers 112, the status of each port within the ports 106a-d, and the like. The port data 124 may include various metrics, such as the amount of data or number of packets in each queue 121a-d, the amount of data or number of packets in the buffers 112, and / or other information, such as data transfer rates, error rates, and the status of each port. As an example, the information obtained at 506 may include the current bandwidth of the port selected at 503, the bandwidth history of the port selected at 503 and / or other ports, the current buffer utilization, the current system activity or percentage of active ports, and / or other information.

[0095] Port data 124 as described herein may include the current queue depth of each port 106. The current queue depth of a port 106 may be the amount of data, number of packets, percentage of queue space used, or other variables that the processor 115 may use to determine the usage of each port 106.

[0096] As described herein, a port bandwidth history may include statistics associated with data sent over time through a corresponding port. For example, a port bandwidth history may reflect the total number of packets or the total amount of data sent from a particular port. In some implementations, a port bandwidth history may be a weighted moving average of the amount of data sent from a particular port.

[0097] Buffer utilization as described herein may indicate the current amount of data stored in a buffer of the system. In some implementations, buffer utilization may be the percentage of buffer capacity currently occupied by data to be sent from the system.

[0098] In one or more embodiments of the present disclosure, the processor 115 of the computing system 103 may poll data from the buffer 112 to determine the occupancy of the buffer 112. The processor 115 may obtain the buffer occupancy information by, for example, periodically sending a request to the buffer 112 to retrieve information about the current occupancy of the buffer or by periodically reading a register or memory location that stores an indication of the amount of data in the buffer. The buffer occupancy information may include the number of packets currently stored in the buffer 112 and / or the amount of free space remaining in the buffer 112.

[0099] In some embodiments, the processor 115 may perform calculations related to buffer occupancy. For example, the processor 115 may input buffer occupancy data into a formula to generate a parameter indicating the risk of discarding packets due to the buffer 112 reaching capacity. It should be understood that the fewer the number of active ports 106, the greater the risk of packets being discarded due to the buffer reaching capacity, because the reduction in the number of outbound ports can create a bottleneck. In general, when the buffer is high or close to full, more available ports are needed to reduce the risk of discarding packets.

[0100] In one or more embodiments of the present disclosure, the processor 115 of the computing system 103 may perform operations to determine the number of active and inactive ports within the computing system 103. In some embodiments, the processor 115 may also perform calculations to calculate a percentage representation of active ports. Such calculations may involve dividing the number of active ports by the total number of ports.

[0101] Processor 115 can use the collected data related to port activity to monitor and maintain the historical queue depth of each queue 121a-121d associated with port 106a-106d. Such information can be stored in memory 118, for example as part of port data 124, to form a historical record of queue depth.

[0102] In one or more embodiments of the present disclosure, after obtaining relevant data about port usage, port activity, historical queue depth of each queue 121a-d, and / or other information, the processor 115 can store the information as port data 124 in the memory 118. The system activity described herein can be an indication of the current number of active ports of the system. In some implementations, the system activity can be a percentage, such as the total number of active ports divided by the total number of ports of the system.

[0103] At 509, based on the port data, port bandwidth history, buffer utilization and system activity, the processor 115 may be able to determine the risk factor associated with the port selected at 503. The risk factor may be determined by adding one or more of the current port bandwidth, port bandwidth history, buffer utilization and system activity. Adding one or more of the current port bandwidth, port bandwidth history, buffer utilization and system activity may include first multiplying one or more of the current port bandwidth, port bandwidth history, buffer utilization and system activity by a variable. Multiplying one or more of the current port bandwidth, port bandwidth history, buffer utilization and system activity by a variable may make one or more of the current port bandwidth, port bandwidth history, buffer utilization and system activity weighted as desired to reflect specific system requirements. For example, the risk factor may be the total value of the port bandwidth history multiplied by the first variable, the buffer utilization multiplied by the second variable and the system activity multiplied by the third variable. Each of the first, second, and third variables may be set based on the requirements of the system 103 and may be used to effectively weight each of the port bandwidth history, buffer utilization, and system activity of the system 103 when determining whether to add or remove a port.

[0104] At 512, the processor may determine whether one or more ports should be removed from the currently active ports. In some implementations, determining whether any port should be removed from the currently active ports may include comparing the risk factor determined at 509 and the current bandwidth of the current port (if not included in the risk factor calculation) to a removal port threshold. In some implementations, comparing the risk factor and the current bandwidth of the port to the removal port threshold may include adding the risk factor and the current bandwidth of the port, and determining whether the total value of the risk factor and the current bandwidth of the port is less than the removal port threshold. As the risk factor and / or the port bandwidth decreases, the likelihood that the number of ports required by the system is greater than the number of currently active ports of the system becomes greater. On the other hand, as the risk factor and / or the port bandwidth increases, the likelihood that the number of ports required by the system is less than the number of currently active ports of the system becomes greater.

[0105] At 515, if the processor determines that one or more ports should be removed from the current active port, the processor may add a penalty to the port selected at 503 and / or add the port selected at 503 to the penalized port list. It should be understood that in some implementations, ports may be simply disabled rather than penalized. Port penalties as described herein may be referred to as the configuration of ports. The configuration of ports changes continuously in a cycle. Adding a penalty to a port or removing a penalty from a port may be referred to as changing the corresponding configuration of a port. After having changed the configuration of a port by penalizing a port or removing or reducing the penalty of a port, the configuration of a port may be changed again by repeating the process of adding or removing a port as described herein.

[0106] Penalizing a port may include increasing the number of penalties associated with the port. For example, in some implementations, a routing mechanism or switching hardware may be configured to select a port to transmit a particular packet based at least in part on the penalty for each port. Ports with no penalties may be more likely to be selected than ports with penalties, and ports with lower penalties may be more likely to be selected than ports with higher penalties. Ports with the largest penalties (seven in some implementations) may never be selected for routing packets, or may only be selected in worst-case scenarios.

[0107] By penalizing a port when its risk factor and current bandwidth are low, the port will be less likely to be used to send future packets and may therefore be deactivated entirely, thereby reducing the current power consumption of the system.

[0108] After penalizing the selected port at 515, method 500 may continue with selecting a new port at 503, such as using a round-robin mechanism.

[0109] If the processor determines at 512 that the total value of the risk factor and the current port bandwidth is greater than or equal to the remove port threshold, then at 518 the processor may compare the risk factor and the current bandwidth of the current port to one or more add port thresholds.

[0110] Comparing the risk factor and the current bandwidth of the current port to one or more add port thresholds may include determining whether a total value of the risk factor and the current bandwidth of the current port is greater than the add port threshold.

[0111] In some implementations, multiple add port thresholds may be used. For example, a high risk threshold, a medium risk threshold, and / or a low risk threshold may be used. In some implementations, after determining that the total value of the port bandwidth and the risk factor is greater than the add port threshold, method 500 may include comparing the risk factor to one or more of the high risk threshold, the medium risk threshold, and / or the low risk threshold.

[0112] Different add port thresholds may be used to determine how many ports should be added or how much port penalty should be removed. As described below, if the processor determines that the total value of the risk factor and the current bandwidth is greater than the add port threshold, the method 500 may include proceeding to 521 and executing add port logic. The add port logic may be a method of removing penalties from a port and may include as described below and in Figure 6 The steps in method 600 are shown in FIG.

[0113] If it is determined that the total value of the risk factor and the current bandwidth of the current port is not greater than the add port threshold, method 500 may include returning to 503 to repeat the method using a different port.

[0114] In one or more embodiments of the present disclosure, method 500 may return to 503 after execution and restart the process. In some implementations, repetition of method 500 may occur without delay. In this case, as soon as method 500 ends, method 500 may immediately start the next iteration. This arrangement may allow for continuous execution of method 500. In some implementations, a pause of a predetermined amount of time may occur between successive iterations of method 500. The duration of the pause may be specified according to the operational needs of the method, such as by a user.

[0115] like Figure 6 As shown, method 600 may be performed in response to determining that a total value of the port bandwidth and the risk factor is greater than an add port threshold.

[0116] At 603, a list of penalized ports may be accessed. The list of penalized ports may be a list of all ports to be added in response to determining that the total value of the port bandwidth and the risk factor is greater than the add port threshold. In some implementations, the penalized port list may be created in response to determining that the total value of the port bandwidth and the risk factor is greater than the add port threshold.

[0117] In some implementations, a penalized port list may be created based on whether the risk factor is above a high risk threshold, a medium risk threshold, or a low risk threshold. For example, in response to determining that the risk factor is above the high risk threshold, the penalized port list may include a greater number of ports, while in response to determining that the risk factor is above the medium risk threshold, the penalized port list may include a smaller number of ports, and in response to determining that the risk factor is not above the medium risk threshold, the penalized port list may include an even smaller number of ports. As a result of method 600, the penalty for each port on the penalized port list may be removed or reduced as described below.

[0118] At 606, it may be determined whether the first port in the penalized port list has a penalty less than a maximum value. If the penalty of the first port in the penalized port list has a penalty less than the maximum value, the penalty of the first port may be removed at 609 and the port may be removed from the penalized port list.

[0119] If at 606, the first port in the penalized port list has the largest penalty, then an additional step 612 may need to be performed, namely, signaling the mechanism that the port should be reactivated. In such an implementation, after signaling the mechanism that the port should be reactivated, a waiting step 615 may be performed until the port is reactivated. After the waiting step 615, any penalty associated with the port may be removed at 609, and the port may be removed from the penalized port list.

[0120] In some implementations, the system may include a mechanism for deactivating a port. When a port reaches a maximum penalty, the mechanism may be activated to perform the process of deactivating the port. Once a port is deactivated, any additional packets may not be placed in a queue to transmit through the port. The mechanism may also or alternatively control the process of reactivating a deactivated port. When the penalty of a deactivated port under the maximum penalty is removed or reduced, the mechanism may be activated to perform the process of reactivating the port. Once a port is reactivated, packets may be placed in a queue to transmit through the port. In such implementations, it may be impossible or undesirable to write packets into the queue of a deactivated port. Therefore, the additional step 612 that signals the mechanism that a port should be reactivated may enable the mechanism to start the process of reactivating a port.

[0121] At 618 , it may be determined whether the penalized port list includes any ports. If the penalized port list is empty, method 600 may end at 621 .

[0122] If the penalized port list is not empty, then method 600 may include returning to 606 and continuing for the new first port on the penalized port list. In some implementations, methods 500 and 600 may operate in a loop. Along with the loopback of iteration, iteration may start again to repeat for each port. In some implementations, there may be a dormancy or waiting period between iterations and / or loops, thereby providing a hysteresis mechanism to avoid constantly adding and / or removing ports.

[0123] This disclosure covers Figure 5 and Figure 6 (and the corresponding method description), and including all the steps identified in Figure 5 and Figure 6 The present disclosure also encompasses methods comprising one or more steps from the methods described herein and one or more steps from any other method described herein.

[0124] Embodiments of the present disclosure include a system comprising one or more circuits for: determining, for a first port among a plurality of ports, a bandwidth of the first port and a bandwidth history of the first port; comparing the bandwidth of the first port and the bandwidth history of the first port with one or more thresholds; and changing a configuration of the first port based on comparing the bandwidth and the bandwidth history with the one or more thresholds.

[0125] Embodiments also include a computing system comprising one or more circuits for changing a configuration of a first port among a plurality of ports based on comparing a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization of the computing system, and system activity associated with the plurality of ports to one or more thresholds.

[0126] An embodiment also includes a switch comprising one or more circuits for: determining system activity and buffer utilization; determining bandwidth and historical bandwidth for each of a plurality of ports; comparing the bandwidth, historical bandwidth, buffer utilization, and system activity to one or more thresholds for each of the plurality of ports; and transmitting a packet via a port of the plurality of ports based on comparing the bandwidth, bandwidth history, buffer utilization, and system activity to the one or more thresholds for each of the plurality of ports.

[0127] Aspects of the above systems, computing systems, and switches include where changing the configuration of the first port results in a change in power consumption of the system.

[0128] Aspects of the above systems, computing systems, and switches also include where the configuration of the first port includes one or more of a score and a rank of the first port, and where changing the configuration of the first port includes changing one or more of the score and the rank of the first port.

[0129] Aspects of the above systems, computing systems, and switches include where changing the configuration of the first port includes disabling the first port.

[0130] Aspects of the above systems, computing systems, and switches include where changing the configuration of the first port includes enabling the first port.

[0131] Aspects of the above systems, computing systems, and switches include where the one or more circuits are further configured to determine system activity, where the system activity is a percentage of active ports.

[0132] Aspects of the above-described systems, computing systems, and switches include where the bandwidth history of the first port comprises a moving weighted average.

[0133] Aspects of the above-described systems, computing systems, and switches include where comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds includes determining that a total value of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is below one of the one or more thresholds.

[0134] Aspects of the above systems, computing systems, and switches include where, in response to determining that a total value of a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization, and a system activity is below one of the one or more thresholds, adjusting the configuration of the first port includes disabling the first port.

[0135] Aspects of the above-described systems, computing systems, and switches include where comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds includes determining that a total value of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is above one of the one or more thresholds.

[0136] Aspects of the above systems, computing systems, and switches include, in response to determining that a total value of a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization, and a system activity is above one of the one or more thresholds, adjusting the configuration of the first port includes enabling the first port.

[0137] Aspects of the above-described systems, computing systems, and switches include selecting the first port from the plurality of ports using a round-robin algorithm.

[0138] Aspects of the above-described systems, computing systems, and switches include continuously changing a respective configuration of each of a plurality of ports in a loop.

[0139] Aspects of the above systems, computing systems, and switches include where after changing the respective configuration of each of the plurality of ports, a sleep time elapses before re-changing the respective configuration of each of the plurality of ports.

[0140] Aspects of the above-described systems, computing systems, and switches include wherein one or more circuits are further configured to: determine, for a second port among the plurality of ports, a bandwidth of the second port and a bandwidth history of the second port; compare the bandwidth of the second port and the bandwidth history of the second port to one or more thresholds; and adjust a configuration of the second port based on comparing the bandwidth of the second port and the bandwidth history of the second port to the one or more thresholds.

[0141] Aspects of the above-described systems, computing systems, and switches include where each of the plurality of ports is eligible for adaptive routing.

[0142] Aspects of the above-described systems, computing systems, and switches include where the one or more circuits are further configured to send the packet via a port of the plurality of ports based at least in part on a rank of each port.

[0143] Aspects of the above systems, computing systems, and switches include where the one or more circuits further determine system activity and buffer utilization, and where changing the configuration of the first port is further based on comparing the system activity and buffer utilization to one or more thresholds.

[0144] It should be understood that any feature described herein may be claimed in combination with any other feature described herein, whether or not such features are from the same described embodiment.

[0145] Specific details are given in the description to provide a comprehensive understanding of the embodiments. However, one of ordinary skill in the art will appreciate that the embodiments may be implemented without these specific details. In other cases, well-known circuits, processes, algorithms, structures, and techniques may not be shown in unnecessary detail to avoid obscuring the embodiments.

[0146] Although illustrative embodiments of the present disclosure are described herein in detail, it should be understood that the concepts of the present invention may be embodied and used in other various ways, and that the appended claims are intended to be interpreted to include such variations unless limited by the prior art.

Claims

1. A system for providing adaptive routing, the system comprising one or more circuits, the one or more circuits being configured to: For a first port among the plurality of ports, determining a bandwidth of the first port and a bandwidth history of the first port; comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds; and A configuration of the first port is changed based on a comparison of the bandwidth and the bandwidth history to the one or more thresholds.

2. The system of claim 1, wherein changing the configuration of the first port causes a change in power consumption of the system.

3. The system of claim 1, wherein the configuration of the first port comprises one or more of a score and a ranking of the first port, and wherein changing the configuration of the first port comprises changing one or more of the score and the ranking of the first port. The system of claim 1 , wherein changing the configuration of the first port comprises disabling the first port.

5. The system of claim 1, wherein changing the configuration of the first port comprises enabling the first port.

6. The system of claim 1, further comprising determining system activity, wherein the system activity is a percentage of active ports.

7. The system of claim 1, wherein the bandwidth history of the first port comprises a moving weighted average.

8. The system of claim 1 , wherein comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds comprises: A determination is made that a total of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is below one of the one or more thresholds.

9. The system of claim 8, wherein in response to determining that the bandwidth of the first port, the bandwidth history of the first port, the buffer utilization, and the total value of the system activity are below one of the one or more thresholds, adjusting the configuration of the first port includes disabling the first port.

10. The system of claim 1, wherein comparing the bandwidth of the first port and the bandwidth history of the first port to one or more thresholds comprises: A determination is made that a total of the bandwidth of the first port, the bandwidth history of the first port, buffer utilization, and system activity is above one of the one or more thresholds.

11. The system of claim 10, wherein in response to determining that the bandwidth of the first port, the bandwidth history of the first port, the buffer utilization, and the total value of the system activity are above one of the one or more thresholds, adjusting the configuration of the first port includes enabling the first port.

12. The system of claim 1, wherein the first port is selected from the plurality of ports using a round-robin algorithm.

13. The system of claim 1, wherein the respective configuration of each of the plurality of ports is continuously changed in a loop.

14. The system of claim 13, wherein after changing the corresponding configuration of each of the plurality of ports, a sleep time elapses before re-changing the corresponding configuration of each of the plurality of ports.

15. The system of claim 1, wherein the one or more circuits are further configured to: For a second port among the plurality of ports, determining a bandwidth of the second port and a bandwidth history of the second port; comparing the bandwidth of the second port and the bandwidth history of the second port to the one or more thresholds; and A configuration of the second port is adjusted based on comparing the bandwidth of the second port and the bandwidth history of the second port to the one or more thresholds.

16. The system of claim 1, wherein each of the plurality of ports is eligible for adaptive routing.

17. The system of claim 1, wherein the one or more circuits are further configured to send a packet via one of the plurality of ports based at least in part on a rank of each of the ports.

18. The system of claim 1, wherein the one or more circuits are further configured to determine system activity and buffer utilization, and wherein changing the configuration of the first port is further based on a comparison of the system activity and the buffer utilization to the one or more thresholds.

19. A computing system comprising one or more circuits configured to: A configuration of a first port of the plurality of ports is changed based on a comparison of a bandwidth of the first port, a bandwidth history of the first port, a buffer utilization of the computing system, and system activity associated with the plurality of ports to one or more thresholds.

20. A switch comprising one or more circuits, wherein the one or more circuits are configured to: Determine system activity and buffer utilization; determining a bandwidth and a historical bandwidth for each of a plurality of ports; comparing the bandwidth, the historical bandwidth, the buffer utilization, and the system activity to one or more thresholds for each of the plurality of ports; and Based on comparing the bandwidth, the history of the bandwidth, the buffer utilization, and the system activity to the one or more thresholds for each port of the plurality of ports, transmitting a packet via a port of the plurality of ports.

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