Method and system for optimizing photoelectric conversion efficiency of HJT battery

Abstract

The invention provides an HJT battery photoelectric conversion efficiency optimization method and system, and the method comprises the steps: carrying out the diffusion gettering of a monocrystalline silicon wafer through a phosphorus diffusion heat treatment technology according to the performance demands of an HJT battery; performing silicon-based thin film passivation treatment on the silicon wafer after diffusion gettering treatment through an optimized PECVD (Plasma Enhanced Chemical Vapor Deposition) technology, and the optimized PECVD technology comprises the steps of constructing an n-type nanocrystalline silicon oxygen thin film, performing crystallization treatment on a p-type amorphous silicon thin film and optimizing a low-temperature intrinsic passivation layer; a transparent conductive thin film TCO deposited on a passivated silicon wafer is optimized in combination with various modes from two angles of a thin film structure and a thin film material, and the optimized TCO thin film comprises a gradient refractive index multilayer structure and / or a metal nanowire structure. According to the method, the photoelectric conversion efficiency of the HJT battery is improved through multiple optimization modes, and the production of the high-efficiency and low-cost HJT battery is facilitated.

Description

Technical Field

[0001] The present application relates to the technical field of solar cell manufacturing, and in particular to a method and system for optimizing the photoelectric conversion efficiency of a HJT cell. Background Art

[0002] At present, various types of solar cells have been widely used in various fields of life and industry. Among them, intrinsic thin-film heterojunction cells (Heterojunction Technology, referred to as HJT) have become an important development direction in the field of solar cells because of their simple structure, low process temperature, high open circuit voltage and double-sided power generation.

[0003] In related technologies, the PN junction of HJT cells is composed of two semiconductor materials: an N-type silicon wafer substrate and a doped amorphous silicon film. It has higher laboratory efficiency than PERC cells and TOPCon cells. However, in practical applications, the photoelectric conversion efficiency of HJT cells cannot reach the expected effect because the optimization method of HJT cells is relatively simple, and only diffuses and getstering in a fixed mode.

[0004] Therefore, how to optimize HJT cells from multiple aspects to improve the photoelectric conversion efficiency has become a problem that needs to be solved urgently. Summary of the invention

[0005] The present application aims to solve one of the technical problems in the related art at least to some extent.

[0006] To this end, the first purpose of the present application is to propose a method for optimizing the photoelectric conversion efficiency of HJT batteries. This method improves the photoelectric conversion efficiency of HJT batteries through multiple optimization methods, which is conducive to the generation of high-efficiency and low-cost HJT batteries.

[0007] The second objective of this application is to propose a system for optimizing the photoelectric conversion efficiency of HJT cells.

[0008] A third object of the present application is to provide a non-transitory computer-readable storage medium.

[0009] To achieve the above objectives, the first aspect of the present application is to propose a method for optimizing the photoelectric conversion efficiency of a HJT cell, the method comprising the following steps:

[0010] According to the performance requirements of the HJT cell, the target concentrations of various types of impurities in the single crystal silicon wafer of the HJT cell are determined, and based on the target concentrations, the single crystal silicon wafer is diffused and gettered by a phosphorus diffusion heat treatment technology;

[0011] Through the optimized plasma enhanced chemical vapor deposition (PECVD) technology, the silicon wafer after diffusion and gettering treatment is subjected to silicon-based thin film passivation treatment, wherein the optimized PECVD technology includes constructing n-type nanocrystalline silicon oxygen film, crystallizing p-type amorphous silicon film and optimizing the low-temperature intrinsic passivation layer;

[0012] From the perspectives of film structure and film material, a transparent conductive film TCO deposited on a passivated silicon wafer is optimized in a combination of multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

[0013] Optionally, in one embodiment of the present application, the construction of an n-type nanocrystalline silicon oxide film includes: taking an n-type microcrystalline silicon oxide film as a target passivation film, and adjusting the microstructure of the light-facing surface of the n-type microcrystalline silicon oxide film to nanocrystalline; and widening the optical band gap of the crystallized n-type microcrystalline silicon oxide film on the basis of ensuring the crystallization ratio and doping rate of the crystallized n-type microcrystalline silicon oxide film.

[0014] Optionally, in one embodiment of the present application, the crystallization treatment of the p-type amorphous silicon film includes: adjusting the microstructure of the p-type amorphous silicon film to nanocrystals, and combining multiple methods to improve the activation rate of the doped elements in the crystallized p-type amorphous silicon film; the optimization of the low-temperature intrinsic passivation layer includes: crystallizing the structure of the n-type doping layer and the p-type doping layer, and combining multiple methods to suppress the dehydrogenation effect of the intrinsic passivation layer on the n-side and the p-side during the growth of the doping layer microcrystalline film.

[0015] Optionally, in one embodiment of the present application, the combination of multiple methods to optimize the transparent conductive film TCO deposited on the silicon wafer after passivation treatment also includes: combining multiple layers of materials with different refractive indices, and depositing the multiple layers of materials on the silicon wafer after passivation treatment by magnetron sputtering; adjusting the thickness and surface texture of each layer of material to generate a gradient refractive index multilayer TCO film.

[0016] Optionally, in one embodiment of the present application, the combination of multiple methods to optimize the transparent conductive film TCO deposited on the silicon wafer after passivation treatment also includes: adding a metal nanowire structure to the indium tin oxide ITO film to generate a high light transmittance network structure in the ITO composite film; adjusting the ratio of indium and tin in the ITO film according to the parameters of the network structure.

[0017] Optionally, in one embodiment of the present application, the optimization of the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods also includes: transferring a layer of graphene or a water-blocking transparent layer on the surface of the ITO composite film; before optimizing the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods, it also includes: when confirming the transfer of the graphene, reducing the amount of ITO for preparing the ITO composite film according to the amount of graphene to be added.

[0018] Optionally, in one embodiment of the present application, the optimization of the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods also includes: setting a buffer layer with a thickness less than a preset threshold between the doped amorphous silicon surface and the TCO film, wherein the preparation equipment of the buffer layer is spaced a preset distance from the effective doping site of the amorphous silicon.

[0019] To achieve the above objectives, the second aspect of the present application further proposes a system for optimizing the photoelectric conversion efficiency of a HJT cell, comprising the following modules:

[0020] A diffusion gettering module, which is used to determine the target concentration of various types of impurities in the single crystal silicon wafer of the HJT cell according to the performance requirements of the HJT cell, and to perform diffusion gettering on the single crystal silicon wafer based on the target concentration by phosphorus diffusion heat treatment technology;

[0021] A passivation treatment module is used to perform silicon-based thin film passivation treatment on silicon wafers after diffusion and gettering treatment by using an optimized plasma enhanced chemical vapor deposition (PECVD) technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, performing crystallization treatment on a p-type amorphous silicon film, and optimizing a low-temperature intrinsic passivation layer;

[0022] The TCO film optimization module is used to optimize the transparent conductive film TCO deposited on the silicon wafer after passivation treatment from the two perspectives of film structure and film material, combining multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

[0023] In order to implement the above-mentioned embodiments, the third aspect of the present application also proposes a non-temporary computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the method for optimizing the photoelectric conversion efficiency of the HJT battery in the above-mentioned first aspect is implemented.

[0024] The technical solution provided by the embodiment of the present application brings at least the following beneficial effects: the present application first diffuses and absorbs the monocrystalline silicon wafer through the phosphorus diffusion heat treatment technology according to the performance requirements of the HJT battery; then, the silicon wafer after the diffusion and absorbent treatment is subjected to silicon-based thin film passivation treatment through the optimized plasma enhanced chemical vapor deposition PECVD technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, crystallizing the p-type amorphous silicon film and optimizing the low-temperature intrinsic passivation layer; finally, from the perspectives of film structure and film material, the transparent conductive film TCO deposited on the silicon wafer after the passivation treatment is optimized in combination with a variety of methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure. Thus, the present application optimizes the photoelectric conversion efficiency of the HJT battery in three stages: monocrystalline silicon wafer absorbent, PECVD-based silicon-based thin film passivation, and TCO film materials and processes, and adopts a variety of specific optimization methods to perform corresponding optimization operations in each stage, thereby improving the optimization effect of the HJT battery efficiency by combining a variety of optimization methods, and significantly improving the photoelectric conversion efficiency of the HJT battery. Therefore, the present application enriches the optimization methods for the photoelectric conversion efficiency of HJT cells, improves the photoelectric conversion efficiency of cells, and also reduces the material cost of cells through relevant optimization methods, which is conducive to the production of high-efficiency and low-cost HJT cells.

[0025] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0027] Figure 1 A flow chart of a method for optimizing the photoelectric conversion efficiency of a HJT cell proposed in an embodiment of the present application;

[0028] Figure 2 A flow chart of a method for optimizing a silicon-based thin film passivation process proposed in an embodiment of the present application;

[0029] Figure 3 A flow chart of a transparent conductive film TCO optimization method proposed in an embodiment of the present application;

[0030] Figure 4 A schematic diagram of the structure of a system for optimizing the photoelectric conversion efficiency of a HJT cell proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0031] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0032] A method and system for optimizing the photoelectric conversion efficiency of a HJT cell proposed in an embodiment of the present invention will be described below with reference to the accompanying drawings.

[0033] Figure 1 A flow chart of a method for optimizing the photoelectric conversion efficiency of a HJT cell proposed in an embodiment of the present application, such as Figure 1 As shown, the method comprises the following steps:

[0034] Step S101, according to the performance requirements of the HJT battery, the target concentrations of various types of impurities in the single crystal silicon wafer of the HJT battery are determined, and based on the target concentrations, the single crystal silicon wafer is diffused and gettered by phosphorus diffusion heat treatment technology.

[0035] Specifically, since the quality of silicon wafers is the basis for determining the performance of HJT solar cells, this application first optimizes the doping of single-crystal silicon wafers. This application can accurately control the thermal field and gas field during crystal growth, use passivation technology to reduce the defects caused by the in-situ growth process, and achieve high-quality n-type single-crystal silicon growth. At the same time, develop n-type single-crystal silicon wafer diffusion doping post-processing technology, by optimizing the impurity diffusion thermal process, eliminate local impurity defects in in-situ growth and impurity contamination and stress defects during cutting.

[0036] As a possible implementation method, the quality of silicon wafers can be optimized from the following three aspects.

[0037] As a first aspect, the resistivity of the silicon wafer is optimized and the target concentrations of various types of impurities in the silicon wafer are determined.

[0038] Specifically, in this example, based on the existing relevant data on silicon wafer manufacturing, the HJT battery performance of silicon wafers at different resistivities (wherein the battery performance may include the photoelectric conversion efficiency of the battery, etc.) and the influence of the concentration of various types of impurities such as oxygen impurities, carbon impurities and metal impurities in the silicon wafer of the battery on the battery performance can be compared to generate a relationship diagram between resistivity and battery performance, as well as a relationship diagram between various impurities and battery performance. Then, based on the expected requirements for parameters such as the photoelectric conversion efficiency of the current HJT battery (i.e., the performance requirements for the HJT battery), the optimal resistivity range of the battery is selected, and the optimal silicon wafer quality and specifications of the battery are determined, including determining the planned concentration of various types of impurities, etc.

[0039] As the second aspect, the diffusion and impurity gettering process is optimized. It should be noted that the diffusion and impurity gettering of n-type monocrystalline silicon wafers has a significant effect on improving the photoelectric conversion efficiency of HJT cells and reducing the discrete distribution of efficiency. It can improve the power distribution concentration of components and facilitate the management of battery and component products. Therefore, this application optimizes the phosphorus diffusion and impurity gettering process, reduces the impurity content of silicon wafers, and increases the minority carrier life of silicon wafers, thereby achieving the goal of improving the conversion efficiency of HJT cells.

[0040] In specific implementation, as an example, since silicon wafers are the main material of HJT solar cells and the active area of ​​photogenerated carriers, the minority carrier lifetime of crystalline silicon materials is crucial to the efficiency of the cell. Various defects inside the silicon wafer, such as dislocations, carbon, oxygen, metal and other impurities, can become carrier recombination centers, which have a great impact on the minority carrier lifetime of the silicon wafer. Therefore, this embodiment uses phosphorus diffusion heat treatment technology to form a high-concentration doping layer on the surface of the silicon wafer, so that the metal impurities inside the silicon wafer are enriched in the diffusion layer, and then the surface diffusion layer is removed by chemical corrosion to achieve the purpose of reducing the content of metal impurities.

[0041] Among them, the heat treatment in this embodiment is to use liquid phosphorus oxychloride to diffuse and getter at 750℃~800℃ to form a diffusion zone with a thickness of about 0.3μm. As the silicon wafer goes deeper, the internal phosphorus atom concentration will gradually decrease from 1E20~1E21 / cm3 to 1E15 / cm3. Due to the high solubility of metal impurities in the heavily doped layer and the capture effect of high-density defects in the diffusion layer on metal atoms, metal impurities are gradually enriched in the diffusion layer. Then, this embodiment removes the phosphorus silicon glass and the diffusion layer to obtain a silicon wafer with a lower impurity content. Through PL image detection, it can be determined that the "concentric circles" of the silicon wafer are significantly weakened after the impurity gettering treatment in this embodiment.

[0042] As the third aspect, the texturing and cleaning optimization is performed. Before the diffusion and impurity optimization in the second aspect is performed, this embodiment can also optimize the structure of the velvet size and pyramid morphology according to the requirements of the plasma enhanced chemical vapor deposition (PECVD) and screen printing process, reduce the surface reflectivity of the silicon wafer, and improve the aspect ratio of the metal electrode, so as to achieve the effect of improving the current density and FF of the HJT battery. At the same time, in conjunction with the process development of PECVD, the passivation effect of amorphous silicon is improved by optimizing the cleaning process and the surface state of the silicon wafer, thereby achieving the purpose of improving Voc and photoelectric conversion efficiency.

[0043] Step S102, performing silicon-based thin film passivation treatment on the silicon wafer after diffusion and gettering treatment by using optimized plasma enhanced chemical vapor deposition (PECVD) technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, crystallizing a p-type amorphous silicon film, and optimizing a low-temperature intrinsic passivation layer.

[0044] It should be noted that for HJT cells, it is generally necessary to deposit various thin films on the surface of the cell through PECVD technology to improve the performance of the cell. These thin films can be anti-reflective films, passivation layers or other functional layers. In the general HJT cell manufacturing process, the HJT cell is a symmetrical double-sided cell structure, with N-type crystalline silicon in the middle, and then the intrinsic amorphous silicon film and P-type amorphous silicon film are deposited on the front in sequence to form a PN junction. On the back of the silicon wafer, the intrinsic amorphous silicon film and the N-type amorphous silicon film are deposited in sequence to form a back surface field. Since the conductivity of amorphous silicon is relatively poor, a transparent conductive film (TCO) is deposited on both sides of the cell for conduction, and finally a double-sided electrode is formed using screen printing technology.

[0045] Specifically, the present application optimizes the silicon-based film passivation process when depositing various silicon-based passivation films on the silicon wafer that has been subjected to diffusion and gettering treatment in step S101 by PECVD technology. On the basis of the existing PECVD process, the present application improves the battery efficiency by PECVD process, mainly including three aspects: constructing n-type nanocrystalline silicon oxygen film, crystallizing p-type amorphous silicon film, and optimizing low-temperature intrinsic passivation layer.

[0046] In order to more clearly describe the specific implementation process of optimizing the PECVD process in the present application, an optimization method for a silicon-based thin film passivation process proposed in an embodiment of the present application is exemplified below. Figure 2 A flow chart of a method for optimizing a silicon-based thin film passivation process proposed in an embodiment of the present application, such as Figure 2 As shown, the method comprises the following steps:

[0047] In step S201, an n-type microcrystalline silicon oxide film is used as a target passivation film, the microstructure of the light-facing surface of the n-type microcrystalline silicon oxide film is adjusted to nanocrystalline, and the optical band gap of the crystallized n-type microcrystalline silicon oxide film is widened on the basis of ensuring the crystallization ratio and doping rate of the crystallized n-type microcrystalline silicon oxide film.

[0048] Specifically, this step is to design and construct an n-type nanocrystalline silicon oxide film. In view of the problems of strong parasitic absorption of the window layer caused by the narrow bandgap of the doped hydrogenated amorphous silicon layer and low efficiency of photogenerated carrier collection due to disordered structure, this embodiment solves the problems by widening the bandgap and enhancing the quality of the material.

[0049] Among them, since the n-type microcrystalline silicon oxide film has characteristics such as higher conductivity and low absorption coefficient, this embodiment selects this film as the best field passivation film, that is, the target film for passivation treatment.

[0050] In specific implementation, this embodiment adjusts the microstructure of the n-type silicon film on the light-facing side to nanocrystals. In the process of adjusting to nanocrystals, on the one hand, the optical band gap must be widened, and the standard requirements for light absorption reaching the crystalline silicon substrate by enhancing the optical band gap are increased to improve the short-circuit current of the solar cell. On the other hand, while adjusting to nanocrystals, the crystallization ratio and doping efficiency of the film need to be guaranteed, so as to ensure the effective transport of carriers and improve the fill factor.

[0051] Step S202 , adjusting the microstructure of the p-type amorphous silicon film to nanocrystals, and combining multiple methods to increase the activation rate of doping elements in the crystallized p-type amorphous silicon film.

[0052] Specifically, this step is to crystallize the p-type amorphous silicon film. In order to reduce the carrier transmission loss caused by the defects of the p-type doped amorphous silicon film and the contact loss with the TCO film, this embodiment adjusts the microstructure of the p-type amorphous silicon film to crystallize, and improves the activation rate of the doping elements in various ways, so that the film has high conductivity. At the same time, it also improves the contact characteristics with the TCO film, so as to achieve the purpose of improving the fill factor and conversion efficiency.

[0053] In this embodiment, the activation rate of the doping elements in the amorphous silicon film can be improved in a variety of ways according to actual conditions. For example, the deposition parameters can be optimized. By adjusting the parameters in the PECVD process, such as deposition temperature, hydrogen dilution ratio, radio frequency power, etc., the growth rate and hydrogen content of the film can be controlled, thereby improving the activation rate of the doping elements. For another example, a post-annealing treatment can be performed. In the annealing process after deposition, by controlling the annealing temperature and time, the film structure can be further stabilized, and the dehydrogenation phenomenon in the subsequent process can be reduced, thereby improving the doping efficiency. For another example, a double-layer passivation layer structure can be used. A silicon heterojunction solar cell using a double-layer intrinsic amorphous silicon as a passivation layer can be treated with intermediate hydrogen plasma to increase the hydrogen content of the film, reduce microstructural factors, improve the passivation effect and increase the fill factor (FF) of the battery. For another example, light treatment can also be performed. Since light can significantly improve the dark conductivity of the film, the diffusion and jumping of weakly bound hydrogen atoms induced by light can be activated to activate boron doping, significantly improving the carrier transport of the solar cell.

[0054] It is understandable that the activation rate of the doping elements can also be improved by other means, such as using additives and controlling environmental factors, etc., and the present application does not impose any limitation on this.

[0055] Step S203 , for the structural crystallization of the n-type doping layer and the p-type doping layer, a plurality of methods are combined to suppress the dehydrogenation effect of the n-side and p-side intrinsic passivation layers during the growth of the doping layer microcrystalline film.

[0056] Specifically, this step is to optimize the low-temperature intrinsic passivation layer. The low-temperature intrinsic passivation layer refers to an intrinsic amorphous silicon film deposited by a low-temperature process for passivation of the silicon wafer surface during the production process of the HJT battery. The passivation layer is crucial to improving the photoelectric conversion efficiency of the battery because it can effectively reduce the carrier recombination on the surface of the battery and increase the life of the carrier. In view of the crystallization of the n-type and p-type doped layer structures caused by adjusting the microstructure to nanocrystals in the above steps S201 to S202, according to the changes in the n-type nanocrystal and p-type nanocrystal processes, the processes of the intrinsic amorphous silicon on the n and p sides are optimized respectively, and the dehydrogenation effect that may be generated by the intrinsic passivation layer during the growth of the doped layer microcrystalline film is reduced, so as to ensure excellent single crystal silicon surface passivation. At the same time, the contact with the doped layer is further improved to improve Voc and FF.

[0057] In this embodiment, various methods can be used to suppress the dehydrogenation effect of the intrinsic passivation layer during the growth of the doped layer microcrystalline film according to actual conditions. For example, the deposition parameters can be optimized to control the growth rate and hydrogen content of the film, thereby reducing the dehydrogenation phenomenon. For another example, intermediate hydrogen plasma treatment (HPT) is used in the double-layer intrinsic amorphous silicon passivation layer to increase the hydrogen content of the film and reduce the microstructure factors, thereby improving the passivation effect and increasing the fill factor (FF) of the battery.

[0058] It is understandable that the dehydrogenation effect can also be suppressed by other means, such as by controlling environmental factors and reducing the exposure of the battery to high humidity or high temperature environments, which will accelerate the release of hydrogen, etc. This application does not impose any restrictions on this.

[0059] Step S103, optimizing the transparent conductive film TCO deposited on the passivated silicon wafer from the perspectives of film structure and film material in combination with multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

[0060] Specifically, as mentioned above, after the HJT cell is processed in the above steps, a transparent conductive film (TCO) needs to be deposited on both sides of the cell for conduction. This step optimizes the TCO film material and processing technology from the perspectives of film structure and film material, combining multiple optimization methods, so that the optimized TCO film is deposited on the silicon wafer that has been passivated by the silicon-based film in step S102. Among them, the multiple optimization methods include constructing a TCO film with a gradient refractive index multilayer structure, and adding a metal nanowire structure to the TCO film.

[0061] The following is an illustrative description of several specific optimization methods for materials and processes of TCO thin films.

[0062] In one embodiment of the present application, a transparent conductive film TCO deposited on a silicon wafer after passivation treatment is optimized in combination with multiple methods, including: setting a buffer layer with a thickness less than a preset threshold between the doped amorphous silicon surface and the TCO film, wherein a buffer layer preparation device is spaced a preset distance from an effective doping site of the amorphous silicon.

[0063] Specifically, in this embodiment, during the TCO deposition process, especially during the sputtering growth of TCO materials, high-energy particles may damage the photoelectric properties of the doped amorphous silicon film with a thickness of only a few nanometers. Therefore, this embodiment generates a buffer layer with a thickness of less than 10 nanometers on the surface of the doped amorphous silicon, wherein it is necessary to ensure that the effective doping sites of the amorphous silicon are not physically damaged during the generation of the buffer layer. Therefore, the buffer layer preparation equipment is controlled to be separated from the effective doping sites of the amorphous silicon by a preset distance to avoid physical damage to the effective doping sites by the hardware equipment. At the same time, the structure of the buffer layer needs to ensure high transmittance, high conductivity and high interface tunneling probability.

[0064] Furthermore, in order to further improve the conversion efficiency of HJT solar cells, on the basis of PECVD doping layer microcrystallization, further optimize the ITO process and materials, improve the optical and electrical properties of the TCO film, and improve the contact characteristics between the TCO and the doped nanocrystalline silicon layer. For example, research and development of new materials can improve the conversion efficiency of HJT cells on the one hand, while reducing the cost of TCO materials and processes. For example, on the basis of the existing TCO film combination system, new materials such as aluminum-doped zinc oxide (AZO), SCOT (Stannate-doped Copper Oxide) and VTTO can be further developed to optimize the cell conversion efficiency and reduce the cost of TCO materials.

[0065] Among them, SCOT is a copper-based TCO material that improves its conductivity through doping. The SCOT film has high carrier mobility and low resistivity. VTTO is an oxide film with good transparency and conductivity.

[0066] In one embodiment of the present application, a transparent conductive film TCO deposited on a passivated silicon wafer is optimized by combining multiple methods, including: combining multiple layers of materials with different refractive indices, and depositing the multiple layers of materials on the passivated silicon wafer by magnetron sputtering; adjusting the thickness and surface texture of each layer of material to generate a gradient refractive index multilayer TCO film.

[0067] Specifically, in this embodiment, by constructing a gradient refractive index multilayer TCO film, enhanced light absorption is achieved, thereby improving the photoelectric conversion efficiency of the HJT battery. The gradient refractive index multilayer transparent conductive oxide constructed in this embodiment can optimize the optical properties of the film by combining multiple layers of different refractive index materials, thereby improving the photoelectric conversion efficiency of the battery. This structural design utilizes the principle of light interference, and reduces the reflection loss of light and increases the absorption of light by combining layers with different refractive indexes, thereby improving the performance of the battery.

[0068] It should be noted that in HJT cells, TCO films are usually used as front electrodes to provide good conductivity and optical management. The multilayer structure design of the TCO film of this embodiment can enhance the light scattering characteristics, improve the absorption of photons, and help improve the efficiency of solar cells. By introducing a gradient refractive index structure in the TCO film, the propagation path of light can be more effectively managed, the reflection of light on the cell surface can be reduced, and the propagation distance of light inside the cell can be increased, thereby improving the efficiency of the cell in utilizing light energy.

[0069] In specific implementation, as a possible implementation method, the constructed multilayer TCO structure may include a highly conductive layer (such as tin-doped indium oxide ITO) and an etchable layer (such as aluminum-doped zinc oxide AZO or intrinsic zinc oxide ZnO), and multiple layers of materials with different refractive indices are deposited on the substrate by magnetron sputtering. Then, by adjusting the thickness of each layer and the selected material, and achieving different surface textures, the light scattering characteristics can be further optimized.

[0070] For example, in crystalline silicon heterojunction solar cells, ITO thin film is a typical anti-reflection film, and its low ultraviolet transmittance and high near-infrared optical loss limit the improvement of cell efficiency. Therefore, by designing a three-layer anti-reflection film, the optical loss of the ITO film can be reduced. Using the optical thin film design software TFCalc, the ray tracing program OPAL 2 and the solar cell simulation software PC1D, the optical properties of the three-layer anti-reflection film and the electrical properties of the corresponding battery can be simulated and analyzed, thereby determining the thickness, stress and other parameters of each layer of material with different refractive indices.

[0071] In one embodiment of the present application, the TCO film material and structure can be optimized by combining the metal nanowire structure with the indium tin oxide (ITO) composite film. In order to more clearly describe the specific optimization process of this embodiment, an optimization method proposed in the embodiment of the present application is exemplified below. Figure 3 This is a flow chart of a transparent conductive film TCO optimization method proposed in an embodiment of the present application, such as Figure 3 As shown, the method comprises the following steps:

[0072] Step S301, adding a metal nanowire structure into an indium tin oxide (ITO) thin film to generate a high light transmittance network structure in the ITO composite thin film.

[0073] It should be noted that the preparation of TCO thin films mainly adopts four target materials, namely ITO, SCOT, IWO or ICO. Currently, TCO coating mainly adopts PVD or RPD technology. Among them, since ITO thin film has the advantages of high conductivity, high visible light transmittance and strong physical and chemical stability, this embodiment optimizes the structure and materials of ITO thin film.

[0074] Specifically, this embodiment adds a metal nanowire structure to the ITO composite film of the photovoltaic cell to improve the photoelectric performance of the cell. Since the metal nanowire has excellent conductivity and flexibility, it can be used as a substitute or supplementary material for the ITO transparent conductive film. This embodiment uses the metal nanowire and ITO in combination to generate a network structure with good conductivity and light transmission properties, thereby improving the photoelectric conversion efficiency of the HJT cell.

[0075] For example, silver nanowires can be used as metal nanowires combined with ITO, and then a high-performance composite transparent conductive film can be prepared through related processes. This film combines the high conductivity of metal nanowires and the high light transmittance of ITO. Then, according to actual experimental data, the ratio and structure of the two can be optimized to further improve the photoelectric performance of the film. The introduction of metal nanowires can reduce the use of ITO and reduce costs, while maintaining or even improving the conductivity and light transmittance of the film.

[0076] Step S302, adjusting the ratio of indium to tin in the ITO film according to the parameters of the network structure.

[0077] Specifically, this step can optimize the conductivity and transmittance of the film by adjusting the ratio of indium and tin in the ITO film, thereby further improving the efficiency of the solar cell. The optimization of the ITO ratio can be based on the parameters such as the conductivity and visible light transmittance of the network structure preliminarily generated in step S301, compared with the preset expected parameter values, and then calculated and determined by the relevant algorithm. When actually adjusting the ratio of indium and tin in the film, it can be achieved by accurately controlling the thickness of the ITO layer and designing a multilayer structure.

[0078] Step S303, transferring a layer of graphene or a water-blocking transparent layer onto the surface of the ITO composite film.

[0079] Specifically, in this step, a layer of graphene or a water-blocking transparent layer is transferred to the surface of the ITO composite film obtained in step S302 to further improve the reliability of the HJT battery. The purpose of transferring graphene or adding a water-blocking transparent layer to the surface of the ITO film is to improve the performance of the photovoltaic cell. Graphene has excellent conductivity and light transmittance and can be used as a transparent conductive film, while the water-blocking transparent layer can prevent the entry of water or other impurities in actual applications, prevent the battery from being damp, improve environmental applicability, and help improve the stability and life of the battery.

[0080] In specific implementation, the graphene-assisted metal electrode transfer technology can non-destructively transfer the metal electrode array from the pre-deposited substrate to the target substrate with a very high transfer success rate. This technology can be used to form a graphene layer on the surface of the ITO film, thereby improving the conductivity and light transmittance of the photovoltaic cell.

[0081] It is understandable that, in practical applications, due to the excellent conductivity and light transmittance of graphene, the introduction of graphene in the ITO composite film can reduce the amount of ITO used, reduce costs, and maintain or even improve the conductivity and light transmittance of the film. Therefore, in one embodiment of the present application, before optimizing the transparent conductive film TCO deposited on the silicon wafer after passivation treatment in combination with a variety of methods, for example, after determining to adopt the optimized design of adding a metal nanowire structure in the indium tin oxide ITO film in the above embodiment, if it is also determined that the optimization method of transferring graphene is required, then when the ITO film is actually prepared, the amount of ITO used to prepare the ITO composite film can be reduced according to the preset amount of graphene to be added. For example, according to the corresponding relationship between the amount of graphene and the amount of ITO to achieve the same conductivity and light transmittance of the film, the amount of graphene to be added can be used as an input parameter to determine the reduced amount of ITO used to prepare the ITO composite film.

[0082] Therefore, in the preparation process of the HJT battery, the preparation process of the HJT battery can be optimized by the method in the above embodiment, so as to improve the photoelectric conversion efficiency of the generated HJT battery.

[0083] In summary, the method for optimizing the photoelectric conversion efficiency of the HJT cell in the embodiment of the present application is, first, based on the performance requirements of the HJT cell, the single crystal silicon wafer is diffused and doped by phosphorus diffusion heat treatment technology; then, the silicon wafer after the diffusion and doping treatment is subjected to silicon-based thin film passivation treatment by optimized plasma enhanced chemical vapor deposition PECVD technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, crystallizing the p-type amorphous silicon film, and optimizing the low-temperature intrinsic passivation layer; finally, from the two perspectives of film structure and film material, the transparent conductive film TCO deposited on the passivated silicon wafer is optimized in combination with a variety of methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure. Thus, this method optimizes the photoelectric conversion efficiency of HJT cells in three stages: single crystal silicon wafer gettering, PECVD-based silicon-based film passivation, and TCO film materials and processes. In each stage, a variety of specific optimization methods are adopted to perform corresponding optimization operations, and then the optimization effect of HJT cell efficiency is improved by combining a variety of optimization methods, which significantly improves the photoelectric conversion efficiency of HJT cells. Therefore, this method enriches the optimization methods of HJT cell photoelectric conversion efficiency, improves the cell photoelectric conversion efficiency, and reduces the material cost of the cell through relevant optimization methods, which is conducive to the production of high-efficiency and low-cost HJT cells.

[0084] In order to realize the above-mentioned embodiment, the present application also proposes a system for optimizing the photoelectric conversion efficiency of HJT cells. Figure 4 A schematic diagram of the structure of a system for optimizing the photoelectric conversion efficiency of a HJT cell proposed in an embodiment of the present application is shown in FIG. Figure 4 As shown, the system includes: a diffusion gettering module 100 , a passivation treatment module 200 and a TCO film optimization module 300 .

[0085] Among them, the diffusion gettering module 100 is used to determine the target concentration of various types of impurities in the single crystal silicon wafer of the HJT battery according to the performance requirements of the HJT battery, and diffuse the single crystal silicon wafer through the phosphorus diffusion heat treatment technology based on the target concentration.

[0086] The passivation treatment module 200 is used to perform silicon-based thin film passivation treatment on the silicon wafer after diffusion and doping treatment through the optimized plasma enhanced chemical vapor deposition (PECVD) technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, crystallizing a p-type amorphous silicon film, and optimizing a low-temperature intrinsic passivation layer.

[0087] The TCO film optimization module 300 is used to optimize the transparent conductive film TCO deposited on the silicon wafer after passivation treatment from the two perspectives of film structure and film material, combining multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

[0088] Optionally, in one embodiment of the present application, the passivation processing module 200 is specifically used to: use an n-type microcrystalline silicon oxide film as a target passivation film, and adjust the microstructure of the light-facing surface of the n-type microcrystalline silicon oxide film to nanocrystalline; on the basis of ensuring the crystallization ratio and doping rate of the crystallized n-type microcrystalline silicon oxide film, widen the optical band gap of the crystallized n-type microcrystalline silicon oxide film.

[0089] Optionally, in one embodiment of the present application, the passivation processing module 200 is specifically used to: adjust the microstructure of the p-type amorphous silicon film to nanocrystals, and combine various methods to improve the activation rate of the doping elements in the crystallized p-type amorphous silicon film; for the structural crystallization of the n-type doping layer and the p-type doping layer, combine various methods to suppress the dehydrogenation effect of the intrinsic passivation layer on the n-side and the p-side during the growth of the doping layer microcrystalline film.

[0090] Optionally, in one embodiment of the present application, the TCO film optimization module 300 is specifically used to: combine multilayer materials with different refractive indices, and deposit the multilayer materials on a passivated silicon wafer by magnetron sputtering; adjust the thickness and surface texture of each layer of material to generate a gradient refractive index multilayer TCO film.

[0091] Optionally, in one embodiment of the present application, the TCO film optimization module 300 is specifically used to: add a metal nanowire structure to the indium tin oxide ITO film to generate a high light transmittance network structure in the ITO composite film; and adjust the ratio of indium and tin in the ITO film according to the parameters of the network structure.

[0092] Optionally, in one embodiment of the present application, the TCO film optimization module 300 is specifically used to: transfer a layer of graphene or a water-blocking transparent layer onto the surface of the ITO composite film; when confirming the transfer of graphene, reduce the amount of ITO used to prepare the ITO composite film according to the amount of graphene to be added.

[0093] Optionally, in one embodiment of the present application, the TCO film optimization module 300 is specifically used to: set a buffer layer with a thickness less than a preset threshold between the doped amorphous silicon surface and the TCO film, wherein a buffer layer preparation device is spaced a preset distance from an effective doping site of the amorphous silicon.

[0094] It should be noted that the aforementioned explanation of the embodiment of the method for optimizing the photoelectric conversion efficiency of the HJT cell is also applicable to the system of this embodiment and will not be repeated here.

[0095] In summary, the optimization system for the photoelectric conversion efficiency of HJT cells in the embodiment of the present application optimizes the photoelectric conversion efficiency of HJT cells in three stages: single crystal silicon wafer impurity absorption, PECVD-based silicon-based thin film passivation, and TCO thin film materials and processes. In each stage, a variety of specific optimization methods are adopted to perform corresponding optimization operations, and then the optimization effect of HJT cell efficiency is improved by combining a variety of optimization methods, which significantly improves the photoelectric conversion efficiency of HJT cells. As a result, the system enriches the optimization methods for the photoelectric conversion efficiency of HJT cells, improves the photoelectric conversion efficiency of cells, and also reduces the material cost of cells through relevant optimization methods, which is conducive to the production of efficient and low-cost HJT cells.

[0096] In order to implement the above embodiments, the present application also proposes a non-temporary computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the method for optimizing the photoelectric conversion efficiency of the HJT battery as described in any one of the above first aspect embodiments is implemented.

[0097] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0098] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0099] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0100] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0101] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0102] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0103] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0104] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for optimizing the photoelectric conversion efficiency of a HJT cell, characterized in that: The following steps are involved: According to the performance requirements of the HJT cell, the target concentrations of various types of impurities in the single crystal silicon wafer of the HJT cell are determined, and based on the target concentrations, the single crystal silicon wafer is diffused and gettered by a phosphorus diffusion heat treatment technology; Through the optimized plasma enhanced chemical vapor deposition (PECVD) technology, the silicon wafer after diffusion and gettering treatment is subjected to silicon-based thin film passivation treatment, wherein the optimized PECVD technology includes constructing n-type nanocrystalline silicon oxygen film, crystallizing p-type amorphous silicon film and optimizing the low-temperature intrinsic passivation layer; From the perspectives of film structure and film material, a transparent conductive film TCO deposited on a passivated silicon wafer is optimized in a combination of multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

2. The optimization method according to claim 1, characterized in that: The method of constructing an n-type nanocrystalline silicon-oxygen thin film comprises: Using an n-type microcrystalline silicon oxide film as a target passivation film, adjusting the microstructure of the light-facing surface of the n-type microcrystalline silicon oxide film to be nanocrystalline; On the basis of ensuring the crystallization ratio and doping rate of the crystallized n-type microcrystalline silicon oxide thin film, the optical band gap of the crystallized n-type microcrystalline silicon oxide thin film is widened.

3. The optimization method according to claim 1, characterized in that: The crystallization process of the p-type amorphous silicon thin film comprises: The microstructure of the p-type amorphous silicon film is adjusted to nanocrystals, and a plurality of methods are combined to increase the activation rate of the doping elements in the crystallized p-type amorphous silicon film; The optimized low-temperature intrinsic passivation layer comprises: Aiming at the structural crystallization of the n-type doping layer and the p-type doping layer, a variety of methods are combined to suppress the dehydrogenation effect of the intrinsic passivation layer on the n-side and the p-side during the growth of the doping layer microcrystalline film.

4. The optimization method according to claim 1, characterized in that: The method combines multiple methods to optimize the transparent conductive film TCO deposited on the passivated silicon wafer, including: Combining multiple layers of materials with different refractive indices, and depositing the multiple layers of materials on the passivated silicon wafer by magnetron sputtering; The thickness and surface texture of each layer of material are adjusted to generate gradient refractive index multilayer TCO films.

5. The optimization method according to claim 4, characterized in that: The method of optimizing the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods also includes: Adding metal nanowire structure to indium tin oxide (ITO) film to generate a highly transparent network structure in the ITO composite film; The ratio of indium to tin in the ITO film is adjusted according to the parameters of the network structure.

6. The optimization method according to claim 5, characterized in that: The method of optimizing the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods also includes: Transferring a layer of graphene or a water-blocking transparent layer on the surface of the ITO composite film; Before optimizing the transparent conductive film TCO deposited on the passivated silicon wafer by combining multiple methods, the method further includes: When the transfer of the graphene is confirmed, the amount of ITO used to prepare the ITO composite film is reduced according to the amount of graphene to be added.

7. The optimization method according to claim 1, characterized in that: The method of optimizing the transparent conductive film TCO deposited on the silicon wafer after passivation treatment by combining multiple methods also includes: A buffer layer with a thickness less than a preset threshold is arranged between the doped amorphous silicon surface and the TCO film, wherein a preparation device for the buffer layer is spaced a preset distance from an effective doping site of the amorphous silicon.

8. A system for optimizing the photoelectric conversion efficiency of a HJT cell, characterized in that: include: A diffusion gettering module, which is used to determine the target concentration of various types of impurities in the single crystal silicon wafer of the HJT cell according to the performance requirements of the HJT cell, and to perform diffusion gettering on the single crystal silicon wafer based on the target concentration by phosphorus diffusion heat treatment technology; A passivation treatment module is used to perform silicon-based thin film passivation treatment on silicon wafers after diffusion and gettering treatment by using an optimized plasma enhanced chemical vapor deposition (PECVD) technology, wherein the optimized PECVD technology includes constructing an n-type nanocrystalline silicon oxygen film, performing crystallization treatment on a p-type amorphous silicon film, and optimizing a low-temperature intrinsic passivation layer; The TCO film optimization module is used to optimize the transparent conductive film TCO deposited on the silicon wafer after passivation treatment from the two perspectives of film structure and film material, combining multiple methods, wherein the optimized TCO film includes a gradient refractive index multilayer structure and / or a metal nanowire structure.

9. The optimization system according to claim 8, characterized in that: The passivation processing module is specifically used for: Using an n-type microcrystalline silicon oxide film as a target passivation film, adjusting the microstructure of the light-facing surface of the n-type microcrystalline silicon oxide film to be nanocrystalline; On the basis of ensuring the crystallization ratio and doping rate of the crystallized n-type microcrystalline silicon oxide thin film, the optical band gap of the crystallized n-type microcrystalline silicon oxide thin film is widened.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for optimizing the photoelectric conversion efficiency of a HJT cell according to any one of claims 1 to 7 is implemented.

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