Programmable logic debugging method and system

Abstract

The invention discloses a programmable logic debugging method and system, and the method is based on the IEC 61131-3 standard, and comprises the following steps: converting a programmable logic code written by a programming language specified by the IEC 61131-3 into a high-level language code, dividing a logic unit according to the minimum logic function, and generating a corresponding relation table according to a logic breakpoint and a high-level language program line number; compiling the converted high-level language code into a target code capable of running in a PLC (Programmable Logic Controller), and debugging through a debugger; wherein each programmable logic task corresponds to one independent process; the debugging efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of programmable logic controllers, and in particular to a programmable logic debugging method and system. Background Art

[0002] As an important industrial control device, PLC is widely used in various automation control systems. Modern PLCs generally use the five programming languages ​​(ladder diagram, function block diagram, sequential function chart, instruction list and structured text) specified in the IEC 61131-3 standard to design programmable logic. In order to facilitate users to develop and debug programs, some PLCs and their supporting configuration software also support breakpoint and single-step debugging of programmable logic, similar to the functions supported by high-level language development tools. At present, there are still some defects in the debugging function of PLC: (a) The debugging target code is inconsistent with the actual running code: Some PLCs implement the debugging function by converting programmable logic into interpreted code. Although this method is conducive to setting breakpoints and single-step debugging, the debugging target code is inconsistent with the actual running target code, and the running speed is lower than the actual target code. Many time-related functions may not be simulated, resulting in reduced reliability of the debugging results. (b) No support for runtime debugging: Some PLCs cannot directly enter the debugging mode when the PLC is running. The configuration must be reconfigured and restarted before entering the debugging mode, which brings great inconvenience to the debugging work. (c) Does not support multi-task parallel debugging: Some PLCs do not support parallel debugging of multiple programmable logic tasks and can only debug one by one, which reduces debugging efficiency. Summary of the invention

[0003] Purpose of the invention: The purpose of the present invention is to provide a programmable logic debugging method and system to solve the above-mentioned problems existing in the existing PLC debugging methods.

[0004] Technical solution: A programmable logic debugging method described in the present invention is based on the IEC 61131-3 standard and includes the following steps: converting a programmable logic code written in a programming language specified in IEC 61131-3 into a high-level language code, dividing the logic units according to the minimum logic function, and generating a correspondence table according to the logic breakpoints and the line numbers of the high-level language program; compiling the converted high-level language code into a target code that can be run in a PLC and debugging it through a debugger; wherein each programmable logic task corresponds to an independent process.

[0005] Furthermore, the programmable logic code written in the programming language specified in IEC 61131-3 is converted into the high-level language code as follows: a syntax analysis is performed on the programming language specified in IEC 61131-3 to generate an abstract syntax tree; and a corresponding high-level language code is generated according to the abstract syntax tree.

[0006] Furthermore, the specific process of debugging through the debugger is as follows: the upper computer configuration software sends instructions to the PLC, and after receiving the instructions, the PLC starts the debugger and binds the debugger to the target process; the debugger sends a response to the configuration software, and after receiving the response, the configuration software establishes a communication connection with the debugger and sends debugging instructions to the debugger (setting breakpoints, canceling breakpoints, single-step execution, next line, jumping out of this function, etc.), the debugger executes the debugging instructions and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; wherein, the instructions sent by the upper computer configuration software include the target code for debugging and the corresponding process information.

[0007] Furthermore, the debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and is composed of a code parser and an execution engine.

[0008] A programmable logic debugging system according to the present invention is based on the IEC 61131-3 standard and comprises: Programming module: used to convert programmable logic code written in the programming language specified in IEC 61131-3 into high-level language code, divide the logic unit according to the minimum logic function, and generate a corresponding relationship table based on the logic breakpoints and high-level language program line numbers; Debug module: used to compile the converted high-level language code into target code that can be run in the PLC and debugged through the debugger; among them, each programmable logic task corresponds to an independent process.

[0009] Furthermore, in the programming module, the programmable logic code written in the programming language specified by IEC 61131-3 is converted into a high-level language code as follows: a syntax analysis is performed on the programming language specified by IEC 61131-3 to generate an abstract syntax tree; and a corresponding high-level language code is generated according to the abstract syntax tree.

[0010] Furthermore, in the debugging module, the specific process of debugging through the debugger is as follows: the upper computer configuration software sends an instruction to the PLC, and after the PLC receives the instruction, the debugger is started and the debugger is bound to the target process; the debugger sends a response to the configuration software, and after the configuration software receives the response, it establishes a communication connection with the debugger and sends debugging instructions to the debugger, the debugger executes the debugging instructions and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when the debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; wherein, the instruction sent by the upper computer configuration software contains the target code for debugging and the corresponding process information.

[0011] Furthermore, in the debugging module, the debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and is composed of a code parser and an execution engine.

[0012] An electronic device described in the present invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the computer program is loaded into the processor, any one of the programmable logic debugging methods and systems described above is implemented.

[0013] A storage medium described in the present invention stores a computer program, and when the computer program is executed by a processor, any one of the programmable logic debugging methods and systems described is implemented.

[0014] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: the debugged target code is completely consistent with the actual running target code, ensuring the reliability of the debugging result. It supports PLC runtime debugging without reconfiguring the configuration and restarting the PLC, saving debugging time. Since each programmable logic task corresponds to an independent process, multiple programmable logic tasks can be debugged at the same time, improving debugging efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a programmable logic code diagram of the present invention; Figure 2 A high-level language code for the conversion of the present invention; Figure 3 To generate a correspondence table between logic breakpoints and high-level language line numbers. DETAILED DESCRIPTION

[0016] The technical solution of the present invention is further described below in conjunction with the accompanying drawings.

[0017] like Figure 1 As shown, an embodiment of the present invention provides a programmable logic debugging method based on the IEC 61131-3 standard, comprising the following steps: (1) Convert the programmable logic code written in the programming language specified in IEC 61131-3 into high-level language code, divide the logic units according to the minimum logic function, and generate a corresponding relationship table based on the logic breakpoints and the high-level language program line numbers; suppose the user uses a ladder diagram to generate a simple programmable logic code to control the switch of an output signal (such as Figure 1 As shown in ): This code means that when the input signal M0001 is TRUE, the output signal M0002 is TRUE; when the input signal M0001 is FALSE, the output signal M0002 is FALSE. Figure 2The configuration software shown converts this ladder diagram code into the following high-level language code, such as Figure 3 As shown, a corresponding table of logic breakpoints and high-level language line numbers is generated.

[0018] (2) Compile the converted high-level language code into target code that can be run in the PLC and debug it through the debugger; each programmable logic task corresponds to an independent process. The specific process of debugging through the debugger is as follows: the upper computer configuration software sends instructions to the PLC. After receiving the instructions, the PLC starts the debugger and binds the debugger to the target process; the debugger sends a response to the configuration software. After receiving the response, the configuration software establishes a communication connection with the debugger and sends debugging instructions to the debugger (setting breakpoints, canceling breakpoints, single-step execution, next line, jumping out of this function, etc.). The debugger executes the debugging instructions and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; the instructions sent by the upper computer configuration software include the debugging target code and the corresponding process information.

[0019] Among them, the debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and consists of a code parser and an execution engine.

[0020] Assume that the user needs to debug the above programmable logic code and set a breakpoint at M0001.

[0021] S1 The user starts debugging in the configuration software and selects the programmable logic code to be debugged.

[0022] The S2 configuration software sends instructions to the PLC, starts the debugger and binds it to the target process.

[0023] The S3 configuration software sends instructions to the debugger to set a breakpoint at the Line1 statement.

[0024] S4 When the PLC runs to this breakpoint, the debugger pauses program execution and returns the current program status information to the configuration software.

[0025] The S5 configuration software identifies the ladder diagram block currently being executed in the ladder diagram editor.

[0026] S6 users can send instructions to the debugger through the configuration software, such as single-step execution, to further debug the program.

[0027] After S7 debugging is completed, the user can send instructions to the PLC through the configuration software to close the debugger.

[0028] The embodiment of the present invention further provides a programmable logic debugging system based on the IEC 61131-3 standard, comprising: Programming module: used for converting programmable logic code written in the programming language specified by IEC 61131-3 into high-level language code, dividing logic units according to minimum logic functions, and generating a corresponding relationship table according to logic breakpoints and high-level language program line numbers; wherein, converting the programmable logic code written in the programming language specified by IEC 61131-3 into high-level language code is specifically as follows: performing syntax analysis on the programming language specified by IEC 61131-3 to generate an abstract syntax tree; generating corresponding high-level language code according to the abstract syntax tree.

[0029] Debug module: used to compile the converted high-level language code into target code that can be run in PLC and debug it through the debugger; wherein each programmable logic task corresponds to an independent process. The specific process of debugging through the debugger is as follows: the upper computer configuration software sends instructions to the PLC, and after receiving the instructions, the PLC starts the debugger and binds the debugger to the target process; the debugger sends a response to the configuration software, and after receiving the response, the configuration software establishes a communication connection with the debugger and sends debugging instructions to the debugger, the debugger executes the debugging instructions, and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; wherein, the instructions sent by the upper computer configuration software include the target code for debugging and the corresponding process information.

[0030] The debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and consists of a code parser and an execution engine. An embodiment of the present invention further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program implements any one of the programmable logic debugging methods described above when loaded into the processor.

[0031] An embodiment of the present invention further provides a storage medium, wherein the storage medium stores a computer program, and when the computer program is executed by a processor, any one of the programmable logic debugging methods described above is implemented.

Claims

1. A programmable logic debugging method, characterized in that: Based on the IEC 61131-3 standard, the method includes the following steps: converting a programmable logic code written in a programming language specified by IEC 61131-3 into a high-level language code, dividing logic units according to minimum logic functions, and generating a corresponding relationship table according to logic breakpoints and high-level language program line numbers; compiling the converted high-level language code into a target code that can be run in a PLC and debugging it through a debugger; wherein each programmable logic task corresponds to an independent process.

2. A programmable logic debugging method according to claim 1, characterized in that: The specific steps of converting the programmable logic code written in the programming language specified by IEC 61131-3 into the high-level language code are as follows: performing syntax analysis on the programming language specified by IEC 61131-3 to generate an abstract syntax tree; and generating corresponding high-level language code according to the abstract syntax tree.

3. A programmable logic debugging method according to claim 1, characterized in that: The specific process of debugging through the debugger is as follows: the upper computer configuration software sends instructions to the PLC. After receiving the instructions, the PLC starts the debugger and binds the debugger to the target process; the debugger sends a response to the configuration software. After receiving the response, the configuration software establishes a communication connection with the debugger and sends debugging instructions to the debugger. The debugger executes the debugging instructions and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; among them, the instructions sent by the upper computer configuration software include the target code for debugging and the corresponding process information.

4. A programmable logic debugging method according to claim 3, characterized in that: The debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and consists of a code parser and an execution engine.

5. A programmable logic debugging system, characterized in that: Based on IEC 61131-3 standard, including: Programming module: used to convert programmable logic code written in the programming language specified in IEC 61131-3 into high-level language code, divide the logic unit according to the minimum logic function, and generate a corresponding relationship table based on the logic breakpoints and high-level language program line numbers; Debug module: used to compile the converted high-level language code into target code that can be run in the PLC and debugged through the debugger; among them, each programmable logic task corresponds to an independent process.

6. A programmable logic debugging system according to claim 5, characterized in that: In the programming module, the programmable logic code written in the programming language specified by IEC61131-3 is converted into a high-level language code as follows: the programming language specified by IEC61131-3 is parsed to generate an abstract syntax tree; and the corresponding high-level language code is generated according to the abstract syntax tree.

7. A programmable logic debugging system according to claim 5, characterized in that: In the debugging module, the specific process of debugging through the debugger is as follows: the upper computer configuration software sends instructions to the PLC. After receiving the instructions, the PLC starts the debugger and binds the debugger to the target process; the debugger sends a response to the configuration software. After receiving the response, the configuration software establishes a communication connection with the debugger and sends debugging instructions to the debugger. The debugger executes the debugging instructions and returns the debugging results to the configuration software; the configuration software parses the debugging results and displays the results in the configuration interface; when debugging needs to be canceled, the configuration software sends a command to the PLC, and the PLC closes the debugger of the corresponding programmable logic process; among them, the instructions sent by the upper computer configuration software include the target code for debugging and the corresponding process information.

8. A programmable logic debugging system according to claim 7, characterized in that: In the debugging module, the debugger supports multi-task parallel logic breakpoint debugging; the debugger relies on the debugging interface provided by the device operating system and consists of a code parser and an execution engine.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the computer program is loaded into a processor, a programmable logic debugging method according to any one of claims 1 to 4 is implemented.

10. A storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, a programmable logic debugging method according to any one of claims 1 to 4 is implemented.

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