Data processing method, device and electronic equipment

Abstract

The present invention provides a data processing method, device, and electronic device, which obtain a linked list array of a specified size and a P2L reverse mapping table to be updated; determine the number of the L2P forward mapping table to which each logical offset address belongs; for each L2P forward mapping table, calculate the relative offset between each logical offset address in the table and the specified logical offset address, and calculate the remainder value when the number is divided by the specified size; add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list. This method uses a linked list array of a specified size and evenly records each relative offset corresponding to the L2P forward mapping table in each linked list by taking the remainder of the specified size from the number of the L2P forward mapping table to which the logical offset address belongs, thereby improving query efficiency and reducing memory consumption.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to a data processing method, device and electronic equipment. Background Art

[0002] In the SSD (Solid State Disk) architecture, after the Host data is written to the Nand Flash, its logical address information is usually stored in the P2L (Physical To Logic) reverse mapping table. When the number of entries in the P2L reverse mapping table meets certain conditions, the mapping information in the P2L reverse mapping table needs to be updated to the L2P (Logic To Physical) forward mapping table. In related technologies, a memory segment can be allocated according to the size of the first-level forward mapping table FLM (First Level Map), and a one-way linked list header is stored every 4 bytes. At the same time, a memory segment of the same size as the P2L reverse mapping table to be updated is allocated to store the index information of the linked list. Each linked list stores the logical offset address LAA of the P2L Entry record belonging to the same L2P range. Before the P2L reverse mapping table is synchronously updated, all entries are traversed, the L2P Index is calculated according to the LAA, and added to the corresponding one-way linked list. When all P2L After the entry is linked, all non-empty one-way linked lists are traversed in sequence to perform L2P loading, updating, and flushing operations until all P2L entries are synchronously updated. However, this solution still has the problem of low query efficiency and large additional memory consumption. Summary of the Invention

[0003] The object of the present invention is to provide a data processing method, device and electronic device to improve query efficiency and reduce memory consumption.

[0004] The present invention provides a data processing method, which includes: obtaining a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated contains multiple logical offset addresses; traversing each logical offset address to determine the number of the L2P forward mapping table to which each logical offset address belongs; for each L2P forward mapping table, calculating the relative offset between each logical offset address in the P2L reverse mapping table to be updated and a specified logical offset address, wherein the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; dividing the number of the L2P forward mapping table by a specified size to obtain a remainder value; adding each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and updating the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list.

[0005] Furthermore, the step of updating the physical offset address corresponding to the logical offset address of each relative offset indication in each linked list includes: for each linked list, loading the first L2P forward mapping table to which the first logical offset address of the first relative offset indication in the head node of the linked list belongs; traversing the second logical offset addresses of all second relative offset indications in the linked list that belong to the first L2P forward mapping table, updating the physical offset address corresponding to each second logical offset address, and unlinking each second relative offset after the update; repeating the step of loading the first L2P forward mapping table to which the first logical offset address of the first relative offset indication in the head node of the linked list belongs until all relative offsets in the linked list are unlinked.

[0006] Furthermore, the method further includes: generating an offset record table based on each relative offset.

[0007] Furthermore, the position of each data in the offset record table corresponds one-to-one to the position of each logical offset address in the P2L reverse mapping table to be updated; for each position, the data in the current position in the offset record table is: the relative offset between the next logical offset address and the specified logical offset address in the P2L reverse mapping table to be updated, which belongs to the same L2P forward mapping table as the current logical offset address; wherein the current logical offset address is: the logical offset address corresponding to the current position in the P2L reverse mapping table to be updated.

[0008] Furthermore, in the offset record table, each data occupies 2 bytes.

[0009] Furthermore, the linked list array includes a number of linked list headers corresponding to the specified size; the step of adding each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value includes: selecting a target linked list header with the remainder value as the subscript from the linked list array; adding each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the target linked list header.

[0010] Furthermore, each linked list header occupies 4 bytes.

[0011] The present invention provides a data processing device, comprising: a first acquisition module, configured to acquire a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated includes multiple logical offset addresses; a traversal module, configured to traverse each logical offset address and determine the number of the L2P forward mapping table to which each logical offset address belongs; a calculation module, configured to calculate, for each L2P forward mapping table, the relative offset between each logical offset address in the P2L reverse mapping table to be updated and a specified logical offset address, wherein the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; a second acquisition module, configured to divide the number of the L2P forward mapping table by a specified size to obtain a remainder value; an adding module, configured to add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and an updating module, configured to update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list.

[0012] An electronic device provided by the present invention includes a processor and a memory, wherein the memory stores machine-executable instructions that can be executed by the processor, and the processor executes the machine-executable instructions to implement any of the above-mentioned data processing methods.

[0013] The present invention provides a machine-readable storage medium, which stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions prompt the processor to implement any of the above-mentioned data processing methods.

[0014] The data processing method, device and electronic device provided by the present invention obtain a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated contains multiple logical offset addresses; traverse each logical offset address to determine the number of the L2P forward mapping table to which each logical offset address belongs; for each L2P forward mapping table, calculate the relative offset between each logical offset address in the P2L reverse mapping table to be updated and a specified logical offset address, wherein the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; divide the number of the L2P forward mapping table by a specified size to obtain a remainder value; add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list. This method uses a linked list array of a specified size. By taking the modulo of the specified size the number of the L2P forward mapping table to which the logical offset address belongs, each relative offset corresponding to the L2P forward mapping table is evenly recorded in each linked list. This can improve query efficiency and reduce memory consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0016] Figure 1 A schematic diagram of a data processing method in the prior art;

[0017] Figure 2 A schematic diagram of another data processing method in the prior art;

[0018] Figure 3 A flowchart of a data processing method provided by an embodiment of the present invention;

[0019] Figure 4 A schematic diagram of a chain hanging rule provided by an embodiment of the present invention;

[0020] Figure 5 A schematic diagram of a data processing method provided by an embodiment of the present invention;

[0021] Figure 6 A schematic diagram of a record table provided in an embodiment of the present invention;

[0022] Figure 7 A schematic structural diagram of a data processing device provided by an embodiment of the present invention;

[0023] Figure 8 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] The following will clearly and completely describe the technical solutions of the present invention in conjunction with the embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0025] Currently, there are two common synchronous update schemes for updating the mapping information in the P2L reverse mapping table to the L2P forward mapping table:

[0026] Existing solution 1: Figure 1The diagram shows a data processing method in the prior art. First, the L2P forward mapping table to which the LAA that has not been synchronously updated in the P2L reverse mapping table belongs is loaded. The P2L reverse mapping table is traversed to find all LAAs belonging to this L2P forward mapping table, and the corresponding physical offset address PAA (Logical Access Address) in the L2P forward mapping table is updated. At the same time, these entries are marked as updated, and then the L2P forward mapping table is flushed. The next P2L entry that needs to be synchronously updated is searched, the L2P forward mapping table where it is located is calculated and loaded, and the P2L reverse mapping table is traversed to perform the same update and flush operation until the synchronous update of all P2L entries is completed.

[0027] Existing solution 2: Figure 2 The diagram shows another data processing method in the prior art. A memory segment is allocated according to the size of the first-level forward mapping table (FLM), where each 4-byte table records an L2P PAA. A 4-byte segment stores a one-way linked list header (corresponding to the second table in the diagram). A memory segment of the same size as the P2L reverse mapping table is also allocated to store linked list index information (not shown in the diagram). Each linked list stores the logical offset addresses of P2L entries within the same L2P forward mapping table. Before synchronously updating the P2L reverse mapping table, all entries are traversed, and the L2P forward mapping table to which they belong is calculated based on the LAA. The L2P forward mapping table is then added to the corresponding one-way linked list. Once all P2L entries are linked, all non-empty one-way linked lists are traversed sequentially to load, update, and flush the L2P forward mapping table until all P2L entries are synchronously updated.

[0028] However, the above solutions still have some problems. The following describes the shortcomings of the two existing solutions respectively. Disadvantages of existing solution 1: Although this solution does not require additional memory overhead, it occupies a large amount of CPU resources for invalid P2L in random write scenarios. Regarding entry queries, assume that the P2L reverse mapping table to be synchronized and updated has a total of M entries, and the LAAs in these entries are distributed across X L2P forward mapping tables. Since each L2P forward mapping table needs to traverse the entire P2L reverse mapping table starting from the first unupdated entry, the number of queries is Count = (2M + 1 - X) × X / 2. Taking a 1GB random write as an example, assuming that the P2L reverse mapping table is 4KB in size and contains 1024 entries, and one L2P forward mapping table maps 32MB of data, then a 1GB range contains 32 L2P forward mapping tables, requiring 32,272 queries. For an even more extreme full-disk random write, each entry belongs to a different L2P forward mapping table, requiring 524,800 queries. Therefore, this solution consumes a large amount of CPU resources to query invalid entries, resulting in a decrease in random performance. This performance decreases significantly as the number of P2L reverse mapping tables increases.

[0029] Disadvantages of existing solution 2: Assuming that the P2L reverse mapping table to be updated synchronously is 4KB in size and contains 1024 entries, after this solution traverses the P2L reverse mapping table and completes all entry chaining operations, since the chain operation does not need to query invalid P2L entries, the entire update process requires a total of 1024 P2L entries to be queried, saving a lot of query time; however, this solution consumes a lot of time to query non-empty linked lists, and the number of queries is related to the FLM size. Taking 512G capacity as an example, assuming that an L2P forward mapping table maps 32M data, a total of 16K linked list headers are required, and a total of 16384 linked list header queries are required; at the same time, the additional memory overhead of this solution is large. First, 4KB of memory is required to store the logical offset address of P2LEntry. Secondly, the same amount of memory as FLM is required to store the same number of linked list headers as the L2P forward mapping table, which are used to index the P2L in the P2L reverse mapping table that is in the same L2P forward mapping table range as LAA. Taking a 512GB drive as an example, assuming one L2P forward mapping table maps 32MB of data, a total of 16K L2P forward mapping tables are required. Therefore, 64KB of memory is required to store the linked list headers, requiring a total of 68KB of additional memory. A 1TB drive would require 132KB of additional memory. This solution consumes significant additional memory and is extremely unfriendly to DRAM-less architectures (referring to solid-state drives without DRAM cache, where DRAM stands for Dynamic Random Access Memory). Based on this, embodiments of the present invention provide a data processing method, apparatus, and electronic device that can be applied to applications requiring synchronous updates of P2L reverse mapping tables.

[0030] To facilitate understanding of this embodiment, a data processing method disclosed in an embodiment of the present invention is first introduced. Figure 3 As shown, the method includes the following steps:

[0031] Step S302: obtaining a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated includes multiple logical offset addresses;

[0032] The above-specified size can be set according to actual needs. For example, it can be 32. The size of the linked list array is generally set based on the range of random write tests. For example, the commonly used performance testing tools ASSD (a solid-state drive testing tool) and CDM (a hard disk performance testing tool) test the random write performance of a 1GB range. Assuming that there are 32 L2P forward mapping tables in a 1GB range, the size of the linked list array is generally set to 32. In this way, each linked list node belongs to an L2P forward mapping table and is processed in one traversal. If there are 32 nodes, only 32 queries are required. If the size of the linked list array is set to 16, each linked list contains nodes from two L2P forward mapping tables. If there are 32 nodes, 32+16 queries are required. If the array size of the 1GB range is set to 64, half of the linked lists are empty, and a non-empty linked list also contains 32 valid nodes. The empty table header query caused by an overly large array will also affect the overall query efficiency. Therefore, it is necessary to set an appropriate linked list array size based on actual needs.

[0033] The above-mentioned linked list array usually includes multiple linked list headers. For example, if the specified size is 32, it means that the linked list array includes 32 linked list headers, and each linked list header corresponds to a linked list; the above-mentioned P2L reverse mapping table to be updated usually records the logical address of the data stored in a continuous physical space. Each entry in the table occupies 4 bytes. The entry records the logical offset address of the host data in the table entry mapping granularity (usually 4K), namely LAA (Logic Access Address). LAA refers to the address used by users when programming in a computer system; in actual implementation, when it is necessary to synchronously update the P2L reverse mapping table to be updated, that is, when it is necessary to update the mapping information in the P2L reverse mapping table to be updated to the L2P forward mapping table, you can first obtain the above-mentioned P2L reverse mapping table to be updated, and at the same time obtain a pre-configured linked list array of a specified size.

[0034] Step S304: traverse each logical offset address and determine the number of the L2P forward mapping table to which each logical offset address belongs;

[0035] The number of the above-mentioned L2P forward mapping table can be expressed as L2P Index; in actual implementation, after obtaining the above-mentioned P2L reverse mapping table to be updated, each logical offset address in the P2L reverse mapping table to be updated can be traversed to determine the number of the L2P forward mapping table to which each logical offset address belongs; for example, the number of LAAs contained in each L2P forward mapping table is usually pre-configured. For example, taking each L2P table containing 8 LAAs as an example, LAA0~LAA7 can correspond to the first L2P forward mapping table L2P0, LAA8~LAA15 can correspond to the second L2P forward mapping table L2P1, and so on. According to each logical offset address, the number of the L2P forward mapping table to which it belongs can be determined.

[0036] Step S306: For each L2P forward mapping table, calculate the relative offset between each logical offset address in the P2L reverse mapping table to be updated and the specified logical offset address, where the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated.

[0037] In actual implementation, for each L2P forward mapping table, the relative offset between each logical offset address in the L2P forward mapping table and the first logical offset address in the P2L reverse mapping table to be updated can be calculated separately. For example, the relative offset between a certain logical offset address belonging to the first L2P forward mapping table L2P0 and the first logical offset address in the P2L reverse mapping table to be updated is 5, etc.

[0038] Step S308: Divide the number of the L2P forward mapping table by a specified size to obtain a remainder value;

[0039] In actual implementation, after determining the number of the L2P forward mapping table to which each logical offset address belongs, the number of the L2P forward mapping table to which each logical offset address belongs can be divided by the specified size of the linked list array and the remainder value can be taken. The minimum remainder value can be 0 and the maximum can be (specified size - 1).

[0040] Step S310: adding each relative offset corresponding to the L2P forward mapping table to a linked list corresponding to the remainder value;

[0041] Step S312: Update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list.

[0042] In actual implementation, after determining the remainder value corresponding to each L2P forward mapping table, each relative offset corresponding to the L2P forward mapping table can be added to the linked list corresponding to the corresponding remainder value for each L2P forward mapping table. For example, if the L2P forward mapping table to which the logical offset address belongs is numbered I and the specified size of the linked list array is Y, then each relative offset corresponding to the L2P forward mapping table can be added to the linked list ast_ListHead[I%Y]; and then, the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list can be updated.

[0043] The above-mentioned data processing method obtains a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated contains multiple logical offset addresses; traverses each logical offset address to determine the number of the L2P forward mapping table to which each logical offset address belongs; for each L2P forward mapping table, calculates the relative offset between each logical offset address in the P2L reverse mapping table to be updated and the specified logical offset address, wherein the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; divides the number of the L2P forward mapping table by the specified size to obtain a remainder value; adds each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and updates the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list. This method uses a linked list array of a specified size. By taking the modulo of the specified size the number of the L2P forward mapping table to which the logical offset address belongs, each relative offset corresponding to the L2P forward mapping table is evenly recorded in each linked list. This can improve query efficiency and reduce memory consumption.

[0044] The embodiment of the present invention also provides another data processing method, which is implemented based on the method of the above embodiment. In this method, the linked list array includes a number of linked list headers corresponding to a specified size. The specified size is Y. Then, the multiple linked list headers included in the linked list array can be represented as: ast_ListHead[0], ast_ListHead[1]...ast_ListHead[Y-1]; each linked list header occupies 4 bytes, that is, one linked list header is stored every 4 bytes. The method includes the following steps:

[0045] Step 1: Obtain a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated includes multiple logical offset addresses;

[0046] Step 2: traverse each logical offset address and determine the number of the L2P forward mapping table to which each logical offset address belongs;

[0047] Step 3: For each L2P forward mapping table, calculate the relative offset between each logical offset address in the P2L reverse mapping table to be updated and the specified logical offset address, where the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated;

[0048] Step 4: Divide the number of the L2P forward mapping table by a specified size to obtain a remainder value;

[0049] Step 5: Select the target linked list header with the remainder value as the subscript from the linked list array;

[0050] For example, taking the multiple linked list headers included in the linked list array as: ast_ListHead[0], ast_ListHead[1]...ast_ListHead

[31] as an example, if the calculated remainder value is 0, ast_ListHead[0] can be selected as the target linked list header, if the calculated remainder value is 31, ast_ListHead

[31] can be selected as the target linked list header.

[0051] Step 6: Add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the target linked list header.

[0052] For example, if the target linked list header is ast_ListHead[0], each relative offset corresponding to the L2P forward mapping table can be added to the linked list corresponding to the target linked list header ast_ListHead[0]. Figure 4 As shown in the schematic diagram of a chain linking rule, the specified size of the linked list array is Y, and X is any integer such as 0, 1, 2, etc., then the number of the L2P forward mapping table corresponding to the first linked list header ast_ListHead[0] is X times Y, such as L2P[0], L2P[Y], L2P[X×Y], etc., and so on, the number of the L2P forward mapping table corresponding to each subsequent linked list header can be determined.

[0053] For another example, assuming that the linked list array is array[] and the specified size is 32, it is array

[32] . Since 0%32=0, 32%32=0, 64%32=0, etc., the nodes in the forward mapping table L2P0, forward mapping table L2P332, forward mapping table L2P64, and forward mapping table L2P32×X are all added to array[0], which corresponds to the first linked list header ast_ListHead[0]. Since 1%32=1, 33%32=1, 65%32=1, etc., the nodes in the forward mapping table L2P 1. All nodes in the range of forward mapping table L2P33, forward mapping table L2P65, and forward mapping table L2P32×X+1 are added to array[1], which corresponds to the second linked list header ast_ListHead[1]. Similarly, all nodes in the range of forward mapping table L2P31, forward mapping table L2P63, forward mapping table L2P127, and forward mapping table L2P32×X+31 are added to array

[31] , which corresponds to the last linked list header ast_ListHead

[31] .

[0054] Step 7: For each linked list, load the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs;

[0055] The above-mentioned head node can be understood as the first node of the linked list; the above-mentioned first relative offset is the relative offset located in the first node; in actual implementation, the first L2P forward mapping table to which it belongs can be loaded according to the first logical offset address indicated by the first relative offset located in the head node.

[0056] Step 8: traverse the linked list to find the second logical offset addresses of all second relative offset indications belonging to the first L2P forward mapping table, update the physical offset address corresponding to each second logical offset address, and delink each updated second relative offset.

[0057] All the second relative offsets traversed above include the first relative offset, and accordingly, the second logical offset addresses indicated by all the second relative offsets also include the first logical offset address. In actual implementation, the linked list can be traversed to traverse all the second relative offsets belonging to the first L2P forward mapping table from the linked list, and then determine the second logical offset address indicated by each second relative offset. For example, taking each L2P forward mapping table as an example including 8 LAAs, the logical offset address indicated by the first relative offset in the head node is LAA0, and the first L2P forward mapping table to which it belongs is L2P0. By traversing the linked list, it is determined that the second logical offset addresses indicated by all the second relative offsets belonging to the first L2P forward mapping table in the linked list include LAA0, LAA7 and LAA4. Then, the physical offset addresses PAA of LAA0, LAA7 and LAA4 can be updated sequentially. After the update is completed, each traversed second relative offset can be removed from the linked list.

[0058] Step nine: Repeat the step of loading the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs, until all relative offsets in the linked list are unlinked.

[0059] In actual implementation, the relative offset is linked by taking the modulo the specified size of the linked list array by the number of the L2P forward mapping table to which the logical offset address belongs. Therefore, the same linked list may contain relative offsets belonging to different L2P forward mapping tables. At this time, the process in steps 7 to 9 above can be repeated until all relative offsets in the linked list are unlinked; for example, continuing with the example in step 8 above, since the relative offsets corresponding to LAA0, LAA7 and LAA4 in the linked list have been unlinked, the first logical offset address of the first relative offset indication in the head node in the updated linked list obtained after unlinking is also updated, and accordingly, the first L2P forward mapping table to which it belongs is also updated. By repeating the above process, the physical offset address corresponding to the second logical offset address of each second relative offset indication in the linked list can be updated.

[0060] For easier understanding, see Figure 5 The schematic diagram of a data processing method shown in the figure takes each L2P forward mapping table as containing 8 LAAs, and takes the linked list corresponding to the first linked list header ast_ListHead[0] as an example. It should be noted that the relative offset is actually added to the linked list. Figure 5The logical offset address indicated by each relative offset is shown in the figure. The L2P where the head node points to the address LAA is loaded in sequence, and the linked list is updated. All PAAs corresponding to the LAA in the range of this L2P are removed at the same time. The current L2P forward mapping table is refreshed, and then the next L2P pointed to by the head node is processed until all nodes in the current linked list are processed. Then the next linked list is processed, and finally all non-empty linked lists are processed, and the updated P2L reverse mapping table is updated synchronously. Specifically, as shown in the figure, Figure 5 As shown in FIG, the nodes in the linked list header ast_ListHead[0] are distributed on L2P 0, L2P 32, and L2P 64. The first step is to query the LAA 0 indicated by the relative offset in the head node, calculate its L2P as L2P 0, load L2P 0, update the nodes within the range of L2P 0 (LAA 0, LAA 7, LAA 4), and remove the corresponding relative offsets. After processing, the node status is shown in STEP 2; the second step is to query the LAA 257 indicated by the relative offset in the head node, calculate its L2P as L2P 32, load L2P 32, update the nodes within the range of L2P 32 (LAA 257, LAA 258, LAA 256), and remove the corresponding relative offsets; the third step is to query the LAA 517 indicated by the relative offset in the head node, calculate its L2P as L2P 64. Do the same operation after loading; until all nodes are processed and the P2L reverse mapping table is updated synchronously.

[0061] Step 10: Generate an offset record table based on each relative offset.

[0062] The position of each data in the offset record table corresponds one-to-one to the position of each logical offset address in the P2L reverse mapping table to be updated; for each position, the data in the current position in the offset record table is: the relative offset between the next logical offset address and the specified logical offset address in the P2L reverse mapping table to be updated, which belongs to the same L2P forward mapping table as the current logical offset address; among which, the current logical offset address is: the logical offset address corresponding to the current position in the P2L reverse mapping table to be updated.

[0063] For easier understanding, see Figure 6 A schematic diagram of a record table shown in FIG. 1 ; the diagram takes an L2P as an example to store 8 LAAs. Figure 6The second table in the table is the table used in the existing solution 2 to record the absolute physical address. The L2P0 corresponding linked list head points to 0x10000010→0x10000014→0x10000034→0x10000044→0x10000070→0x10000074→0x1000007c→0xffffffff; for example, the 16-byte 0x10000014 corresponds to the decimal 20, and each entry is 4 bytes, then 20 / 4=5, corresponding to Figure 6 The offset in the first table is 5 (the first position in the first table starts at 0), that is, 0x10000014 is the next address pointed to.

[0064] Figure 6 The third table in the table is the offset record table used in this solution, which records the offsets in relative offsets. The head of the linked list corresponding to L2P0 points to the offsets 4→5→13→17→28→29→31→0xffff. The data in each cell is the relative offset between the next logical offset address in the same L2P forward mapping table and the first logical offset address in the P2L reverse mapping table to be updated. For example, Figure 6 The data in the first position of the third table is 4. In the P2L reverse mapping table to be updated, the logical offset address in the first position is LAA1, which belongs to the forward mapping table L2P0. When traversing the P2L reverse mapping table to be updated, the next logical offset address traversed belonging to the forward mapping table L2P0 is LAA5. The relative offset between LAA5 and LAA1 is 4, which is the data in the first position in the third table.

[0065] In this embodiment, each data in the offset record table occupies 2 bytes, that is, only 2 bytes are used to record the relative offset of a P2L Entry. The maximum supported P2L reverse mapping table size is 256KB, far exceeding the size of the mainstream P2L reverse mapping table (usually 32KB). This is different from the existing solution 2 that uses 4 bytes to record the absolute physical location of a P2L Entry. This embodiment uses a one-way linked list for recording, which can reduce the CPU time consumed by querying invalid entries during the P2L reverse mapping table synchronization process. In addition, compared with the existing solution 2, it saves half the memory space of the P2L table.

[0066] In terms of query efficiency for the above data processing method, assuming that the P2L reverse mapping table to be updated contains M Entries, each Entry in this P2L reverse mapping table contains X L2P forward mapping tables, and the size of the linked list array is Y. When X < Y, the number of times to query P2L Entries is fixed at 1024 times. When X >= Y, the number of times to query P2L Entries Count = MX / (2Y) + M / 2, and the number of times to query the head of the linked list is Y times. The comprehensive query efficiency is better than that of Solution 1. Moreover, because the total number of queries in this solution is less, the performance is basically not affected by the increase in the P2L reverse mapping table. Compared with the existing Solution 2, taking the example of random write within a 1G random range using a common random performance testing tool, assuming that one L2P forward mapping table maps 32M of data, then there are a total of 32 L2P forward mapping tables. Assuming the size of the linked list array is 32, the number of times to query P2L Entries in this solution is 1024 times, the same as that of the existing Solution 2, but the number of times to query the head of the linked list is 32 times, much lower than 16384 times (512G capacity) of Solution 2. Therefore, this solution uses a linked list array of a fixed size and evenly records the randomly written P2L Entries in each linked list by taking the remainder of the L2P Index with respect to the array size N, further improving the random write performance in a small range. In terms of the query efficiency of random write in a small range, this solution is better than Solution 2. For full-disk random, the number of times to query P2L Entries in this solution is 16896 times, and the number of times to query the head of the linked list is the 32 times, while the corresponding query times of the existing Solution 2 are 1024 times and 16384 times (512G capacity) respectively, with a small difference from this solution. Generally speaking, the query efficiency of this solution is better than that of the existing Solution 2.

[0067] In terms of memory usage, this solution uses a relative offset method to record the position information of P2L Entries, and only half of the memory space of the existing Solution 2 is required to store the index information of the linked list. Secondly, this solution uses a linked list array with a fixed size of Y, and only 4×Y Byte of additional memory is required. Taking the example of an SSD with a capacity of 512G, the size of the P2L reverse mapping table is 4K, one L2P forward mapping table maps 32M of data, and the size of the linked list array is 32, this solution requires 2K + 128 Byte of additional memory, where 2K is the total memory occupied by the offset record table, and 128 Byte is obtained by 4×32 when the linked list array is 32. While the existing Solution 2 requires 4K + 64K of additional memory. Therefore, this solution saves a large amount of memory space, achieves a large improvement in random performance with a small space cost, and has higher feasibility in the DRAM-Less architecture.

[0068] The embodiment of the present invention provides a data processing device, such as Figure 7As shown, the device includes: a first acquisition module 70, used to obtain a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated contains multiple logical offset addresses; a traversal module 71, used to traverse each logical offset address and determine the number of the L2P forward mapping table to which each logical offset address belongs; a calculation module 72, used to calculate, for each L2P forward mapping table, the relative offset between each logical offset address in the P2L reverse mapping table to be updated and the specified logical offset address, wherein the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; a second acquisition module 73, used to divide the number of the L2P forward mapping table by a specified size to obtain a remainder value; an adding module 74, used to add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; and an updating module 75, used to update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list.

[0069] The above-mentioned data processing device uses a linked list array of a specified size. By taking the modulo of the specified size by the number of the L2P forward mapping table to which the logical offset address belongs, each relative offset corresponding to the L2P forward mapping table is evenly recorded in each linked list, which can improve query efficiency and reduce memory consumption.

[0070] Furthermore, the update module is also used to: for each linked list, load the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs; traverse the second logical offset addresses of all second relative offset indications in the linked list that belong to the first L2P forward mapping table, update the physical offset address corresponding to each second logical offset address, and unlink each second relative offset after the update; repeat the steps of loading the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs until all relative offsets in the linked list are unlinked.

[0071] Furthermore, the device is also used to generate an offset record table based on each relative offset.

[0072] Furthermore, the position of each data in the offset record table corresponds one-to-one to the position of each logical offset address in the P2L reverse mapping table to be updated; for each position, the data in the current position in the offset record table is: the relative offset between the next logical offset address and the specified logical offset address in the P2L reverse mapping table to be updated, which belongs to the same L2P forward mapping table as the current logical offset address; wherein the current logical offset address is: the logical offset address corresponding to the current position in the P2L reverse mapping table to be updated.

[0073] Furthermore, in the offset record table, each data occupies 2 bytes.

[0074] Furthermore, the linked list array includes a number of linked list headers corresponding to the specified size; the adding module is also used to: select a target linked list header with the remainder value as the subscript from the linked list array; and add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the target linked list header.

[0075] Furthermore, each linked list header occupies 4 bytes.

[0076] The data processing device provided in the embodiment of the present invention has the same implementation principle and technical effects as those in the aforementioned data processing method embodiment. For the sake of brief description, for matters not mentioned in the data processing device embodiment, reference can be made to the corresponding content in the aforementioned data processing method embodiment.

[0077] The embodiment of the present invention further provides an electronic device, see Figure 8 As shown, the electronic device includes a processor 130 and a memory 131 . The memory 131 stores machine-executable instructions that can be executed by the processor 130 . The processor 130 executes the machine-executable instructions to implement the above-mentioned data processing method.

[0078] Further, Figure 8 The electronic device shown further includes a bus 132 and a communication interface 133 , and the processor 130 , the communication interface 133 and the memory 131 are connected via the bus 132 .

[0079] The memory 131 may include a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk storage. The communication connection between the system network element and at least one other network element is achieved through at least one communication interface 133 (which may be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. may be used. The bus 132 may be an ISA bus, a PCI bus, or an EISA bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0080] The processor 130 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in the processor 130 or by software instructions. The above processor 130 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present invention can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium well-known in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in memory 131, and processor 130 reads information in memory 131 and, in conjunction with its hardware, completes the steps of the method of the aforementioned embodiment.

[0081] An embodiment of the present invention also provides a machine-readable storage medium, which stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions prompt the processor to implement the above-mentioned data processing method. The specific implementation can be found in the method embodiment, which will not be repeated here.

[0082] The computer program products of the data processing methods, devices, and electronic devices provided in the embodiments of the present invention include a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the previous method embodiments. For specific implementation, please refer to the method embodiments and will not be repeated here.

[0083] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0084] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data processing method, characterized in that: The method comprises: Obtaining a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated includes multiple logical offset addresses; Traversing each logical offset address, and determining the number of the L2P forward mapping table to which each logical offset address belongs; For each L2P forward mapping table, calculate the relative offset between each logical offset address in the P2L reverse mapping table to be updated and a specified logical offset address, where the specified logical offset address is the first logical offset address in the P2L reverse mapping table to be updated; Dividing the number of the L2P forward mapping table by the specified size to obtain a remainder value; adding each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; In each linked list, the physical offset address corresponding to the logical offset address indicated by each relative offset is updated; The step of updating the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list includes: For each linked list, load the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs; Traversing the linked list, the second logical offset addresses of all second relative offset indications belonging to the first L2P forward mapping table, updating the physical offset address corresponding to each second logical offset address, and delinking each updated second relative offset; Repeat the step of loading the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs until all relative offsets in the linked list are unlinked; The linked list array includes a number of linked list headers corresponding to the specified size; and the step of adding each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value includes: Selecting a target linked list header with the remainder value as the subscript from the linked list array; Each relative offset corresponding to the L2P forward mapping table is added to the linked list corresponding to the target linked list header.

2. The method according to claim 1, characterized in that The method further comprises: Based on each of the relative offsets, an offset record table is generated.

3. The method according to claim 2, characterized in that The position of each data in the offset record table corresponds one-to-one to the position of each logical offset address in the P2L reverse mapping table to be updated; for each position, the data in the current position in the offset record table is: the relative offset between the next logical offset address in the P2L reverse mapping table to be updated, which belongs to the same L2P forward mapping table as the current logical offset address, and the specified logical offset address; wherein, the current logical offset address is: the logical offset address corresponding to the current position in the P2L reverse mapping table to be updated.

4. The method according to claim 3, characterized in that In the offset record table, each data occupies 2 bytes.

5. The method according to claim 1, characterized in that Each of the linked list headers occupies 4 bytes.

6. A data processing device, characterized in that: The device comprises: A first acquisition module is configured to acquire a linked list array of a specified size and a P2L reverse mapping table to be updated; wherein the P2L reverse mapping table to be updated includes a plurality of logical offset addresses; A traversal module, configured to traverse each logical offset address and determine the number of the L2P forward mapping table to which each logical offset address belongs; a calculation module, configured to calculate, for each L2P forward mapping table, a relative offset between each logical offset address in the P2L reverse mapping table to be updated and a specified logical offset address, wherein the specified logical offset address is a first logical offset address in the P2L reverse mapping table to be updated; A second obtaining module divides the number of the L2P forward mapping table by the specified size to obtain a remainder value; An adding module, configured to add each relative offset corresponding to the L2P forward mapping table to the linked list corresponding to the remainder value; An updating module, configured to update the physical offset address corresponding to the logical offset address indicated by each relative offset in each linked list; The update module is further configured to: For each linked list, load the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs; Traversing the linked list, the second logical offset addresses of all second relative offset indications belonging to the first L2P forward mapping table, updating the physical offset address corresponding to each second logical offset address, and delinking each updated second relative offset; Repeat the step of loading the first L2P forward mapping table to which the first logical offset address indicated by the first relative offset in the head node of the linked list belongs until all relative offsets in the linked list are unlinked; The linked list array includes a number of linked list headers corresponding to the specified size; the adding module is further used to: Selecting a target linked list header with the remainder value as the subscript from the linked list array; Each relative offset corresponding to the L2P forward mapping table is added to the linked list corresponding to the target linked list header.

7. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores machine-executable instructions that can be executed by the processor, and the processor executes the machine-executable instructions to implement the data processing method according to any one of claims 1 to 5.

8. A machine-readable storage medium, characterized in that The machine-readable storage medium stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions prompt the processor to implement the data processing method according to any one of claims 1 to 5.

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