Digital-analog hybrid simulation environment automatic creation method, system, equipment and medium

Abstract

The invention relates to a digital-analog hybrid simulation environment automatic creation method, system and device and a medium, and provides an efficient MCU chip simulation and digital hybrid simulation technology by completing automatic establishment of a digital-analog hybrid simulation environment and automatic inspection of an execution port by using a python script. The reliability and maintainability of the digital-analog hybrid simulation environment are greatly improved, and meanwhile the manual inspection cost in the compiling stage is remarkably reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip verification, and relates to a method, system, device and medium for automatically creating a digital-analog hybrid simulation environment. Background Art

[0002] With the continuous development of integrated circuit design technology, MCU (Microcontroller Unit) has been widely used in modern electronic systems. Due to its advantages such as small size, low power consumption and powerful functions, MCU chips are widely used in industrial control, consumer electronics, automotive electronics and the Internet of Things. However, with the increase in system complexity, MCU chips need to process analog and digital signals at the same time in practical applications, which puts higher requirements on developers. When designing and verifying the functions of MCU chips, traditional analog and digital simulations often need to be performed separately, which makes the development process complicated and time-consuming.

[0003] In a typical MCU design, the digital circuit part is mainly used for data processing and control logic, while the analog circuit is responsible for signal acquisition, amplification and processing. In actual design, in order to ensure the coordinated work of the analog and digital parts, the entire system needs to be simulated in a hybrid manner. Traditional simulation technology usually requires the simulation of analog circuits and digital circuits separately, and then the results are manually integrated, which not only increases the workload of designers, but also may lead to inconsistencies in simulation results, thereby affecting the performance evaluation and optimization of the entire system. Therefore, how to design an efficient MCU chip analog and digital hybrid simulation technology has become one of the technical problems to be solved. Summary of the invention

[0004] In view of the problems existing in the above-mentioned traditional technologies, the present invention proposes a method for automatically creating a digital-analog hybrid simulation environment, a system for automatically creating a digital-analog hybrid simulation environment, a computer device and a computer-readable storage medium.

[0005] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, a method for automatically creating a digital-analog hybrid simulation environment is provided, comprising the steps of: In the UVM environment, a python script is used to automatically select and create an environment configuration file for the digital-analog hybrid simulation environment; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection, and current printing used when the system software is running; Use Python scripts to automatically create analog digital connection files for the MCU chip to be tested; the analog digital connection files include port connections, digital paths for analog module instantiation, analog paths for digital module instantiation, configuration file paths, and software compilation file output; Classify analog stimulus types based on analog digital connection files and create analog stimulus spice files; Link the analog digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and use the python script to select the modules and ports for comparison; Link the analog digital connection file, analog stimulus spice file and Verilog file, and compare and check the specific ports contained in these three files; Establish digital SOC verification environment based on UVM verification platform; Create digital stimulus files according to the SystemVerilog language to automatically create a mixed-analog simulation environment for the MCU chip under test.

[0006] On the other hand, a digital-analog hybrid simulation environment automatic creation system is also provided, including: The environment configuration module is used to automatically select and create an environment configuration file for the digital-analog hybrid simulation environment through a python script in the UVM environment; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection, and current printing used when the system software is running; The digital-analog connection module is used to automatically create analog-digital connection files for the MCU chip to be tested through Python scripts; the analog-digital connection files include port connections, digital paths for analog module instantiation, analog paths for digital module instantiation, configuration file paths, and software compilation file output; The analog stimulus module is used to classify analog stimulus types based on analog digital connection files and create analog stimulus spice files; The link selection module is used to link the analog digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and use the python script to select the modules and ports for comparison; The port check module is used to link the analog digital connection file, the analog stimulus spice file and the Verilog file, and compare and check the specific ports contained in these three files; Digital environment module, used to establish digital SOC verification environment based on UVM verification platform; The digital stimulus module is used to create digital stimulus files according to the SystemVerilog language and automatically create a digital-analog mixed simulation environment for the MCU chip to be tested.

[0007] On the other hand, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above-mentioned method for automatically creating a digital-analog hybrid simulation environment when executing the computer program.

[0008] On the other hand, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above-mentioned method for automatically creating a digital-analog hybrid simulation environment are implemented.

[0009] One of the above technical solutions has the following advantages and beneficial effects: The above-mentioned automatic creation method, system, device and medium of the digital-analog hybrid simulation environment, by utilizing Python scripts to complete the automatic construction of the digital-analog hybrid simulation environment and the automatic inspection of the execution port, greatly improves the reliability and maintainability of the digital-analog hybrid simulation environment, and significantly reduces the manual inspection cost in the compilation stage. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0011] Figure 1 A schematic diagram of a process of automatically creating a digital-analog hybrid simulation environment in one embodiment; Figure 2 A schematic diagram of a digital-analog hybrid simulation environment in an embodiment; Figure 3 A schematic diagram of a process for creating a digital-analog hybrid simulation environment in one embodiment; Figure 4 A schematic diagram of an automatic file generation process in one embodiment; Figure 5 A schematic diagram of an automatic port check process in an embodiment; Figure 6 A module block diagram of a system is automatically created in a digital-analog hybrid simulation environment in an embodiment. DETAILED DESCRIPTION

[0012] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0013] It should be noted that the reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The presentation of this phrase at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It will be appreciated by those skilled in the art that the embodiments described herein may be combined with other embodiments. The term "and / or" used in the specification of the present invention and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0014] The following will describe the implementation of the present invention in detail with reference to the accompanying drawings in the embodiment diagram of the present invention.

[0015] In order to improve the efficiency of analog and digital simulation of MCU chips, the mixed analog simulation environment came into being. Mixed analog simulation technology can simulate the analog circuits and digital circuits of MCU chips at the same time, thereby effectively shortening the development cycle of MCU chips and improving the accuracy and reliability of the design. Although the current mixed analog simulation system can achieve a certain degree of automation, there are still problems such as complex configuration, cumbersome operation, and inconvenient processing of environment compilation results, which greatly limits the simulation efficiency. In addition, in the actual design process, with the increase in the scale and function of MCU chips, manual configuration and inspection can no longer meet the development needs of complex systems. Therefore, the automation method of the mixed analog simulation environment for MCU chip design has become the focus of current research.

[0016] In one embodiment, Figure 1 As shown, a method for automatically creating a digital-analog hybrid simulation environment is provided, which may include the following steps S10 to S22: S10, in the UVM environment, the environment configuration file of the digital-analog hybrid simulation environment is automatically selected and created through the python script; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection and current printing used when the system software is running; S12, automatically creating an analog digital connection file for the MCU chip to be tested through a python script; the analog digital connection file includes port connection, digital path of analog module instantiation, analog path of digital module instantiation, configuration file path and software compilation file output; S14, classifying analog stimulus types based on the analog digital connection file and creating an analog stimulus spice file; S16, linking the analog digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and using a python script to select the modules and ports to be compared; S18, link the analog digital connection file, the analog stimulus spice file and the Verilog file, and compare and check the specific ports contained in these three files; S20, establish digital SOC verification environment based on UVM verification platform; S22, creating a digital stimulus file according to the SystemVerilog language, and completing the automatic creation of a digital-analog mixed simulation environment for the MCU chip to be tested.

[0017] It can be understood that the automation system of the digital-analog hybrid simulation environment based on the MCU chip designed in this embodiment aims to greatly simplify the configuration process, improve simulation efficiency and reduce labor costs, which has important practical significance for improving the efficiency of MCU chip design and development. This embodiment will use python scripts to automatically create a digital-analog hybrid simulation environment of the analog top layer or digital top layer in the digital UVM (standardized methodology for chip verification) environment, and execute the automatic inspection script of the port, thereby effectively reducing manual intervention, improving the degree of automation of the simulation environment, and meeting the needs of rapid development of complex circuit systems of MCU chips. Figure 2 As shown, the use of python scripts to automatically create a mixed digital-analog simulation environment and automated port check logic under various conditions greatly improves the efficiency of setting up the simulation environment and reduces the labor cost after compilation errors before simulation. By adopting the technical means of this embodiment, it is only necessary to configure the parameters according to the simulation project requirements given by the development task to automatically build a mixed digital-analog simulation environment and perform automatic checks. The application of this technical means will greatly accelerate the design and verification process of MCU chips and bring engineering convenience to the development of electronic products.

[0018] Specifically, firstly, the environment configuration file for the digital-analog hybrid simulation environment is automatically selected and created through the python script. The environment configuration file includes the number of CPU cores used when the system software is running, the simulation accuracy, the waveform output file selection, and the current printing (that is, the configuration of printing a certain current signal can be configured). The waveform output file selection can determine the specific waveform of the signal waveform that needs to be driven to the digital circuit part and the analog circuit part of the MCU chip to be tested during each verification process.

[0019] The analog digital connection file (which can be recorded as .init file) of the design under test (i.e. MCU) is automatically created through the python script. The analog digital connection file includes port connection, digital path of analog module instantiation, analog path of digital module instantiation, configuration file path and software compilation file output.

[0020] Based on the analog digital connection file created above, the analog stimulus type is classified and the analog stimulus spice (universal integrated circuit simulation program) file is created (which can be recorded as a .sp file, used to generate analog spice stimulus to drive the analog circuit part of the MCU chip to be tested). In this way, the required stimulus signal is generated so that it can be driven to the analog circuit part when performing verification to verify whether the output of the analog circuit part meets expectations.

[0021] Link the analog digital connection file and the analog netlist, and use the python script to select and compare modules and ports. Link the analog digital connection file, the analog stimulus spice file, and the Verilog (hardware description language) file, and compare and check the specific ports contained in these three files. Among them, in the Verilog file, the module is the basic unit of design, and the port is the interface for the module to communicate with the outside. For MCU, it contains many digital modules with different functions, such as processor cores, memory modules, and various peripheral modules. Each digital module has its specific input and output port signals to realize data transmission and interaction between modules. The Verilog file of MCU includes various digital module port signals, such as clock signals, reset signals, data input and output signals, and control signals.

[0022] The digital SOC (system on chip) verification environment is established through UVM (Universal Verification Methodology). Specifically, UVM provides a series of class libraries and mechanisms to help verification engineers quickly build an efficient and reusable verification environment. It provides a framework and method for building verification components (such as stimulus generators, monitors, and comparators, etc.). Verification engineers can write python scripts to automatically instantiate these components and connect them according to the needs of digital-analog mixed simulation of the MCU chip to be tested, in accordance with the UVM specifications and design requirements, and then configure the parameters of the corresponding verification environment to complete the automated creation of the digital SOC verification environment.

[0023] Create a digital stimulus file (which can be recorded as a .sv file, used to generate UVM digital stimulus to drive the digital circuit part of the MCU chip to be tested) through the SystemVerilog (hardware verification) language. That is, you can use the syntax and functions of the SystemVerilog language to write a stimulus file for the digital circuit part (the file extension is .sv). The content of the digital stimulus file is the code used to generate test stimulus for the digital circuit part. In the .sv file, you can define various signal types, variables, tasks, and functions to generate the required stimulus signals so that they can be driven to the digital circuit part when performing verification to verify whether the output of the digital circuit part meets expectations.

[0024] The above-mentioned method for automatically creating a digital-analog hybrid simulation environment greatly improves the reliability and maintainability of the digital-analog hybrid simulation environment by utilizing Python scripts to complete the automatic construction of the digital-analog hybrid simulation environment and the automatic inspection of the execution port, while significantly reducing the manual inspection cost in the compilation stage.

[0025] In one embodiment, regarding the above step 18, after comparing and checking the process of the specific ports included in the three files, the following steps may also be included: If the comparison check determines that the specific ports contained in the three files are inconsistent, an error alarm is issued and the error is corrected. For example, but not limited to, if the port names are inconsistent, then the error can be corrected by establishing a name mapping table. For example, if the port name in the analog netlist is ANA_IN_1, the corresponding port name in the digital module should be DIG_IN_1. A dictionary port_name_mapping = {"ANA_IN_1": "DIG_IN_1"} can be established. When the port name is inconsistent, use the if statement to determine whether it is in the name mapping table, and then replace it. For another example, if the port type is found to be mismatched, it can be adjusted according to the specific circuit design rules and signal conversion mechanism of the MCU. For example, a port in the analog netlist is an analog output, which should be connected to the digital input port of the digital module and needs to go through an analog-to-digital conversion (ADC) process. Then, the corresponding check code can be added in the python script to check whether there is a corresponding conversion module configuration. If not, it can be prompted that the configuration file of the digital module needs to be modified or the necessary conversion code needs to be added to correct the port type error. If yes, the port type error is corrected directly according to the conversion module configuration.

[0026] In one embodiment, the above-mentioned method for automatically creating a digital-analog hybrid simulation environment may further include the steps of: Use python scripts to automatically write Makefile files, add compilation macros and coverage collection items.

[0027] It can be understood that you can also use python scripts to automatically create Makefile (compilation) files (for example, read the directory structure, source file list, and dependency information of the project file of the MCU chip to be tested, and then execute Makefile file writing according to the syntax rules of Makefile), which is used to connect the file list of each digital module of MCU and the file list of the digital SOC verification environment, as well as add compilation macros and coverage collection items. By writing a Makefle file, selecting a compilation tool, adding the file list flielist and .init file of the digital module, and adding compilation translation macros and coverage collection items that support hybrid simulation, the Makefle file can also be used to realize the automatic running of the test case for a specified number of times.

[0028] The steps for creating the above automated mixed-analog simulation environment (such as Figure 3 ) realizes the automatic creation of the digital-analog hybrid simulation environment and adds the automatic inspection function of the environment. Compared with the traditional manual construction of the hybrid simulation environment, the automated digital-analog hybrid simulation system where the environment is located has greatly improved the reliability and maintainability of the digital-analog hybrid simulation environment, while significantly reducing the manual inspection cost during the compilation stage.

[0029] More specifically, Figure 4 As shown, first define a parameter A to select the mixed simulation environment type. If the digital (circuit part) is the top layer, only the analog port is captured; conversely, if the analog (circuit part) is the top layer, both the digital module port and the analog port are captured. Define another parameter B as the name of the analog module to be found. When parameter B takes effect, select the netlist module to be linked and capture the port parameters and instance name corresponding to parameter B (i.e., capture the module name). Then, convert the captured port parameters and instance names into the analog compilation format and write them into the analog digital connection file. At the same time, set the parameters to define the analog simulation compilation file path, and write them into the .init file together with the corresponding digital path of the analog module to complete the generation of the .init file.

[0030] Record the captured ports and define keywords, such as "signal type", "voltage value" and "digital-analog type", etc. Write the analog port signals such as resistance, voltage, current and capacitance into the analog excitation spice file, i.e., .sp file, through spice syntax to complete the generation of the analog excitation spice file.

[0031] In one embodiment, the process of checking the specific ports contained in the three files includes the steps of: Use Python scripts to determine the top-level type of the mixed-analog simulation environment; If it is an analog top layer, capture the analog netlist port signal and check whether there is a corresponding analog port in the analog digital connection file; if there is no corresponding analog port, an error is reported and the corresponding port does not exist; If there is a corresponding analog port, capture the digital module port signal in the Verilog file and convert it into a compatible analog format, and then check whether the converted digital module port is consistent with the corresponding analog port; If the converted digital module port is inconsistent with the corresponding analog port, an error message will be given and the non-existent port will be printed; If the converted digital module port is consistent with the corresponding analog port, the port information is printed and the port check is exited.

[0032] The analog netlist mainly includes information about analog ports, which are used to connect the analog circuit inside the MCU with external analog signal sources (or loads). For example, the analog input port of the analog-to-digital converter (ADC) in the MCU will appear in the analog netlist to receive external analog voltage signals, such as analog voltage signals output by sensors, which may come from temperature sensors, pressure sensors, etc.

[0033] In one embodiment, the process of checking the specific ports contained in the three files includes the steps of: Use Python scripts to determine the top-level type of the mixed-analog simulation environment; If it is a digital top layer, the analog netlist port signal is captured and converted into a compatible digital format, and then the digital module port is checked to see if it is consistent with the converted analog port; if the digital module port is inconsistent with the converted analog port, an error is reported and a non-existent port is printed; If the digital module port is consistent with the converted analog port, the analog port defined in the macro in the Verilog file is captured and checked to see if it is consistent with the analog port in the analog-digital connection file; If the analog port defined in the macro in the captured Verilog file is inconsistent with the analog port in the analog digital connection file, an error message will be given and the non-existent port will be printed; If the analog port defined in the macro in the captured Verilog file is consistent with the analog port in the analog digital connection file, the port signal is printed and the port check is exited.

[0034] It can be understood that the automated inspection process of the automated digital-analog hybrid simulation system can be as follows Figure 5 As shown, first configure a parameter C to determine the top-level type of the digital-analog hybrid simulation environment. If it is an analog top-level, capture the analog netlist port signal, check whether there is a corresponding analog port in the .init file, if not, report an error and print the non-existent port, otherwise capture the digital module port in the Verilog file and convert it into a compatible analog format, if the digital module port is inconsistent with the corresponding analog port, report an error and print the redundant unmatched ports between the .init file and the Verilog file, if all the above judgments are passed, print the port information and exit the port check.

[0035] If it is a digital top layer, capture the analog netlist port signal and convert it into a compatible digital format, capture the digital module port (in the macro definition) that should be replaced in the digital module port list, and check whether these digital module ports are consistent with the analog ports captured and converted in the analog netlist. If they are consistent, compare the port signal captured in the Verilog file macro definition with the analog connection signal of the init file to check whether the corresponding ports of these signals are consistent. If they are consistent, print the port signal and exit the port check. Among them, the netlist is a file format that describes the circuit connection relationship. In the integrated circuit design process, from the logic design stage to the physical design stage, the netlist plays a key connection role. It can be generated from a hardware description language (such as Verilog) through a synthesis tool, and contains various components in the circuit (such as gate circuits and registers, etc.) and the connection relationship between them.

[0036] As mentioned above, in an MCU chip containing analog and digital parts, the digital module and the analog circuit part need to interact correctly. The ports of the digital module and the analog ports in the analog netlist need to be consistent in terms of connection relationship, signal type (matching is required at the interface, such as the type after conversion from analog signal to digital signal must match the input requirements of the digital module) and the number of ports. Therefore, the port number check can ensure that the number of analog ports provided in the analog netlist is the same as the number of ports expected to be received or sent by the digital module. For example, if the digital module has 5 input ports for receiving signals from the analog circuit, then the number of input ports available to the digital module after conversion in the analog netlist should also be 5. The port name check can ensure that the port names of the converted analog netlist can correspond to the port names in the digital module one by one. For example, if the digital module has an input port named "ADC_INPUT" for receiving the output signal of the analog-to-digital converter (ADC), then there should be a corresponding port in the converted analog netlist port, and its name and connection relationship should match.

[0037] In some implementations, take the construction of a digital-analog hybrid simulation environment for an MCU chip with an analog circuit as the top layer as an example: first, configure the top layer type of the digital-analog hybrid simulation environment as the analog top layer, and compile the project file into a python script. Then configure the parameters corresponding to the analog module name, including but not limited to ADC (analog-to-digital converter), tempersensor (temperature sensor), LVD (undervoltage detector) and LDO (voltage regulator), execute the python script to generate the .init file and automatically write the digital and analog port connections, the compiled content output path, and the digital-to-analog signal conversion path. After the digital-analog hybrid simulation environment is generated, you can follow Figure 5 The process shown automatically performs digital and analog port inspections and outputs inspection reports.

[0038] In some implementations, take the construction of a digital-analog hybrid simulation environment for a multi-core MCU chip with a digital circuit part as the top layer as an example: first, configure the top layer type of the digital-analog hybrid simulation environment to be the digital top layer, compile the digital Verilog file into a hierarchical structure module through the Makefile tool, and then replace the analog signals in the digital circuit part such as the voltage regulator, POR (Power-On Reset) and DC converter (DCDC) with real analog signals. Execute the python script to generate the .init file and automatically write the analog port connection instantiation, compiled content output path, and digital-analog signal conversion path at the same time. After the digital-analog hybrid simulation environment is generated, you can follow Figure 5 The process shown automatically performs digital and analog port inspections and outputs inspection reports.

[0039] In one embodiment, Figure 6 As shown, a system 100 for automatically creating a digital-analog hybrid simulation environment is provided, which may include an environment configuration module 11, a digital-analog connection module 13, an analog excitation module 15, a link selection module 17, a port check module 19, a digital environment module 21, and a digital excitation module 23. Among them, the environment configuration module 11 is used to automatically select and create an environment configuration file for a digital-analog hybrid simulation environment through a python script under a UVM environment; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection, and current printing used when the system software is running. The digital-analog connection module 13 is used to automatically create an analog-digital connection file for an MCU chip to be tested through a python script; the analog-digital connection file includes port connections, digital paths instantiated by analog modules, analog paths instantiated by digital modules, configuration file paths, and software compilation file output. The analog excitation module 15 is used to classify analog excitation types based on the analog-digital connection file and create an analog excitation spice file. The link selection module 17 is used to link the analog-digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and select the modules and ports to be compared using a python script. The port check module 19 is used to link the analog digital connection file, the analog excitation spice file and the Verilog file, and compare and check the specific ports contained in these three files. The digital environment module 21 is used to establish a digital SOC verification environment based on the UVM verification platform. The digital excitation module 23 is used to create a digital excitation file according to the SystemVerilog language, and completes the automatic creation of the digital-analog hybrid simulation environment of the MCU chip to be tested.

[0040] The above-mentioned digital-analog hybrid simulation environment automatic creation system 100, by utilizing Python scripts to complete the automatic construction of the digital-analog hybrid simulation environment and the automatic inspection of the execution port, greatly improves the reliability and maintainability of the digital-analog hybrid simulation environment, while significantly reducing the manual inspection cost in the compilation stage.

[0041] In one embodiment, the above-mentioned digital-analog hybrid simulation environment automatic creation system 100 may also include an alarm module for performing an error alarm and correcting the error if the comparison check determines that the specific ports contained in the three files are inconsistent after the comparison check.

[0042] In one embodiment, the above-mentioned digital-analog hybrid simulation environment automatic creation system 100 may also include a file writing module for automatically writing a Makefile file using a python script, and adding compilation macros and coverage collection items.

[0043] For specific limitations of the system 100 for automatically creating a digital-analog hybrid simulation environment, please refer to the corresponding limitations of the method for automatically creating a digital-analog hybrid simulation environment in the above text, which will not be repeated here.

[0044] It should be understood that although Figure 1 The steps in the method are shown in sequence as indicated by the arrows, but the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of the steps, and the steps can be executed in other orders. Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequentially, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0045] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the following processing steps when executing the computer program: automatically selecting and creating an environment configuration file for a digital-analog hybrid simulation environment through a python script under a UVM environment; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection, and current printing used when the system software is running; automatically creating an analog-digital connection file for an MCU chip to be tested through a python script; the analog-digital connection file includes port connections, digital paths instantiated by analog modules, analog paths instantiated by digital modules, configuration file paths, and software compilation file output; classifying analog stimulus types based on the analog-digital connection file and creating an analog stimulus spice file; linking the analog-digital connection file with an analog comprehensive netlist of the MCU chip to be tested, and selecting a module and port for comparison using a python script; linking the analog-digital connection file, the analog stimulus spice file, and the Verilog file, and comparing and checking the specific ports contained in these three files; establishing a digital SOC verification environment based on a UVM verification platform; creating a digital stimulus file according to the SystemVerilog language, and completing the automatic creation of the digital-analog hybrid simulation environment for the MCU chip to be tested.

[0046] In one embodiment, when the processor executes the computer program, the processor may also implement the steps or sub-steps added in each embodiment of the above-mentioned method for automatically creating a digital-analog hybrid simulation environment.

[0047] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following processing steps are implemented: in a UVM environment, an environment configuration file for a digital-analog hybrid simulation environment is automatically selected and created through a python script; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection and current printing used when the system software is running; an analog-digital connection file for an MCU chip to be tested is automatically created through a python script; the analog-digital connection file includes port connections, digital paths instantiated by analog modules, analog paths instantiated by digital modules, configuration file paths and software compilation file output; analog stimulus types are classified based on the analog-digital connection file and an analog stimulus spice file is created; the analog-digital connection file is linked to an analog comprehensive netlist of the MCU chip to be tested, and a module and port to be compared are selected using a python script; the analog-digital connection file, the analog stimulus spice file and the Verilog file are linked, and specific ports contained in these three files are compared and checked; a digital SOC verification environment is established based on a UVM verification platform; a digital stimulus file is created according to the SystemVerilog language, and the automatic creation of a digital-analog hybrid simulation environment for the MCU chip to be tested is completed.

[0048] In one embodiment, when the computer program is executed by a processor, it can also implement the steps or sub-steps added in each embodiment of the above-mentioned method for automatically creating a digital-analog hybrid simulation environment.

[0049] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus dynamic random access memory (RambusDRAM, referred to as RDRAM) and interface dynamic random access memory (DRDRAM).

[0050] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0051] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of protection of the invention. It should be pointed out that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the attached claims.

Claims

1. A method for automatically creating a digital-analog hybrid simulation environment, characterized in that: Includes steps: Under the UVM environment, a python script is used to automatically select and create an environment configuration file for a digital-analog hybrid simulation environment; the environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection, and current printing used when the system software is running; The python script is used to automatically create an analog digital connection file for the MCU chip to be tested; the analog digital connection file includes port connection, digital path of analog module instantiation, analog path of digital module instantiation, configuration file path and software compilation file output; Classify the analog stimulus type based on the analog digital connection file and create an analog stimulus spice file; Linking the analog digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and using the python script to select the modules and ports for comparison; Link the analog digital connection file, the analog stimulus spice file and the Verilog file, and compare and check the specific ports contained in these three files; Establish digital SOC verification environment based on UVM verification platform; A digital stimulus file is created according to the SystemVerilog language to automatically create a digital-analog mixed simulation environment for the MCU chip to be tested.

2. The method for automatically creating a digital-analog hybrid simulation environment according to claim 1, characterized in that: After comparing the process of checking for specific ports contained in these three files, it also includes the steps: If the comparison check determines that the specific ports contained in the three files are inconsistent, an error alarm will be issued and corrections will be made.

3. The method for automatically creating a digital-analog hybrid simulation environment according to claim 1 or 2, characterized in that: Also includes the steps: The python script is used to automatically write the Makefile file, and compilation macros and coverage collection items are added.

4. The method for automatically creating a digital-analog hybrid simulation environment according to claim 3, characterized in that: The process of checking for specific ports contained in these three files includes the following steps: Determine the top-level type of the digital-analog hybrid simulation environment using the Python script; If it is an analog top layer, capture the analog netlist port signal and check whether there is a corresponding analog port in the analog digital connection file; if there is no corresponding analog port, report an error and print that there is no corresponding port; If there is a corresponding analog port, capture the digital module port signal in the Verilog file and convert it into a compatible analog format, and then check whether the converted digital module port is consistent with the corresponding analog port; If the converted digital module port is inconsistent with the corresponding analog port, an error message will be given and the non-existent port will be printed; If the converted digital module port is consistent with the corresponding analog port, the port information is printed and the port check is exited.

5. The method for automatically creating a digital-analog hybrid simulation environment according to claim 3, characterized in that: The process of checking for specific ports contained in these three files includes the following steps: Determine the top-level type of the digital-analog hybrid simulation environment using the Python script; If it is a digital top layer, the analog netlist port signal is captured and converted into a compatible digital format, and then the digital module port is checked to see if it is consistent with the converted analog port; if the digital module port is inconsistent with the converted analog port, an error is reported and a non-existent port is printed; If the digital module port is consistent with the converted analog port, the analog port defined in the macro in the Verilog file is captured and checked to see if it is consistent with the analog port in the analog-digital connection file; If the analog port defined in the macro in the captured Verilog file is inconsistent with the analog port in the analog digital connection file, an error is reported and the non-existent port is printed; If the analog port defined in the macro in the captured Verilog file is consistent with the analog port in the analog digital connection file, the port signal is printed and the port check is exited.

6. A system for automatically creating a digital-analog hybrid simulation environment, characterized in that: include: The environment configuration module is used to automatically select and create an environment configuration file for a digital-analog hybrid simulation environment through a python script in the UVM environment; The environment configuration file includes the number of CPU cores, simulation accuracy, waveform output file selection and current printing used when the system software is running; A digital-analog connection module is used to automatically create an analog-digital connection file for the MCU chip to be tested through the python script; the analog-digital connection file includes port connection, digital path instantiated by analog module, analog path instantiated by digital module, configuration file path and software compilation file output; An analog stimulus module, used for classifying analog stimulus types based on the analog digital connection file and creating an analog stimulus spice file; A link selection module, used to link the analog digital connection file with the analog comprehensive netlist of the MCU chip to be tested, and select the modules and ports for comparison using the python script; A port checking module is used to link the analog digital connection file, the analog stimulus spice file and the Verilog file, and compare and check the specific ports contained in these three files; Digital environment module, used to establish digital SOC verification environment based on UVM verification platform; The digital stimulus module is used to create a digital stimulus file according to the SystemVerilog language to automatically create a digital-analog hybrid simulation environment for the MCU chip to be tested.

7. The automatic creation system of digital-analog hybrid simulation environment according to claim 6 is characterized in that: The system also includes an alarm module, which is used for, after the comparison and checking of the specific ports included in the three files, if the comparison and checking determines that the specific ports included in the three files are inconsistent, to issue an error alarm and correct the error.

8. The automatic creation system of digital-analog hybrid simulation environment according to claim 6 or 7, characterized in that: It also includes a file writing module, which is used to automatically write a Makefile file using the python script and add compilation macros and coverage collection items.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method for automatically creating a digital-analog hybrid simulation environment as described in any one of claims 1 to 5 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for automatically creating a digital-analog hybrid simulation environment according to any one of claims 1 to 5 are implemented.

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