Magnetic disk device

Abstract

The invention relates to a magnetic disk device. According to one embodiment of the present invention, a magnetic disk device is provided with: a disk having a plurality of data tracks including a first data track and a second data track in a recording layer; a write head that writes data to the recording layer of the disk; and a write processing unit capable of executing a write process for writing data to the recording layer, the write processing unit executing a first write process for writing data to a first segment constituting a part of a first data sector in the first data track, and after executing the first write process, writing data to a second segment constituting a part of a second data sector in the second data track. A second write process for writing data to a first segment constituting a part of a second data sector in the first data track is executed, and a third write process for writing data to a second segment constituting a part of the first data sector in the second data track is executed after the second write process is executed.

Description

[0001] This application enjoys the priority of Japanese patent application No. 2023-149092 applied for on September 14, 2023, and all the contents of this Japanese patent application are cited in this application. Technical Field

[0002] The present embodiment generally relates to a magnetic disk device. Background Art

[0003] As magnetic disk devices, there are known: conventional recording (Conventional Magnetic Recording: CMR) type (or, conventional recording type) magnetic disk devices that write to multiple tracks at intervals in the radial direction of the disk, shingled recording (Shingled write Magnetic Recording: SMR, or, Shingled Write Recording: SWR) type magnetic disk devices that write to multiple tracks in an overlapping manner in the radial direction of the disk, and hybrid recording type magnetic disk devices that select and execute conventional recording type and shingled recording type. Summary of the invention

[0004] One embodiment comprises a magnetic disk device, comprising: a disk having a plurality of data tracks including a first data track and a second data track in a recording layer; a write head for writing data to the recording layer of the disk; and a write processing unit capable of performing a write process for writing data to the recording layer, the write processing unit performing a first write process for writing data to a first segment constituting a part of a first data sector in the first data track, and after performing the first write process, performing a second write process for writing data to a first segment constituting a part of a second data sector in the first data track, and after performing the second write process, performing a third write process for writing data to a second segment constituting a part of the first data sector in the second data track.

[0005] In addition, one embodiment includes a magnetic disk device, the magnetic disk device including: a disk having a plurality of data tracks including a first data track and a second data track on a recording layer; a first read head, a second read head, and a third read head for reading data from the recording layer of the disk, respectively; an arm supporting the first read head to the third read head; an actuator for moving the arm; and a read processing unit capable of performing a read process for reading data from the recording layer, the first data track having a first segment constituting a part of a first data sector, the second data track having a second segment constituting a part of the first data sector and adjacent to the first segment in a radial direction, The read processing unit drives the actuator to control the seek action of the first read head to the third read head, moves the first read head to a position relative to the first data track, selects a first selected read head and a second selected read head, the first selected read head is the first read head, and the second selected read head is the read head closest to the second data track among the second read head and the third read head according to the deflection angle of the first read head, and simultaneously reads the data of the first segment of the first data track and the data of the second segment of the second data track through the first selected read head and the second selected read head.

[0006] According to one embodiment, it is possible to provide a magnetic disk device capable of improving the efficiency of processing data. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 This is a block diagram showing the structure of the magnetic disk device according to the first embodiment.

[0008] Figure 2 This is a perspective view showing a part of the magnetic disk device, and is a view showing a plurality of disks and a plurality of heads.

[0009] Figure 3 This is a schematic diagram showing an example of the arrangement of a plurality of servo areas and a plurality of data areas on one disk according to the above-mentioned embodiment.

[0010] Figure 4 It is shown Figure 3 The diagram shows three tracks of a user data area of ​​a disk on which shingle recording is performed, and a write head.

[0011] Figure 5 It is shown Figure 3 The diagram shows three tracks of a media cache and a write head for performing normal recording processing on a disk.

[0012] Figure 6 This is a schematic diagram showing an example of a data writing process on a disk.

[0013] Figure 7 FIG. 1 is a schematic diagram showing two tracks of the second zone on the inner circumference side in the user data area.

[0014] Figure 8 It shows the ratio Figure 7 Schematic diagram of the two tracks of the first partition on the outer side of the second partition.

[0015] Fig. 9 It is a block diagram showing a part of the structure of the magnetic disk device, and is a diagram showing the structure of a write channel and the like.

[0016] Fig.10 It is a block diagram showing a part of the structure of the magnetic disk device, and is a diagram showing the structure of a read channel and the like.

[0017] Fig.11 It is shown Figure 8 The schematic diagram of a part of two tracks and two reading heads is used to illustrate the reading processing method involved in the above-mentioned embodiment.

[0018] Fig.12 : is a flowchart showing the write processing method involved in the above-mentioned embodiment.

[0019] Fig.13 is with Fig.12 Next, a flowchart showing the above-mentioned write processing method is shown.

[0020] Fig.14 is with Fig.12 Next, another flowchart showing the above-mentioned write processing method.

[0021] Fig.15 1 is a block diagram showing a part of the structure of the magnetic disk device, and is a diagram showing the structure of a volatile memory inside a write channel, and the like.

[0022] Fig.16 It is a block diagram showing a part of the structure of the magnetic disk device, and is a diagram showing the structure of a volatile memory outside the write channel, etc.

[0023] Fig.17 It is a block diagram showing a part of the structure of the magnetic disk device according to the first modification of the first embodiment, and is a diagram showing the structure of a write channel and the like.

[0024] Fig.18 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a second modification of the first embodiment.

[0025] Fig.19It is a block diagram showing a part of the structure of the magnetic disk device according to the second modification, and is a diagram showing the structure of the external volatile memory of the write channel, etc.

[0026] Fig. 20 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a third modified example of the first embodiment.

[0027] Fig.21 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a fourth modified example of the first embodiment.

[0028] Fig. 22 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a fifth modification of the first embodiment.

[0029] Fig.23 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a sixth variation of the first embodiment.

[0030] Fig.24 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a seventh variation of the first embodiment.

[0031] Fig.25 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to an eighth modification of the first embodiment.

[0032] Fig.26 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a ninth variation of the first embodiment.

[0033] Fig. 27 This is a schematic diagram showing two tracks of a first partition of a magnetic disk device according to a tenth modified example of the first embodiment.

[0034] Fig.28 It is a block diagram showing a part of the structure of the magnetic disk device according to the second embodiment, and is a diagram showing the structure of a read channel and the like.

[0035] Fig.29 It is a block diagram showing a part of the structure of the magnetic disk device according to the third embodiment, and is a diagram showing the structure of a read channel and the like.

[0036] Fig.30 It is a plan view showing an example of the geometrical arrangement of the write head and three read heads in the third embodiment.

[0037] Fig.31 It is a block diagram showing a part of the structure of the magnetic disk device according to the fourth embodiment, and is a diagram showing the structure of a read channel and the like.

[0038] Fig.32 It is a block diagram showing a part of the structure of the magnetic disk device, and is a diagram showing the structure of a read channel and the like.

[0039] Description of Reference Numerals

[0040] 1…Disk device, 60…MPU, 61…Read / write processing unit, 62…Write processing unit, 63…Read processing unit, 100…Host, 110…System controller, 120…Driver IC, 130…Head amplifier IC, 140…R / W channel, 150…HDC, 70…Volatile memory, 24…VCM, 30…Arm, 4W…Write channel, 4W1…RLL encoder, 4W2…LDPC encoder, 4W3…Volatile memory, 4W4…Parity bit generation unit , 4R…read channel, 4R1…LPF, 4R2…ADC, 4R3a, 4R3b…FIR filter, 4R3c, 4R3d…two-dimensional FIR filter, 4R4…two-dimensional Viterbi decoder, 3Ra…selection circuit, DK…disk, L…recording layer, Z…partition, STR…track, SC…sector, SCP…parity bit sector, SE…segment, WHD…write head, RHD…read head, DT…data, d1…radial direction, d2…travel direction, d3…rotation direction. DETAILED DESCRIPTION

[0041] Hereinafter, the magnetic disk device 1 according to each embodiment and the magnetic disk device 1 according to each modified example will be described with reference to the drawings.

[0042] (First embodiment)

[0043] First, the configuration of the magnetic disk device 1 according to the first embodiment will be described. Figure 1 1 is a block diagram showing the structure of the magnetic disk device 1 involved in the first embodiment. In the present embodiment, the magnetic disk device 1 is a hybrid recording type magnetic disk device that selects the normal recording type and the shingle recording type and performs. However, the technology described later can also be applied to the shingle recording type magnetic disk device, or can also be applied to the normal recording type magnetic disk device.

[0044] like Figure 1 As shown, the magnetic disk device 1 includes: a plurality of disks (magnetic disks) DK as recording media, for example, 1 to 10 disks, a spindle motor (SPM) 20 as a driving motor, a head stack assembly 22, a driver IC 120, a head amplifier integrated circuit (hereinafter referred to as head amplifier IC or preamplifier) ​​130, a volatile memory 70, a buffer memory (buffer) 80, a nonvolatile memory 90, and a system controller 110 as a single-chip integrated circuit. In addition, the magnetic disk device 1 is connected to a host system (hereinafter referred to as a host) 100.

[0045] Each disk DK is formed to have a diameter of, for example, 97 mm (3.8 inches) and has recording layers (magnetic recording layers) on both sides thereof. In addition, in the present embodiment, the magnetic disk device 1 has 1 to 11 disks DK, but the number of disks DK is not limited thereto. In addition, the magnetic disk device 1 may also have a single disk DK.

[0046] The head stack assembly 22 can control the head HD mounted on the arm 30 to move to a target position on the disk DK by driving a voice coil motor (hereinafter referred to as VCM) 24, that is, can perform seek.

[0047] The disc DK has a data-writable area in which a user data area U that can be used by a user and a system area S in which information required for system management is written are allocated.

[0048] The head HD records and reproduces information on the disk DK. The head HD has a slider as its main body, and includes a write head WHD and a read head RHD mounted on the slider. The write head WHD writes data to the recording layer of the disk DK. The read head RHD reads data from the data track of the recording layer of the disk DK.

[0049] The driver IC 120 controls the driving of the SPM 20 and the VCM 24 under the control of the system controller 110 (specifically, the MPU 60 described later). The SPM 20 supports and rotates a plurality of disks DK.

[0050] The head amplifier IC 130 includes a read amplifier and a write driver. The read amplifier amplifies the read signal read from the disk DK and outputs it to the system controller 110 (specifically, a read / write (R / W) channel 140 described later). The write driver outputs a write current corresponding to the signal output from the R / W channel 140 to the head HD. The read amplifier is equivalent to the preamplifier 3R described later, and the write driver is equivalent to the preamplifier 3W described later.

[0051] The volatile memory 70 is a semiconductor memory that loses stored data when the power supply is cut off. The volatile memory 70 stores data required for processing in each part of the magnetic disk device 1, etc. The volatile memory 70 is a random access memory (RAM). The volatile memory 70 is, for example, a DRAM (Dynamic Random Access Memory). However, the volatile memory 70 may also be an SDRAM (Synchronous Dynamic Random Access Memory).

[0052] The buffer memory 80 is a semiconductor memory that temporarily records data and the like transmitted and received between the magnetic disk device 1 and the host 100. In addition, the buffer memory 80 may be formed integrally with the volatile memory 70. The buffer memory 80 is, for example, a DRAM, an SRAM (Static Random Access Memory), an SDRAM, a FeRAM (Ferroelectric Random Access Memory), or an MRAM (Magnetoresistive Random Access Memory).

[0053] The nonvolatile memory 90 is a semiconductor memory that records stored data even when power supply is cut off. The nonvolatile memory 90 is, for example, a NAND type flash ROM (Flash Read Only Memory: FROM). However, the nonvolatile memory 90 may also be a NOR type flash ROM.

[0054] The system controller (controller) 110 is implemented, for example, using a large-scale integrated circuit (LSI) called a system-on-a-Chip (SoC) in which a plurality of components are integrated into a single chip. The system controller 110 includes a read / write (R / W) channel 140, a hard disk controller (HDC) 150, and a microprocessor (MPU) 60. The system controller 110 is electrically connected to a driver IC 120, a head amplifier IC 130, a volatile memory 70, a buffer memory 80, a nonvolatile memory 90, and a host 100.

[0055] The R / W channel 140 performs signal processing of read data transmitted from the disk DK to the host 100 and write data transmitted from the host 100 according to instructions from the MPU 60. The R / W channel 140 has a circuit or function for modulating write data. In addition, the R / W channel 140 has a circuit for measuring the signal quality of read data and a circuit for equalizing and decoding (or decoding) the waveform of read data, or their functions. The R / W channel 140 is electrically connected to, for example, the head amplifier IC 130, the HDC 150, the MPU 60, etc.

[0056] The HDC 150 controls data transfer between the host 100 and the R / W channel 140 according to instructions from the MPU 60 described later. The HDC 150 is electrically connected to the R / W channel 140, the MPU 60, the volatile memory 70, the buffer memory 80, the nonvolatile memory 90, and the like.

[0057] The MPU 60 is a control unit that controls each part of the magnetic disk device 1 and is a main controller. The MPU 60 controls the VCM 24 via the driver IC 120 and performs servo control for positioning the head HD. The MPU 60 controls the writing action of data to the disk DK and selects the storage destination of the written data transmitted from the host 100. In addition, the MPU 60 controls the reading action of data from the disk DK and controls the processing of the read data transmitted from the disk DK to the host 100. The MPU 60 is connected to each part of the magnetic disk device 1. For example, the MPU 60 is electrically connected to the driver IC 120, the R / W channel 140, the HDC 150, etc.

[0058] The MPU 60 includes a read / write processing unit 61, an error correction unit 65, etc. The MPU 60 executes processing of each of these units, such as the read / write processing unit 61, the error correction unit 65, etc., on firmware. Alternatively, the MPU 60 may include each of these units as a circuit.

[0059] The read / write processing unit 61 includes a write processing unit 62 and a read processing unit 63. According to a command from the host 100, the write processing unit 62 controls the write processing of data, and the read processing unit 63 controls the read processing of data. The write processing unit 62 can perform a write processing of writing data to the recording layer L of the disk DK. The read processing unit 63 can perform a read processing of reading data from the recording layer L. The read / write processing unit 61 controls the VCM 24 via the driver IC 120, positions the head HD at a target position (predetermined radial position) on the disk DK, and performs a read processing or a write processing.

[0060] The error correction unit 65 can restore the data in the data area of ​​the track of the disk DK. For example, when the read processing unit 63 detects that a read error has occurred in the data area of ​​the track of the disk DK1, the error correction unit 65 can restore the data in the data area based on the data in the data area and the parity bit in the parity bit area, and write the restored data into the data area.

[0061] The error correction unit 65 performs a process of correcting errors (errors) of erroneous data or erroneous sectors based on an error correction code (ECC) (hereinafter, sometimes referred to as ECC processing or error correction processing). The error correction unit 65 performs an ECC process (hereinafter, sometimes referred to as track ECC processing or sector ECC processing) on ​​the erroneous data or the erroneous sector based on an ECC corresponding to the erroneous data of a predetermined track (hereinafter, sometimes referred to as track ECC) or an ECC corresponding to the erroneous sector (hereinafter, sometimes referred to as sector ECC). The ECC process is equivalent to error correction or error correction processing in units of sectors.

[0062] Figure 21 is a perspective view showing a part of the magnetic disk device 1, and is a view showing a plurality of disks DK and a plurality of heads HD.

[0063] like Figure 2 As shown in FIG. 1 , in the circumferential direction of the disk DK, the direction in which the disk DK rotates is referred to as the rotation direction d3. Figure 2 In the example shown, the rotation direction is indicated by the counterclockwise direction, but it may be the opposite direction (clockwise direction). In addition, the travel direction d2 of the head HD relative to the disk DK is opposite to the rotation direction d3. The travel direction d2 is the direction in which the head HD sequentially writes and reads data relative to the disk DK in the circumferential direction, that is, the direction in which the head HD travels relative to the disk DK in the circumferential direction.

[0064] The magnetic disk device 1 includes i disks, namely disks DK1 to DKi, and j heads, namely heads HD1 to HDj. In the present embodiment, the number of heads HD is twice the number of disks DK (j=2×i).

[0065] The disks DK1 to DKi are coaxially arranged and overlapped with each other at intervals. The disks DK1 to DKi have the same diameter. Here, the terms "same", "identical", "identical", "equivalent" and the like include the meaning of being completely identical and also include the meaning of being different to the extent that they can be regarded as substantially the same. In addition, the diameters of the disks DK1 to DKi may be different from each other.

[0066] Each disk DK has recording layers L on both sides. For example, disk DK1 has a first recording layer La1 and a second recording layer Lb1 on the opposite side of the first recording layer La1. Disk DK2 has a first recording layer La2 and a second recording layer Lb2 on the opposite side of the first recording layer La2. Disk DKi has a first recording layer Lai and a second recording layer Lbi on the opposite side of the first recording layer Lai. Each first recording layer La is sometimes referred to as a surface or a recording surface. Each second recording layer Lb is sometimes referred to as a back side or a recording surface.

[0067] Each recording layer L has a user data area U and a system area S. The first recording layer La1 has a user data area Ua1 and a system area Sa1. The second recording layer Lb1 has a user data area Ub1 and a system area Sb1. The first recording layer La2 has a user data area Ua2 and a system area Sa2. The second recording layer Lb2 has a user data area Ub2 and a system area Sb2. The first recording layer Lai has a user data area Uai and a system area Sai. The second recording layer Lbi has a user data area Ubi and a system area Sbi.

[0068] The track in the user data area Ua1 (first recording layer La1) that is sandwiched between the double dashed lines in the figure is referred to as track Ta1. The track in the user data area Ub1 (second recording layer Lb1) that is located on the opposite side of track Ta1 is referred to as track Tb1.

[0069] The track in the user data area Ua2 (first recording layer La2) enclosed by the double dashed line in the figure is referred to as track Tc1. The track in the user data area Ub2 (second recording layer Lb2) located on the opposite side of track Tc1 is referred to as track Td1.

[0070] The track in the user data area Uai (first recording layer Lai) sandwiched by the double dashed line in the figure is referred to as track Te1. The track in the user data area Ubi (second recording layer Lbi) located on the opposite side of track Te1 is referred to as track Tf1.

[0071] In this embodiment, the tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 are located on the same cylinder.

[0072] The head HD faces the disk DK. In the present embodiment, one head HD faces each recording layer L of the disk DK. For example, the head HD1 faces the first recording layer La1 of the disk DK1, writes data to the first recording layer La1, and reads data from the first recording layer La1. The head HD2 faces the second recording layer Lb1 of the disk DK1, writes data to the second recording layer Lb1, and reads data from the second recording layer Lb1.

[0073] The head HD3 is opposite to the first recording layer La2 of the disk DK2, and writes data to the first recording layer La2 and reads data from the first recording layer La2. The head HD4 is opposite to the second recording layer Lb2 of the disk DK2, and writes data to the second recording layer Lb2 and reads data from the second recording layer Lb2. The head HDj-1 is opposite to the first recording layer Lai of the disk DKi, and writes data to the first recording layer Lai and reads data from the first recording layer Lai. The head HDj is opposite to the second recording layer Lbi of the disk DKi, and writes data to the second recording layer Lbi and reads data from the second recording layer Lbi.

[0074] Figure 3 1 is a schematic diagram showing an example of the arrangement of a plurality of servo areas SV and a plurality of data areas DTR on a disk DK according to the present embodiment. Figure 3 As shown, in the radial direction d1 of the disk DK, the direction toward the outer periphery of the disk DK is called the outer direction (outer side), and the direction opposite to the outer direction is called the inner direction (inner side).

[0075] exist Figure 3In the diagram, the user data area U is divided into an inner peripheral area IR located inward, an outer peripheral area OR located outward, and a middle peripheral area MR located between the inner peripheral area IR and the outer peripheral area OR.

[0076] The disk DK has a plurality of servo areas SV and a plurality of data areas DTR. The plurality of servo areas SV may, for example, extend radially in the radial direction of the disk DK and be discretely arranged at predetermined intervals in the circumferential direction. The plurality of servo areas SV may, for example, extend linearly from the inner circumference to the outer circumference and be discretely arranged at predetermined intervals in the circumferential direction. The plurality of servo areas SV may, for example, extend spirally from the inner circumference to the outer circumference and be discretely arranged at predetermined intervals in the circumferential direction. In addition, the plurality of servo areas SV may, for example, be arranged in an island shape in the radial direction and be discretely arranged with predetermined intervals changed in the circumferential direction.

[0077] Hereinafter, a servo area SV in a predetermined track may be referred to as a "servo sector". In addition, a "servo area SV" may be referred to as a "servo sector SV". A servo sector includes servo data. Hereinafter, "the arrangement of several servo data constituting a servo sector" may be referred to as a "servo pattern". In addition, "servo data written in a servo sector" may be referred to as a "servo sector".

[0078] A plurality of data regions DTR are respectively arranged between a plurality of servo regions SV. For example, the data region DTR is equivalent to the region between two consecutive servo regions SV in the circumferential direction. Hereinafter, a data region DTR in a predetermined track is sometimes referred to as a "data sector". Moreover, a "data region DTR" is sometimes referred to as a "data sector DTR". A data sector contains user data. Moreover, "user data written to a data sector" is sometimes referred to as a "data sector". A "data sector" is sometimes referred to as "user data". Furthermore, a "graphic composed of several data" is sometimes referred to as a "data graphic". In Figure 2 In the example shown, the data pattern of a predetermined track is composed of a plurality of servo data (servo sectors) and a plurality of user data (data sectors).

[0079] The servo area SV includes a plurality of partitioned servo areas ZSV, etc. In addition, the servo area SV may include, in addition to the partitioned servo area ZSV, an area including a gap (the deviation of the circumferential position of two partitioned servo areas), an area including servo data, and a data area DTR, etc. The plurality of partitioned servo areas ZSV are discretely arranged along the radial direction. The plurality of partitioned servo areas ZSV extend in the radial direction, respectively.

[0080] Sometimes, a partition servo area (servo area) ZSV in a predetermined track is referred to as a "partition servo sector" or "servo sector". In addition, sometimes, a "partition servo area (servo area) ZSV" is referred to as a "partition servo sector ZSV" or "servo sector ZSV". Sometimes, "servo data written to a partition servo sector" is referred to as a "partition servo sector" or "servo sector". Hereinafter, "the configuration of several servo data constituting a partition servo sector" is sometimes referred to as a "partition servo pattern" or "servo pattern". Hereinafter, sometimes, a servo area SV in a predetermined track is referred to as a "partition pattern sector".

[0081] In addition, the "servo area SV" is sometimes referred to as a "partition pattern sector". Sometimes, "at least one data written to the partition pattern sector" is also referred to as a "partition pattern sector". The partition pattern sector includes at least one partition servo sector. Hereinafter, the "data pattern of the partition pattern sector" is sometimes referred to as a "partition data pattern".

[0082] exist Figure 3 In the example shown, the servo area SV includes sub-area servo areas ZSV0, ZSV1, and ZSV2. The sub-area servo areas ZSV0, ZSV1, and ZSV2 are arranged in a staggered manner in the radial direction. The sub-area servo areas ZSV0, ZSV1, and ZSV2 may also be arranged in a stepwise manner in the radial direction.

[0083] The partition servo area ZSV2 is located at a position closer to the inner circumference than the partition servo area ZSV1. The partition servo area ZSV0 is located at a position closer to the outer circumference than the partition servo area ZSV1. For example, the partition servo area ZSV2 is configured to span from the inner circumference area IR to the middle circumference area MR, the partition servo area ZSV1 is configured to span from the inner circumference area IR to the outer circumference area OR, and the partition servo area ZSV0 is configured to span from the middle circumference area MR to the outer circumference area OR. Hereinafter, in the predetermined servo area SV, the predetermined area in the radial direction where a plurality of partition servo areas ZSV are configured in the circumferential direction is sometimes referred to as a partition servo boundary area, a dual servo area, or a dual partition servo area ZB.

[0084] exist Figure 3In the example shown, the master servo area SVO and the slave servo area SVE are alternately arranged at intervals in the circumferential direction. For example, one slave servo area SVE is arranged between two master servo areas SVO arranged continuously at intervals in the circumferential direction. In other words, one slave servo area SVE is arranged between two master servo areas SVO arranged continuously at intervals in the circumferential direction. For example, in the case where all servo areas SV of the disk DK are sequentially assigned consecutive numbers, the master servo area SVO corresponds to the odd-numbered servo area SV, and the slave servo area SVE corresponds to the even-numbered servo area SV. In addition, two or more slave servo areas SVE may be arranged between two master servo areas SVO arranged continuously at intervals in the circumferential direction.

[0085] The master servo area SVO and the slave servo area SVE may be composed of, for example, only a servo area (hereinafter, sometimes referred to as a normal servo area) that reads and demodulates servo data as a whole. Hereinafter, "reading and demodulating servo data" may also be referred to as "servo reading". The master servo area SVO and the slave servo area SVE may be composed of, for example, a normal servo area and a servo area (hereinafter, sometimes referred to as a short servo area) that performs servo reading on a circumferential range of servo data that is smaller than the circumferential range of servo data that is servo-read in the normal servo area.

[0086] The disk DK is allocated with a media cache M. However, the media cache M may not be arranged on the disk DK.

[0087] By using the above-mentioned plurality of servo data, the head HD can be positioned so as to obtain a predetermined off-track amount, and the swing amount and swing direction of the head HD can be detected.

[0088] In the description of this embodiment, the case where the number of partitions of the disk DK is 3 is used as an example, but the number of partitions of the disk DK can be changed in various ways. The number of partitions of the disk DK can also be 30 to 40. In addition, each partition has a plurality of bands. For example, each partition has several hundred bands.

[0089] Figure 4 It is shown Figure 3 The schematic diagram of the three tracks STR and the write head WHD of the user data area U of the disk DK for shingle recording is shown. The user data area U is a shingle recording area. In the user data area U, data can be written sequentially in bands, that is, shingle recording is allowed. The track STR is a data track.

[0090] like Figure 4 As shown, the write head WHD is capable of sequentially writing data to the disk DK in the travel direction d2. Figure 3The shown read head RHD is also capable of sequentially reading data written to the disk DK in the travel direction d2.

[0091] The direction in which multiple tracks STR are continuously recorded in a direction parallel to the radial direction d1, that is, the direction in which the track STR written next overlaps the track STR written previously in the radial direction d1, is called the overlapping writing direction or the recording advancing direction. Figure 4 In the band BAe shown, the overlapping writing direction is the inner direction, but the overlapping writing direction may also be the outer direction.

[0092] For example, the overlapping writing direction applied to multiple bands BA (multiple partitions Z) located at the outer side of a specific radial position and the overlapping writing direction applied to multiple bands BA (multiple partitions Z) located at the inner side of the specific radial position can also be opposite to each other.

[0093] The band BAe has a plurality of tracks STR including tracks STRe, STRe+1 and STRe+2. Tracks STRe, STRe+1 and STRe+2 are continuously overlapped and written in the overlap writing direction in the order in which they are recorded. Track STRe among tracks STRe, STRe+1 and STRe+2 is equivalent to the track to which data is written first, and track STRe+2 is equivalent to the track to which data is written last.

[0094] Track STRe has a track center STCe at the center of the radial direction d1 when other tracks are not written in an overlapping manner. Track STRe+1 has a track center STCe+1 at the center of the radial direction d1 when other tracks are not written in an overlapping manner. Track STRe+2 has a track center STCe+2 at the center of the radial direction d1 when other tracks are not written in an overlapping manner.

[0095] exist Figure 4 In the example shown, tracks STRe, STRe+1, and STRe+2 are written at a pitch (Watt recording track pitch) STP. The track center STCe of track STRe and the track center STCe+1 of track STRe+1 are separated by a pitch STP in the radial direction d1. The track center STCe+1 of track STRe+1 and the track center STCe+2 of track STRe+2 are separated by a pitch STP in the radial direction d1. Tracks STRe to STRe+2 may also be written at different pitches.

[0096] The width d1 of the area in track STRe where track STRe+1 is not overlapped and written is the same as the width d1 of the area in track STRe+1 where track STRe+2 is not overlapped and written. In addition, the width d1 of the area in track STRe where track STRe+1 is not overlapped and written is the same as the width d1 of the area in track STRe+1 where track STRe+2 ...

[0097] exist Figure 4 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape, but in fact each track STR is curved along the circumferential direction. In addition, each track STR may also be a wave shape extending in the circumferential direction while changing in the radial direction d1. Figure 4 In the example, overlapping writing is performed on three tracks STR, but overlapping writing can also be performed on more than three tracks STR. It is sufficient as long as a plurality of tracks STR are overlapped and written in units of band BAe.

[0098] The write processing unit 62 can select a shingle recording type in which data is written to a plurality of tracks STR in an overlapping manner in the radial direction d1 of the disk DK, and perform a write process. Figure 4 In the example shown, the write processing unit 62 sequentially performs tile recording on tracks STRe to STRe+2 at a pitch STP in the inner direction (overlap writing direction) in the band BAe.

[0099] The write processing unit 62 writes to the track STRe+1 at a pitch STP in the inner direction of the track STRe, and overlaps the track STRe+1 on a part of the inner circumference of the track STRe. The write processing unit 62 writes to the track STRe+2 at a pitch STP in the inner direction of the track STRe+1, and overlaps the track STRe+2 on a part of the inner circumference of the track STRe+1.

[0100] Figure 5 It is shown Figure 3 Schematic diagram of the three tracks CTR and the write head WHD of the medium cache M for normal recording processing of the disk DK shown. The medium cache M and Figure 3 The system area S shown is a normal recording area. In the medium cache M and the system area S, data can be written randomly, that is, normal recording is allowed. The track CTR is a data track.

[0101] like Figure 5As shown, the media cache M has a plurality of tracks CTR including tracks CTRe, CTRe+1, and CTRe+2. For example, the widths (track widths) in the radial direction d1 of tracks CTRe, CTRe+1, and CTRe+2 are the same. In addition, the track widths of tracks CTRe to CTRe+2 may be different from each other.

[0102] The track CTRe has a track center CTCe at the center of the radial direction d1, the track CTRe+1 has a track center CTCe+1 at the center of the radial direction d1, and the track CTRe+2 has a track center CTCe+2 at the center of the radial direction d1. Figure 4 In the example shown, tracks CTRe, CTRe+1, and CTRe+2 are written at a pitch (normal recording track pitch) CTP. The track center CTCe of track CTRe is separated from the track center CTCe+1 of track CTRe+1 by the pitch CTP. The track center CTCe+1 of track CTRe+1 is separated from the track center CTCe+2 of track CTRe+2 by the pitch CTP.

[0103] Track CTRe is separated from track CTRe+1 by a gap GP. Track CTRe+1 is separated from track CTRe+2 by a gap GP. In addition, tracks CTRe to CTRe+2 may be written at different pitches. Figure 5 In the figure, for the sake of convenience, each track CTR is shown as a rectangular shape, but each track CTR is actually curved along the circumferential direction. In addition, each track CTR may be a wave extending in the circumferential direction while changing in the radial direction d1.

[0104] The write processing unit 62 can select a normal recording mode for writing data to a plurality of tracks CTR at intervals in the radial direction d1 of the disk DK and execute the write processing. Figure 4 In the example shown, the write processing unit 62 positions the write head WHD at the track center CTCe in a predetermined area of ​​the disk DK, and performs normal recording on the track CTRe or a predetermined sector of the track CTRe.

[0105] The write processing unit 62 positions the write head WHD at the track center CTCe+1 separated from the track center CTCe of the track CTRe by the pitch CTP in the inner direction, and performs normal recording on the track CTRe+1 or a predetermined sector of the track CTRe+1. The write processing unit 62 positions the write head WHD at the track center CTCe+2 separated from the track center CTCe+1 of the track CTRe+1 by the pitch CTP in the inner direction, and performs normal recording on the track CTRe+2 or a predetermined sector of the track CTRe+2.

[0106] The write processing unit 62 can normally record the tracks CTRe, CTRe+1 and CTRe+2 sequentially in a predetermined area of ​​the disk DK, or can randomly record the predetermined sectors of the track CTRe, the predetermined sectors of the track CTRe+1 and the predetermined sectors of the track CTRe+2.

[0107] Figure 6 FIG. 2 is a schematic diagram showing an example of a data writing process in the disk DK. Figure 6 As shown, the user data area U has bands BAa, BAb and BAc. Bands BAa, BAb and BAc belong to the same partition (first partition Zu). In the first partition Zu, bands BAa, BAb and Bac are arranged intermittently in the overlap writing direction in the order in which they are recorded.

[0108] The first partition Zu is provided in the first data area in the recording layer L of the disc DK. In the present embodiment, the first partition Zu (first data area) is located on the outer peripheral side of the user data area U.

[0109] The band BAa and the band BAb are adjacent to each other in the radial direction d1 , and the band BAb and the band BAc are adjacent to each other in the radial direction d1 .

[0110] Band BAa includes tracks STRa1, STRa2, STRa3, ..., STRa(x-2), STRa(x-1), and STRax. The multiple tracks STR are data tracks. Tracks STRa1 to STRax are tiled in the overlapping writing direction in the order in which they are recorded. In band BAa, track STRa1 is equivalent to the starting track where data is first written, and track STRax is equivalent to the last track where data is last written.

[0111] The band BAb includes tracks STRb1, STRb2, STRb3, ..., STRb(x-2), STRb(x-1), and STRbx. Tracks STRb1 to STRbx are tile-recorded in the overlapping writing direction in the order in which they are recorded. In the band BAb, track STRb1 is equivalent to the starting track to which data is first written, and track STRbx is equivalent to the last track to which data is last written.

[0112] The band BAc includes tracks STRc1, STRc2, STRc3, ..., STRc(x-2), STRc(x-1), and STRcx. Tracks STRc1 to STRcx are tile-recorded in the overlapping writing direction in the order in which they are recorded. In the band BAc, track STRc1 is equivalent to the starting track where data is first written, and track STRcx is equivalent to the last track where data is last written.

[0113] The number of tracks STR of each band BA belonging to the same partition Z is the same. For example, the number of tracks STR of each band BA belonging to the first partition Zu is the same. In other words, in each partition Z, the number of tracks STR of a band BA is fixed.

[0114] exist Figure 6 The tracks CTRx-1 and CTRx are shown in FIG. Figure 6 In the example, tracks CTRx-1 and CTRx are normally recorded in the medium cache M or the system area S. Tracks CTRx-1 and CTRx are adjacent to each other in the radial direction d1.

[0115] In the shingle recording method, unlike the normal recording method, due to the characteristic of performing overlapping writing on a part of the track STR, the MPU 60 manages the track group of the user data area U in units called bands.

[0116] A guard band is generally provided between adjacent bands BA in the radial direction d1. The guard band includes one or more guard tracks and has the function of suppressing interference between adjacent bands BA. The guard band enables shingle recording to be performed in units of one band BA, and also enables separation of the range (band BA) for sequential writing.

[0117] The recording capacity of each band BA of the user data area U is usually predetermined based on the specification required by the user. The MPU 60 can record the same amount of data in each band BA. Generally, the recording capacity of each band BA is 128 MiB or 256 MiB.

[0118] Figure 7 Schematic diagram showing two tracks STRk and STR(k+1) of the second partition Zw located on the inner side of the first partition Zu in the user data area U. Figure 7 In FIG. 1 , the tracks STRk and STR(k+1) are shown as rectangular shapes, but in reality, the tracks STRk and STR(k+1) are curved along the circumferential direction. Figure 7 In the figure, the servo area of ​​each track STR is omitted.

[0119] like Figure 7 As shown, the second partition Zw is provided in the second data area located at a position offset in the radial direction d1 from the first data area in the recording layer L of the disc DK. In this embodiment, the second data area is located on the inner circumference side of the first data area.

[0120] Each track STR has a plurality of sectors SC. Each track STR is a data track, and each sector SC is a data sector. Each track STR belonging to the same partition Z has the same number of sectors SC.

[0121] Track STRk has six sectors, namely, sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, and parity sector SCP0. The data written into parity sector SCP0 is a parity bit generated based on multiple sectors SC0, SC1, SC2, SC3, and SC4 of track STRk. The parity bit of parity sector SCP0 is a parity bit for error correction generated by performing an exclusive OR (XOR) operation on the data of multiple sectors SC0 to SC4.

[0122] Track STR(k+1) has six sectors, namely, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9 and parity sector SCP1. The data written into parity sector SCP1 is a parity bit generated based on multiple sectors SC5, SC6, SC7, SC8 and SC9 of track STR(k+1). The parity bit of parity sector SCP1 is a parity bit for error correction generated by performing an XOR operation on the data of multiple sectors SC5 to SC9.

[0123] In the figure, the regions representing sectors SC0, SC1, SC2, SC3, SC4 and parity sector SCP0 are shaded. The outer edges of the regions representing parity sector SCP0 and parity sector SCP1 are shown with bold lines.

[0124] In the second partition Zw (second data area), all sectors SC are allocated to the same track STR. For example, all sectors SC0 are allocated to track STRk, all sectors SC1 are allocated to track STRk, and all parity bit sectors SCP0 are allocated to track STRk. In this embodiment, track STRk of the second partition Zw functions as the third data track, and sector SC0 of the second partition Zw functions as the third data sector.

[0125] In the second data area such as the second partition Zw, which is closer to the inner circumference than the predetermined radial position, all sectors SC are assigned to the same track STR. The predetermined radial position is, for example, the boundary of the partition Z. The closer the partition Z is to the inner circumference, the fewer sectors SC each track STR has. When compared with the first data area (first partition Zu), in the second data area, the track density becomes lower, or the data recording quality becomes lower. The above track density refers to the average number of tracks STR per inch in the radial direction d1, expressed as TPI (track per inch).

[0126] As described above, the recording layer L may have a second data area (second partition Zw, etc.) in which all sectors SC are allocated to the same track STR.

[0127] Figure 8 It shows the ratio Figure 7 A schematic diagram of the two tracks STRk and STR(k+1) of the first partition Zu on the outer side of the second partition Zw. Figure 8 In FIG. 1 , the tracks STRk and STR(k+1) are shown as rectangular shapes. In fact, the tracks STRk and STR(k+1) are curved along the circumferential direction. Figure 8 In the figure, the servo area of ​​each track STR is omitted.

[0128] like Figure 8 As shown, the first partition Zu is set in the first data area in the recording layer L of the disk DK. Each track STR has a plurality of segments SE. Each segment SE constitutes a part of the corresponding sector SC. Each track STR is a data track, and each sector SC is a data sector. Each track STR belonging to the same partition Z has the same number of segments SE.

[0129] The track STRk includes 12 segments, namely, segment SE0a, segment SE1a, segment SE2a, segment SE3a, segment SE4a, segment SEP0a, segment SE5a, segment SE6a, segment SE7a, segment SE8a, segment SE9a, and segment SEP1a.

[0130] The data written into the segment SEP0a is a parity segment generated based on the segments SE0a, SE1a, SE2a, SE3a, and SE4a of the track STRk. The parity segment of the segment SEP0a is a parity segment for error correction generated by performing an XOR operation on the data of the segments SE0a to SE4a.

[0131] The data written into the segment SEP1a is a parity segment generated based on the segments SE5a, SE6a, SE7a, SE8a, and SE9a of the track STRk. The parity segment of the segment SEP1a is a parity segment for error correction generated by performing an XOR operation on the data of the segments SE5a to SE9a.

[0132] Track STR(k+1) has 12 segments, namely, segment SE0b, segment SE1b, segment SE2b, segment SE3b, segment SE4b, segment SEP0b, segment SE5b, segment SE6b, segment SE7b, segment SE8b, segment SE9b, and segment SEP1b.

[0133] The data written into segment SEP0b is a parity segment generated based on multiple segments SE0b, SE1b, SE2b, SE3b, and SE4b of track STR(k+1). The parity segment of segment SEP0b is a parity segment for error correction generated by performing an XOR operation on the data of multiple segments SE0b to SE4b.

[0134] The data written into segment SEP1b is a parity bit segment generated based on multiple segments SE5b, SE6b, SE7b, SE8b, and SE9b of track STR(k+1). The parity bit segment of segment SEP1b is a parity bit segment for error correction generated by performing an XOR operation on the data of multiple segments SE5b to SE9b.

[0135] Each sector SC is divided into two parts, segment 1 and segment 2. In the present embodiment, each sector SC is divided into segment SEa which is set on track STRk and corresponds to the first half of the sector SC, and segment SEb which is set on track STR(k+1) and corresponds to the second half of the sector SC.

[0136] It is also possible for a person skilled in the art to recognize that the segments SEa and SEb constitute the same sector SC. In the first partition Zu (first data area), not all sectors SC are allocated to the same track STR.

[0137] Segments SE0a and SE0b adjacent in the radial direction d1 constitute sector SC0. Segments SE1a and SE1b adjacent in the radial direction d1 constitute sector SC1. Segments SE2a and SE2b adjacent in the radial direction d1 constitute sector SC2. Segments SE3a and SE3b adjacent in the radial direction d1 constitute sector SC3. Segments SE4a and SE4b adjacent in the radial direction d1 constitute sector SC4. Segments SEP0a and SEP0b adjacent in the radial direction d1 constitute parity bit sector SCP0.

[0138] Segments SE5a and SE5b adjacent in the radial direction d1 constitute sector SC5. Segments SE6a and SE6b adjacent in the radial direction d1 constitute sector SC6. Segments SE7a and SE7b adjacent in the radial direction d1 constitute sector SC7. Segments SE8a and SE8b adjacent in the radial direction d1 constitute sector SC8. Segments SE9a and SE9b adjacent in the radial direction d1 constitute sector SC9. Segments SEP1a and SEP1b adjacent in the radial direction d1 constitute parity bit sector SCP1.

[0139] In the figure, in sectors SC0, SC1, SC2, SC3, SC4, and parity bit sector SCP0, the region representing multiple segments SEa of track STRk is marked with oblique lines, and the region representing multiple segments SEb of track STR(k+1) is marked with dotted graphics. In addition, the outer periphery of the region representing segments SEP0a, SEP0b, SEP1a, and SEP1b is indicated by bold lines. In the present embodiment, track STRk of the first partition Zu functions as the first data track, and track STR(k+1) of the first partition Zu functions as the second data track.

[0140] For example, when segments SE0b and SE1b of track STR(k+1) are squeezed toward track STRk during write processing, segments SE0a and SE1a of track STRk are adversely affected. For example, the segment SE0b being squeezed toward track STRk means that the center of segment SE0b in radial direction d1 moves away from the target position in radial direction d1 (e.g., the center of the track in track STR(k+1)) toward track STRk, which is undesirable. The data of segments SE0a and SE1a will be overwritten by the data of segments SE0b and SE1b.

[0141] However, segments SE0b and SE1b become further away from the adjacent track STR(k+2) (not shown). In sector SC0, segment SE0a is adversely affected by squeezing, but segment SE0b is not. Similarly, in sector SC1, segment SE1a is adversely affected by squeezing, but segment SE1b is not. The area of ​​each sector SC0 and SC1 adversely affected by squeezing is not the entire area but 1 / 2.

[0142] In addition, Figure 7 In the case where the sector SC5 of the track STR(k+1) is pushed toward the track STRk during the write process, the entire area of ​​the sector SC0 of the track STRk is adversely affected.

[0143] Figure 8 The adverse effects caused by squeezing in each sector SC0 and SC1 are Figure 7 In addition, by dividing each sector SC into two parts and arranging them in two tracks STR, it can contribute to high TPI.

[0144] For example, in Figure 7When sector SC5 is squeezed 5 nm toward sector SC0 during write processing of the second partition Zw, the error correction unit 65 cannot recover the data of sector SC0, and a read error occurs during read processing of sector SC0.

[0145] In contrast, even in Figure 8 When writing to the first zone Zu, segments SE0b and SE1b are squeezed 10 nm toward segments SE0a and SE1a, and the error correction unit 65 can also recover the data of segments SE0a and SE1a. This can contribute to higher TPI and improve recording density by reducing the squeeze margin.

[0146] In addition, for example, when the six segments SE0b to SE4b and SEP0b of track STR(k+1) are squeezed toward track STRk, the segments SE0a to SE4a and SEP0a of track STRk are adversely affected. When the amount of squeezing is large, read errors may occur in the six segments SE0a to SE4a and SEP0a.

[0147] Even if the error correction unit 65 performs ECC processing, only three segments can be restored at most among the segments SE0a to SE4a and SEP0a. The restoration capability depends on the hardware configuration and signal processing capability. The correction capability of ECC processing is limited.

[0148] Fig. 9 It is a block diagram showing a part of the structure of the magnetic disk device 1, and is a diagram showing the structure of the write channel 4W and the like.

[0149] like Fig. 9 As shown, the write channel 4W of the R / W channel 140 includes an RLL (Run Length Limited) encoder 4W1 , an LDPC (Low Density Parity Check) encoder 4W2 , a volatile memory 4W3 , and a parity bit generator 4W4 .

[0150] The RLL encoder 4W1 and the LDPC encoder 4W2 function as a data processing unit that processes the received data. In the present embodiment, the data processing unit performs a process of encoding the received data. The received data is RLL-encoded by the RLL encoder 4W1 and LDPC-encoded by the LDPC encoder 4W2. The parity bit generator 4W4 is configured to perform an XOR operation on the data processed by the data processing unit (RLL encoder 4W1 and LDPC encoder 4W2).

[0151] The volatile memory 4W3 inside the write channel 4W includes a plurality of storage areas such as a first storage area, a second storage area, a third storage area, and a fourth storage area. The data processed by the above-mentioned data processing unit and the data after the XOR operation by the parity bit generation unit 4W4 are written to the volatile memory 4W3. The volatile memory 4W3 is a RAM and functions as a first memory.

[0152] The data processed by the above-mentioned data processing unit and the data after the XOR operation by the parity bit generating unit 4W4 are temporarily stored in the volatile memory 4W3. For example, the data in the volatile memory 4W3 is transferred to the volatile memory 70. The volatile memory 70 functions as a second memory. The volatile memory 70 includes a plurality of recording areas such as a first recording area and a second recording area. The volatile memory 70 has a recording capacity capable of recording data for at least two tracks among a plurality of tracks (a plurality of data tracks). The data processed by the above-mentioned data processing unit and the data after the XOR operation by the parity bit generating unit 4W4 are written to the volatile memory 70.

[0153] The multiple addresses of the volatile memory 70 are linked, and the data of the multiple segments SE of the track STRk are transferred to the volatile memory 4W3 again, and sent to the write head WHD via the preamplifier 3W of the head amplifier IC130, and written to the track STRk. The volatile memory 70 continues to hold the data of the multiple segments SE of the track STR(k+1). After the data writing to the track STRk is completed, the write head WHD is made to seek to the track STR(k+1), and the data of the multiple segments SE of the track STR(k+1) are transferred from the volatile memory 70 to the volatile memory 4W3 again, and sent to the write head WHD via the preamplifier 3W, and written to the track STR(k+1).

[0154] Alternatively, data may be sent to the write head WHD via the preamplifier 3W without transferring data from the volatile memory 4W3 to the volatile memory 70 .

[0155] The data received from the host 100 first enters the buffer memory 80 (cache), and then is sequentially sent to the write channel 4W and the volatile memory 70. However, the data received from the host 100 may be sent to the write channel 4W without entering the buffer memory 80.

[0156] Fig.10 It is a block diagram showing a part of the structure of the magnetic disk device 1 and is a diagram showing the structure of the read channel 4R and the like.

[0157] like Fig.10As shown, the read channel 4R of the above-mentioned R / W channel 140 has low-pass filters (LPF: Low Pass Filter) 4R1a and 4R1b, analog-to-digital converters (ADC: Analog to Digital Converter) 4R2a and 4R2b, FIR (Finite Impulse Response) filters 4R3a and 4R3b, Viterbi decoders (Viterbi Detector) 4R4a and 4R4b, and LDPC decoders 4R5a and 4R5b.

[0158] The LPF4R1a is connected to the read head RHD1 of the head HD via the preamplifier 3R1 of the head amplifier IC130. The LPF4R1a can remove noise included in the first read signal, which is a signal read by the read head RHD1 and amplified by the preamplifier 3R1. The ADC4R2a is connected to the LPF4R1a and can convert the first read signal into a digital signal.

[0159] The FIR filter 4R3a is connected to the ADC 4R2a. The FIR filter 4R3a is a one-dimensional FIR filter. The FIR filter 4R3a can perform waveform equalization processing to equalize the waveform of the first read signal so as to minimize the error rate of the first read signal. The FIR filter 4R3a can output first waveform equalized data.

[0160] The Viterbi decoder 4R4a is connected to the FIR filter 4R3a. The Viterbi decoder 4R4a is a one-dimensional Viterbi decoder. The Viterbi decoder 4R4a can output first decoded data obtained by decoding the first waveform equalized data.

[0161] The LDPC decoder 4R5a is connected to the Viterbi decoder 4R4a. The LDPC decoder 4R5a can perform LDPC code decoding processing (error detection and correction processing) on ​​the first decoded data. The data (signal) processed by the LDPC decoder 4R5a is sent to the HDC 150.

[0162] The LPF4R1b is connected to the read head RHD2 of the head HD via the preamplifier 3R2 of the head amplifier IC130. The LPF4R1b can remove noise included in the second read signal, which is a signal read by the read head RHD2 and amplified by the preamplifier 3R2. The ADC4R2b is connected to the LPF4R1b and can convert the second read signal into a digital signal.

[0163] The FIR filter 4R3b is connected to the ADC 4R2b. The FIR filter 4R3b is a one-dimensional FIR filter. The FIR filter 4R3b can perform waveform equalization processing to equalize the waveform of the second read signal so as to minimize the error rate of the second read signal. The FIR filter 4R3b can output second waveform equalized data.

[0164] The Viterbi decoder 4R4b is connected to the FIR filter 4R3b. The Viterbi decoder 4R4b is a one-dimensional Viterbi decoder. The Viterbi decoder 4R4b can output the second decoded data obtained by decoding the second waveform equalized data.

[0165] The LDPC decoder 4R5b is connected to the Viterbi decoder 4R4b. The LDPC decoder 4R5b can perform LDPC code decoding processing (error detection and correction processing) on ​​the second decoded data. The data (signal) processed by the LDPC decoder 4R5b is sent to the HDC 150.

[0166] Fig.10 The read channel 4R is a read channel block capable of simultaneously reading data from two tracks STR. The read head RHD1 and the read channel path including LPF4R1a, ADC4R2a, FIR filter 4R3a, Viterbi decoder 4R4a and LDPC decoder 4R5a only read track STRk. The read head RHD2 and the read channel path including LPF4R1b, ADC4R2b, FIR filter 4R3b, Viterbi decoder 4R4b and LDPC decoder 4R5b only read track STR(k+1).

[0167] The internal operations of the FIR filter 4R3a, Viterbi decoder 4R4a, FIR filter 4R3b, and Viterbi decoder 4R4b are algorithms that consider one track. The internal tap coefficients in the FIR filter 4R3, the signal average value in the metric operation of the Viterbi decoder 4R4, the noise variance value, and the tap coefficients of the noise whitening filter are optimized to minimize the BER (Bit Error Rate).

[0168] Fig.11 It is shown Figure 8 The schematic diagram of a part of two tracks STRk and STR(k+1) and two read heads RHD1 and RHD2 is used to illustrate the reading processing method involved in this embodiment. Fig.11 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape.

[0169] like Fig.11As shown, the size of each sector SC is 4096 bytes or 512 bytes. In the present embodiment, each sector SC is divided into two segments SE, and therefore the size of each segment SE is 2048 bytes or 256 bytes.

[0170] In the circumferential direction of the disk DK, the distance between the head RHD1 and the head RHD2 is about 10 bits long, which is sufficiently shorter than the length of the segment SE. For example, the head RHD1 and the head RHD2 can simultaneously read the data of the segment SE3a and the segment SE3b adjacent in the radial direction d1, and can read the data of the sector SC3 at the same time. In addition, the head RHD1 functions as the first head, and the head RHD2 functions as the second head.

[0171] like Fig.11 and Figure 1 As shown, the arm 30 supports the pickup head RHD1 and the pickup head RHD2. The VCM 24 as an actuator can move the arm 30. The read processing unit 63 can execute a read process of reading data from the recording layer L of the disk DK.

[0172] The read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1 and RHD2, so that the read head RHD1 moves to a position relative to the track STRk. For example, the read processing unit 63 can simultaneously read the data of the segment SE3a of the track STRk and the data of the segment SE3b of the track STR(k+1) through the read heads RHD1 and RHD2.

[0173] Then, the read processing unit 63 can drive the VCM 24 to control the seek operation of the read heads RHD1 and RHD2, so that the read head RHD1 moves to a position opposite to the track STR (k+2). The seek operation can be performed in units of two tracks during the read process. The read processing unit 63 can simultaneously read the data of the track STR (k+2) and the data of the track STR (k+3) adjacent to the track STR (k+2) through the read heads RHD1 and RHD2.

[0174] According to the above-mentioned reading processing method, the magnetic disk device 1 has two reading heads RHD1 and RHD2. Therefore, it is possible to read the data of the track STRk and the track STR(k+1) when the disk DK rotates one circle. Since the data of the track STRk and the track STR(k+1) can be read at the same time, the efficiency of the data reading processing can be improved.

[0175] For example, when the magnetic disk device 1 has one read head RHD, it takes more than two rotations to read data of tracks STRk and STR(k+1). In this case, the time required for seek and rotation wait increases, making it difficult to improve the efficiency of data reading.

[0176] Next, the write processing method according to this embodiment will be described. Fig.12 , Fig.13 and Fig.14 : is a flowchart showing the write processing method involved in this embodiment.

[0177] like Fig.12 , Figure 1 , Figure 8 and Fig. 9 As shown, the arm 30 supports the write head WHD. The write processing unit 62 can drive the VCM 24 to control a seek operation for causing the write head WHD to seek.

[0178] When the write processing method is started, first, in step ST1, the write processing unit 62 performs the first write processing, which is a processing of writing data to the first segment (segment SE0a) constituting a part of the first data sector (sector SC0) in the first data track (track STRk). When performing the first write processing, the write processing unit 62 moves the write head WHD to a position opposite to the first data track by a seek operation.

[0179] Next, in step ST2, the write processing unit 62 performs a second write process for writing data to the first segment (segment SE1a) constituting a part of the second data sector (sector SC1) in the first data track. When performing the second write process, the write processing unit 62 maintains a state in which the write head WHD is opposite to the first data track.

[0180] Next, in step ST3, the write processing unit 62 writes data to the remaining multiple segments SEa (segments SE2a, SE3a, SE4a, SEP0a, SE5a, SE6a, SE7a, SE8a, SE9a and SEP1a) of the first data track.

[0181] In this embodiment, data is written to segment SEP0a after data is written to all segments SE0a, SE1a, SE2a, SE3a, and SE4a, but data may be written to segment SEP0a before data is written to all segments SE0a, SE1a, SE2a, SE3a, and SE4a.

[0182] When writing the data of the first fragment of the parity sector SCP to the first data track or the second data track before writing the data of all the first fragments belonging to the same group to at least one of the data tracks of the first data track and the second data track, the parity bit generation unit 4W4 can perform an XOR operation on the data of all the first fragments belonging to the above group in advance to complete the data of the first fragment of the parity sector SCP.

[0183] To give a specific example, when writing data of segments SE3a, SE4a and SEP0a to track STRk before writing data of segments SE0a, SE1a and SE2a to STRk, the parity bit generation unit 4W4 can perform an XOR operation on data of segments SE0a, SE1b, SE2b, SE3b and SE4b belonging to the same group in advance to complete the data of segment SEP0a of the parity bit sector SCP0.

[0184] Before writing the data of segments SE0a, SE1a and SE2a, the result of XOR operation on the data of segments SE0a, SE1a and SE2a can be reflected in the data of segment SEP0a. The data of segment SEP0a can be written after the data of segment SE4a. Therefore, sequential writing processing of sequentially writing data to track STRk can be realized.

[0185] In track STRk, the first segment to which data is written is segment SE0a, and the last segment to which data is written is segment SEP1a. In track STRk, segment SE0a is equivalent to the starting segment, and segment SEP1a is equivalent to the last segment. In addition, in units of bands, the positions of the starting segments of each of the multiple tracks STR are aligned in the radial direction d1. For example, segment SE0b is adjacent to segment SE0a in the radial direction d1, so segment SE0b is used as the starting segment of track STR(k+1).

[0186] Then, the process moves to step ST4, in which the write processing unit 62 determines whether the fragment to which data is first written among multiple fragments SEb of the second data track (track STR(k+1)) is a fragment adjacent to the first fragment (fragment SE0a) of the first data sector.

[0187] When the segment to which data is first written in the second data track is a segment (segment SE0b) adjacent to the first segment (segment SE0a) (step ST4), the process proceeds to step ST5.

[0188] In step ST5, the write processing unit 62 makes the write head WHD face the second data track through a seek operation, and makes the write head WHD face the segment (segment SE0b) adjacent to the first segment of the first data sector among the plurality of segments SEb of the second data track through a rotation waiting operation. The write head WHD is used in writing data to the first data track (track STRk) and in writing data to the second data track (track STR(k+1)).

[0189] Next, in step ST6, the write processing unit 62 performs the third write processing, which is the processing of writing data to the second segment (segment SE0b) that constitutes a part of the first data sector (sector SC0) in the second data track (track STR(k+1)).

[0190] like Fig.13 , Figure 1 , Figure 8 and Fig. 9 As shown, next, in step ST7, the write processing unit 62 writes data to the second segment (segment SE1b) constituting a part of the second data sector (sector SC1) in the second data track. At this time, the write processing unit 62 maintains the state in which the write head WHD faces the second data track.

[0191] Then, in step ST8, the write processing unit 62 writes data to the remaining multiple segments SEb (segments SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, SE7b, SE8b, SE9b and SEP1b) of the second data track.

[0192] Thus, the write processing method ends.

[0193] On the other hand, in step ST4 ( Fig.12 ), if the segment to which data is first written in the second data track is not a segment (segment SE0b) adjacent to the first segment (segment SE0a), proceed to step ST11.

[0194] like Fig.14 , Figure 1 , Figure 8 and Fig. 9 As shown, in step ST11, the write processing unit 62 makes the write head WHD face the second data track through a seek action, and makes the write head WHD face a predetermined segment (for example, segment SE3b) among multiple segments SEb of the second data track through a rotation waiting action.

[0195] Next, in step ST12 , the write processing unit 62 starts writing data from a predetermined segment (segment SE3 b ) with respect to the second data track (track STR(k+1)).

[0196] Then, data writing to the second data track is continued. When writing data of the second fragment of the parity sector SCP to the first data track or the second data track before writing data of all the second fragments belonging to the same group to at least one of the first data track and the second data track, the parity generating unit 4W4 can perform an XOR operation on data of all the second fragments belonging to the above group in advance to complete the data of the second fragment of the parity sector SCP.

[0197] In this embodiment, before writing data of all segments SE0b, SE1b, SE2b, SE3b and SE4b of all sectors SC0, SC1, SC2, SC3 and SC4 belonging to the same group to at least one of tracks STRk and STR(k+1), data of segment SEP0b of parity sector SCP0 is written to track STRk or STR(k+1). That is, before writing data of segments SE0b, SE1b and SE2b to STR(k+1), data of segment SEP0b is written to track STR(k+1).

[0198] In this case, the parity generating unit 4W4 performs an XOR operation on the data of all the segments SE0b, SE1b, SE2b, SE3b and SE4b belonging to the above group in advance, and completes the data of the segment SEP0b of the parity sector SCP0. Before writing the data of the segments SE0b, SE1b and SE2b, the result of the XOR operation on the data of the segments SE0b, SE1b and SE2b can be reflected in the data of the segment SEP0b. The data writing to the segment SEP0b can be performed subsequently to the data writing to the segment SE4b. Therefore, the sequential writing process of sequentially writing data to the track STR(k+1) can be realized.

[0199] Next, in step ST13, the write processing unit 62 performs the third write processing, which is the processing of writing data to the second segment (segment SE0b) that constitutes a part of the first data sector (sector SC0) in the second data track (track STR(k+1)).

[0200] Next, in step ST14, the write processing unit 62 writes data to the second segment (segment SE1b) constituting a part of the second data sector (sector SC1) in the second data track. At this time, the write processing unit 62 maintains the state in which the write head WHD faces the second data track.

[0201] Then, in step ST15 , the write processing unit 62 writes data to the remaining one or more segments SEb (segment SE2 b ) of the second data track.

[0202] Thus, the write processing method ends.

[0203] According to the above-mentioned write processing method, after writing data to the segment SE0a of the track STRk, data is written to the segment SE1a of the track STRk, and then data is written to the segment SE0b of the track STR(k+1). Data can be written to the track STRk and the track STR(k+1) when the disk DK rotates substantially two times. Data can be written to the track STR(k+1) after the data writing to the track STRk is completed, so the efficiency of the data writing process can be improved.

[0204] For example, when data is written to segment SE0a of track STRk, then data is written to segment SE0b of track STR(k+1), and then data is written to segment SE1a of track STRk, more than four rotations are required to write data to tracks STRk and STR(k+1). When the data sent from the host 100 is sequentially written to the disk DK, the above-mentioned write process will be performed. In this case, the time period required for the seek operation and the rotation waiting operation increases, so it is difficult to improve the efficiency of the data write process.

[0205] Fig.15 1 is a block diagram showing a part of the structure of the magnetic disk device 1, and is a diagram showing the structure of the volatile memory 4W3 inside the write channel 4W.

[0206] like Fig.15 , Figure 8 and Fig. 9 As shown, data is input from the LDPC encoder 4W2 to the volatile memory 4W3 in units of one sector. In addition, data is processed in units of one sector when passing through the RLL encoder 4W1 and the LDPC encoder 4W2. Data is divided into two parts in units of one sector in the volatile memory 4W3.

[0207] After the data DT0a of the first segment (segment SE0a) of the first data sector (sector SC0) is written into the first storage area of ​​the volatile memory 4W3, and the data DT0b of the second segment (segment SE0b) of the first data sector is written into the second storage area of ​​the volatile memory 4W3, the write processing unit 62 can execute the first write processing ( Fig.12 ST1).

[0208] Data DT0a and data DT0b are data DT0 for sector SC0. Data DT1a is data for segment SE1a of sector SC1, and data DT1b is data for segment SE1b of sector SC1. Data DT1a and data DT1b are data DT1 for sector SC1.

[0209] During the period from when data DT0b is written to the second storage area to when the third write process is executed ( Fig.12 In step ST6), the write processing unit 62 can keep the data DT0b in the second storage area of ​​the volatile memory 4W3. Alternatively, the write processing unit 62 can move the data DT0b from the second storage area of ​​the volatile memory 4W3 to the volatile memory 70.

[0210] In this example, the write processing unit 62 sequentially sends data DT0a and data DT1a corresponding to the track STRk to the write head WHD, and sequentially transfers data DT0b and data DT1b corresponding to the track STR(k+1) to the volatile memory 70 .

[0211] In addition, the write processing unit 62 can increase the free capacity of the volatile memory 4W3 inside the write channel 4W. The write processing unit 62 can increase the free capacity of the volatile memory 4W3 inside the write channel 4W after executing the first write processing ( Fig.12 After ST1), the first storage area in the volatile memory 4W3 is released, and overwriting to the first storage area is allowed. The write processing unit 62 can allow overwriting to the second storage area when moving the data DT0b from the second storage area of ​​the volatile memory 4W3 to the volatile memory 70. As described above, the free capacity of the volatile memory 4W3 can be increased.

[0212] Furthermore, when the data DT0b is not moved to the volatile memory 70 but is held in the second storage area of ​​the volatile memory 4W3, the write processing unit 62 can prohibit overwriting to the second storage area.

[0213] The data DT0a, the data DT0b, the data DT1a, and the data DT1b are stored in a plurality of storage areas to which different addresses are allocated in the volatile memory 4W3.

[0214] The address corresponding to the data DT1a is linked to the address corresponding to the data DT0a. When performing the write process, the write processing unit 62 can select the address in the linked order and send the data of the selected address to the write head WHD in sequence. For example, the data DT1a can be sent to the write head WHD after the data DT0a is sent to the write head WHD.

[0215] In addition, the address corresponding to the data DT1b is linked to the address corresponding to the data DT0b. The write processing unit 62 can select the address in the linked order and sequentially move the data of the selected address to the volatile memory 70. For example, after the data DT0b is transferred to the volatile memory 70, the data DT1b can be transferred to the volatile memory 70. When the write processing is performed on the track STR (k+1), the data DT0b and the data DT1b are transferred to the volatile memory 4W3 again, so that the data DT0b and the data DT1b can be sent to the write head WHD.

[0216] Fig.16 1 is a block diagram showing a part of the structure of the magnetic disk device 1, and is a diagram showing the structure of the external volatile memory 70 of the write channel 4W, etc.

[0217] like Fig.16 and Figure 8 As shown, the write processing unit 62 can perform the first write processing ( DT0a ) after writing the data DT0a of the first segment (segment SE0a) of the first data sector (sector SC0) into the first recording area of ​​the volatile memory 70, writing the data DT0b of the second segment (segment SE0b) of the first data sector into the second recording area of ​​the volatile memory 70, and then moving the data DT0a from the first recording area to the volatile memory 4W3. Fig.12 From writing data DT0b to the second recording area to executing the third writing process ( Fig.12 ST6 or Fig.14 During the period from step ST13 to step ST13), the write processing unit 62 is able to keep the data DT0b in the second recording area.

[0218] In addition, the write processing unit 62 can increase the free capacity of the volatile memory 70 outside the write channel 4W. The write processing unit 62 can increase the free capacity of the volatile memory 70 outside the write channel 4W after executing the first write processing ( Fig.12 After ST1), the first recording area in the volatile memory 70 is released, and overwriting to the first recording area is allowed. As described above, the free capacity of the volatile memory 70 can be increased.

[0219] Furthermore, during the period from when the data DT0b is written to the second recording area to when the third writing process is executed, the writing process section 62 can prohibit overwriting to the second recording area.

[0220] The volatile memory 70 has a storage capacity capable of storing data corresponding to at least two tracks. Therefore, the volatile memory 70 can store data corresponding to the track STRk and the track STR(k+1).

[0221] The write processing unit 62 can cause the write channel 4W to process data of the tracks STRk and STR(k+1). The write processing unit 62 can write data of the tracks STRk and STR(k+1) processed by the write channel 4W to the volatile memory 70. The write processing unit 62 can start writing data of the tracks STRk and STR(k+1) after storing the data of the tracks STRk and STR(k+1) in the volatile memory 70.

[0222] If the data of the track STRk is stored in the volatile memory 70, the data writing to the track STRk can be completed while the disk DK rotates one circle. After storing the data of the tracks STRk and STR(k+1) in the volatile memory 70, the write processing unit 62 can move the data of the track STRk from the volatile memory 70 to the volatile memory 4W3, and perform the first sequential write processing of sequentially writing the data of the track STRk into the plurality of first segments (segments SEa) of the track STRk.

[0223] In addition, the data of the track STRk includes the data of the first segment (segment SE0a) of the first data sector (sector SC0), the data of the first segment (segment SE1a) of the second data sector (sector SC1), etc. Each segment SEa (segments SE0a, SE1a, SE2a, SE3a, SE4a, SEP0a, SE5a, SE6a, SE7a, SE8a, SE9a, and SEP1a) constitutes a part of a corresponding one of the multiple sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity bit sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity bit sector SCP1).

[0224] Not all of the segments SEa and SEb constituting a corresponding sector SC are allocated to the track STRk. For example, the segment SE2a constituting the sector SC2 is allocated to the track STRk, but the segment SE2b constituting the sector SC2 is not allocated to the track STRk.

[0225] Furthermore, if the data of track STR(k+1) is stored in volatile memory 70, data writing to track STR(k+1) can be completed while disk DK is rotated once. First, write processing unit 62 drives VCM 24 to control the seek operation of write head WHD so that write head WHD faces track STR(k+1).

[0226] Next, the write processing unit 62 can perform the above-mentioned first sequential write processing after moving the data of the tracks STRk and STR(k+1) from the volatile memory 70 to the volatile memory 4W3, and then perform the second sequential write processing of sequentially writing the data of the track STR(k+1) into multiple segments SEb of the track STR(k+1).

[0227] By temporarily storing the data corresponding to the tracks STRk and STR(k+1) in the volatile memory 70, the data can be sequentially written to the tracks STRk and STR(k+1) by substantially making two rotations.

[0228] In addition, if the data of the volatile memory 4W3 can be temporarily stored in the volatile memory 70 and written to the disk DK in sequence, it is easy to ensure the free capacity of the volatile memory 4W3. In addition, when a seek operation is required in the middle of writing data to the track STRk, the remaining data to be written to the track STRk is temporarily stored in the volatile memory 70.

[0229] In addition, the data of track STR (k+1) includes data of the second segment (segment SE0b) of the first data sector (sector SC0), data of the second segment (segment SE1b) of the second data sector (sector SC1), etc. Each segment SEb (segments SE0b, SE1b, SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, SE7b, SE8b, SE9b, and SEP1b) constitutes a part of a corresponding one of the multiple sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity bit sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity bit sector SCP1).

[0230] Not all segments SEa and SEb constituting a corresponding sector SC are allocated to track STR(k+1). For example, segment SE3b constituting sector SC3 is allocated to track STR(k+1), but segment SE3a constituting sector SC3 is not allocated to track STR(k+1).

[0231] Data DT0a, data DT0b, data DT1a, data DT1b, etc. are stored in a plurality of areas to which different addresses are assigned in the volatile memory 70 .

[0232] When the write processing unit 62 stores the data of the track STRk in the volatile memory 70, the data of the track STRk can be stored in a plurality of areas to which a plurality of first addresses are assigned in the volatile memory 70, and the plurality of first addresses can be sequentially linked. For example, the first address corresponding to the data DT1a is linked to the first address corresponding to the data DT0a, and the first address corresponding to the data DT2a is linked to the first address corresponding to the data DT1a.

[0233] When the write processing unit 62 stores the data of the track STR(k+1) in the volatile memory 70, it can store the data of the track STR(k+1) in a plurality of areas to which a plurality of second addresses are allocated in the volatile memory 70, and sequentially connect the plurality of second addresses. For example, the second address corresponding to the data DT1b is connected to the second address corresponding to the data DT0b, and the second address corresponding to the data DT2b is connected to the second address corresponding to the data DT1b.

[0234] When executing the first sequential write processing, the write processing unit 62 can select multiple first addresses in the order of connection, so that the data of the selected first addresses are moved from the volatile memory 70 to the volatile memory 4W3 in sequence, and the data of the track STRk is sequentially written into the multiple segments SEa of the track STRk in the order of moving from the volatile memory 70 to the volatile memory 4W3.

[0235] When executing the second sequential write processing, the write processing unit 62 can select multiple second addresses in the order of connection, so that the data of the selected second addresses are moved from the volatile memory 70 to the volatile memory 4W3 in sequence, and the data of the track STR (k+1) is sequentially written to the multiple segments SEb of the track STR (k+1) in the order of moving from the volatile memory 70 to the volatile memory 4W3.

[0236] Next, the processing performed by the parity bit generation unit 4W4 of the write channel 4W will be described.

[0237] like Figure 8 and Fig. 9As shown, multiple sectors SC allocated in a manner spanning tracks STRk and STR(k+1) include: multiple sectors SC0, SC1, SC2, SC3 and SC4 belonging to a group including sector SC0 and sector SC1; and a parity bit sector SCP0 that records parity bits for restoring data of the multiple sectors SC0, SC1, SC2, SC3 and SC4 belonging to the above group, and each sector SC is composed of a segment SEa and a segment SEb.

[0238] The data processing unit (RLL encoder 4W1 and LDPC encoder 4W2) can process data corresponding to a plurality of sectors SC0, SC1, SC2, SC3, and SC4 belonging to the above group and write the data into the volatile memory 4W3.

[0239] The parity bit generation unit 4W4 is capable of performing an XOR operation on the data of the multiple fragments SE0a, SE1a, SE2a, SE3a, and SE4a belonging to the above-mentioned group in the data processed by the above-mentioned data processing unit, generating data of the fragment SEP0a of the parity bit sector SCP0 and writing it to the third storage area of ​​the volatile memory 4W3.

[0240] The parity bit generation unit 4W4 is capable of performing an XOR operation on data of multiple fragments SE0b, SE1b, SE2b, SE3b, and SE4b belonging to the above-mentioned group in the data processed by the above-mentioned data processing unit, generating data of the fragment SEP0b of the parity bit sector SCP0 and writing it to the fourth storage area of ​​the volatile memory 4W3.

[0241] Data corresponding to the segments SEP0a and SEP0b of the parity sector SCP0 can be generated while being updated.

[0242] When the parity generating unit 4W4 generates data of the parity sector SCP0 and writes it to the volatile memory 4W3, after the above-mentioned data processing unit processes the data of the sector SC0, the parity generating unit 4W4 can perform an XOR operation on the data of the fragment SE0a of the sector SC0, generate a part of the data of the fragment SEP0a of the parity sector SCP0 and write it to the third storage area of ​​the volatile memory 4W3.

[0243] Next, the parity generating unit 4W4 performs an XOR operation on the data of the segment SE0b of the sector SC0, generates a part of the data of the segment SEP0b of the parity sector SCP0, and writes it into the fourth storage area of ​​the volatile memory 4W3.

[0244] Next, after the data processing unit processes the data of the sector SC1, the parity generating unit 4W4 can perform an XOR operation on the data of the segment SE1a of the sector SC1, generate a part of the data of the segment SEP0a of the parity sector SCP0, and write it into the third storage area of ​​the volatile memory 4W3. At this time, by supplementing the result of the XOR operation on the data of the segment SE0a with the result of the XOR operation on the data of the segment SE1a, the data in the third storage area of ​​the volatile memory 4W3 can be updated.

[0245] Next, the parity generating unit 4W4 can perform an XOR operation on the data of the segment SE1b of the sector SC1, generate a part of the data of the segment SEP0b of the parity sector SCP0, and write it into the fourth storage area of ​​the volatile memory 4W3. At this time, by supplementing the result of the XOR operation on the data of the segment SE0b with the result of the XOR operation on the data of the segment SE1b, the data in the fourth storage area of ​​the volatile memory 4W3 can be updated.

[0246] After that, the data processing unit can perform the same processing after processing the data of sectors SC2, SC3, and SC4. Thus, the data (parity bit segments) in the third storage area and the data (parity bit segments) in the fourth storage area can be completed.

[0247] According to the magnetic disk device 1, the write processing method, and the read processing method according to the first embodiment configured as described above, the magnetic disk device 1 includes: a disk DK having a plurality of data tracks, a write head WHD, and a write processing unit 62 capable of performing a write process. The write processing unit 62 can perform a first write process of writing data to a segment SE0a of a track STRk, then perform a second write process of writing data to a segment SE1a of a track STRk, and then perform a third write process of writing data to a segment SE0b of a track STR(k+1). The time period required for a seek operation and a rotation wait operation can be reduced, and the efficiency of performing a write process on data can be improved.

[0248] The magnetic disk device 1 can read data of the track STRk and the track STR(k+1) simultaneously using the two read heads RHD1 and RHD2, thereby improving the efficiency of the data reading process.

[0249] In addition, the first embodiment can obtain the above-mentioned various effects, and can provide the magnetic disk device 1, the write processing method, and the read processing method that can improve the efficiency of data processing.

[0250] (First Modification of First Embodiment)

[0251] Next, a first modification of the above-mentioned first embodiment will be described. Fig.17 This is a block diagram showing a part of the magnetic disk device 1 according to the first modification, and is a diagram showing the structure of the write channel 4W, etc. Except for the structure described in the first modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0252] like Fig.17 As shown, the head HD includes two write heads, namely, a write head WHD1 and a write head WHD2. For example, by moving the write head WHD1 to a position facing the track STRk, the write head WHD2 can be arranged facing the track STR(k+1).

[0253] The write heads WHD1 and WHD2 can simultaneously write data to the segments SE0a and SE0b adjacent to each other in the radial direction d1 in the tracks STRk and STR(k+1), and can write the data of the sector SC0 at the same time.

[0254] Then, data can be written to tracks STRk and STR(k+1) at the same time. For example, write heads WHD1 and WHD2 can write data to segments SE1a and SE1b adjacent to each other in radial direction d1 at the same time, and data of sector SC1 can be written at once.

[0255] In this first modification example as well, the same effects as those of the above-mentioned first embodiment can be obtained.

[0256] (Second Modification of First Embodiment)

[0257] Next, a second modification of the above-mentioned first embodiment will be described. Fig.18 1 is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the second modification. Fig.19 1 is a block diagram showing a part of the structure of the magnetic disk device 1 involved in the second modification, and is a diagram showing the structure of the external volatile memory 70 of the write channel 4W, etc. Except for the structure described in the second modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment described above.

[0258] exist Fig.18 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. Fig.18In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC1, SC2, SC3, SC4 and parity bit sector SCP0 is marked with oblique lines, and the area representing multiple segments SEb is marked with dot graphics. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP1a and SEP1b is shown with bold lines.

[0259] like Fig.18 and Fig.19 As shown, a plurality of segments SEa and a plurality of segments SEb are arranged in a staggered manner. In other words, the arrangement of segments SEa and SEb is switched every time a segment is shifted in the circumferential direction. In each track STR, segments SEa and segments SEb are arranged alternately in the circumferential direction.

[0260] Even if squeezing occurs during the write process, the adverse effects of squeezing can be dispersed to the segments of the group to which segment SEP0a belongs (segments SE0a, SE1a, SE2a, SE3a, SE4a, and SEP0a) and the segments of the group to which segment SEP0b belongs (segments SE0b, SE1b, SE2b, SE3b, SE4b, and SEP0b), thereby preventing multiple segments in the same group from being adversely affected by squeezing.

[0261] Compared with the first embodiment ( Figure 8 ), since it is difficult to damage the correction capability of the track ECC of the segments SEP0a and SEP0b using the parity bit sector SCP0, the ECC processing using the parity bit sector SCP0 can be performed efficiently. When the segments SE that can be written together are dispersed in the segments SEa in the first half of the sector SC and the segments SEb in the second half of the sector SC, the success rate of correction by the ECC processing becomes higher.

[0262] The data of the plurality of segments SE0a, SE1a, SE2a, SE3a, and SE4a are XORed to generate the data of the segment SEP0a of the parity sector SCP0. The data of the plurality of segments SE0b, SE1b, SE2b, SE3b, and SE4b are XORed to generate the data of the segment SEP0b of the parity sector SCP0.

[0263] Furthermore, an XOR operation is performed on the data of the plurality of segments SE5a, SE6a, SE7a, SE8a, and SE9a to generate data of the segment SEP1a of the parity sector SCP1. An XOR operation is performed on the data of the plurality of segments SE5b, SE6b, SE7b, SE8b, and SE9b to generate data of the segment SEP1b of the parity sector SCP1.

[0264] The write processing unit 62, for example, can write data of multiple fragments (fragments SE0a, SE1b, SE2a, SE3b, SE4a, SEP0b, SE5a, SE6b, SE7a, SE8b, SE9a and SEP1b) in sequence to the track STRk, and then write data of multiple fragments (fragments SE0b, SE1a, SE2b, SE3a, SE4b, SEP0a, SE5b, SE6a, SE7b, SE8a, SE9b and SEP1a) in sequence to the track STR(k+1).

[0265] For example, the write processing unit 62 executes a first write processing (segment SE0a) of writing data to a first segment (segment SE0a) constituting a part of a first data sector (sector SC0) in the track STRk. Fig.12 Next, the write processing unit 62 executes a second write processing (ST1) of writing data to the first segment (segment SE1b) constituting a part of the second data sector (sector SC1) in the first data track. Fig.12 Then, the write processing unit 62 executes the third write processing (ST2) of writing data to the second segment (segment SE0b) constituting a part of the first data sector (sector SC0) in the second data track (track STR(k+1)). Fig.12 ST6 or Fig.14 ST13).

[0266] If the data of the track STRk is stored in the volatile memory 70, the data writing to the track STRk can be completed while the disk DK rotates one circle. After storing the data of the tracks STRk and STR(k+1) in the volatile memory 70, the write processing unit 62 can move the data of the track STRk from the volatile memory 70 to the volatile memory 4W3, and perform the first sequential write processing of sequentially writing the data of the track STRk to the plurality of first segments (segments SE) of the track STRk.

[0267] In addition, the data of the track STRk includes the data of the first segment (segment SE0a) of the first data sector (sector SC0) and the data of the first segment (segment SE1b) of the second data sector (sector SC1). Each segment SE (segments SE0a, SE1b, SE2a, SE3b, SE4a, SEP0b, SE5a, SE6b, SE7a, SE8b, SE9a and SEP1b) constitutes a part of a corresponding sector SC among a plurality of sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity bit sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9 and parity bit sector SCP1).

[0268] Not all of the segments SEa, SEb constituting a corresponding sector SC are allocated to the track STRk.

[0269] Furthermore, if data corresponding to the track STR (k+1) is stored in the volatile memory 70, writing of data to the track STR (k+1) can be completed while the disk DK rotates once.

[0270] The write processing unit 62 is capable of performing the above-mentioned first sequential write processing after moving the data of the tracks STRk and STR(k+1) from the volatile memory 70 to the volatile memory 4W3, and then performing the second sequential write processing of sequentially writing the data of the track STR(k+1) to multiple segments SE of the track STR(k+1).

[0271] In addition, the data of track STR (k+1) includes the data of the second segment (segment SE0b) of the first data sector (sector SC0) and the data of the second segment (segment SE1a) of the second data sector (sector SC1). Each segment SE (segments SE0b, SE1a, SE2b, SE3a, SE4b, SEP0a, SE5b, SE6a, SE7b, SE8a, SE9b, and SEP1a) constitutes a part of a corresponding one of the multiple sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity bit sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity bit sector SCP1).

[0272] Not all of the segments SEa, SEb constituting a corresponding sector SC are allocated to the track STR(k+1).

[0273] Data DT0a, data DT0b, data DT1a, data DT1b, etc. are stored in a plurality of areas to which different addresses are assigned in the volatile memory 70 .

[0274] When the write processing unit 62 stores the data of the track STRk in the volatile memory 70, the data of the track STRk can be stored in a plurality of areas to which a plurality of first addresses are allocated in the volatile memory 70, and the plurality of first addresses can be sequentially linked. For example, the first address corresponding to the data DT1b is linked to the first address corresponding to the data DT0a, and the first address corresponding to the data DT2a is linked to the first address corresponding to the data DT1b.

[0275] When the write processing unit 62 stores the data of the track STR(k+1) in the volatile memory 70, the data of the track STR(k+1) can be stored in a plurality of areas in the volatile memory 70 to which a plurality of second addresses are assigned, and the plurality of second addresses can be sequentially linked. For example, the second address corresponding to the data DT1a is linked to the second address corresponding to the data DT0b, and the second address corresponding to the data DT2b is linked to the second address corresponding to the data DT1a.

[0276] When executing the first sequential write processing, the write processing unit 62 can select multiple first addresses in the order of connection, so that the data of the selected first addresses are moved from the volatile memory 70 to the volatile memory 4W3 in sequence, and the data of the track STRk is sequentially written to the multiple segments SE of the track STRk in the order of moving from the volatile memory 70 to the volatile memory 4W3.

[0277] When executing the second sequential write processing, the write processing unit 62 can select multiple second addresses in the order of connection, so that the data of the selected second addresses are moved from the volatile memory 70 to the volatile memory 4W3 in sequence, and the data of the track STR (k+1) is sequentially written to the multiple segments SE of the track STR (k+1) in the order of moving from the volatile memory 70 to the volatile memory 4W3.

[0278] In this second modification, the same effects as those of the above-mentioned first embodiment can be obtained.

[0279] (Third Modification of First Embodiment)

[0280] Next, a third modification of the above-mentioned first embodiment will be described. Fig. 20 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the third modification. Except for the configuration described in the third modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0281] exist Fig. 20In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. Fig. 20 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple first segments (segment SEa) in sectors SC0, SC2, SC4, SC6, SC8 and parity bit sector SCP0 is marked with oblique lines, and the area representing multiple second segments (segment SEb) is marked with dot graphics. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP1a and SEP1b is shown with bold lines.

[0282] like Fig. 20 As shown, data of multiple segments SE0a, SE2a, SE4a, SE6a and SE8a are XORed to generate data of segment SEP0a of parity sector SCP0. Multiple segments SE0a, SE2a, SE4a, SE6a, SE8a and SEP0a belong to the first group and are arranged on track STRk.

[0283] Data of the plurality of segments SE0b, SE2b, SE4b, SE6b and SE8b are XORed to generate data of the segment SEP0b of the parity sector SCP0. The plurality of segments SE0b, SE2b, SE4b, SE6b, SE8b and SEP0b belong to the second group and are arranged on the track STR(k+1).

[0284] Data corresponding to the plurality of segments SE1a, SE3a, SE5a, SE7a and SE9a are XORed to generate data corresponding to the segment SEP1a of the parity sector SCP1. The plurality of segments SE1a, SE3a, SE5a, SE7a, SE9a and SEP1a belong to the third group and are arranged on the track STRk.

[0285] Data of the fragments SE1b, SE3b, SE5b, SE7b and SE9b are XORed to generate data of the fragment SEP1b of the parity sector SCP1. The fragments SE1b, SE3b, SE5b, SE7b, SE9b and SEP1b belong to the fourth group and are arranged on the track STR(k+1).

[0286] In track STRk, segments SE belonging to group 1 and segments SE belonging to group 3 are alternately arranged in the circumferential direction. In track STR(k+1), segments SE belonging to group 2 and segments SE belonging to group 4 are alternately arranged in the circumferential direction.

[0287] Even if squeezing occurs during the write process, the adverse effects caused by squeezing can be dispersed over the multiple segments SE in the multiple groups. For example, when the six segments SE0b to SE5b of track STR(k+1) are squeezed toward the track STRk, the segments SE0a to SE5a of track STRk will be adversely affected. However, the multiple segments SE0a, SE2a, and SE4a belong to the first group, and the multiple segments SE1a, SE3a, and SE5a belong to the third group. Therefore, the adverse effects caused by squeezing can be dispersed over the first group and the third group.

[0288] Since the segments SE belonging to each group can be dispersed in the circumferential direction (track direction), it is possible to avoid a situation where only the segments SE of a specific group are excessively written together (written close together). In addition, the success rate of correction by ECC processing can be improved.

[0289] In this third modification, the same effects as those of the first embodiment can be obtained.

[0290] (Fourth Modification of the First Embodiment)

[0291] Next, a fourth modification of the above-mentioned first embodiment will be described. Fig.21 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the fourth modification. Except for the configuration described in the fourth modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the third modification.

[0292] exist Fig.21 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. Fig.21 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC2, SC4, SC6, SC8 and parity bit sector SCP0 is marked with oblique lines, and the area representing multiple segments SEb is marked with dot graphics. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP1a and SEP1b is shown with bold lines.

[0293] like Fig.21 As shown, the plurality of segments SE belonging to each group are arranged in a staggered manner. For example, focusing on the first group marked with diagonal lines, the plurality of segments SE0a, SE2a, SE4a, SE6a, SE8a and SEP0a are arranged in a staggered manner.

[0294] Fig.21 The technology is equivalent to Fig.18 Technology and Fig. 20 combination of technologies.

[0295] Even if squeezing occurs during the write process, the adverse effects caused by squeezing can be dispersed to multiple groups of multiple segments SE. For example, when the six segments SE0b, SE1b, SE2a, SE3a, SE4b, and SE5b of track STR(k+1) are squeezed toward track STRk, segments SE0a, SE1a, SE2b, SE3b, SE4a, and SE5a of track STRk will be adversely affected.

[0296] However, segments SE0a and SE4a belong to the first group, segment SE2b belongs to the second group, segments SE1a and SE5a belong to the third group, and segment SE3b belongs to the fourth group. Therefore, adverse effects caused by squeezing can be dispersed to the first to fourth groups.

[0297] Since the multiple segments SE belonging to each group can be dispersed in the circumferential direction (track direction) and the radial direction d1, it is possible to avoid a situation where the multiple segments SE of only a specific group are excessively written together. In addition, since the segments SE that can be written together can be dispersed in the segments SEa in the first half of the sector SC and the segments SEb in the second half of the sector SC, the success rate of correction by ECC processing can be improved.

[0298] In this fourth modification, the same effects as those of the above-mentioned first embodiment can be obtained.

[0299] (Fifth Modification of the First Embodiment)

[0300] Next, a fifth modification of the above-mentioned first embodiment will be described. Fig. 22 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the fifth modification. Except for the configuration described in the fifth modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0301] exist Fig. 22 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. Fig. 22 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple first segments (segment SEa) in sectors SC0, SC1, SC2, SC3, SC4 and parity bit sector SCP0 is marked with oblique lines, and the area representing multiple second segments (segment SEb) is marked with dot graphics. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP1a and SEP1b is shown with bold lines.

[0302] like Fig. 22 As shown, when data writing to track STRk is completed and data is sequentially written to track STR(k+1), it is necessary to start writing data to track STR(k+1) by taking into account the time period required for the seek operation. For example, the write processing unit 62 can start writing data from segment SE0b, which is a segment that is offset in the circumferential direction from the beginning of track STR(k+1) (segment SE8b adjacent to segment SE0a) by the amount of segments that take into account the seek period. In this example, the write start position is offset by 3 segments.

[0303] When data writing to track STR(k+1) starts, data corresponding to track STR(k+1) is written to volatile memory 70. For track STR(k+1), the write processing unit 62 first writes data to segment SE0b adjacent to segment SE3a, and then sequentially writes data to multiple segments SE1b, SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, and SE7b that are continuous in the circumferential direction. Next, the write processing unit 62 sequentially writes data to multiple segments SE8b and SE9b, and finally writes data to segment SEP1b.

[0304] Alternatively, it is also possible not to write data of the amount of segments SEP0b and SEP1b to the volatile memory 70 when starting to write data to the track STR(k+1). In other words, it is also possible not to generate data of the amount of segments SEP0b and SEP1b in advance. In this case, it is possible to start generating data of the amount of segment SEP0b while processing to write data to the segments SE0b, SE1b, SE2b, SE3b, and SE4b of the track STR(k+1). Since it is possible to generate data of the amount of segment SEP0b while writing data to the track STR(k+1), it is possible to write data to the segment SEP0b subsequently to writing data to the segment SE4b.

[0305] Similarly, the generation of data for segment SEP1b can be started while data is being written to segments SE5b, SE6b, SE7b, SE8b, and SE9b of track STR(k+1). Since data for segment SEP1b can be generated while data is being written to track STR(k+1), data can be written to segment SEP1b after data is written to segment SE9b.

[0306] Data writing to the track STR(k+1) can be completed while the disk DK rotates once, and data writing to the two tracks STRk and STR(k+1) can be completed while the disk DK rotates substantially twice.

[0307] (Sixth Modification of the First Embodiment)

[0308] Next, a sixth modification of the above-mentioned first embodiment will be described. Fig.23 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the sixth variation. Except for the configuration described in the sixth variation, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0309] exist Fig. 22 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. In the circumferential direction, segment SEP0b is continuous with segment SE5a, and segment SEP0d is continuous with segment SE5c. Fig.23 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC1, SC2, SC3, SC4 and parity bit sector SCP0 is marked with an oblique line inclined upward to the right, the area representing multiple segments SEb is marked with a dot pattern, the area representing multiple segments SEc is marked with a horizontal stripe, and the area representing multiple segments SEd is marked with an oblique line inclined downward to the right. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c and SEP1d is indicated by a bold line.

[0310] like Fig.23 As shown, each sector SC is divided into four parts instead of two parts. Each sector SC includes a segment SEa corresponding to the first quarter, a segment SEb corresponding to the second quarter, a segment SEc corresponding to the third quarter, and a segment SEd corresponding to the fourth quarter.

[0311] The data of the plurality of segments SE0a, SE1a, SE2a, SE3a and SE4a are XORed to generate the data of the segment SEP0a of the parity sector SCP0. The data of the plurality of segments SE0b, SE1b, SE2b, SE3b and SE4b are XORed to generate the data of the segment SEP0b of the parity sector SCP0. The data of the plurality of segments SE0c, SE1c, SE2c, SE3c and SE4c are XORed to generate the data of the segment SEP0c of the parity sector SCP0. The data of the plurality of segments SE0d, SE1d, SE2d, SE3d and SE4d are XORed to generate the data of the segment SEP0d of the parity sector SCP0.

[0312] The above relationship also applies to sectors SC5 to SC9 and parity sector SCP1. For example, data corresponding to segments SE5a, SE6a, SE7a, SE8a, and SE9a are XORed to generate data corresponding to segment SEP1a of parity sector SCP1.

[0313] Focusing on sector SC0, segments SE0a and SE0b are arranged circumferentially one segment apart, and segments SE0c and SE0d are arranged circumferentially one segment apart. Segments SE0a and SE0c are adjacent in radial direction d1, and segments SE0b and SE0d are adjacent in radial direction d1.

[0314] Fig.23 The two segments SE belonging to the same sector SC are not continuous in the circumferential direction. Fig.23 The configuration of the fragment SE is the same as Figure 8 Compared with the configuration of the segments SE, the sectors SC can be dispersed in the circumferential direction. Therefore, the adverse effects caused by squeezing can be dispersed to a plurality of sectors SC.

[0315] In addition, you can also Fig.23 Unlike the example, two or more segments SE belonging to other sectors are arranged between two segments SE belonging to the same sector SC in the circumferential direction. In addition, each sector SC is not limited to being divided into four parts, but may be divided into eight parts or sixteen parts.

[0316] In this sixth variation, the same effects as those of the first embodiment can be obtained.

[0317] (Seventh Modification of the First Embodiment)

[0318] Next, a seventh modification of the above-mentioned first embodiment will be described. Fig.24 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the seventh variation. Except for the configuration described in the seventh variation, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the sixth variation described above.

[0319] exist Fig.24 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. In the circumferential direction, segment SE5b is continuous with segment SE6a, and segment SE5d is continuous with segment SE6c. Fig.24 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC2, SC4, SC6, SC8 and parity bit sector SCP0 is marked with an oblique line inclined upward to the right, the area representing multiple segments SEb is marked with a dot pattern, the area representing multiple segments SEc is marked with a horizontal stripe, and the area representing multiple segments SEd is marked with an oblique line inclined downward to the right. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c and SEP1d is shown with a bold line.

[0320] like Fig.24 As shown, data of multiple segments SE0a, SE2a, SE4a, SE6a and SE8a are XORed to generate data of segment SEP0a of parity sector SCP0. Multiple segments SE0a, SE2a, SE4a, SE6a, SE8a and SEP0a belong to the first group and are arranged on track STRk.

[0321] Data of the plurality of segments SE0b, SE2b, SE4b, SE6b and SE8b are XORed to generate data of the segment SEP0b of the parity sector SCP0. The plurality of segments SE0b, SE2b, SE4b, SE6b, SE8b and SEP0b belong to the second group and are arranged on the track STRk.

[0322] The data of the plurality of segments SE0c, SE2c, SE4c, SE6c and SE8c are XORed to generate the data of the segment SEP0c of the parity sector SCP0. The plurality of segments SE0c, SE2c, SE4c, SE6c, SE8c and SEP0c belong to the third group and are arranged on the track STR(k+1).

[0323] The data of the plurality of segments SE0d, SE2d, SE4d, SE6d and SE8d are XORed to generate the data of the segment SEP0d of the parity sector SCP0. The plurality of segments SE0d, SE2d, SE4d, SE6d, SE8d and SEP0d belong to the fourth group and are arranged on the track STR(k+1).

[0324] In the track STRk, a plurality of segments SEa belonging to the first group and a plurality of segments SEb belonging to the second group are alternately arranged in the circumferential direction, and there is one segment SE that does not belong to the first to fourth groups between the segments SEa and SEb. In the track STR(k+1), a plurality of segments SEc belonging to the third group and a plurality of segments SEd belonging to the fourth group are alternately arranged in the circumferential direction, and there is one segment SE that does not belong to the first to fourth groups between the segments SEc and SEd.

[0325] Even if squeezing occurs during writing, the adverse effects caused by squeezing can be dispersed to multiple segments SE of multiple groups. In addition, since multiple segments SE belonging to each group can be dispersed in the circumferential direction (track direction), it is possible to avoid the situation where only multiple segments SE of a specific group are excessively written together.

[0326] In this seventh variation, the same effects as those of the above-mentioned first embodiment can be obtained.

[0327] (Eighth Modification of the First Embodiment)

[0328] Next, an eighth modification of the above-mentioned first embodiment will be described. Fig.25 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the eighth modification. Except for the configuration described in the eighth modification, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the sixth modification.

[0329] exist Fig.25 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. In the circumferential direction, segment SEP0d is continuous with segment SE5a, and segment SEP0b is continuous with segment SE5c. Fig.25In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC1, SC2, SC3, SC4 and parity bit sector SCP0 is marked with an oblique line inclined upward to the right, the area representing multiple segments SEb is marked with a dot pattern, the area representing multiple segments SEc is marked with a horizontal stripe, and the area representing multiple segments SEd is marked with an oblique line inclined downward to the right. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c and SEP1d is indicated by a bold line.

[0330] like Fig.25 As shown, a plurality of segments SEa are arranged in a staggered pattern, a plurality of segments SEb are arranged in a staggered pattern, a plurality of segments SEc are arranged in a staggered pattern, and a plurality of segments SEd are arranged in a staggered pattern.

[0331] Here, we focus on multiple sectors SC0 to SC4 and parity bit sector SCP0. Fig.23 Compared with the example, in the radial direction d1, the configuration of segments SE1a and SE1c is swapped, the configuration of segments SE1b and SE1d is swapped, the configuration of segments SE3a and SE3c is swapped, the configuration of segments SE3b and SE3d is swapped, the configuration of segments SEP0a and SEP0c is swapped, and the configuration of segments SEP0b and SEP0d is swapped.

[0332] In the track STRk, the segments SEa, SEc, SEb and SEd are repeatedly arranged in the circumferential direction. In the track STR(k+1), the segments SEc, SEa, SEd and SEb are repeatedly arranged in the circumferential direction.

[0333] Even if squeeze occurs during writing, the adverse effects caused by the squeeze can be dispersed over multiple sectors SC. Furthermore, since segments SE that can be written together can be dispersed over multiple segments SEa, SEb, SEc, and SEd of multiple sectors SC, the success rate of correction by ECC processing can be improved.

[0334] In this eighth variation, the same effects as those of the first embodiment can be obtained.

[0335] (Ninth Modification of the First Embodiment)

[0336] Next, a ninth modification of the above-mentioned first embodiment will be described. Fig.26This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the ninth variation. Except for the configuration described in the ninth variation, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the seventh variation.

[0337] exist Fig.26 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. In the circumferential direction, segment SE5b is continuous with segment SE6c, and segment SE5d is continuous with segment SE6a. Fig.26 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC2, SC4, SC6, SC8 and parity bit sector SCP0 is marked with an oblique line inclined upward to the right, the area representing multiple segments SEb is marked with a dot pattern, the area representing multiple segments SEc is marked with a horizontal stripe, and the area representing multiple segments SEd is marked with an oblique line inclined downward to the right. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c and SEP1d is shown with a bold line.

[0338] like Fig.26 As shown, focusing on the multiple sectors SC0, SC2, SC4, SC6, SC8 and the parity bit sector SCP0, the multiple segments SEa are arranged in an interlaced shape, the multiple segments SEb are arranged in an interlaced shape, the multiple segments SEc are arranged in an interlaced shape, and the multiple segments SEd are arranged in an interlaced shape. Fig.24 Compared with the example, in the radial direction d1, the configuration of segments SE2a and SE2c are swapped, the configuration of segments SE2b and SE2d are swapped, the configuration of segments SE6a and SE6c are swapped, the configuration of segments SE6b and SE6d are swapped, the configuration of segments SEP0a and SEP0c are swapped, and the configuration of segments SEP0b and SEP0d are swapped.

[0339] Fig.26 The technology is equivalent to Fig.24 Technology and Fig.25 combination of technologies.

[0340] Even if squeeze occurs during writing, the adverse effects caused by the squeeze can be dispersed over multiple sectors SC. Furthermore, since segments SE that can be written together can be dispersed over multiple segments SEa, SEb, SEc, and SEd of multiple sectors SC, the success rate of correction by ECC processing can be improved.

[0341] In this ninth modified example, the same effects as those of the first embodiment can be obtained.

[0342] (Tenth Modification of the First Embodiment)

[0343] Next, a tenth modification of the above-mentioned first embodiment will be described. Fig. 27 This is a schematic diagram showing two tracks STRk and STR(k+1) of the first partition Zu of the magnetic disk device 1 according to the tenth variation. Except for the configuration described in the tenth variation, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0344] exist Fig. 27 In the figure, for the sake of convenience, each track STR is shown as a rectangular shape. Fig. 27 In the figure, the servo area of ​​each track STR is omitted. In addition, in the figure, the area representing multiple segments SEa in sectors SC0, SC1, SC2, SC3, SC4 and parity bit sector SCP0 is marked with a slanted line tilted upward to the right, the area representing multiple segments SEb is marked with a dotted pattern, and the area representing multiple segments SEc is marked with a horizontal stripe. In addition, the outer periphery of the area representing segments SEP0a, SEP0b, SEP0c, SEP1a, SEP1b and SEP1c is shown with a bold line.

[0345] like Fig. 27 As shown, each sector SC is divided into three parts instead of two parts. Each sector SC includes a segment SEa corresponding to the first third, a segment SEb corresponding to the second third, and a segment SEc corresponding to the third third.

[0346] The track STRk includes 12 segments, namely, segment SE0a, segment SE1a, segment SE2a, segment SE3a, segment SE4a, segment SEP0a, segment SE5a, segment SE6a, segment SE7a, segment SE8a, segment SE9a, and segment SEP1a.

[0347] Track STR(k+1) has 12 segments, namely, segment SE0b, segment SE1b, segment SE2b, segment SE3b, segment SE4b, segment SEP0b, segment SE5b, segment SE6b, segment SE7b, segment SE8b, segment SE9b, and segment SEP1b.

[0348] Track STR(k+2) has 12 segments, namely, segment SE0c, segment SE1c, segment SE2c, segment SE3c, segment SE4c, segment SEP0c, segment SE5c, segment SE6c, segment SE7c, segment SE8c, segment SE9c, and segment SEP1c.

[0349] The data of the plurality of segments SE0a, SE1a, SE2a, SE3a and SE4a are XORed to generate the data of the segment SEP0a of the parity sector SCP0. The data of the plurality of segments SE0b, SE1b, SE2b, SE3b and SE4b are XORed to generate the data of the segment SEP0b of the parity sector SCP0. The data of the plurality of segments SE0c, SE1c, SE2c, SE3c and SE4c are XORed to generate the data of the segment SEP0c of the parity sector SCP0.

[0350] In this tenth modification, the same effects as those of the above-mentioned first embodiment can be obtained.

[0351] (Second embodiment)

[0352] Next, a second embodiment will be described. Fig.28 This is a block diagram showing a part of the magnetic disk device 1 according to the second embodiment, and is a diagram showing the structure of the read channel 4R, etc. Except for the structure described in the second embodiment, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment.

[0353] like Fig.28 As shown, the read channel 4R of the R / W channel 140 includes two-dimensional FIR filters 4R3c and 4R3d, a two-dimensional Viterbi decoder 4R4, and an LDPC decoder 4R5, instead of FIR filters 4R3a and 4R3b, Viterbi decoders 4R4a and 4R4b, and LDPC decoders 4R5a and 4R5b. By using the read channel 4R, data of two tracks STRk and STR(k+1) can be read simultaneously. The above-mentioned "two-dimensional" means that data of two tracks can be processed simultaneously.

[0354] The two-dimensional FIR filter 4R3c functions as a first two-dimensional FIR filter and is connected to the ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3c can perform a first waveform equalization process for waveform equalization of synthesized data obtained by synthesizing a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2, and outputs first waveform equalization data as a result of performing the first waveform equalization process on the synthesized data, so as to minimize the error rate (BER) of the data written to the track STRk.

[0355] The two-dimensional FIR filter 4R3d functions as a second two-dimensional FIR filter and is connected to the ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3d can perform a second waveform equalization process for waveform equalization of synthesized data obtained by synthesizing a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2, and outputs second waveform equalization data as a result of performing the second waveform equalization process on the synthesized data, so as to minimize the error rate (BER) of the data written to the track STR (k+1).

[0356] The read head RHD1 can read not only the data of the track STRk, but also the data of the track STR(k+1). The read head RHD2 can read not only the data of the track STR(k+1), but also the data of the track STRk. By performing a subtraction process of subtracting the second read signal from the first read signal by the two-dimensional FIR filter 4R3c, only the data of the track STRk can be taken out. By performing a subtraction process of subtracting the first read signal from the second read signal by the two-dimensional FIR filter 4R3d, only the data of the track STR(k+1) can be taken out. A good BER can be obtained when reading data through the ITIC (Inter track Interference Cancellation) effect.

[0357] The two-dimensional Viterbi decoder 4R4 is connected to the two-dimensional FIR filter 4R3c and the two-dimensional FIR filter 4R3d. The first waveform equalization data and the second waveform equalization data are input to the two-dimensional Viterbi decoder 4R4. The two-dimensional Viterbi decoder 4R4 can output decoded data after simultaneously decoding the first waveform equalization data and the second waveform equalization data. The internal operation of the two-dimensional Viterbi decoder 4R4 can be calculated by an algorithm that considers two tracks STRk and STR(k+1). In each path metric that considers two tracks, the signal average value, the noise variance value, and the tap coefficient of the noise whitening filter in the metric operation of the two-dimensional Viterbi decoder 4R4 are optimized so that the BER of each track becomes the minimum.

[0358] The LDPC decoder 4R5 is connected to the two-dimensional Viterbi decoder 4R4. The LDPC decoder 4R5 can perform a decoding process of the LDPC code for the decoded data input from the two-dimensional Viterbi decoder 4R4.

[0359] In the second embodiment configured as described above, the same effects as those of the first embodiment can be obtained, and a good BER can be obtained when reading data.

[0360] (Third embodiment)

[0361] Next, a third embodiment will be described. Fig.29 It is a block diagram showing a part of the structure of the magnetic disk device 1 according to the third embodiment, and is a diagram showing the structure of the read channel 4R and the like.

[0362] Fig.30 This is a plan view showing an example of the geometrical arrangement of the write head WHD and three read heads RHD1, RHD2, and RHD3 in the third embodiment. Except for the configuration described in the third embodiment, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the second embodiment.

[0363] like Fig.29 and Fig.30 As shown, the third partition Zv is located in the third data area between the first data area (first partition Zu) and the second data area (second partition Zw) in the recording layer L of the disc DK in the radial direction d1.

[0364] The head HD includes three read heads RHD1, RHD2, and RHD3 for reading data from the recording layer L of the disk DK, respectively. The positions of the read heads RHD1, RHD2, and RHD3 are offset from each other in the seek direction. The read head RHD1 functions as the first read head, the read head RHD2 functions as the second read head, and the read head RHD3 functions as the third read head. The head HD may also include four or more read heads RHD. The read heads RHD1, RHD2, and RHD3 can, for example, simultaneously read data from two tracks STRk and STR(k+1) of the third partition Zv. In addition, the read heads RHD1, RHD2, and RHD3 and the write head WHD are supported by the arm 30.

[0365] When simultaneously reading data of tracks STRk and STR(k+1), the read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1, RHD2, and RHD3, so that the read head RHD1 moves to a position relative to the track STRk, for example, so that the center of gravity RC1 of the read head RHD1 is located at the track center STC of the track STRk.

[0366] Sometimes in the third zone Zv, the deflection angle of the read head RHD1 becomes larger, and the data of the track STR(k+1) cannot be fully read by the read head RHD2. Therefore, the read head RHD3 can be used to read the data of the track STR(k+1). The center of gravity RC3 of the read head RHD3 is closer to the track center STC of the track STR(k+1) than the center of gravity RC2 of the read head RHD2. The data of the track STRk can be read by the read head RHD1 and the read head RHD2, and the data of the track STR(k+1) can be read by the read head RHD3 and the read head RHD2. In addition, the write head WHD has a center of gravity WC.

[0367] The reading channel 4R further includes an LPF4R1c and an ADC4R2c. The LPF4R1c is connected to the reading head RHD3 of the head HD via the preamplifier 3R3 of the head amplifier IC130. The LPF4R1c can remove noise included in the third reading signal read by the reading head RHD3 and amplified by the preamplifier 3R3. The ADC4R2c is connected to the LPF4R1c and can convert the third reading signal into a digital signal.

[0368] The two-dimensional FIR filter 4R3c is connected to the ADC 4R2a and 4R2b. The two-dimensional FIR filter 4R3c can perform a first waveform equalization process for waveform equalization of first synthesized data obtained by synthesizing a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2, and outputs first waveform equalized data as a result of performing the first waveform equalization process on the first synthesized data, so as to minimize the error rate (BER) of data written to the track STRk.

[0369] The two-dimensional FIR filter 4R3d is connected to the ADC 4R2c and 4R2b. The two-dimensional FIR filter 4R3d can perform a second waveform equalization process for waveform equalization of second synthesized data obtained by synthesizing a second read signal read by the read head RHD2 and a third read signal read by the read head RHD3, and outputs second waveform equalized data as a result of performing the second waveform equalization process on the second synthesized data, so as to minimize the error rate (BER) of data written to the track STR (k+1).

[0370] In the third embodiment constructed as described above, the same effect as that of the first embodiment can be obtained. The magnetic disk device 1 includes three read heads RHD1, RHD2, and RHD3. Even if there is a third data area (third partition Zv) where the deflection angle of the read head RHD1 is large in the recording layer L of the disk DK, data of two tracks can be read simultaneously by using the read heads RHD1, RHD2, and RHD3.

[0371] (Fourth embodiment)

[0372] Next, a fourth embodiment will be described. Fig.31 This is a block diagram showing a part of the magnetic disk device 1 according to the fourth embodiment, and is a diagram showing the structure of the read channel 4R, etc. Except for the structure described in the fourth embodiment, the magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the third embodiment.

[0373] like Fig.31 As shown, the head amplifier IC 130 includes a selection circuit 3Ra instead of the preamplifier 3R3. The read channel 4R does not include the LPF 4R1c and the ADC 4R2c. The read heads RHD1, RHD2, and RHD3 are connected to the input terminals of the selection circuit 3Ra, and the preamplifiers 3R1 and 3R2 are connected to the output terminals of the selection circuit 3Ra. The selection circuit 3Ra is a three-input and two-output circuit. The two-dimensional FIR filter 4R3c is connected to the ADCs 4R2a and 4R2b, and the two-dimensional FIR filter 4R3d is connected to the ADCs 4R2a and 4R2b.

[0374] When simultaneously reading data of tracks STRk and STR(k+1), the read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1, RHD2, and RHD3, so that the read head RHD1 moves to a position relative to the track STRk, for example, so that the center of gravity RC1 of the read head RHD1 is located at the track center STC of the track STRk.

[0375] Next, the read processing unit 63 selects a first selected read head, which is read head RHD1, and a second selected read head, which is a read head closest to track STR(k+1) among read heads RHD2 and RHD3 according to the skew angle of read head RHD1. In the present embodiment, the second selected read head is read head RHD3.

[0376] The read processing unit 63 can simultaneously read the data of the segment SE of the track STRk and the data of the segment SE of the track STR(k+1) using the first and second selective read heads (read heads RHD1 and RHD3). The two segments SE read simultaneously are adjacent in the radial direction d1.

[0377] In the fourth embodiment constructed as described above, the same effect as the first embodiment can be obtained. According to the magnetic disk device 1 and the read processing method, the read processing unit 63 can select two read heads from the three read heads RHD1, RHD2 and RHD3 by controlling the drive of the selection circuit 3Ra. Since the two preamplifiers 3R1 and 3R2 can be used instead of three preamplifiers for reading processing, low power consumption can be achieved. In addition, the use of electronic components such as LSI (large scale integrated circuit) can be reduced, which can contribute to the reduction of manufacturing costs.

[0378] Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the purpose of the invention. These embodiments and their variations are included in the scope and purpose of the invention, and are included in the invention described in the claims and their equivalents.

[0379] For example, the case where two tracks STRk and STR(k+1) that are continuous in the radial direction d1 are written to, and the case where three tracks STRk, STR(k+1) and STR(k+2) that are continuous are written to, is described as an example, but the tracks that are written to may not be continuous in the radial direction d1. Figure 8 In the example, data is written to track STR(k+2) instead of to track STR(k+1). Fig. 27 In the example, data is written to the adjacent track STR(k+3) of the track STR(k+2) instead of writing data to the track STR(k+2).

[0380] The track STR of one of the two segments configuring the same sector SC and the track STR of the other segment configuring the same sector SC may be separated by 50 tracks in the radial direction d1. However, during the reading process, the data of one of the segments needs to be kept unchanged in the volatile memory 70. From the viewpoint of increasing the free capacity of the volatile memory 70, it is preferred that the multiple segments of the same sector SC are dispersed in multiple tracks STR that are continuous in the radial direction d1.

[0381] It is preferred that multiple segments of the same sector SC are adjacent and continuous in the radial direction d1. The segments that are adversely affected by squeezing can be paired with the segments that are not adversely affected by squeezing. Therefore, the data quality of the sector SC can be averaged. In addition, the occurrence of read errors can be reduced, so the frequency of ECC processing can be reduced.

[0382] The error correction unit 65 may not be provided outside the R / W channel 140. For example, the LDPC decoders 4R5a and 4R5b of the read channel 4R inside the R / W channel 140 may have the function of the error correction unit 65. In this case, the magnetic disk device 1 may be formed without the error correction unit 65.

[0383] The ECC process (track ECC process) using the parity bit may be performed inside the R / W channel 140 instead of outside the R / W channel 140 .

[0384] Fig.32 The read channel 4R shown is Fig.10 Compared with the read channel 4R shown in the first embodiment, the volatile memory 4R6a, the parity bit generator 4R7a, the volatile memory 4R6b, and the parity bit generator 4R7b are further provided.

[0385] The volatile memory 4R6a is connected between the LDPC decoder 4R5a and the HDC 150. The volatile memory 4R6a is a random access memory, which is an SRAM in this case. The parity bit generator 4R7a is connected to the volatile memory 4R6a. When an error in the data read from the track STRk by the read processing unit 63 is detected, the volatile memory 4R6a and the parity bit generator 4R7a can use the result of performing an XOR operation on a group of sectors without a read error in the sector ECC within the track STRk to restore the data of the sector in which the read error occurred.

[0386] The volatile memory 4R6b is connected between the LDPC decoder 4R5b and the HDC150. The volatile memory 4R6b is a random access memory, which is an SRAM in this case. The parity bit generator 4R7b is connected to the volatile memory 4R6b. When an error is detected in the data read from the track STR(k+1) by the read processing unit 63, the volatile memory 4R6b and the parity bit generator 4R7b can use the result of performing an XOR operation on a group of sectors without a read error in the sector ECC within the track STR(k+1) to restore the data of the sector in which the read error occurred.

[0387] The above-mentioned technique is not limited to a hybrid recording type magnetic disk device, but can also be applied to a shingle recording type magnetic disk device or a normal recording type magnetic disk device.

Claims

1. A magnetic disk device comprising: A disk having a plurality of data tracks including a first data track and a second data track in a recording layer; a write head for writing data to the recording layer of the disk; and a write processing unit capable of executing a write process for writing data to the recording layer, The write processing unit, executing a first write process of writing data to a first fragment constituting a part of a first data sector in the first data track, After the first write process is executed, a second write process is executed to write data to a first segment constituting a part of a second data sector in the first data track. After the second write process is executed, a third write process is executed to write data to a second fragment constituting a part of the first data sector in the second data track.

2. The magnetic disk device according to claim 1, The write head is used to write data to the first data track and to write data to the second data track, respectively.

3. The magnetic disk device according to claim 2, further comprising: an arm supporting the write head; and an actuator to move the arm, The write processing unit, driving the actuator to control a seek action of the write head, When executing the first write process, the write head is moved to a position opposite to the first data track by the seek operation. When executing the second write process, the write head is maintained in a state facing the first data track. When the third write process is executed, the write head is moved to a position facing the second data track by the seek operation.

4. The magnetic disk device according to claim 1, further comprising: A write channel having: a data processing unit for processing received data; and a first memory including a first storage area and a second storage area, into which data processed by the data processing unit is written; and The second memory is written with the data processed by the data processing unit. The write processing unit, After the data of the first fragment of the first data sector is written into the first storage area and the data of the second fragment of the first data sector is written into the second storage area, the first write process is performed, During a period from when the data is written into the second storage area until the third write process is performed, the data is held in the second storage area or the data is moved from the second storage area to the second memory.

5. The magnetic disk device according to claim 4, The first memory is a random access memory, The write processing unit, After the first write process is executed, the first storage area in the first memory is released, and overwriting to the first storage area is allowed. When the data is kept in the second storage area, overwriting to the second storage area is prohibited, When the data is moved from the second storage area to the second memory, overwriting to the second storage area is permitted.

6. The magnetic disk device according to claim 1, further comprising: A write channel having: a data processing unit for processing received data; and a first memory into which data processed by the data processing unit is written; and The second memory includes the first recording area and the second recording area, and the data processed by the data processing unit is written therein. The write processing unit, The first write process is performed after the data of the first fragment of the first data sector is written into the first recording area, the data of the second fragment of the first data sector is written into the second recording area, and then the data is moved from the first recording area to the first memory, The data is held in the second recording area during a period from when the data is written in the second recording area until the third writing process is performed.

7. The magnetic disk device according to claim 6, The second memory is a random access memory, The write processing unit, After the first write process is executed, the first recording area in the second memory is released, and overwriting of the first recording area is allowed. During the period from when the data is written in the second recording area until the third write process is executed, overwriting of the second recording area is prohibited.

8. The magnetic disk device according to claim 1, further comprising: A write channel having: a data processing unit for processing received data; and a first memory into which data processed by the data processing unit is written; and The second memory has a recording capacity capable of recording data of at least two data tracks among the plurality of data tracks, and is written with the data processed by the data processing unit. The write processing unit, causing the write channel to process data corresponding to the first data track and the second data track, writing data of the first data track and the second data track processed by the write channel into the second memory, After the data corresponding to the first data track and the second data track are stored in the second memory, a write process for writing the data to the first data track and the second data track is started.

9. The magnetic disk device according to claim 8, The write processing unit, After the data of the first data track and the second data track are stored in the second memory, the data of the first data track is moved from the second memory to the first memory, and a first sequential write process is performed to sequentially write the data of the first data track to a plurality of first segments of the first data track. The data of the first data track includes the data of the first fragment of the first data sector and the data of the first fragment of the second data sector. Each of the first fragments constitutes a portion of a corresponding one of a plurality of data sectors, Not all of the segments constituting the corresponding one data sector are allocated to the first data track.

10. The magnetic disk device according to claim 4, 6 or 8, The data processing unit performs a process of encoding the received data.

11. The magnetic disk device according to claim 9, The write processing unit, After moving the data of the first data track and the second data track from the second memory to the first memory, the first sequential write process is performed, and then the second sequential write process of sequentially writing the data of the second data track to a plurality of second segments of the second data track is performed, The data of the second data track includes the data of the second fragment of the first data sector and the data of the second fragment constituting a part of the second data sector. Each of the second fragments constitutes a portion of the corresponding data sector, Not all of the segments constituting the corresponding one data sector are allocated to the second data track.

12. The magnetic disk device according to claim 11, Each of the data sectors is divided into two parts: the first fragment and the second fragment.

13. The magnetic disk device according to claim 11, The write processing unit, When storing the data of the first data track in the second memory, the data of the first data track is stored in a plurality of areas in the second memory to which a plurality of first addresses are allocated, and the plurality of first addresses are sequentially connected. When storing the data of the second data track in the second memory, the data of the second data track is stored in a plurality of areas in the second memory to which a plurality of second addresses are allocated, and the plurality of second addresses are sequentially connected. When executing the first sequential write process, the plurality of first addresses are selected in the order of connection, the data of the selected first addresses are moved from the second memory to the first memory in sequence, and the data of the first data track is sequentially written into the plurality of first segments of the first data track in the order in which the data is moved from the second memory to the first memory. When executing the second sequential write processing, the multiple second addresses are selected in the order of connection, so that the data of the selected second addresses are moved from the second memory to the first memory in sequence, and the data of the second data track is written sequentially to the multiple second fragments of the second data track in the order of being moved from the second memory to the first memory.

14. The magnetic disk device according to claim 1, The invention also comprises a write channel, the write channel comprising: a data processing unit for processing received data; a parity bit generator for performing an XOR operation on the data processed by the data processing unit; and a first memory including a third storage area and a fourth storage area, into which the data processed by the data processing unit and the data XORed by the parity bit generator are written, The plurality of sectors allocated in a manner spanning the first data track and the second data track include: a plurality of data sectors that include the first data sector and the second data sector and belong to a group; and a parity bit sector that records parity bits for restoring data of the plurality of data sectors belonging to the group, each of the plurality of sectors being composed of a first segment and a second segment, The data processing unit processes data corresponding to the plurality of data sectors belonging to the group and writes the data to the first memory. The parity bit generating unit, performing an XOR operation on data of a plurality of first fragments belonging to the group among the data processed by the data processing unit, generating data of the first fragment of the parity bit sector and writing the generated data into the third storage area, An XOR operation is performed on data corresponding to a plurality of second fragments belonging to the group among the data processed by the data processing unit to generate data corresponding to the second fragment of the parity sector and write the generated data into the fourth storage area.

15. The magnetic disk device according to claim 14, When the parity generating unit generates data corresponding to the parity sector and writes the data to the first memory, after the data processing unit processes the data corresponding to the first data sector, the parity generating unit, performing an XOR operation on the data of the first fragment of the first data sector to generate a part of the data of the first fragment of the parity sector and writing the generated part into the third storage area, Next, an XOR operation is performed on the data of the second fragment of the first data sector to generate a part of the data of the second fragment of the parity sector and write it into the fourth storage area.

16. The magnetic disk device according to claim 14, In a case where the data of the second fragment amount of the parity bit sector is written to the first data track or the second data track before writing the data of all the second fragment amounts belonging to the group to at least one of the first data track and the second data track, the parity bit generation unit performs an XOR operation on the data of all the second fragment amounts belonging to the group in advance to complete the data of the second fragment amount of the parity bit sector.

17. The magnetic disk device according to claim 1, The plurality of data tracks further includes a third data track, The first data track and the second data track are arranged in a first data area in the recording layer. The third data track is provided in the second data area of ​​the recording layer, which is located at a position radially offset from the first data area. The third data sector is entirely allocated to the third data track.

18. A magnetic disk device comprising: A disk having a plurality of data tracks including a first data track and a second data track in a recording layer; A first pickup head, a second pickup head and a third pickup head respectively read data from the recording layer of the disk; An arm supporting the first to third reading heads; an actuator to move the arm; as well as a read processing unit capable of executing a read process of reading data from the recording layer, The first data track has a first segment constituting a portion of a first data sector, The second data track has a second segment which constitutes a part of the first data sector and is adjacent to the first segment in a radial direction. The reading processing unit, The actuator is driven to control a seek operation of the first pickup head to the third pickup head, so that the first pickup head moves to a position opposite to the first data track. selecting a first selected head and a second selected head, wherein the first selected head is the first head, and the second selected head is a head that is closest to the second data track among the second head and the third head according to the skew angle of the first head, The data of the first segment of the first data track and the data of the second segment of the second data track are read simultaneously by the first selective read head and the second selective read head.

19. The magnetic disk device according to claim 18, The method further comprises a read channel having a first two-dimensional FIR filter and a second two-dimensional FIR filter, The first two-dimensional FIR filter performs a first waveform equalization process for equalizing the waveform of the synthesized data in a manner that minimizes the error rate of the data written to the first data track, and outputs first waveform equalization data, wherein the synthesized data is data obtained by synthesizing a first read signal read by the first selective read head and a second read signal read by the second selective read head. The second two-dimensional FIR filter performs a second waveform equalization process for equalizing the waveform of the synthesized data so as to minimize an error rate of the data written to the second data track, and outputs second waveform equalized data.

20. The magnetic disk device according to claim 19, The read channel further includes a two-dimensional Viterbi decoder that outputs decoded data obtained by simultaneously decoding the first waveform equalized data and the second waveform equalized data.

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