A system and method for RDMA-based single qp scenario performance optimization

Abstract

This invention relates to the field of data transmission technology, specifically to a performance optimization system and method for single-QP scenarios based on RDMA. The system includes an electrically connected HCA network interface card (NIC) and a host. The HCA NIC internally includes an electrically connected DB_PROC module, a WQE_PROC module, and a PKT_ENG module. The WQE_PROC module contains a WQE_CACHE cache space. The DB_PROC module obtains the scheduling request for the target QP. The WQE_PROC module queries the WQE_CACHE cache space to check if the target work queue element WQE corresponding to the target QP exists. If it exists, it reads it from the WQE_CACHE cache space; otherwise, it reads it from the host. This invention reduces the latency of reading WQE from the host, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency.

Description

Technical Field

[0001] This invention relates to the field of data transmission technology, and specifically to a single-QP scenario performance optimization system and method based on RDMA. Background Technology

[0002] RDMA (Remote Direct Memory Access) technology aims to eliminate many latency steps in server-side data processing in traditional network transmission, enabling direct access to remote memory data and significantly improving data transmission efficiency.

[0003] In RDMA-based network architectures, the HCA (Host Channel Adaptor) network interface card (NIC) plays a crucial role. The HCA NIC contains multiple functional modules that work collaboratively. The host typically sends task requests to the DB_PROC (doorbell processing module), which is responsible for precisely scheduling the task requests to the WQE_PROC (WQE processing module). The WQE_PROC, based on the received task request, reads the WQE (Work Queue Element) from the host memory and performs in-depth processing before scheduling it to the PKT_ENG (packet sending engine). The PKT_ENG, based on the obtained descriptor and data address information, completes the data reading and packet assembly operations using the header information carried by the WQE, ultimately enabling data transmission. However, the RDMA protocol and the HCA NIC itself have specific operational limitations. On one hand, RDMA task request transmission strictly adheres to order-keeping requirements, meaning the packet transmission order must be exactly the same as the order of the sent WQEs. Therefore, within the same QP (Queue Pair), data processing can only be performed serially, making parallel WQE processing impossible and severely limiting data processing speed in single-QP scenarios. On the other hand, HCA network cards need to support the execution of multiple QP tasks simultaneously, and each QP shares the entire bandwidth resource. To avoid data transmission stagnation caused by a QP being unable to obtain sufficient bandwidth resources for an extended period, each QP must perform a QP switchover operation after sending a fixed amount of data.

[0004] In practical applications, this characteristic leads to a significant performance bottleneck. In multi-QP scenarios, multiple QPs can process tasks concurrently, fully utilizing the bandwidth resources of the HCA network card and exhibiting overall bandwidth-friendly characteristics. However, in single-QP scenarios, the bandwidth performance of the HCA network card is severely limited, with its performance entirely dependent on the bandwidth performance of that single QP. Furthermore, because the number of QPs executed by the HCA network card during operation is dynamically changing, it is difficult to accurately determine whether a single-QP or multi-QP scenario is in progress, making it impossible to implement specific optimization strategies for single-QP scenarios. Summary of the Invention

[0005] In view of this, the present invention provides a single-QP scenario performance optimization system and method based on RDMA to solve the problem of limited bandwidth performance in existing solutions under single-QP scenarios.

[0006] In a first aspect, the present invention provides a single QP scenario performance optimization system based on RDMA. The system includes an HCA network card and a host that are electrically connected. The HCA network card is connected to the host. The HCA network card includes an electrically connected DB_PROC module, a WQE_PROC module, and a PKT_ENG module. The WQE_PROC module is equipped with a WQE_CACHE cache space.

[0007] The DB_PROC module is used to obtain the scheduling request for the target QP issued by the host;

[0008] The WQE_PROC module is used to query the WQE_CACHE cache space to see if a target work queue element WQE corresponding to the target QP exists in the target QP's scheduling request; if the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the WQE_CACHE cache space; if the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory; and the read target work queue elements WQE are processed one by one.

[0009] The PKT_ENG module is used to generate data packets based on the processed target work queue element WQE, and send the data packets to the target device.

[0010] Secondly, the present invention provides a single-QP scenario performance optimization method based on RDMA, the method being applied to the HCA network interface card as described above, the method comprising:

[0011] Obtain the scheduling request for the target QP issued by the host;

[0012] Based on the scheduling request of the target QP, query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space;

[0013] If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the WQE_CACHE cache space.

[0014] If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory.

[0015] In an optional implementation, before obtaining the scheduling request for the target QP issued by the host, the method further includes:

[0016] When the processing task of the target QP is executed for the first time, the context information of the scheduling request of the target QP is parsed to obtain the WQE read address;

[0017] Based on the WQE read address, the initial work queue element WQE corresponding to the target QP is read from the host;

[0018] The initial work queue element WQE is processed one by one, and it is determined whether the amount of data sent by the target QP has reached the target threshold.

[0019] If the amount of data sent by the target QP reaches the target threshold, then it is determined whether there are any unprocessed remaining WQEs in the read initial work queue element WQE.

[0020] If there are any unprocessed remaining WQEs and the WQE_CACHE cache space is not occupied, the unprocessed remaining WQEs will be stored in the WQE_CACHE cache space for the next scheduling request of the target QP.

[0021] In an optional implementation, after the target work queue element WQE corresponding to the target QP has been read, the method further includes:

[0022] The target work queue element WQE is processed one by one, and it is determined whether the amount of data sent by the target QP has reached the target threshold.

[0023] If the amount of data sent by the target QP reaches the target threshold, then it is determined whether the WQE_CACHE cache space is free;

[0024] If the WQE_CACHE cache space is free, the remaining unprocessed WQEs in the read target work queue elements WQE are stored again in the WQE_CACHE cache space, in preparation for the next scheduling request of the target QP.

[0025] In an optional implementation, the method further includes:

[0026] If the amount of data sent by the target QP does not reach the target threshold, then the target work queue element WQE that has been read will continue to be processed one by one.

[0027] In an optional implementation, the method further includes:

[0028] If the WQE_CACHE cache space is not free, then the remaining unprocessed WQEs in the read target work queue element WQE are emptied.

[0029] In an optional implementation, the method further includes:

[0030] The processed target work queue element WQE is scheduled to the PKT_ENG module, so that the PKT_ENG module generates a data packet based on the processed target work queue element WQE and sends the data packet to the target device.

[0031] Activate the specified QP in the DB_PROC module to await a rescheduling request.

[0032] Thirdly, the present invention provides a computer device, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to implement a single QP scenario performance optimization method based on RDMA in the second aspect or any corresponding embodiment described above.

[0033] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions, which, when executed by a processor, implement a single QP scenario performance optimization method based on RDMA as described in the second aspect above or any corresponding embodiment.

[0034] Fifthly, the present invention provides a computer program product, including computer instructions, which are used to cause a computer to execute a single QP scenario performance optimization method based on RDMA as described in the second aspect or any of its corresponding embodiments.

[0035] The technical solution provided by this invention may include the following beneficial effects:

[0036] This invention integrates the DB_PROC, WQE_PROC, and PKT_ENG modules into the HCA network interface card (NIC) and sets up a WQE_CACHE cache space. This enables the system to respond more quickly to scheduling requests for target QPs issued by the host. When the target QP's corresponding target work queue element (WQE) exists in the WQE_CACHE cache space, the system can read it directly from the cache, avoiding the latency of reading from the host memory and thus improving processing efficiency. By introducing the WQE_CACHE caching mechanism within the WQE_PROC module, this invention reduces the latency of reading WQEs from the host, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency. This is beneficial for applications requiring low latency and high throughput. This optimization scheme is not only applicable to single-QP scenarios but also adaptable to multi-QP scenarios. It does not require differentiation between single-QP and multi-QP scenarios; the WQE_CACHE caching mechanism can automatically adapt and optimize performance. By reducing the WQE read latency in the core mechanisms of data transmission and operation, the overall network transmission latency is reduced. Furthermore, in a single QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling, the more cached items are in WQE_CACHE, the more QP scheduling times can be supported, and the better the performance optimization effect. Attached Figure Description

[0037] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the internal structure of an HCA network card according to an embodiment of the present invention;

[0039] Figure 2 This is a schematic diagram of the internal processing flow of the WQE_PROC module according to an embodiment of the present invention;

[0040] Figure 3 This is a schematic diagram of the structure of a single QP scenario performance optimization system based on RDMA according to an embodiment of the present invention;

[0041] Figure 4 This is a flowchart illustrating a single QP scenario performance optimization method based on RDMA according to an embodiment of the present invention.

[0042] Figure 5 This is a flowchart illustrating another single-QP scenario performance optimization method based on RDMA according to an embodiment of the present invention.

[0043] Figure 6 This is a flowchart illustrating another single-QP scenario performance optimization method based on RDMA according to an embodiment of the present invention.

[0044] Figure 7 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] It should be noted that some key terms used in this invention will be explained first:

[0047] HCA (Host Channel Adapter): An HCA is a type of network interface card (NIC) that plays a crucial connecting role in a computer network architecture. Its main function is to establish a high-speed data transmission channel between the host system and the network, and to handle data exchange between the host and external network devices (such as other servers, storage devices, etc.).

[0048] RDMA (Remote Direct Memory Access): RDMA technology was developed to address the latency issues in server-side data processing during network transmission. In distributed storage systems, applying RDMA technology enables faster data transfer between storage nodes, improving overall system performance and response speed.

[0049] QP (Queue Pair): In the InfiniBand communication architecture, the QP is the core logical entity. It consists of a Send Queue and a Receive Queue, which work together to manage the sending and receiving of data. The Send Queue stores the data to be sent and its associated operation instructions, and sends the data out in a specific order; the Receive Queue receives incoming data and processes it according to predefined rules.

[0050] WQE: WQE (Work Queue Element) is a data structure used to define operations within an InfiniBand work queue, such as data sending, receiving, and atomic operations. It is the core mechanism for InfiniBand to implement data transmission and operations.

[0051] DB_PROC Module (Doorbell Processing Module): The DB_PROC module is primarily responsible for processing task requests issued by the host, receiving various operation instructions from the host, and allocating tasks to the corresponding modules for processing based on these instructions. When the host has data transmission needs, it sends a request to the DB_PROC module, which then schedules it to the WQE_PROC module, triggering subsequent data processing.

[0052] The WQE_PROC module (WQE processing module) is a crucial part of the entire data processing flow. Based on the task request received from the DB_PROC module, it reads the WQE from the host memory and parses and processes it. After processing, it schedules the processing results or data requiring further transmission to the PKT_ENG module for packet encapsulation and transmission.

[0053] PKT_ENG module (packet sending engine): The main responsibility of the PKT_ENG module is to assemble data and WQE-carried packet information into packets based on the received descriptor and data address information, and then send them over the network.

[0054] WQE_CACHE (On-chip WQE Cache): The WQE_CACHE is an on-chip cache area used to store excess WQE reads from the host. When the system is processing data for a QP, if there are remaining WQEs read from the host and the WQE_CACHE is not occupied, these excess WQEs will be stored in the WQE_CACHE. Thus, when the next QP schedules a WQE read operation, if the corresponding WQE is in the WQE_CACHE, it can be read directly from the cache, greatly reducing the latency of reading WQEs from the host and thus improving the overall system performance.

[0055] Bandwidth: In digital devices, bandwidth refers to the amount of data that can pass through a link per unit time. It is usually expressed in bps, which is the number of bits that can be transmitted per second.

[0056] Please see Figure 1The diagram shows the internal structure of the HCA network card. In the relevant scheme, the host CPU sends a task request to the DB_PROC module, which then schedules the task request to the WQE_PROC module. The WQE_PROC module, based on the received task request, reads the WQE from the host memory, processes it, and then schedules it to the PKT_ENG module. The PKT_ENG module, based on the received descriptor and data address information, reads the data and the packet header information carried by the WQE, assembles the packet, and sends it to the target device. Please refer to [link to relevant documentation]. Figure 2 The diagram illustrates the internal processing flow of the WQE_PROC module. Upon receiving a QP request, it parses the context to obtain the WQE read address, reads a fixed number of WQEs and caches them locally, processes each WQE one by one, and checks the data volume to determine if the sent data volume reaches 64KB. If not, it returns to the step of reading each WQE for processing and continues processing the next WQE. If yes, it continues to the next step. Afterwards, excess WQEs are cleared and scheduled to be sent to the PKT_ENG module, activating the QP in the DB_PROC module, and waiting for rescheduling. However, due to the specific operating characteristics of the RDMA protocol and the HCA network card itself, in multi-QP scenarios, concurrent processing between QPs is bandwidth-friendly for the HCA network card; in single-QP scenarios, the bandwidth performance of the HCA network card is limited, completely dependent on the bandwidth performance of this single QP. Furthermore, the number of QPs currently being executed by the HCA network card is dynamically changing and cannot be accurately determined, therefore, separate processing for single-QP scenarios is not possible.

[0057] To support flexible NIC cascading configurations, HCA NICs must meet the 400Gbps specification requirement in scenarios with high WQE read latency (2000ns). In a single QP scenario, the processing time for one QP operation is: internal processing latency + WQE read wait time = 2100ns (internal processing latency is calculated as 100ns), and the bandwidth is: 64*1024*8 / 2100ns = 250G. It is evident that existing solutions cannot meet the bandwidth requirements.

[0058] Analysis reveals that the biggest factor limiting bandwidth in a single-QP scenario is the latency of reading WQE from the host. Therefore, this invention reduces this latency to improve bandwidth. This invention introduces a WQE_CACHE caching mechanism within the WQE_PROC module, reducing the latency of reading WQE from the host, thereby improving bandwidth performance in a single-QP scenario and enhancing data processing efficiency. This is beneficial for applications requiring low latency and high throughput. This optimization scheme is not only applicable to single-QP scenarios but also adaptable to multi-QP scenarios. It does not require differentiation between single-QP and multi-QP scenarios; the WQE_CACHE caching mechanism automatically adapts and optimizes performance. By reducing the WQE read latency in the core mechanisms of data transmission and operation, the overall network transmission latency is reduced. Furthermore, in a single-QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling operation. The more cached items in the WQE_CACHE, the more QP scheduling operations can be supported, resulting in better performance optimization.

[0059] Figure 3 This is a schematic diagram of the structure of a single-QP scenario performance optimization system based on RDMA according to an embodiment of the present invention, as shown below. Figure 3 As shown, the system includes an HCA network card electrically connected to the host. The HCA network card is connected to the host and internally includes an electrically connected DB_PROC module, a WQE_PROC module, and a PKT_ENG module. The WQE_PROC module has a WQE_CACHE cache space.

[0060] The DB_PROC module is used to obtain the scheduling request for the target QP issued by the host;

[0061] The WQE_PROC module is used to query the WQE_CACHE cache space to see if a target work queue element WQE corresponding to the target QP exists based on the scheduling request of the target QP. If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, it is read from the WQE_CACHE cache space. If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, it is read from the host's memory. The read target work queue elements WQE are then processed one by one.

[0062] The PKT_ENG module is used to generate data packets based on the processed target work queue element WQE and send the data packets to the target device.

[0063] Furthermore, this embodiment caches the extra WQEs needed within the WQE_PROC module using a WQE_CACHE cache space. The next QP scheduling will directly read from the local cache, reducing read latency. When the WQE_CACHE cache space is not occupied, the extra WQEs are cached there. This caching mechanism does not need to distinguish between single-QP scenarios; the WQE_CACHE cache space can reduce WQE read latency and improve bandwidth performance.

[0064] In summary, this embodiment integrates the DB_PROC, WQE_PROC, and PKT_ENG modules into the HCA network interface card and sets up a WQE_CACHE cache space, enabling the system to respond more quickly to scheduling requests for target QPs issued by the host. When the target QP's corresponding target work queue element WQE exists in the WQE_CACHE cache space, the system can directly read it from the cache, avoiding the latency of reading from the host memory and thus improving processing efficiency. This embodiment reduces the latency of reading WQE from the host by introducing a WQE_CACHE caching mechanism within the WQE_PROC module, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency, which is beneficial for application scenarios requiring low latency and high throughput. This optimization scheme is not only applicable to single-QP scenarios but also adaptable to multi-QP scenarios. It does not require differentiation between single-QP scenarios; the WQE_CACHE caching mechanism can automatically adapt and optimize performance. By reducing the WQE read latency in the core mechanisms of data transmission and operation, the overall network transmission latency is reduced. Furthermore, in a single QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling, the more cached items are in WQE_CACHE, the more QP scheduling times can be supported, and the better the performance optimization effect.

[0065] According to an embodiment of the present invention, a performance optimization method for a single QP scenario based on RDMA is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0066] This embodiment provides a single-QP scenario performance optimization method based on RDMA, which is applied to... Figure 3 The HCA network card in a single-QP scenario performance optimization system based on RDMA is shown. The HCA network card is connected to the host and internally includes electrically connected DB_PROC, WQE_PROC, and PKT_ENG modules. The WQE_PROC module contains a WQE_CACHE cache space. Figure 4 This is a flowchart illustrating a single-QP scenario performance optimization method based on RDMA according to an embodiment of the present invention, as shown below. Figure 4 As shown, the process includes the following steps:

[0067] Step S401: Obtain the scheduling request of the target QP issued by the host.

[0068] Furthermore, step S401 is the starting step of the entire performance optimization method. When the host needs to perform data transmission or processing tasks, it sends a scheduling request for the target QP (queue pair) to the DB_PROC module in the HCA network card. This scheduling request is a trigger signal indicating that the host wants to perform the corresponding data operation, such as sending or receiving data, through the target QP. Step S401 is not the first execution of the processing task of the target QP; it can be any execution of the processing task of the target QP other than the first one, such as the second, third, ..., Nth time, etc.

[0069] Step S402: Based on the scheduling request of the target QP, query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space.

[0070] Furthermore, upon receiving a scheduling request, this embodiment searches the WQE_CACHE cache space within the WQE_PROC module based on the target QP information to see if the target work queue element (WQE) associated with that target QP is already stored. A WQE is a work queue element that contains a detailed description of data operations, such as send and receive operation information. Prioritizing a search in the cache space during optimization reduces latency from reading from host memory and improves performance. Since reading data from the cache is typically much faster than reading from host memory, this embodiment first attempts to search the WQE_CACHE cache space, hoping to quickly find the required WQE and thus improve overall performance.

[0071] Step S403: If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then read the target work queue element WQE corresponding to the target QP from the WQE_CACHE cache space.

[0072] Furthermore, if it is found in step S402 that the WQE corresponding to the target QP is indeed stored in the WQE_CACHE cache space, then the WQE is directly read from the WQE_CACHE cache space to avoid the overhead of accessing host memory and speed up data processing. Since reading data from the WQE_CACHE cache space is relatively faster, subsequent data operation processes can be entered more quickly. Therefore, this embodiment reduces the time required to read data from host memory and improves data processing efficiency.

[0073] Step S404: If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory.

[0074] Furthermore, if the WQE corresponding to the target QP cannot be found in the WQE_CACHE cache space, it indicates that there was no cached previously or the cache has expired. In this case, the required WQE needs to be retrieved from the host's memory. The host memory stores the raw data and operation information required by the system. Although the read speed is relatively slow, it can ensure that the required data is obtained to guarantee that subsequent data operations can proceed normally.

[0075] In summary, this embodiment integrates the DB_PROC, WQE_PROC, and PKT_ENG modules into the HCA network interface card and sets up a WQE_CACHE cache space, enabling the system to respond more quickly to scheduling requests for target QPs issued by the host. When the target QP's corresponding target work queue element WQE exists in the WQE_CACHE cache space, the system can directly read it from the cache, avoiding the latency of reading from the host memory and thus improving processing efficiency. This embodiment reduces the latency of reading WQE from the host by introducing a WQE_CACHE caching mechanism within the WQE_PROC module, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency, which is beneficial for application scenarios requiring low latency and high throughput. This optimization scheme is not only applicable to single-QP scenarios but also adaptable to multi-QP scenarios. It does not require differentiation between single-QP scenarios; the WQE_CACHE caching mechanism can automatically adapt and optimize performance. By reducing the WQE read latency in the core mechanisms of data transmission and operation, the overall network transmission latency is reduced. Furthermore, in a single QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling, the more cached items are in WQE_CACHE, the more QP scheduling times can be supported, and the better the performance optimization effect.

[0076] This embodiment provides another performance optimization method for a single QP scenario based on RDMA, which is applied to... Figure 3The HCA network card in a single-QP scenario performance optimization system based on RDMA is shown. The HCA network card is connected to the host and internally includes electrically connected DB_PROC, WQE_PROC, and PKT_ENG modules. The WQE_PROC module contains a WQE_CACHE cache space. Figure 5 This is a flowchart illustrating another RDMA-based single-QP scenario performance optimization method according to an embodiment of the present invention, as shown below. Figure 5 As shown, the process includes the following steps:

[0077] Step S501: When the processing task of the target QP is executed for the first time, the context information of the scheduling request of the target QP is parsed to obtain the WQE read address; the initial work queue element WQE read is processed one by one, and it is determined whether the amount of data sent by the target QP has reached the target threshold.

[0078] Furthermore, when processing the target QP's task for the first time, the system reads the required initial work queue element (WQE) from the host. At this point, the system needs to parse the context information of the target QP's scheduling request to obtain the WQE read address, and then read the required initial work queue element (WQE) from the host based on this address. Afterwards, each read initial work queue element (WQE) is processed individually, and it is determined whether the amount of data sent by the target QP has reached a target threshold; this target threshold can be 64KB, meaning the amount of data sent by the target QP reaches 64KB.

[0079] Step S502: If the amount of data sent by the target QP reaches the target threshold, it is determined whether there are any unprocessed remaining WQEs in the read initial work queue element WQE; if there are unprocessed remaining WQEs and the WQE_CACHE cache space is not occupied, the unprocessed remaining WQEs are stored in the WQE_CACHE cache space for the next scheduling request from the target QP.

[0080] Furthermore, this step aims to check if there are any unprocessed portions of the WQEs read from the host. Since the system may read multiple WQEs for subsequent operations based on certain policies or rules, there may be some remaining after processing a portion of the WQEs. If unprocessed remaining WQEs are found, and there is free space in the WQE_CACHE cache, these unprocessed remaining WQEs are stored in the cache. This is done to improve performance, as subsequent processing of the same target QP may require these WQEs, and retrieving them from the cache is faster than reading them from host memory.

[0081] Step S503: Obtain the scheduling request for the target QP issued by the host. For details, please refer to [link to relevant documentation]. Figure 4 Step S401 of the illustrated embodiment will not be described again here.

[0082] Step S504: Based on the scheduling request of the target QP, query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space.

[0083] In one optional implementation, step S504 includes:

[0084] Parse the context information of the target QP's scheduling request to obtain the WQE read address;

[0085] Based on the WQE read address, query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space.

[0086] For further details, please see Figure 6 The diagram illustrates another performance optimization method for a single QP scenario based on RDMA. In this embodiment, after receiving a subsequent scheduling request for the target QP, the system checks whether the corresponding WQE is stored in the WQE_CACHE cache space based on the target QP information. This step is crucial for performance optimization, as it determines whether the cache can be used to quickly retrieve the WQE. This embodiment obtains the WQE read address by parsing the context information of the scheduling request, and then searches for the corresponding WQE in the cache based on that address, improving the accuracy and efficiency of the search.

[0087] Step S505: If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then read the target work queue element WQE corresponding to the target QP from the WQE_CACHE cache space.

[0088] Furthermore, if the WQE corresponding to the target QP is found in the WQE_CACHE cache space, it is read directly from the cache, avoiding the latency of reading from host memory and improving operation speed. This embodiment allows for rapid retrieval of the required WQE from the cache, accelerating the entire data processing flow, especially in high-concurrency or latency-sensitive scenarios, significantly improving performance.

[0089] Step S506: If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory.

[0090] Furthermore, when the WQE_CACHE cache space is not hit, this embodiment retrieves the required WQE from the host memory. Although reading from host memory is relatively slow, it ensures that the correct data information is obtained, thus guaranteeing the normal operation of subsequent operations.

[0091] Step S507: Process each of the read target work queue elements WQE one by one, and determine whether the amount of data sent by the target QP has reached the target threshold; if the amount of data sent by the target QP has reached the target threshold, determine whether the WQE_CACHE cache space is free.

[0092] In one alternative implementation, if the amount of data sent by the target QP does not reach the target threshold, the target work queue element WQE that has been read is processed one by one.

[0093] Furthermore, this embodiment first processes the read WQE, which may include data transmission, reception, or other operations. Simultaneously, during processing, the amount of data transmitted by the target QP is continuously counted and compared with a set target threshold. When the target threshold is reached, it is necessary to consider whether there is space to store the excess WQE in the cache. Setting a target threshold is to determine when to perform caching operations to optimize system performance. Reaching this target threshold indicates that a certain amount of data has been processed, at which point it can be considered whether to cache the remaining WQE. This target threshold can be 64KB, meaning the amount of data transmitted by the target QP reaches 64KB.

[0094] Step S508: If the WQE_CACHE cache space is free, the remaining unprocessed WQEs in the read target work queue element WQE are stored back into the WQE_CACHE cache space for the next scheduling request of the target QP. If the WQE_CACHE cache space is not free, the remaining unprocessed WQEs in the read target work queue element WQE are emptied.

[0095] Furthermore, when the target threshold is reached and there is free space in WQE_CACHE, this embodiment stores unprocessed WQEs in the cache for later use. If there is no free space, these unprocessed WQEs are discarded to avoid resource waste or impact on subsequent operations. This embodiment performs different processing based on the cache space situation to ensure effective utilization of cache space and optimization of system performance, while avoiding performance degradation due to insufficient cache space.

[0096] In one optional implementation, the processed target work queue element WQE is scheduled to the PKT_ENG module, so that the PKT_ENG module generates a data packet based on the processed target work queue element WQE and sends the data packet to the target device; the specified QP in the DB_PROC module is activated to wait for a rescheduling request.

[0097] Furthermore, after completing the WQE processing, this embodiment hands the processing result over to the PKT_ENG module. The PKT_ENG module generates data packets conforming to the network protocol based on the processed WQE information and sends them out. Simultaneously, the specified QP in the DB_PROC module is activated to await the next scheduling, thus enabling continuous data processing and transmission operations. This step is crucial in connecting data processing and network transmission, ensuring data is correctly sent and preparing for the next task.

[0098] The following simple examples illustrate the content disclosed in the above embodiments:

[0099] This example performs a performance analysis on a work queue element (WQE) with a message size of 4KB, comparing the performance difference before and after using the WQE_CACHE cache in a single QP (queue pair) scenario.

[0100] I. Analysis before optimization:

[0101] Read latency and scheduling duration: 32 WQEs (each WQE message is 4KB) are read from the host, with a read latency of 2000ns. The duration of one scheduling session consists of the internal processing latency (100ns) and the latency of reading WQEs from the host (2000ns), i.e., scheduling duration = 100ns + 2000ns = 2100ns.

[0102] Bandwidth calculation: The amount of data processed in one scheduling operation is 64KB (because 64 / 4 = 16 WQEs are processed, and each WQE is 4KB). According to the bandwidth calculation formula (bandwidth = data volume / time), the WQE bandwidth before optimization is approximately 64KB / 2100ns ≈ 249Gbps.

[0103] II. Post-Optimization Analysis:

[0104] Read latency and scheduling duration: First scheduling: 32 WQEs are read from the host, with a read latency of 2000ns. After processing 16 WQEs, the remaining 16 WQEs are written to the WQE_CACHE cache space.

[0105] Second scheduling: Switch the WQE source to the WQE_CACHE cache space. The WQE read latency is 2clk (negligible). At this time, the scheduling duration is mainly determined by the internal processing latency, that is, the duration of two QP scheduling = 2 * internal processing latency (100ns) + 2000ns = 2200ns.

[0106] Bandwidth calculation: The total amount of data processed in the two scheduling sessions is 128KB (64KB in the first session and 64KB in the second session), so the optimized bandwidth = 128KB / 2200ns ≈ 476Gbps.

[0107] The comparison shows that the optimized bandwidth increased from 249Gbps ​​to 476Gbps, resulting in a significant performance improvement. This is primarily due to the utilization of the WQE_CACHE cache space, which reduces the latency of reading WQEs from the host. Especially during the second scheduling, the latency of reading WQEs from the cache is almost negligible, thus greatly improving overall bandwidth performance. In a single QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling. Therefore, with the same read volume, more WQEs are available to be stored in the WQE_CACHE cache space. This allows for more QP scheduling sessions to read WQEs from the cache, further enhancing the performance optimization.

[0108] In summary, this embodiment integrates the DB_PROC, WQE_PROC, and PKT_ENG modules into the HCA network interface card and sets up a WQE_CACHE cache space, enabling the system to respond more quickly to scheduling requests for target QPs issued by the host. When the target QP's corresponding target work queue element WQE exists in the WQE_CACHE cache space, the system can directly read it from the cache, avoiding the latency of reading from the host memory and thus improving processing efficiency. This embodiment reduces the latency of reading WQE from the host by introducing a WQE_CACHE caching mechanism within the WQE_PROC module, thereby improving bandwidth performance in single-QP scenarios and enhancing data processing efficiency, which is beneficial for application scenarios requiring low latency and high throughput. This optimization scheme is not only applicable to single-QP scenarios but also adaptable to multi-QP scenarios. It does not require differentiation between single-QP scenarios; the WQE_CACHE caching mechanism can automatically adapt and optimize performance. By reducing the WQE read latency in the core mechanisms of data transmission and operation, the overall network transmission latency is reduced. Furthermore, in a single QP scenario, the larger the WQE message, the fewer WQEs are consumed in a single scheduling, the more cached items are in WQE_CACHE, the more QP scheduling times can be supported, and the better the performance optimization effect.

[0109] This invention also provides a computer device; please refer to [link / reference]. Figure 7 , Figure 7 This is a schematic diagram of a computer device according to an optional embodiment of the present invention. The computer device includes one or more processors 10, a memory 20, and interfaces for connecting the various components, including high-speed interfaces and low-speed interfaces. The various components are interconnected via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 7 Take a processor 10 as an example.

[0110] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0111] The memory 20 stores instructions executable by at least one processor 10 to cause at least one processor 10 to perform the method shown in the above embodiments.

[0112] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0113] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0114] The computer device also includes a communication interface 30 for communicating with other devices or communication networks.

[0115] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0116] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0117] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and all such modifications and variations fall within the defined scope.

Claims

1. A single-QP scenario performance optimization system based on RDMA, characterized in that, The system includes an HCA network card and a host that are electrically connected. The HCA network card includes a DB_PROC module, a WQE_PROC module and a PKT_ENG module that are electrically connected. The WQE_PROC module is equipped with a WQE_CACHE cache space. The DB_PROC module is used to obtain the scheduling request for the target QP issued by the host; The WQE_PROC module is used to query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space based on the scheduling request of the target QP. If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the WQE_CACHE cache space. If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory; and the read target work queue element WQE is processed one by one. The PKT_ENG module is used to generate data packets based on the processed target work queue element WQE, and send the data packets to the target device.

2. A performance optimization method for a single QP scenario based on RDMA, characterized in that, The method is applied to the HCA network card according to claim 1, and the method includes: Obtain the scheduling request for the target QP issued by the host; Based on the scheduling request of the target QP, query whether the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space; If the target work queue element WQE corresponding to the target QP exists in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the WQE_CACHE cache space. If the target work queue element WQE corresponding to the target QP does not exist in the WQE_CACHE cache space, then the target work queue element WQE corresponding to the target QP is read from the host's memory.

3. The method according to claim 2, characterized in that, Before obtaining the scheduling request for the target QP issued by the host, the method further includes: When the processing task of the target QP is executed for the first time, the context information of the scheduling request of the target QP is parsed to obtain the WQE read address; Based on the WQE read address, the initial work queue element WQE corresponding to the target QP is read from the host; The initial work queue element WQE is processed one by one, and it is determined whether the amount of data sent by the target QP has reached the target threshold. If the amount of data sent by the target QP reaches the target threshold, then it is determined whether there are any unprocessed remaining WQEs in the read initial work queue element WQE. If there are any unprocessed remaining WQEs and the WQE_CACHE cache space is not occupied, the unprocessed remaining WQEs will be stored in the WQE_CACHE cache space for the next scheduling request of the target QP.

4. The method according to claim 3, characterized in that, After the target work queue element WQE corresponding to the target QP is read, the method further includes: The target work queue element WQE is processed one by one, and it is determined whether the amount of data sent by the target QP has reached the target threshold. If the amount of data sent by the target QP reaches the target threshold, then it is determined whether the WQE_CACHE cache space is free; If the WQE_CACHE cache space is free, the remaining unprocessed WQEs in the read target work queue elements WQE are stored again in the WQE_CACHE cache space, in preparation for the next scheduling request of the target QP.

5. The method according to claim 4, characterized in that, The method further includes: If the amount of data sent by the target QP does not reach the target threshold, then the target work queue element WQE that has been read will continue to be processed one by one.

6. The method according to claim 4, characterized in that, The method further includes: If the WQE_CACHE cache space is not free, then the remaining unprocessed WQEs in the read target work queue element WQE are emptied.

7. The method according to claim 4, characterized in that, The method further includes: The processed target work queue element WQE is scheduled to the PKT_ENG module, so that the PKT_ENG module generates a data packet based on the processed target work queue element WQE and sends the data packet to the target device. Activate the specified QP in the DB_PROC module to await a rescheduling request.

8. A computer device, characterized in that, include: The system includes a memory and a processor, which are interconnected. The memory stores computer instructions, and the processor executes the computer instructions to implement the single-QP scenario performance optimization method based on RDMA as described in any one of claims 2 to 7.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions, which, when executed by a processor, implement the single-QP scenario performance optimization method based on RDMA according to any one of claims 2 to 7.

10. A computer program product, characterized in that, Includes computer instructions for causing a computer to execute a single QP scenario performance optimization method based on RDMA, as described in any one of claims 2 to 7.

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