Relay delay turn-off circuit and relay control method

Abstract

The invention discloses a relay delay turn-off circuit and a relay control method. The relay delay turn-off circuit comprises a power supply control chip, a micro-control chip, a delay module and a relay driving module. The power supply control chip outputs a first safety signal, the micro-control chip outputs a second safety signal and a control group signal, and the delay module receives the first safety signal, the second safety signal and the control group signal and outputs a first enable signal, a second enable signal and a safety state signal; when the micro-control chip is reset, the first enable signal delays the turn-off action of the relay driving module to preset time and then executes the turn-off action, and the preset time is longer than the reset time of the micro-control chip; and the power supply control chip and the micro-control chip output a first safety signal and a second safety signal according to respective safety states, so that the safety of the delay turn-off circuit of the relay is improved through double safety state judgment.

Description

Technical Field

[0001] The present application relates to the field of relays, and in particular to a relay delayed shutdown circuit and a relay control method. Background Art

[0002] In new energy vehicles, the on-board battery is the main power source. Directly using the on-board battery to power the load may cause the battery to overcharge or over-discharge, resulting in the burning of the load. In order to avoid such situations, a relay is needed to connect the on-board battery and the load equipment, and the battery management system (Battery Management System, BMS) is used to monitor the battery cells in real time. The input circuit of the relay is controlled according to the real-time status of the battery cells, thereby realizing the on-off management of the high-voltage circuit of the on-board battery, and at the same time realizing the isolation of the high-voltage circuit and the low-voltage circuit.

[0003] With the development of new energy vehicle technology, the load scenarios of vehicle batteries are becoming more and more complex. When the BMS is affected by the external environment, cosmic rays, strong electromagnetic interference, or when there is an internal fault in the controller, it is necessary to continue the reset operation. At this time, the relay is controlled to disconnect, the vehicle loses power and stalls. Therefore, it is necessary to delay the shutdown action of the relay for a certain period of time when resetting the BMS.

[0004] At present, the relay delayed shutdown circuit in the prior art only meets the ISO-16750 requirement for BMS anti-interference capability, and the delay may not meet the time required for resetting the actual BMS core control chip. In addition, the relay delayed shutdown circuit in the prior art has a single structure, and only manages the on-off of the relay through a single control chip enable signal, without feedback and logic anti-false triggering functions. Therefore, a new relay delayed shutdown circuit is urgently needed. Summary of the invention

[0005] Embodiments of the present application provide a relay delayed shutdown circuit and a relay control method to improve the control logic of the relay delayed shutdown circuit.

[0006] In order to solve the above technical problems, the embodiments of the present application disclose the following technical solutions:

[0007] On the one hand, a relay delay shutdown circuit is provided, comprising: a power control chip, a microcontroller chip, a delay module, and a relay drive module; the power control chip outputs a first safety signal; the microcontroller chip outputs a second safety signal and a control group signal; the delay module receives the first safety signal, the second safety signal and the control group signal, and outputs a first enable signal, a second enable signal and a safety state signal according to the first safety signal, the second safety signal and the control group signal; the relay drive module receives the first enable signal, the second enable signal and the safety state signal and drives the relay according to the effective state of the first enable signal, the second enable signal and the safety state signal; wherein, when the microcontroller chip is reset, the delay module delays the shutdown action of the relay drive module to a preset time through the first enable signal, and the preset time is greater than the reset time of the microcontroller chip; when the power control chip fails or is abnormal, the first safety signal is reset to zero, and the delay module outputs the first enable signal reset to zero according to the first safety signal reset to zero; when the microcontroller chip fails or is abnormal, the second safety signal is reset to zero, and the delay module outputs the safety state signal reset to zero according to the second safety signal reset to zero.

[0008] Furthermore, the control group signal includes a first control signal, a second control signal and a third control signal; when the power control chip and the microcontroller chip perform abnormal reset, the delay module outputs a second enable signal according to the first control signal, and outputs a first enable signal according to the first safety signal, the second control signal and the third control signal.

[0009] Furthermore, the first safety signal, the second safety signal, the first control signal and the third control signal are all set to a default valid state through a pull-up resistor.

[0010] Furthermore, the power control chip also receives the second safety signal, and outputs a first safety signal according to the second safety signal, so as to reset the first safety signal to zero when the microcontroller chip fails.

[0011] Furthermore, the delay module also outputs a feedback signal according to the first enable signal; the microcontroller chip receives the feedback signal and outputs a second safety signal according to the feedback signal; when the delay module fails or is abnormal, the microcontroller chip resets the second safety signal to zero.

[0012] Furthermore, the delay module includes a delay circuit unit; the delay circuit unit receives the first safety signal, the second control signal and the third control signal, and outputs a first enable signal; when the first safety signal, the second control signal and the third control signal are all in a valid state (the specification needs to be explained), the delay circuit unit controls the first enable signal to remain valid within the preset time.

[0013] Furthermore, the delay circuit unit at least includes an excitation source, a first switch, a second switch, a delay capacitor, a delay resistor, a comparator, a first voltage-dividing resistor and a second voltage-dividing resistor; the first switch is coupled between the excitation source and the second switch, and is controlled by the third control signal to control the on-off between the excitation source and the second switch; the second switch has a first end, a second end and a controlled end, wherein the first end is coupled to the first switch, the second end is coupled to the positive input end of the comparator, and the controlled end receives the first safety signal and the second control signal, so that the second switch is controlled by the first safety signal and the second control signal; after the delay capacitor is connected in parallel with the delay resistor, one end is coupled to the second end of the second switch, and the other end is grounded; the inverting input end of the comparator is coupled between the first voltage-dividing resistor and the second voltage-dividing resistor, the other end of the first voltage-dividing resistor is coupled to the first end of the second switch, and the other end of the second voltage-dividing resistor is grounded.

[0014] Furthermore, the delay circuit unit also includes a diode and a discharge resistor, the positive end of the diode is coupled to the second end of the second switch, the negative end is coupled to the first end of the second switch, one end of the discharge resistor is coupled to the first end of the second switch, and the other end is grounded.

[0015] In another aspect, a relay control method is provided, comprising:

[0016] S1: Power on to start the relay delay shutdown circuit, the power control chip and the microcontroller chip run the fault self-check program, and determine the effective state of the first safety signal and the second safety signal according to their respective fault states; S2: If the first safety signal is in a failed state and / or the second safety signal is in a failed state, execute S3, if the first safety signal and the second safety signal are both in a valid state, execute S4; S3: The delay module resets the first enable signal to zero according to the failure state of the first safety signal, and / or resets the safety state signal to zero according to the failure state of the second safety signal, and controls the relay drive module to turn off the relay; S4: The delay module outputs a valid safety state signal according to the effective state of the second safety state, and outputs the first enable signal and the second enable signal of the valid state according to the control group signal, or outputs the second enable signal of the valid state and the first enable signal of the valid state for a preset time according to the control group signal.

[0017] Furthermore, in the above method, S1 further includes:

[0018] S1.1: If the microcontrol chip fails, execute S1.2; if the microcontrol chip is not faulty, execute S1.3; S1.2: The microcontrol chip outputs a second safety signal in a failed state, and the power control chip outputs a first safety signal in a failed state after receiving the second safety signal in the failed state; S1.3: If the power control chip fails, execute S1.4; if the power control chip is not faulty, execute S1.5; S1.4: The microcontrol chip outputs a second safety signal in a valid state, and the power control chip outputs a first safety signal in an invalid state; S1.5: The microcontrol chip outputs a second safety signal in a valid state, and the power control chip outputs a first safety signal in a valid state after receiving the second safety signal in a valid state.

[0019] Furthermore, the above method also includes:

[0020] S5: If the delay circuit unit in the delay module is abnormal, execute step S3; if the delay circuit unit in the delay module is normal, execute step S4.

[0021] The above technical solutions have at least the following advantages or beneficial effects:

[0022] The relay delayed shutdown circuit and the relay delayed shutdown method utilize two control chips and two safety signals in the vehicle-mounted BMS to improve the control logic of the delay module, output two safety signals through the self-test functions of the power control chip and the microcontroller chip, and enhance the ability of the relay delayed shutdown circuit to cope with single-point failures of the circuit.

[0023] In the above technical solution, the delay module also has the ability to output feedback signals, providing the relay delayed shutdown circuit with a delay module self-check function to prevent the relay delayed shutdown function from being mistakenly triggered and hindering the normal high-voltage circuit on-off management; the power control chip also receives the second safety signal output by the microcontroller chip, and outputs the first safety signal according to the second safety signal, thereby enhancing the monitoring capability of the safety status of the microcontroller chip and further improving the safety of the relay delayed shutdown circuit; the delay circuit unit also has a fast discharge function. If the relay needs to be normally controlled to shut down after resetting, the delay circuit unit can quickly reduce the delay time and improve the response speed of the vehicle-mounted BMS to control instructions. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0025] Figure 1 It is a module block diagram of the relay delayed shutdown circuit of the first embodiment;

[0026] Figure 2 It is a module block diagram of the relay delay shutdown circuit of the second embodiment;

[0027] Figure 3 This is a schematic diagram of the control chip output signal of Example 3;

[0028] Figure 4 This is a schematic diagram of the delay module circuit of Example 3;

[0029] Figure 5 This is a schematic diagram of a relay drive module circuit of Embodiment 3;

[0030] Figure 6 is a flow chart of the relay control method;

[0031] Figure 7 is a further flow chart of the relay control method;

[0032] Figure 8 The flowchart of the relay control method with delayed feedback is shown in FIG. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and beneficial effects of this application clearer, the following further describes this application in detail in conjunction with the accompanying drawings and specific implementation methods. It should be understood that the specific implementation methods described in this specification are only for explaining the present invention, and are not intended to limit this application.

[0034] In the description of the present application, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first" and "second" may include one or more of the features, either explicitly or implicitly. In the description of the present application, the meaning of "multiple" refers to two or more, unless otherwise clearly and specifically defined. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0035] In the description of the present application, it should be noted that, unless otherwise clearly specified and limited, the term "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two. The term "coupling" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, a direct connection, or an indirect connection through an intermediate medium or an intermediate element, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0036] In a first aspect, a specific embodiment of the present application provides a relay delayed shutdown circuit.

[0037] Figure 1 FIG. 1 is a block diagram of a relay delay shutdown circuit according to Embodiment 1. Figure 1As shown, the relay delayed shutdown circuit includes a power control chip 1, a microcontroller chip 2, a delay module 3, and a relay drive module 4; the OUT port of the power control chip 1 outputs a first safety signal; the OUT1 port of the microcontroller chip 2 outputs a second safety signal, and the OUT2 port outputs a control group signal; the delay module 3 receives the first safety signal, the second safety signal, and the control group signal, and outputs a first enable signal EN1, a second enable signal EN2, and a safety status signal according to the first safety signal, the second safety signal, and the control group signal; the relay drive module 4 receives the first enable signal EN1, the second enable signal EN2, and the safety status signal, and drives the relay according to the effective states of the first enable signal EN1, the second enable signal EN2, and the safety status signal.

[0038] In the embodiment of the present application, the effective state of various signals is set to a logic high state, that is, by setting the output signal to 1, it is indicated that the signal enable is effective or that the chip or module is in a safe normal state. If the output signal is set to zero, it is indicated that the signal enable is invalid or that the chip or module is in an unsafe fault state. In the above-mentioned relay delay shutdown circuit, the effective state of the first enable signal EN1 indicates that the delay module 4 enables the relay drive module 4 to close the relay, and the effective state of the second enable signal EN2 indicates that the microcontroller chip 2 enables the relay drive module 4 to close the relay, and the safety state signal indicates that the microcontroller chip 2 is in a normal working state.

[0039] In a vehicle-mounted BMS, when the control chip is disturbed by the external environment or an abnormal fault occurs, the output signals of all chip communication ports may be abnormal, and a reset program needs to be run inside the chip. If the relay is controlled only by a single signal of a control chip, it may be immediately shut down during the chip reset process. In the relay delayed shutdown circuit of the above-mentioned embodiment 1, the first safety signal output by the power chip 1 and the control group signal output by the microcontroller chip 2 jointly control the delay module 3, and the shutdown action of the relay drive module 4 is delayed to a preset time, and the preset time is greater than the reset time of the microcontroller chip 2. During the resetting process of the microcontroller chip 2, the relay will not be immediately shut down due to abnormal interference or short-term abnormal faults, thereby ensuring driving safety; and in the present embodiment, the power control chip 1 has a power-on fault self-checking function, that is, when the system is powered on and started, a fault self-checking program is first run inside the chip to prevent the vehicle relay from closing and running when there is a latent fault in the control chip. After the fault self-checking program is run, the power control chip 1 resets the first safety signal to zero according to the fault state, and the delay module 3 outputs a zeroed first enable signal EN1 according to the zeroed first safety signal to prevent the relay from starting when the power control chip 1 fails; the microcontroller chip 2 also has a power-on fault self-checking function, and resets the second safety signal to zero according to the fault state, and the delay module 3 outputs a zeroed safety state signal according to the zeroed second safety signal to prevent the relay from starting when the microcontroller chip 2 fails; therefore, vehicle safety can be guaranteed by the two safety signals of the two control chips during the power-on startup stage.

[0040] Figure 2 FIG. 2 is a block diagram of a relay delay shutdown circuit according to Embodiment 2. Figure 2 As shown, the power control chip 1 also receives the second safety signal through its own IN port, and outputs the first safety signal according to the second safety signal. When the microcontroller chip 2 fails, the second safety signal is reset to zero, and the power control chip 1 resets the first safety signal according to the reset second safety signal; the delay module 3 also outputs a feedback signal to the IN port of the microcontroller chip 2. When the delay module 3 fails or is abnormal, the microcontroller chip 2 resets the second safety signal according to the feedback signal, thereby controlling the delay module 3 to output a reset safety state signal. In this embodiment, a priority logic relationship is set between the first safety signal and the second safety signal. When the microcontroller chip fails or is abnormal, even if the power control chip is in a normal working state, the first safety signal still needs to be set to an invalid state to turn off the relay to prevent the control instructions output by the microcontroller chip from being disordered. At the same time, the feedback signal given by the delay module can also monitor in real time whether the delay function is normal.

[0041] Figure 3 This is a schematic diagram of the control chip output signal of Example 3. Figure 2 As shown, in this embodiment, the control group signal output by the OUT2 port of the microcontroller chip 2 includes a first control signal, a second control signal, and a third control signal. The power control chip 1 outputs a first safety signal and receives a second safety signal, and the first safety signal is coupled to the resistor R0 and pulled up to a set 1 state to set the default state to a valid state.

[0042] Figure 4 FIG. 1 is a schematic diagram of a delay module circuit of Embodiment 3. Figure 3 and Figure 4 When the power control chip 1 and the microcontroller chip 2 are reset, the delay module 3 outputs the second enable signal EN2 according to the first control signal, outputs the first enable signal EN1 according to the first safety signal, the second control signal and the third control signal, outputs the safety state signal according to the second safety signal, and outputs the feedback signal according to the first enable signal EN1. Among them, the third control signal is coupled to the resistor R2, and the pull-up setting default state is the set 1 state; the second safety signal is coupled to the resistor R5, and the pull-up setting default state is the set 1 state; the first control signal is coupled to the resistor R4 and the capacitor C2 for filtering and noise reduction, so as to improve the stability and reliability of the first control signal.

[0043] Figure 5 FIG. 1 is a schematic diagram of a relay drive module circuit of Embodiment 3. Figure 5 As shown, the relay coil is coupled between the power DC power supply and the negative electrode of the battery BAT-, and the on-off of the high-voltage circuit of the relay coil is controlled by the switch tube, and the driving signal representing the enable conduction is determined by the effective state of the first enable signal EN1, the second enable signal EN2 and the safety state signal. In this embodiment, Figure 5 As shown, the first enable signal EN1, the second enable signal EN2 and the safety state signal implement the above-mentioned enable conduction driving logic through a three-AND gate &2.

[0044] In the above embodiment 3, the valid state of the first control signal indicates that the microcontroller chip 2 enables the second enable signal to be in a valid state, and the valid states of the second control signal and the third control signal indicate that the delayed shutdown function of the delay module 3 is enabled.

[0045] In the third embodiment, the delay module 3 includes a delay circuit unit 31, which receives the first safety signal, the second control signal and the third control signal, and outputs a first enable signal EN1. When the first safety signal, the second control signal and the third control signal are all in a valid state, that is, they are all set to 1, the first enable signal EN1 output by the delay circuit unit 31 remains in a valid state, and when the first safety signal fails, the delay circuit unit 31 controls the first enable signal EN1 to remain valid within a preset time.

[0046] The delay circuit unit 31 at least includes an excitation source, a first switch, a second switch, a delay capacitor, a delay resistor, a comparator, a first voltage-dividing resistor and a second voltage-dividing resistor. The first switch is coupled between the excitation source and the second switch, and is controlled by the third control signal to control the on-off between the excitation source and the second switch; the second switch has a first end, a second end and a controlled end, wherein the first end is coupled to the first switch, the second end is coupled to the non-inverting input end of the comparator, and the controlled end receives the first safety signal and the second control signal, so that the second switch is controlled by the first safety signal and the second control signal; after the delay capacitor is connected in parallel with the delay resistor, one end is coupled to the second end of the second switch, and the other end is grounded; the inverting input end of the comparator is coupled between the first voltage-dividing resistor and the second voltage-dividing resistor, the other end of the first voltage-dividing resistor is coupled to the first end of the second switch, and the other end of the second voltage-dividing resistor is grounded.

[0047] Furthermore, the delay circuit unit 31 also includes a diode and a discharge resistor, the positive end of the diode is coupled to the second end of the second switch, the negative end is coupled to the first end of the second switch, one end of the discharge resistor is coupled to the first end of the second switch, and the other end is grounded.

[0048] A feasible implementation of the delay circuit unit 31 can refer to Figure 4The specific structure of the delay circuit unit 31. The first switch is a transistor Q1, the second switch is a MOS transistor Q2, the excitation source is a current source V_IC connected to the collector of the transistor Q1, the delay capacitor is C4, the delay resistor is R7, the first voltage-dividing resistor is R8, and the second voltage-dividing resistor is R9; the third control signal is connected to the base of the transistor Q1 to control the on-off of the transistor Q1, and since the third control signal is pulled up by the resistor R2, the transistor Q1 is turned on by default; the drain of the MOS transistor Q2, i.e., the first end of the second switch, is coupled to the emitter of the transistor Q1, the source of the MOS transistor Q2, i.e., the second end of the second switch, is coupled to the non-inverting input end of the comparator through the current-limiting resistor R10, the gate of the MOS transistor Q2 is the controlled end of the second switch, and after the first safety signal and the second control signal pass through the AND gate &1, they first pass through the filter circuit composed of the resistor R6 and the capacitor C3, and then are transmitted to the gate of the MOS transistor Q2. The voltage of the drain of the MOS tube Q2 is marked as a VKEEP signal. After the VKEEP signal is divided by resistors R8 and R9, it provides a reference voltage to the inverting input terminal of the comparator. The output signal of the comparator is a first enable signal EN1. When the voltage of the positive input terminal is greater than the voltage of the reverse input terminal, the first enable signal EN1 is set to 1. When the voltage of the positive input terminal is less than the voltage of the reverse input terminal, the first enable signal EN1 is set to zero. The output terminal of the comparator is also coupled to one end of the resistor R1. The other end of the resistor R1 outputs a feedback signal and is coupled to the ground capacitor C1. A diode D1 is also provided between the drain and source of the MOS tube Q2. The positive terminal of the diode D1 is connected to the source, and the negative terminal is connected to the drain. The discharge resistor is a resistor R3.

[0049] In the application scenario of the vehicle relay, when the microcontroller chip 2 fails to power on, the second safety signal is reset to zero, the safety status signal is set to a failure state, the three AND gates &2 output a zero signal, and the relay coil is turned off.

[0050] When the microcontroller chip 2 is in normal working state and the power control chip 1 fails or is abnormal, the first safety signal is reset to zero and is in an invalid state, and the signal output by the AND gate &1 is also reset to zero, and the MOS tube Q2 is controlled to be turned off. At this time, since the transistor Q1 is turned on by default, the excitation source V_IC is output to the drain of the MOS tube, the VKEEP signal maintains a high potential, and the source voltage of the MOS tube Q2 is reduced, so that the comparator outputs a zero signal, that is, the first enable signal EN1 is reset to zero, and the relay is turned off.

[0051] When the power control chip 1 and the microcontroller chip 2 are both in normal working state, the first safety signal and the second safety signal are both in valid state, and the microcontroller chip 2 outputs the first control signal to control the second enable signal EN2, that is, the relay is controlled by the driver's operation instruction through the microcontroller chip 2, outputs the second control signal to control the conduction and shutdown of the MOS tube Q2, and outputs the third control signal to control the on-off between the excitation source V_IC and the drain of the MOS tube. When the second control signal and the third control signal are both in the valid state, the corresponding operation instruction is to close the relay, the transistor Q1 is turned on, the excitation source V_IC is output to the drain of the MOS tube Q2, the VKEEP signal maintains a high potential, and the delay function of the delay circuit unit 31 operates normally. At this time, if a reset event occurs in the microcontroller 2 or the power control chip 1, the abnormal sleep instruction inside the power control chip 1 will cause the first safety signal to be reset to zero, or the microcontroller chip 2 outputs an abnormal second safety signal to reset the first safety signal to zero, thereby controlling the MOS tube Q2 to be turned off, the capacitor C4 discharges the resistor R7, and the voltage of the source of the MOS tube Q2 slowly decreases, so that the voltage at the non-phase input terminal of the comparator can be higher than the voltage at the inverting input terminal within the preset time, that is, the first enable signal EN1 can remain in the valid state within the preset time. The preset time can be adjusted according to the parameter selection of the capacitor C4 and the resistor R7. Generally, the preset time is set to be greater than or equal to 2 seconds, or set to be greater than the reset time of the microcontroller chip 2. In this embodiment, since the reference voltage of the comparator is set according to the voltage division setting of the VKEEP signal, the voltages of the non-phase input terminal and the inverting input terminal are related to the same excitation source V_IC. When the excitation source V_IC is offset, the reference voltage will also be offset, ensuring that the delay circuit unit 31 will not cause a delay time offset due to voltage offset, thereby enhancing the safety and reliability of the system.

[0052] When the microcontroller chip 2 is still working normally after the reset, in order to improve the operation response speed as soon as possible, the microcontroller chip 2 can also pull down the second control signal and the third control signal to zero, so that the transistor Q1 and the MOS tube Q2 are turned off. At this time, the capacitor C4 is quickly discharged through the diode D1 and the resistor R3, and the voltage across the resistor R10 is immediately reduced to the reference voltage of the comparator, and the comparator output is zero. Even if the first enable signal EN1 is quickly reset to zero, the relay shutdown speed is improved.

[0053] When the delay circuit unit 31 fails, the voltage value or voltage duration of the feedback signal may be abnormal. Since the microcontroller chip 2 also receives the feedback signal and sets the second safety signal to zero according to the abnormality of the feedback signal, it prevents the delay circuit unit 31 from having latent faults and affecting normal driving safety.

[0054] The specific implementation of the present application provides a relay control method in a second aspect.

[0055] Figure 6 This is a flow chart of the relay control method. Figure 6 As shown, the method starts at step S1 and ends at step S3 or step S4. The step S1 is to start the relay delay shutdown circuit when powered on, the power control chip 1 and the microcontroller chip 2 run the fault self-check program, and determine the effective state of the first safety signal and the second safety signal according to their respective fault states; after step S1, step S2 is executed, and the step S2 is a judgment step. If the first safety signal is in a failed state and / or the second safety signal is in a failed state, S3 is executed; if the first safety signal and the second safety signal are both in a valid state, S4 is executed; step S3 is that the delay module 3 resets the first enable signal EN1 to zero according to the failed state of the first safety signal, and / or resets the safety state signal to zero according to the failed state of the second safety signal, and controls the relay drive module to turn off the relay; S4 is that the delay module 3 outputs a valid safety state signal according to the effective state of the second safety state, and outputs the first enable signal EN1 and the second enable signal EN2 of the effective state according to the control group signal, or outputs the second enable signal EN2 of the effective state and the first enable signal EN1 of the effective state for a preset time according to the control group signal, that is, closes the relay or delays the shutdown of the relay.

[0056] Figure 7 It is a further flow chart of the relay control method. Figure 7 As shown, the method starts from step S1, and passes through steps S1.1-S1.5, and ends at step S3 or step S4. Among them, step S1.1 is a judgment step, and if the microcontroller chip 2 fails, step S1.2 is executed, and if the microcontroller chip 2 is not faulty, step S1.3 is executed; step S1.2 is that the microcontroller chip 2 outputs a second safety signal of a failure state, and the power control chip 1 outputs a first safety signal of a failure state after receiving the second safety signal of the failure state; step S1.3 is a judgment step, if the power control chip 1 fails, step S1.4 is executed, and if the power control chip 1 is not faulty, step S1.5 is executed; step S1.4 is that the microcontroller chip 2 outputs a second safety signal of a valid state, and the power control chip 1 outputs a first safety signal of an invalid state; S1.5 is that the microcontroller chip outputs a second safety signal of a valid state, and the power control chip outputs a first safety signal of a valid state after receiving the second safety signal of a valid state. After step S1.4 is completed, step S3 is executed and the process ends. After step 1.5 is completed, step S4 is executed and the process ends.

[0057] Figure 8 FIG. 1 is a flow chart of a relay control method with delayed feedback. Figure 8 As shown, the method starts at step S1, and ends at step S3 or step S5 after steps S1.1-S1.5. Wherein, step S5 is to execute step S3 if the delay circuit unit 31 in the delay module 3 is abnormal, and to execute step S4 if the delay circuit unit 31 in the delay module 3 is normal.

[0058] The introduction provided in the above steps is only used to help understand the method, structure and core idea of ​​the present invention. For ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also belong to the scope of protection of the claims of the present invention.

Claims

1. A relay delay shutdown circuit, characterized in that: include: Power control chip, microcontroller chip, delay module, relay driver module; The power control chip outputs a first safety signal; The microcontroller chip outputs a second safety signal and a control group signal; The delay module receives a first safety signal, a second safety signal and a control group signal, and outputs a first enable signal, a second enable signal and a safety status signal according to the first safety signal, the second safety signal and the control group signal; The relay driving module receives the first enable signal, the second enable signal and the safety state signal and drives the relay according to the valid states of the first enable signal, the second enable signal and the safety state signal; Wherein, when the microcontroller chip is reset, the delay module delays the shut-down action of the relay driver module to a preset time through the first enable signal, and the preset time is greater than the reset time of the microcontroller chip; When the power control chip fails or is abnormal, the first safety signal is reset to zero, and the delay module outputs a first enable signal reset to zero according to the first safety signal reset to zero; When the microcontroller chip fails or is abnormal, the second safety signal is reset to zero, and the delay module outputs a zeroed safety state signal according to the reset second safety signal.

2. The relay delay shutdown circuit according to claim 1, characterized in that: The control group signal includes a first control signal, a second control signal and a third control signal; The delay module outputs a safety state signal according to the second safety signal, outputs a second enable signal according to the first control signal, and outputs a first enable signal according to the first safety signal, the second control signal, and the third control signal.

3. The relay delay shutdown circuit according to claim 2, characterized in that: The first safety signal, the second safety signal, the first control signal and the third control signal are all set to a default valid state through a pull-up resistor.

4. The relay delay shutdown circuit according to claim 1, characterized in that: The power control chip also receives the second safety signal and outputs a first safety signal according to the second safety signal, so as to reset the first safety signal to zero when the microcontroller chip fails.

5. The relay delay shutdown circuit according to claim 1, characterized in that: The delay module also outputs a feedback signal according to the first enable signal; The microcontroller chip receives the feedback signal and outputs a second safety signal according to the feedback signal; When the delay module fails or is abnormal, the microcontroller chip resets the second safety signal to zero.

6. The relay delay shutdown circuit according to claim 2, characterized in that: The delay module 3 includes a delay circuit unit 31; The delay circuit unit receives the first safety signal, the second control signal and the third control signal, and outputs a first enable signal; When the first safety signal fails, the first enable signal remains valid within the preset time.

7. The relay delay shutdown circuit according to claim 6, characterized in that: The delay circuit unit at least includes an excitation source, a first switch, a second switch, a delay capacitor, a delay resistor, a comparator, a first voltage-dividing resistor and a second voltage-dividing resistor; The first switch is coupled between the excitation source and the second switch, and is controlled by the third control signal to control the on-off between the excitation source and the second switch; The second switch has a first end, a second end and a controlled end, wherein the first end is coupled to the first switch, the second end is coupled to the non-inverting input end of the comparator, and the controlled end receives the first safety signal and the second control signal, so that the second switch is controlled by the first safety signal and the second control signal; After the delay capacitor and the delay resistor are connected in parallel, one end of the delay capacitor is coupled to the second end of the second switch, and one end of the delay capacitor is grounded; The inverting input terminal of the comparator is coupled between the first voltage-dividing resistor and the second voltage-dividing resistor, the other end of the first voltage-dividing resistor is coupled to the first end of the second switch, and the other end of the second voltage-dividing resistor is grounded.

8. The relay delay shutdown circuit according to claim 7, characterized in that: The delay circuit unit also includes a diode and a discharge resistor, wherein the positive terminal of the diode is coupled to the second end of the second switch, and the negative terminal is coupled to the first end of the second switch, and one end of the discharge resistor is coupled to the first end of the second switch, and the other end is grounded.

9. A relay control method, characterized in that: include: S1: When the relay delay shutdown circuit is started after power-on, the power control chip and the microcontroller chip run the fault self-checking program, and determine the effective state of the first safety signal and the second safety signal according to their respective fault states; S2: if the first safety signal is in a failed state and / or the second safety signal is in a failed state, execute S3; if the first safety signal and the second safety signal are both in a valid state, execute S4; S3: the delay module resets the first enable signal to zero according to the failure state of the first safety signal, and / or resets the safety state signal to zero according to the failure state of the second safety signal, and controls the relay drive module to turn off the relay; S4: The delay module outputs a valid safety state signal according to the valid state of the second safety state, and outputs a first enable signal and a second enable signal of a valid state according to the control group signal, or outputs a second enable signal of a valid state and a first enable signal of a valid state that lasts for a preset time according to the control group signal.

10. The relay control method according to claim 9, characterized in that: The S1 further comprises: S1.1: If the microcontroller chip fails, execute S1.2; if the microcontroller chip does not fail, execute S1.3; S1.2: the microcontroller chip outputs a second safety signal of a failure state, and the power control chip outputs a first safety signal of a failure state after receiving the second safety signal of the failure state; S1.3: If the power control chip fails, execute S1.4; if the power control chip does not fail, execute S1.5; S1.4: the microcontroller chip outputs a second safety signal in a valid state, and the power control chip outputs a first safety signal in an invalid state; S1.5: The microcontroller chip outputs a second safety signal in a valid state, and the power control chip outputs a first safety signal in a valid state after receiving the second safety signal in a valid state.

11. The relay control method according to claim 9 or 10, characterized in that: Also includes: S5: If the delay circuit unit in the delay module is abnormal, execute step S3; if the delay circuit unit in the delay module is normal, execute step S4.

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