Power output circuit and power supply system

CN119628366AActive Publication Date: 2025-03-14SHENZHEN POWEROAK NEWENER CO LTD
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Patent Information

Application Number
CN202411551889.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-01
Publication Date
2025-03-14
Estimated Expiration
2044-11-01

AI Technical Summary

Technical Problem

Traditional three-phase electrical circuits that extract single-phase electrical cannot provide stable single-phase voltage in the case of phase imbalance or phase loss, resulting in unstable output voltage or the equipment cannot work properly, and may even damage sensitive electrical equipment and reduce system reliability.

Method used

A power output circuit is designed, including a first phase output circuit, a second phase output circuit, a third phase output circuit and a corresponding interlock bus. Through the transmission of interlock signals, it is ensured that only one phase output circuit transmits the target phase power at any given time, avoiding interference from other phase output circuits in case of phase loss or abnormality.

Benefits of technology

When phase is lost or an abnormality occurs in a certain phase, the power output circuit can suppress the corresponding phase power supply output of other phase output circuits, ensure stable transmission of the target phase power supply, and improve the stability of the single-phase electrical output.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a power output circuit and a power supply system, the power output circuit comprises a first phase output circuit, a second phase output circuit, a third phase output circuit, a first interlocking bus, a second interlocking bus and a third interlocking bus, the target phase output circuit responds to the input of a target phase power supply, and the third phase output circuit responds to the output of the target phase power supply. Transmitting the target phase power supply and generating an interlocking signal, and transmitting the interlocking signal to other phase output circuits through an interlocking bus electrically connected with the target phase output circuit, so that the other phase output circuits respond to the interlocking signal and enter a stop working state. Moreover, the interlocking signal generation time of each phase output circuit is different, it can be ensured that only one interlocking signal is generated each time, and then it is ensured that only one phase output circuit transmits the target phase power supply. Therefore, when the phase is lost or a certain phase is abnormal, the target phase output circuit can restrain other phase output circuits from outputting the corresponding phase power supply, the target phase power supply is stably transmitted, and the stability of single-phase power output is improved.
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Description

Technical Field

[0001] The present application relates to the field of single-phase power output, and in particular to a power output circuit and a power supply system. Background Art

[0002] In modern power systems, three-phase power is widely used in industrial and commercial environments to transmit high power. However, many devices and applications require single-phase power, so extracting stable single-phase power from three-phase power has become a key technology.

[0003] Traditional circuits for extracting single-phase electricity from three-phase electricity usually use a direct connection method to obtain single-phase voltage. However, when phase imbalance occurs in the power system, especially in the case of phase loss (i.e. "phase loss"), traditional circuit designs often cannot provide stable single-phase voltage, resulting in unstable output voltage or equipment failure to work properly. In severe cases, it may even damage sensitive electrical equipment and reduce system reliability. Summary of the invention

[0004] The embodiments of the present application aim to provide a power output circuit and a power supply system, which can improve the stability of single-phase power output.

[0005] To solve the above technical problems, the present application provides the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a power supply output circuit, including a first phase output circuit, a second phase output circuit, a third phase output circuit, a first interlocking bus, a second interlocking bus, and a third interlocking bus, wherein the output end of the first phase output circuit is electrically connected to the control end of the second phase output circuit based on the first interlocking bus, and is also electrically connected to the control end of the third phase output circuit based on the second interlocking bus; the output end of the second phase output circuit is electrically connected to the control end of the third phase output circuit based on the third interlocking bus;

[0007] The target phase output circuit responds to the input of the target phase power supply, transmits the target phase power supply and generates an interlock signal, and the interlock signal is transmitted to other phase output circuits through an interlock bus electrically connected to the target phase output circuit, so that the other phase output circuits respond to the interlock signal and enter a stop working state;

[0008] Among them, the target phase output circuit is the phase output circuit that generates the interlock signal the fastest among the phase output circuits corresponding to the phase power supply without abnormalities, and the time for the first phase output circuit to generate the interlock signal is less than the time for the second phase output circuit to generate the interlock signal, and the time for the second phase output circuit to generate the interlock signal is less than the time for the third phase output circuit to generate the interlock signal.

[0009] In some embodiments, the target phase output circuit includes a rectifying unit, a delay unit, a triggering unit, and a switch unit;

[0010] The first end of the rectifier unit is electrically connected to the first end of the delay unit, the second end of the rectifier unit is electrically connected to the second end of the delay unit and the trigger unit, and the output end of the trigger unit is also electrically connected to the control end of the switch unit and the corresponding interlock bus.

[0011] The rectifying unit performs step-down rectification on the target phase power supply to output a target DC voltage, the triggering unit generates and outputs the interlocking signal in response to an input of the target DC voltage, and the switch unit enters a conducting state in response to an input of the interlocking signal to transmit the target phase power supply;

[0012] The delay unit is used to control the time when the rectifier unit outputs the target DC voltage to control the generation time of the interlocking signal, wherein the time when the rectifier unit of the first phase outputs the DC voltage is less than the time when the rectifier unit of the second phase outputs the DC voltage, and the time when the rectifier unit of the second phase outputs the DC voltage is less than the time when the rectifier unit of the third phase outputs the DC voltage.

[0013] In some embodiments, the rectifier unit includes a transformer, a rectifier bridge and a capacitor;

[0014] The primary winding of the transformer is used to connect to the target phase power supply, the secondary winding of the transformer is electrically connected to the input end of the rectifier bridge, and the output end of the rectifier bridge is electrically connected to the capacitor;

[0015] The transformer is used to step down the target phase power supply and output a target AC voltage. The rectifier bridge is used to rectify the target AC voltage and output a rectified DC voltage to charge the capacitor so that the capacitor outputs the target DC voltage.

[0016] In some embodiments, the delay unit includes a current limiting resistor, wherein the current limiting resistor is connected in series between the output end of the rectifier bridge and the capacitor, and the resistance of the current limiting resistor of the first phase is smaller than the resistance of the current limiting resistor of the second phase, and the resistance of the current limiting resistor of the second phase is smaller than the resistance of the current limiting resistor of the third phase.

[0017] In some embodiments, the trigger unit includes a voltage dividing unit and a signal generating unit;

[0018] The voltage dividing unit is electrically connected to the second end of the rectifying unit and the control end of the signal generating unit respectively, and the output end of the signal generating unit is also electrically connected to the control end of the switch unit and the corresponding interlocking bus;

[0019] The voltage dividing unit generates a voltage dividing signal in response to an input of the target DC voltage, and the signal generating unit generates and outputs the interlock signal in response to an input of the voltage dividing signal.

[0020] In some embodiments, the voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor, and the signal generating unit includes a three-terminal adjustable voltage regulator;

[0021] The first voltage-dividing resistor and the second voltage-dividing resistor are connected in series between the second end of the rectifier unit and the ground, the common connection end of the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to the control end of the three-terminal adjustable voltage regulator, the anode of the three-terminal adjustable voltage regulator is grounded, and the cathode of the three-terminal adjustable voltage regulator is electrically connected to the control end of the switch unit and the corresponding interlocking bus respectively.

[0022] In some embodiments, the switch unit includes an optocoupler and a triac;

[0023] The anode of the diode of the optocoupler is used to access the target DC voltage, the cathode of the diode of the optocoupler is used to access the interlock signal, the output end of the optocoupler is electrically connected to the gate of the triac, the first anode of the triac is used to access the target phase power supply, and the second anode of the triac is used to output the target phase power supply.

[0024] In some embodiments, the target phase output circuit further includes an indication unit, the indication unit is electrically connected to the second end of the rectifying unit, and the indication unit emits light in response to input of the target DC voltage.

[0025] In some embodiments, the indicating unit includes a light emitting diode, an anode of the light emitting diode is electrically connected to the second end of the rectifying unit, and a cathode of the light emitting diode is connected to the power supply end of the switching unit.

[0026] In a second aspect, an embodiment of the present application provides a power supply system, including a three-phase power supply, a load, and a power output circuit as described above;

[0027] The first phase output circuit is connected between the first phase alternating current and the load, the second phase output circuit is connected between the second phase alternating current and the load, and the third phase output circuit is connected between the three-phase power supply and the load;

[0028] The power output circuit is used to transmit the target phase power to supply power to the load.

[0029] In various embodiments of the present application, the power output circuit includes a first phase output circuit, a second phase output circuit, a third phase output circuit, a first interlock bus, a second interlock bus and a third interlock bus, and the phase output circuit that generates the fastest interlock signal in the phase output circuit without abnormality is determined as the target phase output circuit, and the target phase output circuit responds to the input of the target phase power supply, transmits the target phase power supply and generates an interlock signal, and the interlock signal is transmitted to other phase output circuits through the interlock bus electrically connected to the target phase output circuit, so that other phase output circuits respond to the interlock signal and enter a stop working state. In addition, the time when the first phase output circuit generates an interlock signal is less than the time when the second phase output circuit generates an interlock signal, and the time when the second phase output circuit generates an interlock signal is less than the time when the third phase output circuit generates an interlock signal, and the time when each phase output circuit generates an interlock signal is different, which can ensure that only one interlock signal is generated each time, and then ensure that only one phase output circuit transmits the target phase power supply. Therefore, when the phase is lost or an abnormality occurs in a phase, the target phase output circuit can suppress the output of the corresponding phase power supply of other phase output circuits, and stably transmit the target phase power supply, thereby improving the stability of the single-phase electrical output. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0031] Figure 1 is a structural schematic diagram of a power supply system provided in an embodiment of the present application;

[0032] Figure 2 is a structural schematic diagram of a power output circuit provided in an embodiment of the present application;

[0033] Figure 3 is a structural schematic diagram of a target phase output circuit provided in an embodiment of the present application;

[0034] Figure 4 is a circuit structure diagram of a target phase circuit provided in an embodiment of the present application;

[0035] Figure 5 is a circuit structure diagram of a first phase output circuit provided in an embodiment of the present application;

[0036] Figure 6 It is a circuit structure schematic diagram of a power output circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0038] See also Figure 1 , Figure 1 is a schematic diagram of a power supply system provided in an embodiment of the present application, such as Figure 1 As shown, the power supply system includes a three-phase power supply 200, a load 300 and a power output circuit 100. The power output circuit 100 includes a first phase output circuit 10, a second phase output circuit 20 and a third phase output circuit 30.

[0039] The three-phase power supply 200 includes a first phase power supply 201, a second phase power supply 202 and a third phase power supply 203. The three-phase power supply 200 is widely used in industrial and commercial environments, such as motor drives, power transmission, control systems and power plants. The three-phase power supply 200 can provide high-power electrical energy and provide reliable power supply for the load 300.

[0040] However, many devices and applications require single-phase power, for example, in homes, offices, and small commercial locations that only require lower power, only single-phase AC power is needed to power the load 300. Therefore, the corresponding single-phase AC power can be extracted through the phase output circuit to power the load 300.

[0041] Specifically, the first phase output circuit 10 is connected between the first phase power supply 201 and the load 300, the second phase output circuit 20 is electrically connected between the second phase power supply 202 and the load 300, and the third phase output circuit 30 is connected between the third phase power supply 203 and the load 300. When single-phase power supply is required, the single-phase AC power is transmitted to the corresponding phase power supply through the corresponding phase output circuit. For example, if the first phase power supply 201 supplies power to the load 300, the first phase power supply 201 transmits the first phase power supply 201 through the first phase output circuit 10 to supply power to the load 300. If the second phase power supply 202 supplies power to the load 300, the second phase power supply 202 transmits the second phase power supply 202 through the second phase output circuit 20 to supply power to the load 300. If the third phase power supply 203 supplies power to the load 300, the third phase power supply 203 transmits the third phase power supply 203 through the third phase output circuit 30 to supply power to the load 300.

[0042] Traditional circuits for extracting single-phase electricity usually use direct connection to obtain single-phase power supply. However, when phase imbalance occurs in the power system, especially in the case of phase loss (i.e. "phase loss"), traditional circuit designs often cannot provide stable single-phase power supply, resulting in unstable output voltage or equipment failure to work properly. In severe cases, it may even damage sensitive electrical equipment and reduce system reliability.

[0043] Based on the above reasons, the embodiment of the present application provides a power output circuit 100, which can stably and reliably output single-phase power in the case of phase imbalance or phase loss.

[0044] Specifically, Figure 2 As shown, the power supply output circuit 100 includes a first phase output circuit 10, a second phase output circuit 20 and a third phase output circuit 30, and also includes a first interlocking bus, a second interlocking bus and a third interlocking bus. The first output end of the first phase output circuit 10 is electrically connected to the control end of the second phase output circuit 20 based on the first interlocking bus, and is also electrically connected to the control end of the third phase output circuit 30 based on the second interlocking bus, and the first output end of the second phase output circuit 20 is electrically connected to the control end of the third phase output circuit 30 based on the third interlocking bus.

[0045] Each phase output circuit can generate an interlocking signal, which can be transmitted to the corresponding interlocking bus, and then transmitted to other phase output circuits connected to the interlocking bus, to control other phase output circuits to enter a stopped working state. And the time for each phase output circuit to generate an interlocking signal is different, and there are fast and slow points. The time for the first phase output circuit 10 to generate an interlocking signal is less than the time for the second phase output circuit 20 to generate an interlocking signal, and the time for the second phase output circuit 20 to generate an interlocking signal is less than the time for the third phase output circuit 30 to generate an interlocking signal. If the phase output circuit that generates the interlocking signal faster has generated an interlocking signal, then the interlocking signal will control other phase output circuits to enter a stopped working state based on the corresponding interlocking bus, and other phase output circuits will no longer generate corresponding interlocking signals, so as to ensure that only one interlocking signal is generated each time, and then ensure that only one phase output circuit transmits the target phase power supply.

[0046] For example: if the first phase power supply 201 is normal, the first phase output circuit 10 preferentially generates an interlocking signal, and the interlocking signal is transmitted to the control end of the second phase output circuit 20 based on the first interlocking bus, and controls the second phase output circuit 20 to enter a stop working state. The interlocking signal is also transmitted to the control end of the third phase output circuit 30 based on the second interlocking bus, and controls the third phase output circuit 30 to enter a stop working state. The second phase output circuit 20 and the third phase output circuit 30 no longer generate interlocking signals.

[0047] If the first phase power supply 201 is abnormal and the second phase power supply 202 is normal, the first phase output circuit 10 no longer generates an interlocking signal, and the second phase output circuit 20 preferentially generates an interlocking signal, which is transmitted to the control end of the third phase output circuit 30 based on the third interlocking bus to control the third phase output circuit 30 to enter a stop working state.

[0048] If the first phase power supply 201 is abnormal and the second phase power supply 202 is abnormal, the first phase output circuit 10 no longer generates an interlock signal, the second phase output circuit 20 no longer generates an interlock signal, and the third phase output circuit 30 generates an interlock signal, but the first output end of the third phase output circuit 30 is not connected to the first phase output circuit 10 and the second phase output circuit 20, so the interlock signal generated by the third phase output circuit 30 cannot be transmitted to the first phase output circuit 10 and the second phase output circuit 20. However, due to the abnormality of the first phase power supply 201 and the abnormality of the second phase power supply 202, the first phase output circuit 10 and the second phase output circuit 20 have both entered a stopped working state and do not need to be controlled by the interlock signal generated by the third phase output circuit 30.

[0049] Therefore, no matter which phase of the power supply is abnormal, only one phase of the first phase output circuit 10 , the second phase output circuit 20 and the third phase output circuit 30 can work normally and output the corresponding phase power supply.

[0050] In an embodiment of the present application, a phase power supply without abnormalities is determined as a target phase power supply, and a phase output circuit corresponding to the target phase power supply is determined as a target phase output circuit, and the target phase output circuit is the phase output circuit that generates the interlocking signal the fastest among the phase output circuits corresponding to the phase power supply without abnormalities.

[0051] For example: if the first phase power supply 201 is normal, and the other phase power supplies are normal or abnormal, since the first phase output circuit 10 has the shortest time to generate an interlock signal, the first phase output circuit 10 has priority to generate an interlock signal, and the first phase output circuit 10 is the target phase output circuit. If the first phase power supply 201 is abnormal, and the second phase power supply 202 and the third phase power supply 203 are both normal, since the time for the second phase output circuit 20 to generate an interlock signal is less than the time for the third phase output circuit 30 to generate an interlock signal, the second phase output circuit 20 has priority to generate an interlock signal over the third phase output circuit 30, and the second phase output circuit 20 is the target phase output circuit. If the first phase power supply 201 is abnormal, the second phase power supply 202 is normal, and the third phase power supply 203 is abnormal, the second phase output circuit 20 is the target phase output circuit. If the first phase power supply 201 is abnormal, the second phase power supply 202 is abnormal, and the third phase power supply 203 is normal, the third phase output circuit 30 is the target phase output circuit.

[0052] The target phase output circuit responds to the input of the target phase power supply, transmits the target phase power supply and generates an interlocking signal. The interlocking signal is transmitted to other phase output circuits through an interlocking bus electrically connected to the target phase output circuit, so that the other phase output circuits respond to the interlocking signal and enter a stop working state. The target phase power supply supplies power to the load 300.

[0053] For example: if the first phase power supply 201 is normal, the target phase output circuit is the first phase output circuit 10, the target phase power supply is the first phase power supply 201, the first phase output circuit 10 responds to the input of the first phase power supply 201, transmits the first phase power supply 201 to power the load 300, and generates an interlocking signal, the interlocking signal is transmitted to the control end of the second phase output circuit 20 through the first interlocking bus, so that it enters a stop working state, and the interlocking signal is also transmitted to the control end of the third phase output circuit 30 through the second interlocking bus, so that it enters a stop working state. Therefore, the first phase power supply 201 is stably transmitted to the load 300 through the first phase output circuit 10, and the second phase power supply 202 and the third phase power supply 203 cannot be transmitted to the load 300 because the corresponding phase output circuit enters a stop working state, ensuring that only one phase of power is stably output.

[0054] For another example: if the first phase power supply 201 is abnormal and the second phase power supply 202 is normal, the target phase output circuit is the second phase output circuit 20, the target phase power supply is the second phase power supply 202, the second phase output circuit 20 responds to the input of the second phase power supply 202, transmits the second phase power supply 202 to power the load 300, and generates an interlock signal, and the interlock signal is transmitted to the control end of the third phase output circuit 30 through the third interlock bus, so that it enters a stop working state. Therefore, the second phase power supply 202 is stably transmitted to the load 300 through the second phase output circuit 20, the first phase power supply 201 cannot be output due to power supply abnormality, and the third phase power supply 203 cannot be transmitted to the load 300 because the corresponding phase output circuit enters a stop working state, ensuring that only one phase of power is stably output.

[0055] For another example: if only one of the first phase power supply 201, the second phase power supply 202 and the third phase power supply 203 is normal, taking the third phase power supply 203 as an example, the target phase output circuit is the third phase output circuit 30, the target phase power supply is the third phase power supply 203, the third phase output circuit 30 responds to the input of the third phase power supply 203, transmits the third phase power supply 203 to power the load 300, and the first phase power supply 201 and the second phase power supply 202 cannot output due to power supply abnormality.

[0056] In summary, when a phase is lost or an abnormality occurs in one phase, the target phase output circuit in the power output circuit 100 can suppress the output of the corresponding phase power by other phase output circuits and stably transmit the target phase power, thereby improving the stability of the single-phase power output.

[0057] The circuit composition and circuit structure of each phase output circuit are the same. The following embodiments take the target phase output circuit as an example to describe the specific circuit composition and circuit structure of each phase output circuit.

[0058] Specifically, Figure 3 As shown, the target phase output circuit 40 includes a rectifying unit 401, a delay unit 402, a triggering unit 403 and a switching unit 404, wherein the first end of the rectifying unit 401 is electrically connected to the first end of the delay unit 402, the second end of the rectifying unit 401 is electrically connected to the second end of the delay unit 402 and the triggering unit 403, respectively, and the triggering unit 403 is also electrically connected to the control end of the switch unit 404 and the corresponding interlocking bus, respectively.

[0059] For example: the output end of the trigger unit of the first phase is electrically connected to the control end of the switch unit of the first phase, the first interlocking bus and the second interlocking bus respectively, and the output end of the trigger unit of the second phase is electrically connected to the control end of the switch unit of the second phase and the third interlocking bus respectively.

[0060] The rectifier unit 401 performs step-down rectification on the target phase power supply, and outputs the target DC voltage through its second terminal. The trigger unit 403 generates and outputs an interlock signal in response to the input of the target DC voltage. The interlock signal acts on the control terminal of the switch unit 404 to control the switch unit 404 to enter the on state, thereby allowing the target phase power supply to be transmitted to the load 300 through the switch unit 404. At the same time, the interlock signal is transmitted to other phase output circuits through an interlock bus electrically connected to the target phase output circuit 40, so that the other phase output circuits enter a stop working state in response to the interlock signal.

[0061] For example, if the target phase output circuit 40 is the first phase output circuit 10, and the target phase power supply 204 is the first phase power supply 201, the first phase rectifier unit performs step-down rectification on the first phase power supply 201 to output the target DC voltage, and the first phase trigger unit generates and outputs an interlock signal in response to the input of the target DC voltage, and the interlock signal causes the first phase switch unit to enter the on state, thereby causing the first phase power supply 201 to be transmitted to the load 300 through the first phase switch unit. At the same time, the interlock signal is transmitted to the second phase output circuit through the second interlock bus, and is transmitted to the third phase output circuit 30 through the third interlock bus, so that the second phase output circuit 20 enters the stop working state, and the third phase output circuit 30 enters the stop working state.

[0062] The delay unit 402 of the target phase output circuit 40 controls the time when the rectifier unit 401 outputs the target DC voltage to control the generation time of the interlocking signal, wherein the time when the rectifier unit of the first phase outputs the DC voltage is less than the time when the rectifier unit of the second phase outputs the DC voltage, therefore, the trigger unit of the first phase responds to the DC voltage earlier than the trigger unit of the second phase, and thus the trigger unit of the first phase generates the interlocking signal earlier. The time when the rectifier unit of the second phase outputs the DC voltage is less than the time when the rectifier unit of the third phase outputs the DC voltage, therefore, the trigger unit of the second phase responds to the DC voltage earlier than the trigger unit of the third phase, and thus the trigger unit of the second phase generates the interlocking signal earlier. That is, the trigger unit of the first phase generates an interlock signal earlier than the trigger unit of the second phase, and the trigger unit of the second phase generates an interlock signal earlier than the trigger unit of the third phase. The trigger unit of the first phase generates an interlock signal first, and the trigger unit of the second phase generates an interlock signal first except for the trigger unit of the first phase. In other words, if the order of the trigger unit of the first phase, the trigger unit of the second phase and the trigger unit of the third phase is followed, the trigger unit of the previous phase will generate an interlock signal first.

[0063] The delay unit 402 can be implemented in various ways, such as an RC delay circuit, a 555 timer delay circuit, a monostable trigger delay circuit, a transistor delay circuit, etc.

[0064] In some embodiments, Figure 4 As shown, the trigger unit 403 includes a voltage divider unit 4031 and a signal generating unit 4032, wherein the voltage divider unit 4031 is electrically connected to the second end of the rectifying unit 401 and the control end of the signal generating unit 4032 respectively, and the output end of the signal generating unit 4032 is also electrically connected to the control end of the switching unit 404 and the corresponding interlocking bus.

[0065] The voltage dividing unit 4031 generates a voltage dividing signal in response to the input of the target DC voltage, and the signal generating unit 4032 generates and outputs an interlocking signal in response to the input of the voltage dividing signal. The interlocking signal controls the switch unit 404 to enter the on state, and is transmitted to other phase output circuits through the interlocking bus electrically connected to the target phase output circuit 40, so that the other phase output circuits enter the stop working state in response to the interlocking signal.

[0066] The embodiment of the present application can reduce the higher target DC voltage to a lower divided voltage signal through the voltage divider unit 4031, adapt to the different working voltages required by different circuit elements, and reduce it to the stable voltage level required by the circuit elements to prevent the circuit elements from being affected by power supply voltage fluctuations. The signal generation unit 4032 is triggered by the divided voltage signal to output the corresponding interlock signal to output the target phase power supply to the load 300, and inhibit the operation of other phase output circuits to prevent other phase power supplies from being output, thereby ensuring that only one phase power supply is output to the load 300.

[0067] In some embodiments, please refer to Figure 4 The target phase output circuit 40 further includes an indication unit 405, wherein the indication unit 405 is electrically connected to the second end of the rectifying unit 401, the delay unit 402 and the triggering unit 403 respectively, and the indication unit 405 emits light in response to the input of the target DC voltage.

[0068] The indicator unit 405 emits light when there is a target DC voltage input, and is used to display which phase power supply is currently output. For example: if the first phase output circuit 10 is the target phase output circuit 40, and the first phase power supply 201 is the target phase power supply 204, then the indicator unit of the first phase responds to the DC voltage input of the first phase and emits light, indicating that the first phase power supply 201 is currently supplying power to the load 300. If the second phase output circuit 20 is the target phase output circuit 40, and the second phase power supply 202 is the target phase power supply 204, then the indicator unit of the second phase responds to the DC voltage input of the second phase and emits light, indicating that the second phase power supply 202 is currently supplying power to the load 300. The third phase output circuit 30 is the target phase output circuit 40, and the third phase power supply 203 is the target phase power supply 204, then the indicator unit of the third phase responds to the DC voltage input of the third phase and emits light, indicating that the third phase power supply 203 is currently supplying power to the load 300.

[0069] In the embodiment of the present application, the indication unit 405 is used to intuitively display which phase power is currently being output, so as to facilitate observation and monitoring of the power status.

[0070] Taking the first phase output circuit 10 as the target phase output circuit 40 as an example, the specific circuit composition and connection relationship in the target phase output circuit 40 are described. At this time, the rectifier unit 401 is the rectifier unit 101 of the first phase, the delay unit 402 is the delay unit 102 of the first phase, the trigger unit 403 is the trigger unit 103 of the first phase, the switch unit 404 is the switch unit 104 of the first phase, the voltage divider unit 4031 is the voltage divider unit 1031 of the first phase, the signal generating unit 4032 is the signal generating unit 1032 of the first phase, the target phase power supply 204 is the first phase power supply PHASE1, the target AC voltage is the first AC voltage, and the target DC voltage is the first DC voltage.

[0071] like Figure 5 As shown, the first phase rectifier unit 101 includes a transformer X1, a rectifier bridge BR1 and a capacitor C1, wherein the primary winding of the transformer X1 is connected to the first phase power supply PHASE1, the secondary winding of the transformer X1 is electrically connected to the input end of the rectifier bridge BR1, and the output end of the rectifier bridge BR1 is electrically connected to the capacitor C1.

[0072] The rectifier bridge BR1 includes a first diode to a fourth diode, and the four diodes are connected end to end to form a closed loop, wherein the first diode and the third diode are turned on in one half cycle of the target phase power supply, and the second diode and the fourth diode are turned on in another half cycle, and the output end of the rectifier bridge BR1 is the common connection end of the first diode and the fourth diode.

[0073] The transformer X1 steps down the first phase power supply PHASE1 to output a first AC voltage, and the rectifier bridge BR1 rectifies the first AC voltage to output a rectified DC voltage. The rectified DC voltage charges the capacitor C1, so that the capacitor C1 outputs the first DC voltage.

[0074] The turns ratio of the transformer X1 determines the magnitude of the first DC voltage. Therefore, different turns ratios can be set to meet different requirements for the first DC voltage.

[0075] Please continue reading Figure 5 The delay unit 402 includes a current limiting resistor (the figure shows that the resistance of the current limiting resistor is zero as an example), wherein the current limiting resistor is connected in series between the output end of the rectifier bridge BR1 and the capacitor C1, and the resistance of the current limiting resistor of the first phase is smaller than the resistance of the current limiting resistor of the second phase, and the resistance of the current limiting resistor of the second phase is smaller than the resistance of the current limiting resistor of the third phase.

[0076] The current limiting resistor can limit the charging time of the capacitor C1. The larger the current limiting resistor is, the smaller the charging current is, and the longer the charging time of the capacitor C1 is. Therefore, the resistance value of the current limiting resistor is proportional to the charging time of the capacitor C1. The charging time of the capacitor C1 of the first phase is faster than the charging time of the capacitor C1 of the second phase, and the charging time of the capacitor C1 of the second phase is faster than the charging time of the capacitor C1 of the third phase, which in turn causes the DC voltage output time of the first phase to be faster than the DC voltage output time of the second phase, and the DC voltage output time of the second phase to be faster than the DC voltage output time of the third phase.

[0077] In order to ensure the fastest output of the DC voltage of the first phase, the resistance value of the current limiting resistor of the first phase can be zero, that is, no current limiting resistor is set, and the current limiting resistor of the second phase can be smaller than the current limiting resistor of the third phase.

[0078] In some embodiments, Figure 5 As shown, the first phase rectifier unit 101 includes a parallel resistor R14, which is connected in parallel with the capacitor C1. The parallel resistor R14 can help the capacitor C1 charge and discharge faster to ensure that the first phase trigger unit 103 can respond faster, generate an interlocking signal or shut down faster.

[0079] Please continue reading Figure 5, the voltage-dividing unit 1031 of the first phase includes a first voltage-dividing resistor R5 and a second voltage-dividing resistor R11, and the signal generating unit 1032 of the first phase includes a three-terminal adjustable voltage regulator U3. Among them, the first voltage-dividing resistor R5 and the second voltage-dividing resistor R11 are connected in series between the second end of the first phase rectifier unit 101 and the ground. Specifically, one end of the first voltage-dividing resistor R5 is electrically connected to the capacitor C1, the current-limiting resistor and the parallel resistor R14 respectively, and the other end of the first voltage-dividing resistor R5 is electrically connected to one end of the second voltage-dividing resistor R11 and the control end of the three-terminal adjustable voltage regulator U3 respectively, and the other end of the second voltage-dividing resistor R11 is grounded. The anode of the three-terminal adjustable voltage regulator U3 is grounded, and the cathode of the three-terminal adjustable voltage regulator U3 is electrically connected to the control end of the first phase switch unit 104 and the corresponding interlocking bus respectively.

[0080] For example, the cathode of the three-terminal adjustable regulator U3 of the first phase is electrically connected to the control end of the switch unit 104 of the first phase, the first interlock bus and the second interlock bus. The cathode of the three-terminal adjustable regulator of the second phase is electrically connected to the control end of the switch unit of the second phase and the third interlock bus. The cathode of the three-terminal adjustable regulator of the third phase is electrically connected to the control end of the switch unit of the third phase.

[0081] The first voltage-dividing resistor R5 and the second voltage-dividing resistor R11 divide the first DC voltage to generate a voltage-dividing signal, which acts on the control terminal of the three-terminal adjustable regulator U3 to make it enter the on state, thereby pulling down the control terminal of the first phase switch unit 104 and generating an interlocking signal, which is a low-level signal.

[0082] Please continue reading Figure 5 The switch unit 104 of the first phase includes an optocoupler U1, a resistor R1, a resistor R2, a resistor R3 and a triac U2. The anode of the diode of the optocoupler U1 is connected to one end of the resistor R3, and the other end of the resistor R3 is used to access the first DC voltage. The cathode of the diode of the optocoupler is electrically connected to the output end of the trigger unit 103 of the first phase, specifically to the cathode of the three-terminal adjustable voltage regulator U3, for accessing the interlocking signal. The output end of the optocoupler U1 is electrically connected to the gate of the triac U2, and the first anode of the triac U2 is used to access the first phase power supply PHASE1. The second anode of the triac U2 is electrically connected to the load 300, for outputting the first phase power supply PHASE1. The collector of the optocoupler U1 is also electrically connected to the first anode of the triac U2 via the resistor R1, and the output end of the optocoupler U1 is also electrically connected to the second anode of the triac U2 via the resistor R2.

[0083] When the trigger unit 103 of the first phase generates a low-level interlock signal, the diode of the optocoupler U1 is turned on, and then the optocoupler U1 outputs a trigger signal to trigger the triac U2 to turn on, so that the first phase power PHASE1 is transmitted to the load 300 via the triac U2.

[0084] Please continue reading Figure 5 The first phase indicating unit 105 includes a light emitting diode D1, the anode of the light emitting diode D1 is electrically connected to the second end of the first phase rectifying unit 101, and the cathode of the light emitting diode D1 is electrically connected to the power supply end of the first phase switch unit 104. The power supply end of the first phase switch unit 104 is the anode of the diode of the optocoupler U1, that is, the cathode of the light emitting diode D1 is connected to the anode of the diode of the optocoupler U1.

[0085] When the rectifier unit 101 of the first phase outputs the first DC voltage, the anode potential of the light-emitting diode D1 is high. If the diode of the optocoupler U1 is turned on, the cathode potential of the light-emitting diode D1 is pulled low, and the light-emitting diode D1 is turned on to emit light, indicating that the phase output circuit currently providing phase power to the load 300 is a phase output circuit in which the light-emitting diode emits light, that is, the first phase output circuit.

[0086] See also Figure 6 , Figure 6 is a circuit structure diagram of a power output circuit provided in an embodiment of the present application, such as Figure 6 As shown, the power output circuit 100 includes a first phase output circuit 10 , a second phase output circuit 20 and a third phase output circuit 30 , and the circuit composition and circuit structure of each phase output circuit are the same as the target phase output circuit 40 .

[0087] Specifically, the rectifier unit 101 of the first phase of the first phase output circuit 10 includes a transformer X1, a rectifier bridge BR1, a capacitor C1 and a parallel resistor R14, the resistance of the current limiting resistor in the delay unit 102 of the first phase is zero (not shown in the figure), the voltage divider unit 1031 of the first phase includes a resistor R5 and a resistor R11, the signal generating unit 1032 of the first phase is a three-terminal adjustable voltage regulator U3, and the switch unit 104 of the first phase includes an optocoupler U1, a resistor R1, a resistor R2, a resistor R3 and a three-terminal bidirectional thyristor U2.

[0088] The second-phase rectifier unit 201 of the second-phase output circuit 20 includes a transformer X2, a rectifier bridge BR2, a capacitor C3 and a parallel resistor R13, the second-phase delay unit 202 includes a current limiting resistor R19, the second-phase voltage divider unit 2031 includes a resistor R9 and a resistor R15, the second-phase signal generating unit 2032 is a three-terminal adjustable voltage regulator U7, and the second-phase switch unit 204 includes an optocoupler U5, a resistor R10, a resistor R6, a resistor R8 and a three-terminal bidirectional thyristor U8.

[0089] The rectifier unit 301 of the third phase of the third phase output circuit 30 includes a transformer X3, a rectifier bridge BR3, a capacitor C2 and a parallel resistor R22, the delay unit 302 of the third phase includes a current limiting resistor R20, the voltage divider unit 3031 of the third phase includes a resistor R17 and a resistor R18, the signal generating unit 3032 of the third phase is a three-terminal adjustable voltage regulator U9, and the switch unit 304 of the third phase includes an optocoupler U4, a resistor R7, a resistor R4, a resistor R16 and a three-terminal bidirectional thyristor U6.

[0090] The cathode of the three-terminal adjustable voltage regulator U3 is electrically connected to the control terminal of the three-terminal adjustable voltage regulator U7 through the first interlocking bus, the cathode of the three-terminal adjustable voltage regulator U3 is also electrically connected to the control terminal of the three-terminal adjustable voltage regulator U9 through the second interlocking bus, and the cathode of the three-terminal adjustable voltage regulator U7 is electrically connected to the control terminal of the three-terminal adjustable voltage regulator U9 through the third interlocking bus. The connection relationship of the components is the same as the component connection of the first phase output circuit 10 in the above embodiment, and will not be repeated here.

[0091] Combination Figure 6 , the working principle of the power output circuit 100 can be described as follows:

[0092] If no phase loss occurs, that is, when the first-phase power supply PHSAE1, the second-phase power supply PHSAE2 and the third-phase power supply PHSAE3 all exist at the same time, the three rectifier units all operate normally, and then pass through the current limiting unit to output a DC voltage, but the current limiting unit of the first phase is zero (without current limiting resistance), then the DC voltage output of the first phase is the fastest, and the three-terminal adjustable voltage regulator U3 of the first phase is turned on first, and the output end (pin 3) of the three-terminal adjustable voltage regulator U3 is pulled down to ground, generating a low-level interlocking signal, which causes the optocoupler U1 of the first phase to enter the on state, and then causes the three-terminal bidirectional thyristor U2 to enter the on state, and the first-phase power supply PHSAE1 is transmitted to the load 300 through the three-terminal bidirectional thyristor U2 to power the load 300.

[0093] At the same time, the interlock signal is transmitted to the control end (pin 1) of the three-terminal adjustable regulator U7 of the second phase through the first interlock bus, so that the three-terminal adjustable regulator U7 of the second phase is in the off state, and the interlock signal is transmitted to the control end (pin 1) of the three-terminal adjustable regulator U9 of the third phase through the second interlock bus, so that the three-terminal adjustable regulator U9 of the third phase is in the off state.

[0094] Therefore, the target phase output circuit is the first phase output circuit 10, and only the first phase output circuit 10 is turned on, and only the first phase power supply PHSAE1 supplies power to the load 300, thereby achieving the purpose of extracting single-phase power.

[0095] If the first phase power supply PHSAE1 is normal, and one of the second phase power supply PHSAE2 and the third phase power supply PHSAE3 is lost, taking the loss of the third phase power supply PHSAE3 as an example, the third phase output circuit 30 cannot output the third phase power supply PHSAE3. The first phase power supply PHSAE1 that is not lost enables the first phase rectifier unit 101 in the first phase output circuit 10 to perform step-down rectification normally, and the three-terminal adjustable voltage regulator U3 is turned on first to generate an interlocking signal, which causes the optical coupler U1 to enter the on state, and then causes the triac U2 to enter the on state, and the first phase power supply PHSAE1 is transmitted to the load 300 through the triac U2 to supply power to the load 300.

[0096] At the same time, the optocoupler signal is transmitted to the control end (pin 1) of the three-terminal adjustable regulator U7 through the first interlock bus, pulling down its control end, so that the three-terminal adjustable regulator U7 cannot be turned on and is in the off state, and then the second phase output circuit 20 cannot output the second phase power supply PHSAE2.

[0097] Therefore, the target phase output circuit is the first phase output circuit 10, and only the first phase output circuit 10 is turned on, and only the first phase power supply PHSAE1 supplies power to the load 300, thereby achieving the purpose of extracting single-phase power.

[0098] If the first phase power supply PHSAE1 is lost, and the second phase power supply PHSAE2 and the third phase power supply PHSAE3 are both normal, the first phase output circuit 10 cannot output the first phase power supply PHSAE1. The second phase power supply PHSAE2 that is not lost enables the second phase rectifier unit 201 in the second phase output circuit 20 to perform step-down rectification normally, and the three-terminal adjustable voltage regulator U7 is turned on to generate an interlock signal, which causes the optical coupler U5 to enter the on state, and then causes the triac U8 to enter the on state, and the second phase power supply PHSAE2 is transmitted to the load 300 through the triac U8 to supply power to the load 300.

[0099] At the same time, the optocoupler signal is transmitted to the control end (pin 1) of the three-terminal adjustable regulator U9 through the third interlock bus, pulling down its control end, so that the three-terminal adjustable regulator U9 cannot be turned on and is in the off state, and then the third phase output circuit 30 cannot output the third phase power supply PHSAE3.

[0100] Therefore, the target phase output circuit is the second phase output circuit 20, and only the second phase output circuit 20 is turned on, and only the second phase power supply PHSAE2 supplies power to the load 300, thereby achieving the purpose of extracting single-phase electricity.

[0101] If the first phase power supply PHSAE1 is lost, and one of the second phase power supply PHSAE2 and the third phase power supply PHSAE3 is lost (taking the loss of the third phase power supply PHSAE3 as an example), the first phase output circuit 10 cannot output the first phase power supply PHSAE1, and the third phase output circuit 30 cannot output the third phase power supply PHSAE3. The second phase power supply PHSAE2 that is not lost enables the second phase rectifier unit 201 in the second phase output circuit 20 to perform step-down rectification normally, and the three-terminal adjustable voltage regulator U7 is turned on to generate an interlocking signal, which causes the optical coupler U5 to enter the on state, and then causes the triac U8 to enter the on state, and the second phase power supply PHSAE2 is transmitted to the load 300 through the triac U8 to supply power to the load 300.

[0102] Therefore, the target phase output circuit is the second phase output circuit 20, and only the second phase output circuit 20 is turned on, and only the second phase power supply PHSAE2 supplies power to the load 300, thereby achieving the purpose of extracting single-phase electricity.

[0103] In summary, when a phase is lost or an abnormality occurs in one phase, the target phase output circuit in the power output circuit can suppress the output of the corresponding phase power by other phase output circuits and stably transmit the target phase power, thereby improving the stability of the single-phase power output.

[0104] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A power output circuit, characterized in that: The device comprises a first phase output circuit, a second phase output circuit, a third phase output circuit, a first interlock bus, a second interlock bus and a third interlock bus, wherein the output end of the first phase output circuit is electrically connected to the control end of the second phase output circuit based on the first interlock bus, and is also electrically connected to the control end of the third phase output circuit based on the second interlock bus; the output end of the second phase output circuit is electrically connected to the control end of the third phase output circuit based on the third interlock bus; The target phase output circuit responds to the input of the target phase power supply, transmits the target phase power supply and generates an interlock signal, and the interlock signal is transmitted to other phase output circuits through an interlock bus electrically connected to the target phase output circuit, so that the other phase output circuits respond to the interlock signal and enter a stop working state; Among them, the target phase output circuit is the phase output circuit that generates the interlock signal the fastest among the phase output circuits corresponding to the phase power supply without abnormalities, and the time for the first phase output circuit to generate the interlock signal is less than the time for the second phase output circuit to generate the interlock signal, and the time for the second phase output circuit to generate the interlock signal is less than the time for the third phase output circuit to generate the interlock signal.

2. The power output circuit according to claim 1, characterized in that: The target phase output circuit includes a rectifying unit, a delay unit, a triggering unit and a switching unit; The first end of the rectifier unit is electrically connected to the first end of the delay unit, the second end of the rectifier unit is electrically connected to the second end of the delay unit and the trigger unit, and the output end of the trigger unit is also electrically connected to the control end of the switch unit and the corresponding interlock bus. The rectifying unit performs step-down rectification on the target phase power supply to output a target DC voltage, the triggering unit generates and outputs the interlocking signal in response to an input of the target DC voltage, and the switch unit enters a conducting state in response to an input of the interlocking signal to transmit the target phase power supply; The delay unit is used to control the time when the rectifier unit outputs the target DC voltage to control the generation time of the interlocking signal, wherein the time when the rectifier unit of the first phase outputs the DC voltage is less than the time when the rectifier unit of the second phase outputs the DC voltage, and the time when the rectifier unit of the second phase outputs the DC voltage is less than the time when the rectifier unit of the third phase outputs the DC voltage.

3. The power output circuit according to claim 2, characterized in that: The rectifier unit includes a transformer, a rectifier bridge and a capacitor; The primary winding of the transformer is used to connect to the target phase power supply, the secondary winding of the transformer is electrically connected to the input end of the rectifier bridge, and the output end of the rectifier bridge is electrically connected to the capacitor; The transformer is used to step down the target phase power supply and output a target AC voltage. The rectifier bridge is used to rectify the target AC voltage and output a rectified DC voltage to charge the capacitor so that the capacitor outputs the target DC voltage.

4. The power output circuit according to claim 3, characterized in that: The delay unit includes a current limiting resistor, wherein the current limiting resistor is connected in series between the output end of the rectifier bridge and the capacitor, and the resistance value of the current limiting resistor of the first phase is smaller than the resistance value of the current limiting resistor of the second phase, and the resistance value of the current limiting resistor of the second phase is smaller than the resistance value of the current limiting resistor of the third phase.

5. The power output circuit according to claim 2, characterized in that: The trigger unit includes a voltage dividing unit and a signal generating unit; The voltage dividing unit is electrically connected to the second end of the rectifying unit and the control end of the signal generating unit respectively, and the output end of the signal generating unit is also electrically connected to the control end of the switch unit and the corresponding interlocking bus; The voltage dividing unit generates a voltage dividing signal in response to an input of the target DC voltage, and the signal generating unit generates and outputs the interlock signal in response to an input of the voltage dividing signal.

6. The power output circuit according to claim 5, characterized in that: The voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor, and the signal generating unit includes a three-terminal adjustable voltage regulator; The first voltage-dividing resistor and the second voltage-dividing resistor are connected in series between the second end of the rectifier unit and the ground, the common connection end of the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to the control end of the three-terminal adjustable voltage regulator, the anode of the three-terminal adjustable voltage regulator is grounded, and the cathode of the three-terminal adjustable voltage regulator is electrically connected to the control end of the switch unit and the corresponding interlocking bus respectively.

7. The power output circuit according to claim 2, characterized in that: The switch unit includes an optocoupler and a triac; The anode of the diode of the optocoupler is used to access the target DC voltage, the cathode of the diode of the optocoupler is used to access the interlock signal, the output end of the optocoupler is electrically connected to the gate of the triac, the first anode of the triac is used to access the target phase power supply, and the second anode of the triac is used to output the target phase power supply.

8. The power output circuit according to any one of claims 2 to 7, characterized in that: The target phase output circuit further includes an indicating unit, which is electrically connected to the second end of the rectifying unit and emits light in response to input of the target DC voltage.

9. The power output circuit according to claim 8, characterized in that: The indicating unit comprises a light emitting diode, an anode of the light emitting diode is electrically connected to the second end of the rectifying unit, and a cathode of the light emitting diode is connected to the power supply end of the switch unit.

10. A power supply system, characterized in that: Comprising a three-phase power supply, a load and a power output circuit as claimed in any one of claims 1 to 9; The first phase output circuit is connected between the first phase alternating current and the load, the second phase output circuit is connected between the second phase alternating current and the load, and the third phase output circuit is connected between the three-phase power supply and the load; The power output circuit is used to transmit the target phase power to supply power to the load.

Citation Information

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