Radio frequency front end module

By using a combination design of a combiner module and a balun in the RF front-end module, the problem of insufficient power amplifier stability was solved, and higher stability and anti-interference capability were achieved.

CN119628584BActive Publication Date: 2025-12-16RADROCK (SHENZHEN) TECH CO LTD
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Patent Information

Application Number
CN202411682865.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-12-16
Estimated Expiration
2044-11-22

AI Technical Summary

Technical Problem

In existing RF front-end modules, the stability of the power amplifier is affected by the conversion and combining process of the balun's direct output signal, which is not conducive to improving the overall stability.

Method used

The differential RF signals are converted by a combiner module, a first balun, and a second balun, and the two power amplified signals are combined by the combiner module. The combiner module, the two baluns, and the power amplifier chip are arranged in sequence to avoid overlapping and interference of traces.

Benefits of technology

This improved the operational stability of the power amplifier, reduced interference between traces, and enhanced the overall stability of the RF front-end module.

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Abstract

The application relates to the radio frequency technical field, in particular to a radio frequency front end module, by arranging a combining module, a power amplifier is used to convert power amplification signals respectively formed by a pair of differential radio frequency signals through a first balun and a second balun, and then the two power amplification signals output by the first balun and the second balun are combined through the combining module to output a power amplification radio frequency signal, so that the stability of the power amplifier during operation is improved; by arranging the combining module, the two baluns and the setting area of the power amplification chip in sequence, by arranging the first inductive unit and the second inductive unit in the combining module on the two sides of the central axis of the power amplification chip, the overlapping of wiring is avoided, the interference between the wirings is reduced, and the stability of the power amplifier during operation is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency technology, and particularly relates to a radio frequency front-end module. BACKGROUND

[0002] The existing radio frequency front-end module has been widely applied in the fields of wireless communication, Internet of Things, smart home and the like. Among them, the power amplifier as the core unit of the radio frequency front-end module has a great influence on the signal output index of the radio frequency front-end module.

[0003] The power amplifier first performs power amplification processing on a pair of differential radio frequency signals by using a power amplification circuit, and then performs combining on the signals output by the power amplification circuit to output a power amplified radio frequency signal. In the related art, the signals output by the power amplification circuit are generally converted and combined by a balun, and a power amplified radio frequency signal is directly output by the balun, which is not conducive to improving the stability of the power amplifier. SUMMARY

[0004] In view of the above problems, the embodiments of the present application provide a radio frequency front-end module to solve the technical problem that the stability of the radio frequency front-end module is not improved.

[0005] The embodiments of the present application provide a radio frequency front-end module, comprising:

[0006] a substrate;

[0007] a power amplifier, the power amplifier comprising a power amplification chip and an output circuit which are respectively arranged on the substrate;

[0008] the power amplification chip is integrated with a power amplification circuit;

[0009] the output circuit comprises a first balun, a second balun and a combining module, the first balun and the second balun are respectively connected with the power amplification circuit, the power amplification circuit outputs a pair of differential radio frequency signals after performing power amplification processing on the differential radio frequency signals respectively, and the combining module is used for performing combining processing on two power amplified signals output by the first balun and the second balun to output a power amplified radio frequency signal;

[0010] The combiner module includes a first inductive unit connected to the first balun, a second inductive unit connected to the second balun, and a combiner output unit, a first end of the combiner output unit is connected to an output end of the first inductive unit and an output end of the second inductive unit respectively, and a second end of the combiner output unit is connected to a signal output end of the output circuit; the arrangement area of the combiner module, the arrangement areas of the first balun and the second balun, and the arrangement area of the power amplifier chip are arranged in the first direction in sequence, and the first inductive unit and the second inductive unit are respectively located on two sides of a first central axis of the arrangement area of the power amplifier chip.

[0011] The radio frequency front end module provided by the embodiment of the present application includes a substrate, a power amplifier including a power amplifier chip and an output circuit arranged on the substrate respectively, the power amplifier chip is integrated with a power amplifier circuit, the output circuit includes a first balun, a second balun, and a combiner module, the first balun and the second balun are connected with the power amplifier circuit respectively, the combiner module includes a first inductive unit connected to the first balun, a second inductive unit connected to the second balun, and a combiner output unit, a first end of the combiner output unit is connected to an output end of the first inductive unit and an output end of the second inductive unit respectively, and a second end of the combiner output unit is connected to a signal output end of the output circuit; by arranging the combiner module, the power amplifier first converts the power amplifier signals respectively formed by a pair of differential radio frequency signals by using the first balun and the second balun, and then performs combiner processing on the two power amplifier signals output by the first balun and the second balun by using the combiner module to output a power amplifier radio frequency signal, which is conducive to improving the stability of the power amplifier during operation; by arranging the combiner module, the two baluns, and the arrangement area of the power amplifier chip in sequence, the first wiring between the combiner module and the two baluns and the second wiring between the two baluns and the power amplifier chip are prevented from overlapping, and the interference between the first wiring and the second wiring is reduced, which is conducive to improving the stability of the power amplifier during operation; by arranging the first inductive unit and the second inductive unit in the combiner module on two sides of the central axis of the power amplifier chip, the third wiring between the first balun and the first inductive unit and the fourth wiring between the second balun and the second inductive unit are prevented from overlapping, and the interference between the third wiring and the fourth wiring is reduced, which is conducive to improving the stability of the power amplifier during operation.

[0012] These aspects or other aspects of the present application will be more apparent in the following description of the embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 The structure schematic diagram of the radio frequency front end module provided by the embodiment of the present application is shown.

[0014] Figure 2 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0015] Figure 3 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0016] Figure 4 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0017] Figure 5 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0018] Figure 6 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0019] Figure 7 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0020] Figure 8 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0021] Figure 9 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown.

[0022] Figure 10 A schematic diagram of a radio frequency front-end module is shown. Figure 1 A schematic diagram of a radio frequency front-end module is shown. DETAILED DESCRIPTION

[0023] Embodiments of the present application are described below in detail, examples of which are shown in the accompanying drawings, wherein the same or like reference numerals used throughout the drawings denote the same or like elements or elements having the same or similar functions. The embodiments described below by reference to the drawings are exemplary only, and are used merely for the purpose of explanation of the present application, and are not to be understood as a limitation of the present application.

[0024] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application, so that those skilled in the art can better understand the solutions in the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0025] It should be noted that in the embodiments of the present application, in this document, the terms such as first and second are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations.

[0026] In addition, the terms "comprising", "containing", or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or device. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0027] In the description of the embodiments of the present application, the words "example" or "for example" are used to mean example, illustration or description. Any embodiment or design solution described as "example" or "for example" in the embodiments of the present application is not interpreted as being more preferred or having more advantages than another embodiment or design solution. The words "example" or "for example" are intended to present the relative concept in a clear manner.

[0028] In addition, "multiple" in the embodiments of the present application means two or more than two. In view of this, "multiple" in the embodiments of the present application can also be understood as "at least two". "At least one" can be understood as one or more, for example, as one, two or more. For example, including at least one means including one, two or more, and does not limit which ones are included, for example, including at least one of A, B and C, which can include A, B, C, A and B, A and C, B and C, or A and B and C.

[0029] It should be noted that in the embodiments of the present application, the association relationship of the associated objects described by "and / or" can represent three kinds of relationships, for example, A and / or B can represent three cases of A alone, A and B together, and B alone. In addition, the character " / ", if not specially specified, generally represents a "or" relationship between the associated objects before and after it.

[0030] It should be noted that the "connection" in the embodiments of the present application can be understood as an electrical connection, and the connection between two electrical elements can be direct or indirect connection between the two electrical elements. For example, A and B are connected, which can be direct connection between A and B, or indirect connection between A and B through one or more other electrical elements.

[0031] It should be noted that the transistor mentioned in the present application can be a bipolar junction transistor (BJT), which is also called a bipolar transistor, a BJT transistor or a triode. The transistor mentioned in the present application can also be a metal oxide semiconductor field effect transistor (MOSFET), which is also called a MOS transistor or a MOS tube or a FET tube.

[0032] Specifically, the BJT transistor can be a PNP type BJT transistor or an NPN type BJT transistor, the PNP type BJT transistor can correspond to a P type MOS transistor, the first end of the BJT transistor can be an emitter or a collector, the second end of the BJT transistor can be a collector or an emitter, and the control end of the BJT transistor can be a base.

[0033] Specifically, the MOS transistor can be a P type MOS transistor or an N type MOS transistor, the first end of the MOS transistor can be a source or a drain, the second end of the MOS transistor can be a drain or a source, and the control end of the MOS transistor can be a gate.

[0034] An embodiment of the present application provides a radio frequency front end module 100, please refer to Figures 1 to 3 As shown in the figure, the radio frequency front end module 100 includes a substrate 10 and a power amplifier 20, the power amplifier 20 includes a power amplification chip 21 and an output circuit 22, the power amplification chip 21 and the output circuit 22 are respectively arranged on the substrate 10, and the power amplification chip 21 is located in a setting area A1 on the substrate 10.

[0035] The power amplification chip 21 is integrated with a power amplification circuit 21a, and the output circuit 22 includes a first balun 221, a second balun 222, a signal output end 223, and a combining module 224. The first balun 221 and the second balun 222 are respectively connected with the power amplification circuit 21a. The power amplification circuit 21a can perform power amplification processing on a pair of radio frequency signals (for example, differential signals) respectively, output a power amplified signal formed by one of the radio frequency signals (for example, differential signals) to the first balun 221, and output a power amplified signal formed by the other radio frequency signal (for example, differential signals) to the second balun 222. It should be noted that the radio frequency signal output to the first balun 221 / second balun 222 can be a differential signal with a phase difference of 180 degrees, a radio frequency signal with a phase difference of 90 degrees, or a single-ended radio frequency signal.

[0036] The combining module 224 is used for combining the first power amplified signal output by the first balun 221 and the second power amplified signal output by the second balun 222 to output a power amplified radio frequency signal.

[0037] The combining module 224 includes a first inductive unit 2241, a second inductive unit 2242, and a combining output unit 2243. The first inductive unit 2241 is connected to the first balun 221, the second inductive unit 2242 is connected to the second balun 222, the first end of the combining output unit 2243 is respectively connected to the output end of the first inductive unit 2241 and the output end of the second inductive unit 2242, and the second end of the combining output unit 2243 is connected to the signal output end 223 of the output circuit 22. The first power amplified signal output by the first balun 221 is processed by the first inductive unit 2241 and then output to the first end of the combining output unit 2243, the second power amplified signal output by the second balun 222 is processed by the second inductive unit 2242 and then output to the first end of the combining output unit 2243, the output end of the first inductive unit 2241 and the output end of the second inductive unit 2242 form a combining node 2240, the first power amplified signal processed by the first inductive unit 2241 and the second power amplified signal processed by the second inductive unit 2242 are combined at the combining node 2240 to form a power amplified radio frequency signal, and the power amplified radio frequency signal is output by the second end of the combining output unit 2243 after being processed by the combining output unit 2243.

[0038] For example, the first inductive unit 2241 can include at least one inductor, for example, one inductor or at least two inductors connected in sequence; the second inductive unit 2242 can include at least one inductor, for example, one inductor or at least two inductors connected in sequence; and the combining output unit 2243 can include at least one inductor, for example, one inductor or at least two inductors connected in sequence.

[0039] The setting area A1 of the power amplification chip 21 has a first middle axis S1, which is also the middle axis of the power amplification chip 21 in the top view shown in the figure. Figure 3 The setting area A3 of the combining module 224, the setting area A2 of the first balun 221 and the second balun 222, and the setting area A1 of the power amplification chip 21 are sequentially arranged along the first direction L1, and the first inductive unit 2241 and the second inductive unit 2242 are respectively located on both sides of the first middle axis S1 of the setting area A1 of the power amplification chip 21.

[0040] In the embodiment, by arranging the combining module in the output circuit, the power amplifier first converts the power amplification signals respectively formed by a pair of differential radio frequency signals by using the first balun and the second balun, and then combines the two power amplification signals output by the first balun and the second balun by using the combining module to output the power amplification radio frequency signal, which is conducive to improving the stability of the power amplifier during operation; by sequentially arranging the setting areas of the combining module, the two baluns, and the power amplification chip, the first traces between the combining module and the two baluns and the second traces between the two baluns and the power amplification chip are avoided from overlapping, and the interference between the first traces and the second traces is reduced, which is conducive to improving the stability of the power amplifier during operation; by arranging the first inductive unit and the second inductive unit in the combining module on both sides of the middle axis of the power amplification chip, the third traces between the first balun and the first inductive unit and the fourth traces between the second balun and the second inductive unit are avoided from overlapping, and the interference between the third traces and the fourth traces is reduced, which is conducive to improving the stability of the power amplifier during operation.

[0041] As an implementation manner, please continue to refer to Figure 3 As shown in the figure, the first balun 221 and the second balun 222 are respectively located on both sides of the first middle axis S1. Exemplarily, the first balun 221 and the second balun 222 can be respectively implemented by metal traces wound on the substrate 10, the first balun 221 and the second balun 222 can also be respectively implemented by patch baluns, and the first balun 221 and the second balun 222 can also be respectively implemented by balun chips, which is not limited in the embodiment.

[0042] In the embodiment, since the first balun and the second balun are respectively arranged on both sides of the middle axis of the power amplification chip, the fifth traces between the power amplification circuit and the first balun and the sixth traces between the power amplification circuit and the second balun are avoided from overlapping, and the interference between the fifth traces and the sixth traces is reduced, which is conducive to improving the stability of the power amplifier during operation, and further improving the stability of the radio frequency front-end module.

[0043] In some embodiments, please refer to Figure 3 As shown, the first balun 221 and the second balun 222 are arranged in axial symmetry with respect to the first central axis S1 of the power amplification chip 21. Specifically, when the first balun 221 and the second balun 222 are respectively a patch balun or a balun chip or a metal trace, the arrangement region of the first balun 221 on the substrate 10 and the arrangement region of the second balun 222 on the substrate 10 are arranged in axial symmetry with respect to the first central axis S1.

[0044] In the present embodiment, the first balun and the second balun are arranged in axial symmetry with respect to the first central axis, which can improve the symmetry of the fifth trace between the power amplification circuit and the first balun and the sixth trace between the power amplification circuit and the second balun, further reduce the interference between the fifth trace and the sixth trace, and improve the stability of the radio frequency front-end module.

[0045] In some embodiments, when the first balun 221 and the second balun 222 are respectively a metal trace, the metal trace pattern of the first balun 221 and the metal trace pattern of the second balun 222 are arranged in axial symmetry with respect to the first central axis S1.

[0046] In some embodiments, the straight-line distance from the midpoint of the magnetic core region of the first balun 221 to the first node of the first central axis S1 is equal to the straight-line distance from the midpoint of the magnetic core region of the second balun 222 to the first node of the first central axis S1. The first node can be any point on the first central axis S1.

[0047] In the present embodiment, the metal trace patterns of the first balun and the second balun are arranged in axial symmetry with respect to the first central axis, and the positions of the same type of input terminals or output terminals of the first balun and the second balun are symmetrical with respect to the first central axis, which can improve the symmetry of the fifth trace between the power amplification circuit and the first balun and the sixth trace between the power amplification circuit and the second balun, further reduce the interference between the fifth trace and the sixth trace, and improve the stability of the radio frequency front-end module.

[0048] In some embodiments, the first inductor unit 2241 and the second inductor unit 2242 are arranged in axial symmetry with respect to the first central axis S1 of the power amplification chip 21.

[0049] In the present embodiment, the first inductor unit and the second inductor unit in the combining module are arranged in axial symmetry on both sides of the central axis of the power amplification chip, which can improve the symmetry of the third trace between the first balun and the first inductor unit and the fourth trace between the second balun and the second inductor unit, further reduce the interference between the third trace and the fourth trace, and be conducive to improving the stability of the power amplifier during operation.

[0050] In some embodiments, please refer toFigure 4 and Figure 5 As shown in FIG. 22, the first inductance unit 2241 includes a first inductor L11 connected with the output end of the first balun 221, and a second inductor L12 connected with the first inductor L11, and the extension direction of the first inductor L11 is not parallel to the extension direction of the second inductor L12. The second inductance unit 2242 includes a third inductor L21 connected with the output end of the second balun 222, and a fourth inductor L22 connected with the third inductor L21, and the extension direction of the third inductor L21 is not parallel to the extension direction of the fourth inductor L22.

[0051] In the embodiment, the first inductance unit and the second inductance unit are respectively formed by two non-parallel inductors, which is conducive to reducing the setting area of the inductors to avoid the overlapping of the wires, and can reduce the coupling between the two inductors.

[0052] In some embodiments, the extension direction of the first inductor L11 intersects with the extension direction of the second inductor L12, and the extension direction of the third inductor L21 intersects with the extension direction of the fourth inductor L22.

[0053] In some embodiments, the intersection angle between the extension direction of the first inductor L11 and the extension direction of the second inductor L12 is at least one of [45°, 60°], [60°, 90°], [90°, 120°], [120°, 150°]. The intersection angle between the extension direction of the third inductor L21 and the extension direction of the fourth inductor L22 is at least one of [45°, 60°], [60°, 90°], [90°, 120°], [120°, 150°].

[0054] In some embodiments, the first inductor L11 and the second inductor L12 are perpendicular, and the third inductor L21 and the fourth inductor L22 are perpendicular.

[0055] In the embodiment, the first inductance unit and the second inductance unit are respectively formed by two perpendicular inductors, which is conducive to reducing the setting area of the inductors to avoid the overlapping of the wires, and can further reduce the coupling between the two inductors.

[0056] In some embodiments, the extension direction of the first inductor L11 is parallel to the first central axis S1, and the extension direction of the second inductor L12 is perpendicular to the first central axis S1; the extension direction of the third inductor L21 is parallel to the first central axis S1, and the extension direction of the fourth inductor L22 is perpendicular to the first central axis S1.

[0057] In some embodiments, the first inductor L11, the second inductor L12, the third inductor L21 and the fourth inductor L22 are respectively arranged on the substrate 10. Specifically, the substrate can include a plurality of metal layers, and the inductors can be arranged in at least one metal layer. By forming the inductors on the metal layers of the substrate, the inductance of each inductor can be flexibly controlled, and the Q value is higher, thereby further reducing the insertion loss.

[0058] In some embodiments, the first inductor L11, the second inductor L12, the third inductor L21 and the fourth inductor L22 are respectively patch inductors arranged on the surface of the substrate 10. Specifically, by arranging patch inductors, the manufacturing process of each inductor is simplified, and circuit debugging is easy.

[0059] As an embodiment, please refer to Figure 4 and Figure 5 As an embodiment, please refer to

[0060] In some embodiments, the output circuit 22 further includes an isolation resistor unit 225, a first end of the isolation resistor unit 225 is connected to the output end of the first balun 221, a second end of the isolation resistor unit 225 is connected to the output end of the second balun 222, and the isolation resistor unit 225 is located on the first central axis S1. Exemplarily, the isolation resistor unit 225 can include an isolation resistor R4.

[0061] In some embodiments, the isolation resistor unit 225 is arranged on the first central axis S1, which can improve the symmetry of the wiring between the first balun 221 and the isolation resistor unit 225 and the wiring between the second balun 222 and the isolation resistor unit 225, and further improve the stability of the power amplifier during operation.

[0062] As an embodiment, please refer to Figure 4 and Figure 5 As an embodiment, please refer to

[0063] In some embodiments, the output circuit 22 further includes a combining matching capacitor 226, a first end of the combining matching capacitor 226 is respectively connected to the output end of the first inductor unit 2241, the output end of the second inductor unit 2242 and the first end of the combining output unit 2243, and a second end of the combining matching capacitor 226 is grounded, and the combining matching capacitor 226 is located on the first central axis S1.

[0064] The combiner matching capacitor 226 is arranged on the first central axis S1, which can improve the symmetry of the wiring between the first inductor unit 2241 and the combiner matching capacitor 226 and the wiring between the second inductor unit 2242 and the combiner matching capacitor 226, and further improve the stability of the power amplifier during operation.

[0065] In some embodiments, referring to Figure 5 As shown, the first end of the combiner matching capacitor 226 is connected to the second inductor L12 and the fourth inductor L22, respectively, and the combiner matching capacitor 226 is arranged in the gap region between the second inductor L12 and the fourth inductor L22.

[0066] The second inductor L12 and the fourth inductor L22 are arranged in axial symmetry with respect to the first central axis S1, and the second inductor L12 and the fourth inductor L22 are perpendicular to the first central axis S1, and the combiner matching capacitor 226 is arranged in the gap region between the two, which can shorten the distance between the first inductor unit 2241 and the combiner matching capacitor 226 and the distance between the second inductor unit 2242 and the combiner matching capacitor 226, and also improve the integration.

[0067] In some embodiments, referring to Figure 5 and Figure 7 As shown, the first inductor unit 2241, the combiner matching capacitor 226, the second inductor unit 2242, the side of the second balun 222 away from the power amplification chip 21, and the side of the first balun 221 away from the power amplification chip 21 are sequentially arranged to form a first rectangular region A4, and the isolation resistor unit 225 is located in the first rectangular region A4.

[0068] The isolation resistor unit 225 is arranged in the first rectangular region A4, which can improve the integration.

[0069] As an embodiment, the combiner output unit 2243 can include at least two combiner inductors connected in sequence, the extension direction of the combiner inductor is perpendicular to the first central axis S1, and the combiner output unit 2243 outputs after processing the power amplification radio frequency signal. Exemplarily, as shown in Figure 4 The combiner output unit 2243 can include a first combiner inductor L31 and a second combiner inductor L32, the first end of the first combiner inductor L31 is connected to the output end of the first inductor unit 2241 and the output end of the second inductor unit 2242, respectively, the second end of the first combiner inductor L31 is connected to the first end of the second combiner inductor L32, and the second end of the second combiner inductor L32 is connected to the signal output end 223.

[0070] In the embodiment, the at least two in-line connected combining inductors are arranged perpendicularly to the first central axis, which can increase the inductance of the signal combining unit, is suitable for application scenarios requiring large inductance, and arranging the at least two combining inductors in sequence along the connecting direction can reduce the wiring area occupied by the combining output unit, is conducive to increasing the wiring area, further avoids wiring overlap, and improves stability.

[0071] In some embodiments, the combining inductor is a patch inductor arranged on the surface of the substrate 10. Specifically, at least two patch inductors connected in sequence are adopted, which simplifies the manufacturing process of each inductor and is easy to debug the circuit. Moreover, since the inductance value of the combining inductor is large, if a flat inductor is formed by using the metal layer of the substrate, a large area needs to be occupied, while the use of SMD components can effectively save the area.

[0072] As an embodiment, in Figure 5 and Figure 6 , the output circuit 22 can further include a signal coupling unit 227 coupled to the combining module 224, and the signal coupling unit 227 is configured to couple the power amplified radio frequency signal on the combining module 224 to the detection circuit 21b.

[0073] The detection circuit 21b is configured to detect the frequency of the power amplified radio frequency signal output by the power amplifier 21, and the power amplified radio frequency signal on the combining module 224 is coupled to the signal coupling unit 227 through the coupling of the signal coupling unit 227 and the combining module 224.

[0074] In some embodiments, in Figure 5 and Figure 6 , the signal coupling unit 227 can include a first coupling line 2271 and a second coupling line 2272 that are coupled to each other.

[0075] The first end of the first coupling line 2271 is connected to the output end of the first inductor unit 2241 and the output end of the second inductor unit 2242, respectively, and the second end of the first coupling line 2271 is connected to the first end of the combining output unit 2243. The first coupling line 2271 is connected between the combining node 2240 and the combining output unit 2243, and the power amplified radio frequency signal formed by combining at the combining node 2240 is input to the combining output unit 2243 after passing through the first coupling line 2271.

[0076] The first end of the second coupling line 2272 is connected to the detection circuit, and the second end of the second coupling line 2272 is grounded. The second coupling line 2272 couples the power amplified radio frequency signal on the first coupling line 2271, and the power amplified radio frequency signal coupled to the second coupling line 2272 is output from the first end thereof.

[0077] In some implementations, in Figure 5 and Figure 6 As shown, the second end of the second coupling line 2272 is grounded through the first output resistor R6, and the first end of the second coupling line 2272 is connected to the detector circuit 21b through the second output resistor R5.

[0078] In some implementations, the detector circuit 21b may be integrated into the power amplifier chip 21.

[0079] In some implementations, in Figure 6 As shown, the signal coupling unit 227 is located on the side of the combining matching capacitor 226 away from the first balun 221 and the second balun 222.

[0080] In this embodiment, the signal coupling unit is kept far away from the two baluns to avoid signal interference.

[0081] As one implementation method, in Figure 6 As shown, the output circuit 22 may further include a first combining harmonic suppression unit 2281 and a second combining harmonic suppression unit 2282. One end of the first combining harmonic suppression unit 2281 is connected to the output terminal of the first balun 221, and the other end of the first combining harmonic suppression unit 2281 is grounded. One end of the second combining harmonic suppression unit 2282 is connected to the output terminal of the second balun 222, and the other end of the second combining harmonic suppression unit 2282 is grounded.

[0082] For example, in Figure 5 and Figure 6 As shown, the first combining harmonic suppression unit 2281 includes a first combining inductor L13 and a first combining capacitor C12 connected in series. The first combining inductor L13 is connected to the output terminal of the first balun 221, and the first combining capacitor C12 is grounded. By configuring the inductance value of the first combining inductor L13 and the capacitance value of the first combining capacitor C12, the first combining harmonic suppression unit 2281 makes the impedance of harmonics in a specific frequency band (e.g., second-order or third-order harmonics) close to zero, thereby short-circuiting the harmonics in that specific frequency band and suppressing them to filter the first power amplified signal output by the first balun 221.

[0083] The second combining harmonic suppression unit 2282 includes a second combining inductor L23 and a second combining capacitor C22 connected in series. The second combining inductor L23 is connected to the output terminal of the second balun 222, and the second combining capacitor C22 is grounded. By configuring the inductance value of the second combining inductor L23 and the capacitance value of the second combining capacitor C22, the second combining harmonic suppression unit 2282 makes the impedance of harmonics in a specific frequency band (e.g., second-order or third-order harmonics) close to zero, thereby short-circuiting the harmonics in that specific frequency band and suppressing them to filter the first power amplified signal output by the second balun 222.

[0084] In one implementation, power amplifier 20 is used to amplify the power of radio frequency signals across multiple frequency bands. Please refer to... Figure 5 , Figure 7 and Figure 10 As shown, the RF front-end module 100 also includes a switch chip 30 disposed on the substrate 10. The switch chip 30 includes a plurality of switch units 31. Each switch unit 31 is used to select and input RF signals of at least one frequency band to the power amplifier chip 21. The power amplifier circuit 21a integrated in the power amplifier chip 21 performs power amplification processing on the RF signals of the frequency band.

[0085] In this embodiment, each switching unit 31 corresponds to at least one frequency band of radio frequency signal. When a radio frequency signal of a specific frequency band is output, the switching unit 31 corresponding to that specific frequency band is turned on, and the other switching units 31 are turned off. In this way, it is possible to be compatible with the output of radio frequency signals of different frequency bands.

[0086] In some implementations, please refer to [the relevant documentation]. Figure 5 and Figure 7 As shown, the first balun 221 and the second balun 222 are located on the first side of the power amplifier chip 21 along the first direction L1, and the switch chip 30 is located on the second side of the power amplifier chip 21 along the first direction L1.

[0087] In this embodiment, the first balun and the second balun used to process the output signal of the power amplifier chip are located on the first side of the first direction, and the traces of the output terminal of the power amplifier chip are also located on the first side of the first direction; the switch chip used to select the input signal of the power amplifier chip is located on the second side of the first direction, and the traces of the input terminal of the power amplifier chip are also located on the second side of the first direction. The traces of the input terminal and the traces of the output terminal of the power amplifier chip are far apart from each other, so they will not overlap or interfere with each other, which is beneficial to further improve the stability of the RF front-end module.

[0088] In some implementations, please refer to [the relevant documentation]. Figure 5 and Figure 7As shown, the radio frequency front end module 100 of the embodiment further comprises a control chip 40, which is arranged on the substrate and electrically connected with the power amplification chip 21. Exemplarily, the control chip 40 can be used to output a control signal, which can be a first control signal for controlling the on or off of each switch unit in the switch chip 30, or a second control signal for controlling the on of the output switch of the bias signal in the power amplification chip 21. Exemplarily, the control chip 40 can be a CMOS (Complementary Metal-Oxide-Semiconductor) chip.

[0089] In the embodiment, the control chip 40 is located at the second side of the power amplification chip 21 along the first direction L1.

[0090] In the embodiment, the wires between the power amplification chip and the control chip are away from the wires between the power amplification chip and the first and second baluns, and do not overlap and interfere with each other, which is conducive to further improving the stability of the radio frequency front end module.

[0091] In some embodiments, please continue to refer to Figure 5 As shown, the first direction L1 is parallel to the first central axis S1 of the power amplification chip 21; the control chip 40 and the switch chip 30 are arranged side by side along the second direction L2, and the second direction L2 is perpendicular to the first direction L1.

[0092] In the embodiment, the first and second directions correspond to the length / width direction and the width / length direction of the power amplification chip respectively, so that the wires between the power amplification chip and the first and second baluns, the control chip and the switch chip are more easily arranged regularly.

[0093] As an embodiment, please refer to Figure 4As shown, the power amplification circuit 21a includes a first power amplification branch 211 and a second power amplification branch 212, the first power amplification branch 211 includes a first output end 211a and a second output end 211b, and the second power amplification branch 212 includes a third output end 212a and a fourth output end 212b; the first balun 221 includes a first primary side 2210 and a first secondary side 2211 coupled with each other, two ends of the first primary side 2210 are connected to the first output end 211a and the second output end 211b of the first power amplification branch 211 respectively, one end of the first secondary side 2211 is connected to the signal output end 223 of the output circuit 22, and the other end of the first secondary side 2211 is grounded; the second balun 222 includes a second primary side 2220 and a second secondary side 2222 coupled with each other, two ends of the second primary side 2220 are connected to the third output end 212a and the fourth output end 212b of the second power amplification branch 212 respectively, one end of the second secondary side 2222 is connected to the signal output end 223 of the output circuit 22, and the other end of the second secondary side 2222 is grounded.

[0094] In the embodiment, the first power amplification branch 211 and the second power amplification branch 212 respectively perform power amplification processing on a pair of differential radio frequency signals, the first power amplification branch 211 outputs a first pair of differential power amplification signals formed by one of the differential radio frequency signals to the first balun 221 through the first output end 211a and the second output end 211b respectively; and the second power amplification branch 212 outputs a second pair of differential power amplification signals formed by the other of the differential radio frequency signals to the second balun 222 through the third output end 212a and the fourth output end 212b respectively. The first balun 221 and the second balun 222 respectively adopt a differential-to-single-ended architecture, the first balun 221 converts the first pair of differential power amplification signals output by the first power amplification branch 211 into a first power amplification signal, the second balun 222 converts the second pair of differential power amplification signals output by the second power amplification branch 212 into a second power amplification signal, and the first power amplification signal and the second power amplification signal are combined and output at the combining module 224.

[0095] In some embodiments, referring to Figure 6 and Figure 7 As shown, the output circuit 22 further includes a first capacitor C1 and a second capacitor C2 arranged on the substrate 10, wherein the first capacitor C1 is connected to the first balun 221, the second capacitor C2 is connected to the second balun 222, the first capacitor C1 is arranged in a magnetic core region of the first balun 221, a first end of the first capacitor C1 is connected to a midpoint 221a of the first primary side 2210, and a second end of the first capacitor C1 is grounded; the second capacitor C2 is arranged in a magnetic core region of the second balun 222, a first end of the second capacitor C2 is connected to a midpoint 222a of the second primary side 2220, and a second end of the second capacitor C2 is grounded.

[0096] The first primary side 2210 can include a first coil segment L1a and a second coil segment L1b connected in series with each other, and a midpoint 221a of the first primary side 2210 is a connection point of the first coil segment L1a and the second coil segment L1b. The second primary side 2220 can include a third coil segment L2a and a fourth coil segment L2b connected in series with each other, and a midpoint 222a of the second primary side 2220 is a connection point of the third coil segment L2a and the fourth coil segment L2b.

[0097] In the embodiment, the first capacitor is arranged between the midpoint of the first primary side and the ground terminal, the first pair of differential power amplification signals output by the first power amplification branch are differential mode signals, the midpoint of the first primary side is equivalent to a short circuit for the differential mode signals and is equivalent to an open circuit for common mode signals, the first capacitor is arranged in parallel to the ground at the midpoint of the first primary side, and a path for grounding the common mode signals is provided, so that the suppression level of the common mode signals can be improved. Similarly, the second capacitor is arranged between the midpoint of the second primary side and the ground terminal, the second pair of differential power amplification signals output by the second power amplification branch are differential mode signals, the midpoint of the second primary side is equivalent to a short circuit for the differential mode signals and is equivalent to an open circuit for common mode signals, the second capacitor is arranged in parallel to the ground at the midpoint of the second primary side, and a path for grounding the common mode signals is provided, so that the suppression level of the common mode signals can be improved. Therefore, the arrangement of the first capacitor and the second capacitor is conducive to improving the balance of the power amplifier.

[0098] In some embodiments, referring to Figure 8 As shown in the figure, the first secondary side 2211 surrounds the magnetic core region, and the first primary side 2210 surrounds the first secondary side 2211. The first primary side 2210 includes a first coil body 22101 and two first connecting portions 22102. The first coil body 22101 is a single coil structure with a first opening, and the first opening is located on the side of the first primary side 2210 close to the power amplification chip 21. The two first connecting portions 22102 are respectively connected to the two ends of the first coil body 22101. The first secondary side 2211 includes a second coil body 22111 and two second connecting portions 22112. The second coil body 22111 is a single coil structure with a second opening, and the second opening is located on the side of the first primary side 2210 away from the power amplification chip 21. The two second connecting portions 22112 are respectively connected to the two ends of the second coil body 22111.

[0099] Correspondingly, the second secondary side 2222 is arranged outside the magnetic core region, and the second primary side 2220 is arranged outside the second secondary side 2222; the second primary side 2220 comprises a third coil main body 22201 and two third connecting parts 22202, the third coil main body 22201 is a single coil structure with a third opening, the third opening is located on the side of the second primary side 2220 close to the power amplifier chip 21, and the two third connecting parts 22202 are respectively connected to the two ends of the third coil main body 22201; the second secondary side 2222 comprises a fourth coil main body 22221 and two fourth connecting parts 22222, the fourth coil main body 22221 is a single coil structure with a fourth opening, the fourth opening is close to the side of the second primary side 2220 away from the power amplifier chip 21, and the two fourth connecting parts 22222 are respectively connected to the two ends of the fourth coil main body 22221.

[0100] In the embodiment, the two first connecting parts of the first primary side are respectively connected to the first output end and the second output end of the first power amplifier branch, and the two first connecting parts of the first primary side are arranged close to the power amplifier chip, which is conducive to shortening the wiring distance between the first balun and the power amplifier chip; the two third connecting parts of the second primary side are respectively connected to the third output end and the fourth output end of the second power amplifier branch, and the two third connecting parts of the second primary side are arranged close to the power amplifier chip, which is conducive to shortening the wiring distance between the second balun and the power amplifier chip. At the same time, the two second connecting parts of the first secondary side are respectively used for connecting the signal output end and the ground of the output circuit, and the two second connecting parts of the first secondary side are away from the power amplifier chip, which is conducive to shortening the wiring distance between the first balun and the signal output end; the two fourth connecting parts of the second secondary side are respectively used for connecting the signal output end and the ground of the output circuit, and the two fourth connecting parts of the second secondary side are away from the power amplifier chip, which is conducive to shortening the wiring distance between the second balun and the signal output end.

[0101] In some embodiments, the first capacitor C1 and the second capacitor C2 are respectively a patch capacitor arranged on the surface of the substrate 10. In the embodiment, by arranging the patch capacitor, the manufacturing process of the capacitor is simplified, and the circuit debugging is easy to perform.

[0102] In some embodiments, referring to Figure 4 As shown in the figure, the power amplifier circuit 21 further comprises a first harmonic suppression unit 2294, a second harmonic suppression unit 2295, a third harmonic suppression unit 2296 and a fourth harmonic suppression unit 2297, the first harmonic suppression unit 2294 is connected in series between the first output end 211a and the ground end, the second harmonic suppression unit 2295 is connected in series between the second output end 211b and the ground end, the third harmonic suppression unit 2296 is connected in series between the third output end 212a and the ground end, and the fourth harmonic suppression unit 2297 is connected in series between the fourth output end 212b and the ground end.

[0103] Exemplarily, the first harmonic suppression unit 2294 includes a first matching capacitor C41 connected in series with the ground and a first matching inductor L41 connected with the first output terminal 211a, the second harmonic suppression unit 2295 includes a second matching capacitor C42 connected in series with the ground and a second matching inductor L42 connected with the second output terminal 211b, the third harmonic suppression unit 2296 includes a third matching capacitor C43 connected in series with the ground and a third matching inductor L43 connected with the third output terminal 212a, and the fourth harmonic suppression unit 2297 includes a fourth matching capacitor C44 connected in series with the ground and a fourth matching inductor L44 connected with the fourth output terminal 212b.

[0104] As an implementation, please continue to refer to Figure 7 As shown, the setting area A1 of the power amplification chip 21 is divided into a first chip area A11 and a second chip area A12 by the first middle axis S1, the first balun 221 is arranged in axial symmetry with respect to the second middle axis S11 of the first chip area A11, the second balun 222 is arranged in axial symmetry with respect to the third middle axis S12 of the second chip area A12, and the first middle axis S1, the second middle axis S11 and the third middle axis S12 are parallel to each other.

[0105] In the embodiment, when the first balun 221 and the second balun 222 respectively adopt a patch balun or a balun chip or a metal trace, the setting area of the first balun 221 on the substrate 10 is arranged in axial symmetry with respect to the second middle axis S11 of the first chip area A11, and the setting area of the second balun 222 on the substrate 10 is arranged in axial symmetry with respect to the third middle axis S12 of the second chip area A12, which can further improve the symmetry of the fifth trace between the power amplification circuit and the first balun and the sixth trace between the power amplification circuit and the second balun, further reduce the interference between the fifth trace and the sixth trace, and improve the stability of the radio frequency front end module.

[0106] In some embodiments, when the first balun 221 and the second balun 222 respectively adopt a metal trace, the metal trace pattern of the first balun 221 is arranged in axial symmetry with respect to the second middle axis S11 of the first chip area A11, and the metal trace pattern of the second balun 222 is arranged in axial symmetry with respect to the third middle axis S12 of the second chip area A12.

[0107] In the embodiment, the metal trace patterns of the first balun and the second balun are respectively axisymmetric patterns, which can further improve the symmetry of the fifth trace between the power amplification circuit and the first balun and the sixth trace between the power amplification circuit and the second balun, further reduce the interference between the fifth trace and the sixth trace, and improve the stability of the radio frequency front end module.

[0108] In some embodiments, referring to Figure 9 As shown, the first power amplification branch 211 further includes a first power amplification module 2111, a third balun 2112 and a second power amplification module 2113 connected in sequence; the second power amplification module 2113 is a differential power amplification module, and two output ends of the second power amplification module 2113 are respectively a first output end 211a and a second output end 211b of the first power amplification branch 211. The second power amplification branch 212 further includes a third power amplification module 2121, a fourth balun 2122 and a fourth power amplification module 2123 connected in sequence; the fourth power amplification module 2123 is a differential power amplification module, and two output ends of the fourth power amplification module 2123 are respectively a third output end 212a and a fourth output end 212b of the second power amplification branch 212.

[0109] In the embodiment, the last stage of amplification of the first power amplification branch and the second power amplification branch respectively adopts a differential amplification structure to ensure a high output power.

[0110] In some embodiments, referring to Figure 9 As shown, the third balun 2112 includes a third primary side 211c and a third secondary side 211d coupled to each other, one end of the third primary side 211c is connected to an output end of the first power amplification module 2111, the other end of the third primary side 211c is grounded, and two ends of the third secondary side 211d are respectively connected to two input ends of the second power amplification module 2113.

[0111] The third balun 2112 adopts a single-ended-to-differential architecture, which can convert a radio frequency signal output from the output end of the first power amplification module 2111 into a pair of differential signals, and the pair of differential signals form a first pair of differential power amplification signals after being power amplified by the second power amplification module 2113.

[0112] Correspondingly, the fourth balun 2122 includes a fourth primary side 212c and a fourth secondary side 212d coupled to each other, one end of the fourth primary side 212c is connected to an output end of the third power amplification module 2121, the other end of the fourth primary side 212c is grounded, and two ends of the fourth secondary side 212d are respectively connected to two input ends of the fourth power amplification module 2123.

[0113] The fourth balun 2122 adopts a single-ended-to-differential architecture, which can convert a radio frequency signal output by the output end of the third power amplification module 2121 into a pair of differential signals. The pair of differential signals are power amplified by the fourth power amplification module 2123 to form a second pair of differential power amplification signals.

[0114] In some embodiments, the power amplification circuit 21a further includes a third capacitor C3 and a fourth capacitor C4. The third capacitor C3 is connected to the third balun 2112. A first end of the third capacitor C3 is connected to the midpoint of the third secondary side 211d, and a second end of the third capacitor C3 is grounded. The fourth capacitor C4 is connected to the fourth balun 2122. A first end of the fourth capacitor C4 is connected to the midpoint of the fourth secondary side 212d, and a second end of the fourth capacitor C4 is grounded.

[0115] The third secondary side 211d can include a fifth coil segment and a sixth coil segment connected in series with each other. The midpoint of the third secondary side 211d is the connection point of the fifth coil segment and the sixth coil segment. The fourth secondary side 212d can include a seventh coil segment and an eighth coil segment connected in series with each other. The midpoint of the fourth secondary side 212d is the connection point of the seventh coil segment and the eighth coil segment.

[0116] In the present embodiment, the third capacitor is arranged between the midpoint of the third secondary side and the ground end. The midpoint of the third secondary side is equivalent to a short circuit for a differential mode signal and is equivalent to an open circuit for a common mode signal. The third capacitor arranged in parallel to the ground at the midpoint of the third secondary side provides a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Similarly, the fourth capacitor is arranged between the midpoint of the fourth secondary side and the ground end. The midpoint of the fourth secondary side is equivalent to a short circuit for a differential mode signal and is equivalent to an open circuit for a common mode signal. The fourth capacitor arranged in parallel to the ground at the midpoint of the fourth secondary side provides a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Therefore, the arrangement of the third capacitor and the fourth capacitor is conducive to improving the balance of the power amplifier.

[0117] In some embodiments, the third capacitor C3 and the fourth capacitor C4 are respectively patch capacitors arranged on the surface of the substrate 10. In the present embodiment, by arranging the patch capacitors, the manufacturing process of the capacitors is simplified, and circuit debugging is facilitated.

[0118] In some embodiments, the first power amplification module 2111 includes a first power amplification unit 2101 and a second power amplification unit 2102. The input end of the first power amplification unit 2101 is connected to the input end of the power amplifier 20. The first power amplification unit 2101 and the second power amplification unit 2102 are respectively single-ended power amplification units. The output end of the second power amplification unit 2102 is the output end of the first power amplification module 2111.

[0119] The third power amplification module 2121 comprises a third power amplification unit 2103 and a fourth power amplification unit 2104, the input end of the third power amplification unit 2103 is connected to the input end of the power amplifier 20, the third power amplification unit 2103 and the fourth power amplification unit 2104 are single-ended power amplification units respectively, and the output end of the fourth power amplification unit 2104 is the output end of the third power amplification module 2121.

[0120] In the embodiment, the first power amplification module and the third power amplification module respectively have two-stage power amplification structures, which is beneficial to improve the output power.

[0121] Exemplarily, referring to FIG. 2, Figure 9 As shown in FIG. 2, the first power amplification unit 2101 can comprise a first transistor Q1, the second power amplification unit 2102 can comprise a second transistor Q2, the third power amplification unit 2103 can comprise a third transistor Q3, and the fourth power amplification unit 2104 can comprise a fourth transistor Q4. The second power amplification module 2113 can comprise a fifth transistor Q5 and a sixth transistor Q6, wherein the control end of the fifth transistor Q5 is connected to the first end of the third auxiliary side 211d, and the control end of the sixth transistor Q6 is connected to the second end of the third auxiliary side 211d. The fourth power amplification module 2123 can comprise a seventh transistor Q7 and an eighth transistor Q8, wherein the control end of the seventh transistor Q7 is connected to the first end of the fourth auxiliary side 212d, and the control end of the eighth transistor Q8 is connected to the second end of the fourth auxiliary side 212d.

[0122] In some embodiments, referring to FIG. 2, Figure 9 As shown in FIG. 2, the radio frequency front end module 100 further comprises a first power supply end 11 and a second power supply end 12 on the substrate 10, the first power amplification unit 2101 and the second power amplification unit 2102 are respectively connected to the first power supply end 11, the second power amplification module 2113 is connected to the second power supply end 12 through the first balun 221, the third power amplification unit 2103 and the fourth power amplification unit 2104 are respectively connected to the first power supply end 11, and the fourth power amplification module 2123 is connected to the second power supply end 12 through the second balun 222.

[0123] In the embodiment, the first power amplification branch and the second power amplification branch are connected to the same power supply end through the first two-stage power amplification structures, and the first power amplification branch and the second power amplification branch are connected to another power supply end through the corresponding balun through the last-stage power amplification structure, so as to avoid the overlapping of the wires and the mutual interference of the wires, and improve the stability of the radio frequency front end module.

[0124] In some embodiments, referring to FIG. 2, Figure 9As shown, the output end 210a of the first power amplification unit 2101 and the output end 210b of the second power amplification unit 2102 are connected to the first power supply end 11 respectively, the output end 210c of the third power amplification unit 2103 and the output end 210d of the fourth power amplification unit 2104 are connected to the first power supply end 11 respectively, the second power supply end 12 is connected to the midpoint 221a of the first primary side 2210, and the second power supply end 12 is also connected to the midpoint 222a of the second primary side 2220.

[0125] In the embodiment, the first power amplification unit, the second power amplification unit, the third power amplification unit and the fourth power amplification unit are connected to the first power supply end through the output end respectively, so as to multiplex the output end as the power supply end, realize the multiplexing of the signal port, and simplify the circuit structure. Meanwhile, the first balun and the second balun are connected to the second power supply end through the midpoint of the primary side respectively, so as to multiplex the connection end of the first capacitor or the second capacitor as the power supply end, realize the multiplexing of the signal port, and simplify the circuit structure.

[0126] In some embodiments, referring to Figure 9 As shown, the power amplification circuit 21a further comprises a choke unit 213, the first end of one of the choke units 213 is connected to the output end (power supply end) 210a of the first power amplification unit 2101, and the second end of the choke unit 213 and the output end (power supply end) 210b of the second power amplification unit 2102 are connected to the first power supply end 11 respectively. The first end of another choke unit 213 is connected to the output end (power supply end) 210c of the third power amplification unit 2103, and the second end of the choke unit 213 and the output end (power supply end) 210d of the fourth power amplification unit 2104 are connected to the first power supply end 11 respectively.

[0127] The choke unit 213 is used to suppress the leakage of the radio frequency signal at the first power amplification unit 2101 and the third power amplification unit 2103 to the first power supply end 11, so as to ensure the normal work of the power amplifier 20. In addition, the choke unit 213 can also prevent the alternating current component in the first power supply voltage VCC1 output by the first power supply end 11 as an interference signal from entering the first power amplification unit 2101 and the third power amplification unit 2103.

[0128] In some embodiments, referring to Figure 9 As shown, the power amplification circuit 21a further comprises a stabilizing unit 214, the stabilizing unit 214 and the choke unit 213 are connected in parallel, the first end of the stabilizing unit 214 is connected to the first end of the choke unit 213, and the second end of the stabilizing unit 214 is connected to the second end of the choke unit 213. Exemplarily, the choke unit 213 can comprise an inductor.

[0129] One of the stabilizing units 214 is configured to suppress the out-of-band low frequency signal in the radio frequency signal coupled from the second power amplification unit 2102 and the subsequent units to the first power amplification unit 2101, and the other stabilizing unit 214 is configured to suppress the out-of-band low frequency signal in the radio frequency signal coupled from the fourth power amplification unit 2104 and the subsequent units to the third power amplification unit 2103, so as to reduce the out-of-band low frequency gain of the radio frequency signal and improve the stability of the power amplifier 20 during operation. For example, the stabilizing unit 214 can include at least one resistor.

[0130] In some embodiments, referring to Figure 9 As shown in the figure, the power amplification circuit 21a can further include a signal input end 20a, a first DC blocking capacitor 215 and a second DC blocking capacitor 216. One of the first DC blocking capacitors 215 is connected between the signal input end 20a and the control end of the first transistor Q1, which is configured to prevent the DC bias signal applied at the control end of the first transistor Q1 from flowing to the signal input end 20a, so as to ensure the smooth operation of the first transistor Q1. Another first DC blocking capacitor 215 is connected between the signal input end 20a and the control end of the third transistor Q3, which is configured to prevent the DC bias signal applied at the control end of the third transistor Q3 from flowing to the signal input end 20a, so as to ensure the smooth operation of the third transistor Q3. One of the second DC blocking capacitors 216 is connected between the first end of the first transistor Q1 and the control end of the second transistor Q2, which is configured to prevent the DC bias signal applied at the control end of the second transistor Q2 from flowing to the first transistor Q1, so as to ensure the smooth operation of the second transistor Q2. Another second DC blocking capacitor 216 is connected between the first end of the third transistor Q3 and the control end of the fourth transistor Q4, which is configured to prevent the DC bias signal applied at the control end of the fourth transistor Q4 from flowing to the third transistor Q3, so as to ensure the smooth operation of the fourth transistor Q4.

[0131] In some embodiments, referring to Figure 9 As shown in the figure, the power amplification circuit 21a can further include a first isolation unit 2171 and a second isolation unit 2172.

[0132] In the first power amplification branch 211, the first end of the first isolation unit 2171 is connected to the second end of the choke unit 213, and the second end of the first isolation unit 2171 is connected to the first power supply end 11. The first end of the second isolation unit 2172 is connected to the output end of the second power amplification unit 2102, and the second end of the second isolation unit 2172 is connected to the first power supply end 11. The first isolation unit 2171 and the second isolation unit 2172 are configured to isolate the radio frequency signal between the first power amplification unit 2101 and the second power amplification unit 2102, so as to improve the stability of the power amplifier 20 during operation.

[0133] In the second power amplification branch 212, the first end of the first isolation unit 2171 is connected to the second end of the choke unit 213, and the second end of the first isolation unit 2171 is connected to the first power supply end 11. The first end of the second isolation unit 2172 is connected to the output end of the fourth power amplification unit 2104, and the second end of the second isolation unit 2172 is connected to the first power supply end 11. The first isolation unit 2171 and the second isolation unit 2172 are used to isolate the radio frequency signals between the third power amplification unit 2103 and the fourth power amplification unit 2104, so as to improve the working stability of the power amplifier 20.

[0134] In some embodiments, referring to Figure 9 As shown in the figure, the power amplification circuit 21a can further include a first decoupling unit 2181 and a second decoupling unit 2182.

[0135] In the first power amplification branch 211, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By arranging the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the first power amplification unit 2101 can be filtered out, and the signals that are not filtered out will reach the branch where the choke unit 213 and the stabilization unit 214 are located, and then the choke unit 213 and the stabilization unit 214 will suppress the signals, so as to avoid the situation that the power amplifier 20 oscillates, and improve the working stability of the power amplifier 20.

[0136] In the second power amplification branch 212, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By arranging the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the third power amplification unit 2103 can be filtered out, and the signals that are not filtered out will reach the branch where the choke unit 213 and the stabilization unit 214 are located, and then the choke unit 213 and the stabilization unit 214 will suppress the signals, so as to avoid the situation that the power amplifier 20 oscillates, and improve the working stability of the power amplifier 20.

[0137] In some embodiments, referring to Figure 9 As shown in the figure, the power amplification circuit 21a can further include a third decoupling unit 2181 and a fourth decoupling unit 2182.

[0138] In the first power amplification branch 211, one end of the third secondary side 211d is connected to the control end of the fifth transistor Q5 through the third DC blocking capacitor 2191, and the third DC blocking capacitor 2191 can prevent the DC bias signal applied at the control end of the fifth transistor Q5 from flowing to the third secondary side 211d, so as to ensure the smooth work of the fifth transistor Q5. The other end of the third secondary side 211d is connected to the control end of the sixth transistor Q6 through the fourth DC blocking capacitor 2192, and the fourth DC blocking capacitor 2192 can prevent the DC bias signal applied at the control end of the sixth transistor Q6 from flowing to the third secondary side 211d, so as to ensure the smooth work of the sixth transistor Q6. In addition, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192 can also participate in impedance matching together with the third balun 2112, so as to improve the transmission efficiency of the radio frequency signal.

[0139] In the second power amplification branch 212, one end of the fourth secondary side 212d is connected to the control end of the seventh transistor Q7 through the third DC blocking capacitor 2191, and the third DC blocking capacitor 2191 can prevent the DC bias signal applied at the control end of the seventh transistor Q7 from flowing to the fourth secondary side 212d, so as to ensure the smooth work of the seventh transistor Q7. The other end of the fourth secondary side 212d is connected to the control end of the eighth transistor Q8 through the fourth DC blocking capacitor 2192, and the fourth DC blocking capacitor 2192 can prevent the DC bias signal applied at the control end of the eighth transistor Q8 from flowing to the fourth secondary side 212d, so as to ensure the smooth work of the eighth transistor Q8. In addition, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192 can also participate in impedance matching together with the fourth balun 2122, so as to improve the transmission efficiency of the radio frequency signal.

[0140] In some embodiments, referring to Figure 9 As shown, the power amplification circuit 21a can further include a fifth DC blocking capacitor 2193.

[0141] In the first power amplification branch 211, one end of the fifth DC blocking capacitor 2193 is connected to the second end of the third primary side 211c, and the other end is grounded. Since the first power supply voltage VCC1 output by the first power supply end 11 will flow to the first end of the second transistor Q2 through the third primary side 211c to supply power to the second transistor Q2, in order to avoid the first power supply voltage VCC1 being shorted to the ground at the second end of the third primary side 211c, the fifth DC blocking capacitor 2193 is arranged between the second end of the third primary side 211c and the ground end, which can play a role of DC blocking, so as to ensure the smooth work of the second transistor Q2.

[0142] In the second power amplification branch 212, one end of the fifth direct current blocking capacitor 2193 is connected to the second end of the fourth original side 212c, and the other end is grounded. Since the first power supply voltage VCC1 output by the first power supply end 11 will flow to the first end of the fourth transistor Q4 through the fourth original side 212c to supply power to the fourth transistor Q4, in order to avoid the first power supply voltage VCC1 being short-circuited to the ground at the second end of the fourth original side 212c, the fifth direct current blocking capacitor 2193 is arranged between the second end of the fourth original side 212c and the ground end, which can play a role of direct current blocking to ensure the smooth work of the fourth transistor Q4.

[0143] The above only describes the embodiments of the present application, and it should be pointed out that those skilled in the art can make improvements without departing from the creative concept of the present application, and these all belong to the protection scope of the present application.

Claims

1. A radio frequency front-end module, characterized in that, include: substrate; A power amplifier, the power amplifier including a power amplifier chip and an output circuit respectively disposed on the substrate; The power amplifier chip integrates a power amplifier circuit. The output circuit includes a first balun, a second balun, and a combining module. The first balun and the second balun are respectively connected to the power amplifier circuit. The power amplifier circuit amplifies a pair of differential radio frequency signals and outputs them to the first balun and the second balun. The combining module is used to combine the two power amplified signals output from the first balun and the second balun to output a power amplified radio frequency signal. The combining module includes a first inductor unit connected to the first balun, a second inductor unit connected to the second balun, and a combining output unit. The first end of the combining output unit is connected to the output ends of the first inductor unit and the second inductor unit, respectively, and the second end of the combining output unit is connected to the signal output end of the output circuit. The setting area of ​​the combining module, the setting areas of the first balun and the second balun, and the setting area of ​​the power amplifier chip are arranged sequentially along a first direction. The first inductor unit and the second inductor unit are located on both sides of the first central axis of the setting area of ​​the power amplifier chip. The first inductor unit includes a first inductor connected to the output terminal of the first balun and a second inductor connected to the first inductor, wherein the extension direction of the first inductor is not parallel to the extension direction of the second inductor; the second inductor unit includes a third inductor connected to the output terminal of the second balun and a fourth inductor connected to the third inductor, wherein the extension direction of the third inductor is not parallel to the extension direction of the fourth inductor.

2. The radio frequency front-end module according to claim 1, characterized in that, The first balun and the second balun are located on either side of the first central axis of the setting area of ​​the power amplifier chip.

3. The radio frequency front-end module according to claim 2, characterized in that, The first balun and the second balun are arranged symmetrically with respect to the first central axis of the power amplifier chip.

4. The radio frequency front-end module according to claim 3, characterized in that, The first inductor unit and the second inductor unit are arranged symmetrically with respect to the first central axis of the power amplifier chip.

5. The radio frequency front-end module according to claim 1, characterized in that, The first inductor is perpendicular to the second inductor, and the third inductor is perpendicular to the fourth inductor.

6. The radio frequency front-end module according to claim 5, characterized in that, The first inductor extends parallel to the first central axis, the second inductor extends perpendicular to the first central axis, the third inductor extends parallel to the first central axis, and the fourth inductor extends perpendicular to the first central axis.

7. The radio frequency front-end module according to claim 1, characterized in that, The first inductor, the second inductor, the third inductor, and the fourth inductor are respectively wound on the substrate, or the first inductor, the second inductor, the third inductor, and the fourth inductor are respectively surface mount inductors disposed on the surface of the substrate.

8. The radio frequency front-end module according to claim 2, characterized in that, The output circuit further includes an isolation resistor unit, the two ends of which are respectively connected to the output terminals of the first balun and the second balun, and the isolation resistor unit is located on the first central axis.

9. The radio frequency front-end module according to claim 2, characterized in that, The output circuit further includes a combining matching capacitor. The first end of the combining matching capacitor is connected to the output end of the first inductor unit, the output end of the second inductor unit, and the first end of the combining output unit. The second end of the combining matching capacitor is grounded. The combining matching capacitor is located on the first central axis.

10. The radio frequency front-end module according to claim 9, characterized in that, The first inductor unit includes a first inductor connected to the output terminal of the first balun and a second inductor connected to the first inductor. The extension direction of the first inductor is parallel to the first central axis, and the extension direction of the second inductor is perpendicular to the first central axis. The second inductor unit includes a third inductor connected to the output terminal of the second balun and a fourth inductor connected to the third inductor. The extension direction of the third inductor is parallel to the first central axis, and the extension direction of the fourth inductor is perpendicular to the first central axis. The first terminal of the combining matching capacitor is connected to the second inductor and the fourth inductor, respectively, and the combining matching capacitor is disposed in the gap region between the second inductor and the fourth inductor.

11. The radio frequency front-end module according to claim 10, characterized in that, The first inductor unit, the combined matching capacitor, the second inductor unit, the side of the second balun away from the power amplifier chip, and the side of the first balun away from the power amplifier chip are sequentially arranged to form a first rectangular area; The output circuit further includes an isolation resistor unit, the two ends of which are respectively connected to the output terminals of the first balun and the second balun. The isolation resistor unit is located on the first central axis and within the first rectangular area.

12. The radio frequency front-end module according to claim 4, characterized in that, The combined output unit includes at least two combined inductors connected in sequence, and the extension direction of the combined inductors is perpendicular to the first central axis.

13. The radio frequency front-end module according to claim 12, characterized in that, The combining inductor is a surface mount inductor disposed on the surface of the substrate.

14. The radio frequency front-end module according to claim 1, characterized in that, The output circuit further includes a signal coupling unit coupled to the combining module, the signal coupling unit being used to couple the power amplified radio frequency signal on the combining module to the detection circuit.

15. The radio frequency front-end module according to claim 14, characterized in that, The signal coupling unit includes a first coupling line and a second coupling line that are coupled to each other. The first coupling line is connected between the output terminal of the first inductor unit, the output terminal of the second inductor unit, and the combined output unit. The first end of the second coupling line is connected to the detector circuit, and the second end of the second coupling line is grounded.

16. The radio frequency front-end module according to claim 14, characterized in that, The output circuit further includes a combining matching capacitor. The first end of the combining matching capacitor is connected to the output end of the first inductor unit, the output end of the second inductor unit, and the first end of the combining output unit. The second end of the combining matching capacitor is grounded. The combining matching capacitor is located on the first central axis. The signal coupling unit is located on the side of the combining matching capacitor away from the first balun and the second balun.

17. The radio frequency front-end module according to claim 1, characterized in that, The power amplifier is used to amplify the power of radio frequency signals in multiple frequency bands. The radio frequency front-end module also includes a switching chip disposed on the substrate. The switching chip includes multiple switching units, each of which is used to select and input the radio frequency signal of at least one frequency band to the power amplifier chip. The first balun and the second balun are located on the first side of the power amplifier chip along the first direction, and the switching chip is located on the second side of the power amplifier chip along the first direction.

18. The radio frequency front-end module according to claim 17, characterized in that, The radio frequency front-end module also includes: A control chip is disposed on the substrate, and the control chip is electrically connected to the power amplifier chip; The control chip is located on the second side of the power amplifier chip along the first direction.

19. The radio frequency front-end module according to claim 18, characterized in that, The first direction is parallel to the first central axis of the power amplifier chip; the control chip and the switch chip are arranged side by side along the second direction, which is perpendicular to the first direction.

20. The radio frequency front-end module according to any one of claims 1 to 19, characterized in that, The power amplifier circuit includes a first power amplifier branch and a second power amplifier branch. The first power amplifier branch includes a first output terminal and a second output terminal, and the second power amplifier branch includes a third output terminal and a fourth output terminal. The first balun includes a coupled first primary side and a coupled first secondary side. The two ends of the first primary side are respectively connected to the first output terminal and the second output terminal of the first power amplifier branch. One end of the first secondary side is connected to the signal output terminal of the output circuit, and the other end of the first secondary side is grounded. The second balun includes a coupled second primary side and a coupled second secondary side. The two ends of the second primary side are respectively connected to the third output terminal and the fourth output terminal of the corresponding second power amplifier branch. One end of the second secondary side is connected to the signal output terminal of the output circuit, and the other end of the second secondary side is grounded.

21. The radio frequency front-end module according to claim 20, characterized in that, The output circuit also includes a first capacitor and a second capacitor disposed on the substrate; The first capacitor is connected to the first balun; the first capacitor is located in the core region of the first balun, the first end of the first capacitor is connected to the midpoint of the first primary side, and the second end of the first capacitor is grounded; the second capacitor is connected to the second balun; the second capacitor is located in the core region of the second balun, the first end of the second capacitor is connected to the midpoint of the second primary side, and the second end of the second capacitor is grounded.

22. The radio frequency front-end module according to claim 21, characterized in that, The first secondary edge is disposed outside the magnetic core region, and the first primary edge is disposed outside the first secondary edge; the first primary edge includes a first coil body and two first connecting parts, the first coil body is a single-turn structure with a first opening, the first opening is located on the side of the first primary edge closer to the power amplifier chip, and the two first connecting parts are respectively connected to the two ends of the first coil body; the first secondary edge includes a second coil body and two second connecting parts, the second coil body is a single-turn structure with a second opening, the second opening is close to the side of the first primary edge away from the power amplifier chip, and the two second connecting parts are respectively connected to the two ends of the second coil body; The second secondary edge is disposed outside the magnetic core region, and the second primary edge is disposed outside the second secondary edge; the second primary edge includes a third coil body and two third connecting parts, the third coil body is a single-turn structure with a third opening, the third opening is located on the side of the second primary edge closer to the power amplifier chip, and the two third connecting parts are respectively connected to the two ends of the third coil body; the second secondary edge includes a fourth coil body and two fourth connecting parts, the fourth coil body is a single-turn structure with a fourth opening, the fourth opening is close to the side of the second primary edge away from the power amplifier chip, and the two fourth connecting parts are respectively connected to the two ends of the fourth coil body.

23. The radio frequency front-end module according to claim 21, characterized in that, The first capacitor and the second capacitor are surface-mount capacitors disposed on the surface of the substrate.

24. The radio frequency front-end module according to claim 23, characterized in that, The power amplifier circuit further includes a first harmonic suppression unit, a second harmonic suppression unit, a third harmonic suppression unit, and a fourth harmonic suppression unit. The first harmonic suppression unit is connected in series between the first output terminal and the ground terminal. The second harmonic suppression unit is connected in series between the second output terminal and the ground terminal. The third harmonic suppression unit is connected in series between the third output terminal and the ground terminal. The fourth harmonic suppression unit is connected in series between the fourth output terminal and the ground terminal.

25. The radio frequency front-end module according to claim 24, characterized in that, The first harmonic suppression unit includes a first matching capacitor and a first matching inductor connected in series; the second harmonic suppression unit includes a second matching capacitor and a second matching inductor connected in series; the third harmonic suppression unit includes a third matching capacitor and a third matching inductor connected in series; and the fourth harmonic suppression unit includes a fourth matching capacitor and a fourth matching inductor connected in series.

26. The radio frequency front-end module according to any one of claims 1 to 19, characterized in that, The area where the power amplifier chip is located is divided into a first chip area and a second chip area by the first central axis. The first balun is symmetrically arranged with respect to the second central axis of the first chip area and the first balun is symmetrically arranged with respect to the third central axis of the second chip area. The first central axis, the second central axis and the third central axis are parallel to each other.

27. The radio frequency front-end module according to claim 20, characterized in that, The first power amplification branch further includes a first power amplification module, a third balun, and a second power amplification module connected in sequence; the second power amplification module is a differential power amplification module, and the two output terminals of the second power amplification module are the first output terminal and the second output terminal of the first power amplification branch, respectively; The second power amplification branch further includes a third power amplification module, a fourth balun, and a fourth power amplification module connected in sequence; the fourth power amplification module is a differential power amplification module, and the two output terminals of the fourth power amplification module are the third output terminal and the fourth output terminal of the second power amplification branch, respectively.

28. The radio frequency front-end module according to claim 27, characterized in that, The third balun includes a third primary side and a third secondary side that are coupled to each other. One end of the third primary side is connected to the output terminal of the first power amplifier module, and the other end of the third primary side is grounded. The two ends of the third secondary side are respectively connected to the two input terminals of the second power amplifier module. The fourth balun includes a fourth primary side and a fourth secondary side that are coupled to each other. One end of the fourth primary side is connected to the output terminal of the third power amplifier module, and the other end of the fourth primary side is grounded. The two ends of the fourth secondary side are respectively connected to the two input terminals of the fourth power amplifier module.

29. The radio frequency front-end module according to claim 28, characterized in that, The power amplifier circuit further includes a third capacitor and a fourth capacitor. The third capacitor is connected to the third balun. The first terminal of the third capacitor is connected to the midpoint of the third secondary side, and the second terminal of the third capacitor is grounded. The fourth capacitor is connected to the fourth balun, the first end of the fourth capacitor is connected to the midpoint of the fourth secondary side, and the second end of the fourth capacitor is grounded.

30. The radio frequency front-end module according to claim 29, characterized in that, The third capacitor and the fourth capacitor are surface-mount capacitors disposed on the surface of the power amplifier chip.

31. The radio frequency front-end module according to claim 27, characterized in that, The first power amplifier module includes a first power amplifier unit and a second power amplifier unit. The input terminal of the first power amplifier unit is connected to the input terminal of the power amplifier. The second power amplifier unit is a single-ended power amplifier unit. The output terminal of the second power amplifier unit is the output terminal of the first power amplifier module. The third power amplifier module includes a third power amplifier unit and a fourth power amplifier unit. The input terminal of the third power amplifier unit is connected to the input terminal of the power amplifier. The fourth power amplifier unit is a single-ended power amplifier unit, and the output terminal of the fourth power amplifier unit is the output terminal of the second power amplifier module.

32. The radio frequency front-end module according to claim 31, characterized in that, The radio frequency front-end module further includes a first power supply terminal and a second power supply terminal disposed on the substrate. The first power amplification unit and the second power amplification unit are respectively connected to the first power supply terminal. The second power amplification module is connected to the second power supply terminal through the first balun. The third power amplification unit and the fourth power amplification unit are respectively connected to the first power supply terminal. The fourth power amplification module is connected to the second power supply terminal through the second balun.

33. The radio frequency front-end module according to claim 32, characterized in that, The power supply terminal of the first power amplifier unit and the power supply terminal of the second power amplifier unit are respectively connected to the first power supply terminal, and the second power supply terminal is connected to the midpoint of the first primary side; The power supply terminals of the third power amplifier unit and the fourth power amplifier unit are respectively connected to the first power supply terminal, and the second power supply terminal is connected to the midpoint of the second primary side.

Citation Information

Patent Citations

  • Radio frequency power amplifier and electronic equipment

    CN115714582A

  • Radio frequency front-end module

    CN223488237U