An enhanced N-face GaN-based radio frequency power device and a method for manufacturing the same

Abstract

The application relates to an enhanced N-face GaN-based radio frequency power device and a preparation method thereof. The device comprises an N-face GaN buffer layer, an N-face AlGaN barrier layer, an interlayer, an N-face GaN channel layer, a groove, an N-face AlGaN cap layer, a source structure, a drain structure and a gate. The N-face GaN buffer layer, the N-face AlGaN barrier layer, the interlayer and the N-face GaN channel layer are sequentially arranged from bottom to top. The groove extends from the upper surface of the N-face GaN channel layer to the inside of the N-face GaN channel layer. The N-face AlGaN cap layer extends from the groove to part of the upper surface of the N-face GaN channel layer, and the part of the N-face AlGaN cap layer in the groove forms a gate slot. The gate is located in the gate slot. The device can modulate the control ability of the gate to 2DEG by controlling the thickness of the N-face GaN channel layer and the thickness of the N-face AlGaN cap layer, and the device has better characteristics at a higher working frequency.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to an enhanced N-plane GaN-based radio frequency power device and its fabrication method. Background Technology

[0002] Most GaN high electron mobility transistors (HEMTs) are depletion-type, meaning that the device is in the on state when the gate electrode is in a zero bias state. This means that depletion-type devices often require an additional negative power supply to turn off during application, increasing the complexity of circuit design.

[0003] Enhancement GaN HEMT devices are in a shutdown state when a zero bias or negative bias is applied to the gate electrode. No additional negative power supply is required to shut down the device, which can reduce power consumption at the power stage, simplify circuit design, and reduce chip size.

[0004] In the prior art, all methods for enhancing GaN HEMTs are based on Ga-plane GaN materials. However, the ability of GaN HEMTs based on Ga-plane GaN materials to control the two-dimensional electron gas (2DEG) is limited by the saturation leakage current, making it difficult to further improve. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides an enhanced N-plane GaN-based radio frequency power device and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] A first aspect of the present invention provides an enhanced N-plane GaN-based radio frequency power device, comprising: an N-plane GaN buffer layer, an N-plane AlGaN barrier layer, an insertion layer, an N-plane GaN channel layer, a trench, an N-plane AlGaN cap layer, a source structure, a drain structure, and a gate, wherein,

[0007] The N-plane GaN buffer layer, the N-plane AlGaN barrier layer, the insertion layer, and the N-plane GaN channel layer are arranged sequentially from bottom to top;

[0008] The trench extends from the upper surface of the N-face GaN channel layer to the interior of the N-face GaN channel layer;

[0009] The N-faceted AlGaN cap layer extends from the trench to a portion of the upper surface of the N-faceted GaN channel layer, and the portion of the N-faceted AlGaN cap layer located in the trench forms a gate trench.

[0010] The source structure is located on one side of the N-plane AlGaN cap layer and extends from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer.

[0011] The drain structure is located on the other side of the N-plane AlGaN cap layer and extends from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer.

[0012] The gate is located in the gate trench.

[0013] In one feasible implementation, it also includes: a substrate layer, a nucleation layer, a device isolation region, and a passivation layer, wherein,

[0014] The nucleation layer is located on the lower surface of the N-plane GaN buffer layer;

[0015] The substrate layer is located on the lower surface of the nucleation layer;

[0016] The device isolation region extends from the upper surfaces at both ends of the N-plane GaN channel layer to the interior of the N-plane GaN buffer layer;

[0017] The passivation layer covers the surface of the N-plane GaN channel layer, the surface of the N-plane AlGaN cap layer, the surface of the source structure, the surface of the drain structure, the surface of the gate, and the device isolation region.

[0018] In one feasible implementation, the source structure includes: a source doped layer and a source electrode, wherein,

[0019] The source doped layer extends from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer;

[0020] The source electrode is located on the upper surface of the source doped layer.

[0021] In one feasible embodiment, the drain structure includes: a drain doped layer and a drain electrode, wherein,

[0022] The drain doped layer extends from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer;

[0023] The drain electrode is located on the upper surface of the drain doped layer.

[0024] In one feasible implementation, the thickness of the source doped layer is greater than the sum of the thicknesses of the N-plane AlGaN barrier layer, the insertion layer, and the N-plane GaN channel layer;

[0025] The thickness of the drain doped layer is greater than the sum of the thicknesses of the N-plane AlGaN barrier layer, the insertion layer, and the N-plane GaN channel layer.

[0026] In one feasible implementation, both the source doped layer and the drain doped layer are made of N-type doped GaN.

[0027] The doping concentration of the source doped layer and the drain doped layer is 5e19~5e20cm. -3 .

[0028] In one feasible implementation, the gate is a T-gate;

[0029] A portion of the gate is located within the gate trench, and another portion extends to a portion of the surface of the N-plane AlGaN cap layer located on the upper surface of the N-plane GaN channel layer.

[0030] In one feasible embodiment, a Si ion-doped region is provided at the interface between the N-plane GaN buffer layer and the N-plane AlGaN barrier layer.

[0031] In one feasible approach, both the nucleation layer and the insertion layer are made of AlN.

[0032] The passivation layer is made of SiN.

[0033] A second aspect of the present invention provides a method for fabricating an enhanced N-plane GaN-based radio frequency power device, used to fabricate the enhanced N-plane GaN-based radio frequency power device provided in the first aspect of the present invention, comprising the following steps:

[0034] S1: Fabricate an N-face GaN buffer layer, an N-face AlGaN barrier layer, an insertion layer, and an N-face GaN channel layer arranged sequentially from bottom to top;

[0035] S2: Etch the upper surface of the N-side GaN channel layer to form a trench extending from the upper surface of the N-side GaN channel layer into the interior of the N-side GaN channel layer;

[0036] S3: An N-faceted AlGaN cap layer is prepared in the trench and on a portion of the upper surface of the N-faceted GaN channel layer; the portion of the N-faceted AlGaN cap layer located in the trench forms a gate trench;

[0037] S4: A source structure extending from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer is prepared on one side of the N-plane AlGaN cap layer;

[0038] S5: On the other side of the N-plane AlGaN cap layer, a drain structure extending from the upper surface of the N-plane GaN channel layer to the lower surface of the N-plane AlGaN barrier layer is prepared;

[0039] S6: Prepare the gate in the gate trench.

[0040] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0041] The present invention discloses an enhanced N-plane GaN-based RF power device, which forms an N-plane GaN / AlGaN heterojunction through an N-plane AlGaN barrier layer and an N-plane GaN channel layer, and forms an enhanced device by setting an N-plane AlGaN cap layer on the lower surface of the gate. This device can modulate the gate's control capability over the 2DEG by controlling the thickness of the N-plane GaN channel layer and the thickness of the N-plane AlGaN cap layer, thereby improving the gate control capability without affecting the device's saturation leakage current. This device has better characteristics at higher operating frequencies. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the structure of an enhanced N-plane GaN-based radio frequency power device provided in an embodiment of the present invention;

[0043] Figures 2a-2c These are schematic diagrams illustrating the principles of depletion-mode GaN-based devices, depletion-mode N-based GaN-based devices, and enhancement-mode N-based GaN-based devices.

[0044] Figure 3 This is a schematic diagram of another enhanced N-plane GaN-based radio frequency power device provided in an embodiment of the present invention;

[0045] Figures 4a to 4i This is a schematic diagram illustrating the steps of a method for fabricating an enhanced N-plane GaN-based radio frequency power device according to an embodiment of the present invention.

[0046] Figure label:

[0047] 1: Substrate layer; 2: Nucleation layer; 3: N-plane GaN buffer layer; 4: N-plane AlGaN barrier layer; 5: Insertion layer; 6: N-plane GaN channel layer; 7: N-plane AlGaN cap layer; 8: Source doped layer; 9: Drain doped layer; 10: Source electrode; 11: Drain electrode; 12: Gate; 13: Passivation layer; 14: Si ion doped region. Detailed Implementation

[0048] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0049] Example 1

[0050] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an enhanced N-plane GaN-based radio frequency power device provided in an embodiment of the present invention.

[0051] This embodiment provides an enhanced N-plane GaN-based RF power device, comprising: an N-plane GaN buffer layer 3, an N-plane AlGaN barrier layer 4, an insertion layer 5, an N-plane GaN channel layer 6, a trench, an N-plane AlGaN cap layer 7, a source structure, a drain structure, and a gate 12. The N-plane GaN buffer layer 3, the N-plane AlGaN barrier layer 4, the insertion layer 5, and the N-plane GaN channel layer 6 are arranged sequentially from bottom to top. The trench extends from the upper surface of the N-plane GaN channel layer 6 into its interior. The N-plane AlGaN cap layer 7 extends from the trench to a portion of the upper surface of the N-plane GaN channel layer 6, and the portion of the N-plane AlGaN cap layer 7 located in the trench forms a gate trench. The source structure is located on one side of the N-plane AlGaN cap layer 7 and extends from the upper surface of the N-plane GaN channel layer 6 to the lower surface of the N-plane AlGaN barrier layer 4. The drain structure is located on the other side of the N-plane AlGaN cap layer 7 and extends from the upper surface of the N-plane GaN channel layer 6 to the lower surface of the N-plane AlGaN barrier layer 4. The gate 12 is located in the gate trench.

[0052] Specifically, the crystal orientation index of Ga-faceted (gallium-faceted) GaN is

[0001] , and the crystal orientation index of N-faceted (nitrogen-faceted) GaN is

[0001] . Please refer to [link / reference needed]. Figure 2a and Figure 2b , Figure 2a This is a schematic diagram of a depletion-mode GaN-based device. Figure 2b This is a schematic diagram of a depletion-mode N-plane GaN-based device, showing the polarization directions of the Ga-plane and N-plane materials (spontaneous polarization P). sp and piezoelectric polarization P pe Conversely, the polarization directions of Ga-side AlGaN / GaN heterojunctions formed with Ga-side materials and N-side GaN / AlGaN heterojunctions formed with N-side materials are also opposite. Since the polarization direction is always from negative charge to positive charge, and 2DEG is formed by the accumulation of electrons attracted by positive charge, the 2DEG in Ga-side AlGaN / GaN heterojunctions is located below the AlGaN layer, while the 2DEG in N-side GaN / AlGaN heterojunctions is located above the AlGaN layer. Therefore, excessively thick AlGaN layers in depletion-mode Ga-side GaN-based devices will affect the gate control capability. However, since the saturation leakage current of the device is affected by the AlGaN layer thickness, excessively thin AlGaN layers will affect the saturation leakage current. Depletion-mode N-side GaN-based devices, on the other hand, can improve gate control capability without changing the AlGaN layer thickness by directly thinning the GaN layer above the AlGaN layer. Therefore, depletion-mode N-side GaN-based devices are unaffected by saturation leakage current. Further details can be found in [link to relevant documentation]. Figure 2c , Figure 2cThis is a schematic diagram of the principle of an enhancement-mode N-plane GaN-based device. An N-plane AlGaN cap is prepared on the lower surface of the gate electrode of the depletion-mode N-plane GaN-based device. A net negative polarization charge can be generated at the AlGaN cap / GaN channel interface. This net negative polarization charge can raise the energy band below the gate electrode, causing the 2DEG in the under-gate region to be depleted and eventually forming an enhancement-mode device.

[0053] In this embodiment, the N-side AlGaN barrier layer 4 and the N-side GaN channel layer 6 form an N-side GaN / AlGaN heterojunction. The 2DEG of the N-side GaN / AlGaN heterojunction is located in the lower surface layer of the N-side GaN channel layer 6, that is, above the N-side AlGaN barrier layer 4. Figure 1 The dashed line represents the 2DEG. The insertion layer 5 is used to increase the concentration of 2DEG in the device. The trenches in the N-side GaN channel layer 6 are used to further improve the gate control capability of the gate 12. The N-side AlGaN cap layer 7 is used to deplete the 2DEG in the under-gate region to form an enhancement-mode device. Furthermore, the threshold voltage of this enhancement-mode device can be modulated by controlling the thickness of the N-side AlGaN cap layer 7 and the content of Al components in the N-side AlGaN cap layer 7. Since the saturation leakage current of the device is mainly affected by the N-side AlGaN barrier layer 4, the enhancement-mode N-side GaN-based RF power device provided in this embodiment can directly modulate the gate 12's control capability over the 2DEG by changing the thickness of the N-side GaN channel layer 6 and the N-side AlGaN cap layer 7 without affecting the device's saturation leakage current. The enhancement-mode N-side GaN-based RF power device provided in this embodiment can effectively balance the relationship between the improvement of gate control capability and the saturation leakage current level.

[0054] In this embodiment, the enhanced N-plane GaN-based RF power device further includes: a substrate layer 1, a nucleation layer 2, a device isolation region, and a passivation layer 13. The nucleation layer 2 is located on the lower surface of the N-plane GaN buffer layer 3. The substrate layer 1 is located on the lower surface of the nucleation layer 2. The device isolation region extends from the upper surfaces at both ends of the N-plane GaN channel layer 6 into the interior of the N-plane GaN buffer layer 3. The passivation layer 13 covers the surface of the N-plane GaN channel layer 6, the surface of the N-plane AlGaN cap layer 7, the surface of the source structure, the surface of the drain structure, the surface of the gate 12, and the device isolation region.

[0055] Specifically, both the nucleation layer 2 and the insertion layer 5 are made of AlN. The passivation layer 13 is made of SiN. The substrate layer 1, nucleation layer 2, N-side GaN buffer layer 3, N-side AlGaN barrier layer 4, insertion layer 5, and N-side GaN channel layer 6 are sequentially arranged from bottom to top. The device isolation region is a stepped region formed by etching, used to form device isolation. The passivation layer 13 covers the surface of the device.

[0056] In this embodiment, the source structure includes a source doped layer 8 and a source electrode 10, wherein the source doped layer 8 extends from the upper surface of the N-side GaN channel layer 6 to the lower surface of the N-side AlGaN barrier layer 4. The source electrode 10 is located on the upper surface of the source doped layer 8. The drain structure includes a drain doped layer 9 and a drain electrode 11, wherein the drain doped layer 9 extends from the upper surface of the N-side GaN channel layer 6 to the lower surface of the N-side AlGaN barrier layer 4. The drain electrode 11 is located on the upper surface of the drain doped layer 9. The gate 12 is a T-type gate. A portion of the gate 12 is located within the gate trench, and another portion extends to a portion of the surface of the N-side AlGaN cap layer 7 located on the upper surface of the N-side GaN channel layer 6.

[0057] In this embodiment, the thickness of the source doped layer 8 is greater than the sum of the thicknesses of the N-side AlGaN barrier layer 4, the insertion layer 5, and the N-side GaN channel layer 6, and the thickness of the drain doped layer 9 is greater than the sum of the thicknesses of the N-side AlGaN barrier layer 4, the insertion layer 5, and the N-side GaN channel layer 6. That is, the upper surfaces of both the source doped layer 8 and the drain doped layer 9 are higher than the upper surface of the N-side GaN channel layer 6. The materials of both the source doped layer 8 and the drain doped layer 9 include N-type doped GaN, and the doping concentration of the source doped layer 8 and the drain doped layer 9 is 5e19–5e20 cm⁻¹. -3 The source doped layer 8 and the drain doped layer 9 extend at least to the lower surface of the N-side AlGaN barrier layer 4, that is, the source doped layer 8 and the drain doped layer 9 penetrate at least through the N-side GaN / AlGaN heterojunction. The source doped layer 8 and the drain doped layer 9 can be selectively extended into the interior of the N-side GaN buffer layer 3 according to actual needs.

[0058] Please see Figure 3 In one feasible implementation, a Si-doped region 14 is disposed at the interface between the N-side GaN buffer layer 3 and the N-side AlGaN barrier layer 4. It should be understood that the Si-doped region 14 is formed by ion implantation on the upper surface of the N-side GaN buffer layer 3 and / or the lower surface of the N-side AlGaN barrier layer 4. The Si-doped region 14 can suppress two-dimensional hole gas in the device. Exemplarily, the doping concentration of the Si-doped region 14 is 1e18 to 9e18 cm⁻¹. -3 .

[0059] In this embodiment, the thickness of the N-side AlGaN barrier layer 4 is 20–30 nm, the thickness of the N-side GaN channel layer 6 is 3–10 nm, and the distance between the bottom of the trench and the lower surface of the N-side GaN channel layer 6 is 3–4 nm. The thickness of the N-side AlGaN cap layer 7 is 2–5 nm. The source electrode 10 and drain electrode 11 are both made of Ti / Au / Ni / Au multilayer metal with thicknesses of 20 nm / 100 nm / 10 nm / 50 nm, respectively. The gate electrode 12 is made of Ni / Au / Ni multilayer metal with thicknesses of 30 nm / 300 nm / 30 nm, respectively.

[0060] The enhanced N-plane GaN-based RF power device provided in this embodiment forms an N-plane GaN / AlGaN heterojunction through an N-plane AlGaN barrier layer 4 and an N-plane GaN channel layer 6. An enhanced device is formed by depositing an N-plane AlGaN cap layer 7 on the lower surface of the gate 12. This device can modulate the control capability of the gate 12 on the 2DEG by controlling the thickness of the N-plane GaN channel layer 6 and the N-plane AlGaN cap layer 7 without affecting the device's saturation leakage current. This device exhibits better characteristics at higher operating frequencies. The enhanced N-plane GaN-based RF power device provided in this embodiment is based on polarization modulation effect, effectively increasing the device's operating frequency while achieving an enhanced device. This device has broad application prospects in future 6G and other higher frequency communication fields.

[0061] Example 2

[0062] Please see Figures 4a to 4i , Figures 4a to 4i This is a schematic diagram illustrating the steps of a method for fabricating an enhanced N-plane GaN-based radio frequency power device according to an embodiment of the present invention.

[0063] This embodiment provides a method for fabricating an enhanced N-plane GaN-based radio frequency power device, used to fabricate the enhanced N-plane GaN-based radio frequency power device provided in Embodiment 1 of the present invention, comprising the following steps:

[0064] S1: Prepare an N-face GaN buffer layer 3, an N-face AlGaN barrier layer 4, an insertion layer 5, and an N-face GaN channel layer 6 arranged sequentially from bottom to top.

[0065] Specifically, please see Figure 4aStep S1 includes: using a metal-organic chemical vapor deposition (MOCVD) device, sequentially growing a nucleation layer 2, an N-plane GaN buffer layer 3, an N-plane AlGaN barrier layer 4, an insertion layer 5, and an N-plane GaN channel layer 6 from bottom to top on the upper surface of the substrate layer 1, wherein the N-plane AlGaN barrier layer 4 and the N-plane GaN channel layer 6 form an N-plane heterojunction. Exemplarily, the thickness of the N-plane AlGaN barrier layer 4 is 20–30 nm, and the thickness of the N-plane GaN channel layer 6 is 3–10 nm. A 2–3 nm thick Si ion-doped region 14 is also formed at the interface between the N-plane GaN buffer layer 3 and the N-plane AlGaN barrier layer 4, and the doping concentration of the Si ion-doped region 14 is 1e18–9e18 cm⁻¹. -3 In this embodiment, the Si ion-doped region 14 is formed using delta doping technology.

[0066] S2: Etch the upper surface of the N-side GaN channel layer 6 to form a trench extending from the upper surface of the N-side GaN channel layer 6 into the interior of the N-side GaN channel layer 6.

[0067] Specifically, please see Figure 4b Electron beam lithography is used to define the gate pin region, and BCl3 / Cl2 is used to etch the N-side GaN channel layer 6 to form a trench extending from the upper surface of the N-side GaN channel layer 6 into the interior of the N-side GaN channel layer 6. In this embodiment, the trench is located in the middle of the N-side GaN channel layer 6, and the distance between the bottom of the trench and the lower surface of the N-side GaN channel layer 6 is 3-4 nm.

[0068] S3: An N-faced AlGaN cap layer 7 is prepared on a portion of the upper surface of the N-faced GaN channel layer 6 in the trench; the portion of the N-faced AlGaN cap layer 7 located in the trench forms a gate trench.

[0069] Specifically, please see Figure 4c An N-plane AlGaN cap layer 7 is selectively regrown in the trench and on a portion of the upper surface of the N-plane GaN channel layer 6 using plasma-assisted molecular beam epitaxy (PAMBE). The N-plane AlGaN cap layer 7 located in the trench covers the side surface and bottom of the trench, forming a gate trench. In this embodiment, the thickness of the N-plane AlGaN cap layer 7 is 2–5 nm.

[0070] S4: A source structure extending from the upper surface of the N-faced GaN channel layer 6 to the lower surface of the N-faced AlGaN barrier layer 4 is fabricated on one side of the N-faced AlGaN cap layer 7.

[0071] S5: A drain structure extending from the upper surface of the N-faced GaN channel layer 6 to the lower surface of the N-faced AlGaN barrier layer 4 is prepared on the other side of the N-faced AlGaN cap layer 7.

[0072] Specifically, step S5 includes:

[0073] S501: Please refer to Figure 4d On the upper surfaces of the N-side GaN channel layers 6 on both sides of the N-side AlGaN cap layer 7, source ohmic regrowth regions and drain ohmic regrowth regions are respectively defined by photolithography. Then, using an inductively coupled plasma (ICP) etching apparatus and a dry etching method with SiO2 as a hard mask, the source ohmic regrowth regions and drain ohmic regrowth regions are etched to form source trenches and drain trenches. In this embodiment, both the source trenches and drain trenches extend from the upper surface of the N-side GaN channel layer 6 to the lower surface of the N-side AlGaN barrier layer 4.

[0074] S502: Please refer to Figure 4e Using a PAMBE device, N-type heavily doped GaN layers are selectively epitaxially grown at low temperature in the source and drain trenches to form a source doped layer 8 and a drain doped layer 9. In this embodiment, the upper surfaces of both the source doped layer 8 and the drain doped layer 9 are higher than the upper surface of the N-plane GaN channel layer 6, and the doping concentration of the source doped layer 8 and the drain doped layer 9 is 5e19~5e20 cm⁻¹. -3 .

[0075] S503: Please refer to Figure 4f The two ends of the N-side GaN channel layer 6 are etched using a Cl2-based reactive ion etching (RIE) device to form a device isolation region extending from the upper surface of the N-side GaN channel layer 6 to the interior of the N-side GaN buffer layer 3.

[0076] S504: Please refer to Figure 4g Source metal and drain metal are deposited on the upper surfaces of the source doped layer 8 and drain doped layer 9, respectively, using an electron beam evaporation apparatus to form source electrode 10 and drain electrode 11. In this embodiment, both the source metal and drain metal are Ti / Au / Ni / Au stacked metals with thicknesses of 20nm / 100nm / 10nm / 50nm, respectively.

[0077] S6: Fabricate gate 12 in the gate trench.

[0078] Specifically, please see Figure 4h Gate metal is evaporated on the gate trench and the upper surface of a portion of the N-side AlGaN cap layer 7 located on the upper surface of the N-side GaN channel layer 6, and then stripped to form the gate 12. In this embodiment, the gate metal is a Ni / Au / Ni multilayer metal with thicknesses of 30nm / 300nm / 30nm, respectively.

[0079] In this embodiment, step S6 is followed by:

[0080] S7: Please see Figure 4iUsing plasma-enhanced chemical vapor deposition (PECVD) technology, a 20 nm thick SiN layer is deposited on the surface of the N-side GaN channel layer 6, the surface of the N-side AlGaN cap layer 7, the surface of the source structure, the surface of the drain structure, the surface of the gate 12, and the device isolation region as a passivation layer 13.

[0081] The method for fabricating an enhanced N-plane GaN-based RF power device provided in this embodiment forms an N-plane GaN / AlGaN heterojunction through an N-plane AlGaN barrier layer 4 and an N-plane GaN channel layer 6, and forms an enhanced device by fabricating an N-plane AlGaN cap layer 7 in the trench. The device fabricated by the method provided in this embodiment can modulate the gate's control capability over the 2DEG by controlling the thickness of the N-plane GaN channel layer 6 and the N-plane AlGaN cap layer 7, thereby improving the gate control capability without affecting the device's saturation leakage current. The device fabricated by the method provided in this embodiment has better characteristics at higher operating frequencies.

[0082] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. An enhanced N-plane GaN-based radio frequency power device, characterized in that, include: The structure consists of an N-side GaN buffer layer (3), an N-side AlGaN barrier layer (4), an insertion layer (5), an N-side GaN channel layer (6), a trench, an N-side AlGaN cap layer (7), a source structure, a drain structure, and a gate (12). The N-side GaN buffer layer (3), the N-side AlGaN barrier layer (4), the insertion layer (5), and the N-side GaN channel layer (6) are arranged sequentially from bottom to top; The trench extends from the upper surface of the N-face GaN channel layer (6) to the interior of the N-face GaN channel layer (6); The N-face AlGaN cap layer (7) extends from the trench to a portion of the upper surface of the N-face GaN channel layer (6), and the portion of the N-face AlGaN cap layer (7) located in the trench forms a gate trench; The source structure is located on one side of the N-plane AlGaN cap layer (7) and extends from the upper surface of the N-plane GaN channel layer (6) to the lower surface of the N-plane AlGaN barrier layer (4). The drain structure is located on the other side of the N-plane AlGaN cap layer (7) and extends from the upper surface of the N-plane GaN channel layer (6) to the lower surface of the N-plane AlGaN barrier layer (4). The gate (12) is located in the gate trench; The source structure includes: a source doped layer (8) and a source electrode (10), wherein, The source doped layer (8) extends from the upper surface of the N-plane GaN channel layer (6) to the lower surface of the N-plane AlGaN barrier layer (4); The source electrode (10) is located on the upper surface of the source doped layer (8); The drain structure includes: a drain doped layer (9) and a drain electrode (11), wherein, The drain doped layer (9) extends from the upper surface of the N-plane GaN channel layer (6) to the lower surface of the N-plane AlGaN barrier layer (4); The drain electrode (11) is located on the upper surface of the drain doped layer (9); The thickness of the source doped layer (8) is greater than the sum of the thicknesses of the N-plane AlGaN barrier layer (4), the insertion layer (5), and the N-plane GaN channel layer (6); The thickness of the drain doped layer (9) is greater than the sum of the thicknesses of the N-plane AlGaN barrier layer (4), the insertion layer (5), and the N-plane GaN channel layer (6); A Si ion doped region (14) is provided at the interface between the N-face GaN buffer layer (3) and the N-face AlGaN barrier layer (4).

2. The enhanced N-plane GaN-based RF power device according to claim 1, characterized in that, Also includes: Substrate (1), nucleation layer (2), device isolation region and passivation layer (13), wherein, The nucleation layer (2) is located on the lower surface of the N-plane GaN buffer layer (3); The substrate layer (1) is located on the lower surface of the nucleation layer (2); The device isolation region extends from the upper surfaces at both ends of the N-face GaN channel layer (6) into the interior of the N-face GaN buffer layer (3); The passivation layer (13) covers the surface of the N-side GaN channel layer (6), the surface of the N-side AlGaN cap layer (7), the surface of the source structure, the surface of the drain structure, the surface of the gate (12), and the device isolation region.

3. The enhanced N-plane GaN-based RF power device according to claim 1, characterized in that, The source doped layer (8) and the drain doped layer (9) are both made of N-type doped GaN. The doping concentration of the source doped layer (8) and the drain doped layer (9) is 5e19~5e20 cm⁻¹. -3 .

4. The enhanced N-plane GaN-based RF power device according to claim 1, characterized in that, The gate (12) is a T-shaped gate; A portion of the gate (12) is located within the gate trench, and another portion extends to a portion of the surface of the N-plane AlGaN cap layer (7) located on the upper surface of the N-plane GaN channel layer (6).

5. The enhanced N-plane GaN-based RF power device according to claim 2, characterized in that, The materials of both the nucleation layer (2) and the insertion layer (5) include AlN; The material of the passivation layer (13) includes SiN.

6. A method for fabricating an enhanced N-plane GaN-based radio frequency power device, characterized in that, The method for fabricating the enhanced N-plane GaN-based radio frequency power device according to any one of claims 1 to 5 includes the following steps: S1: Prepare an N-face GaN buffer layer (3), an N-face AlGaN barrier layer (4), an insertion layer (5), and an N-face GaN channel layer (6) arranged sequentially from bottom to top; S2: Etching is performed on the upper surface of the N-face GaN channel layer (6) to form a trench extending from the upper surface of the N-face GaN channel layer (6) into the interior of the N-face GaN channel layer (6); S3: An N-faced AlGaN cap layer (7) is prepared in the trench and on a portion of the upper surface of the N-faced GaN channel layer (6); the portion of the N-faced AlGaN cap layer (7) located in the trench forms a gate trench; S4: A source structure extending from the upper surface of the N-faced GaN channel layer (6) to the lower surface of the N-faced AlGaN barrier layer (4) is prepared on one side of the N-faced AlGaN cap layer (7); S5: A drain structure extending from the upper surface of the N-faced GaN channel layer (6) to the lower surface of the N-faced AlGaN barrier layer (4) is prepared on the other side of the N-faced AlGaN cap layer (7); S6: Prepare a gate electrode (12) in the gate trench.

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