Method for improved aesthetics of dynamic glass

By applying a specific voltage curve in the electrochromic device, the problem of uneven color distribution in the electrochromic device during the color transformation process is solved, and a more uniform color transformation effect is achieved and the user experience is improved.

CN119631017APending Publication Date: 2025-03-14VIEW INC
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Patent Information

Application Number
CN202380050823.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-06-29
Filing Date
2023-06-29
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

The existing electrochromic devices have the problem of uneven color distribution during the color transformation process, which leads to uneven color distribution on the surface of the window glass, affecting the user experience.

Method used

The coloring state of the electrochromic material is controlled to ensure uniformity of the color transition by applying a specific voltage curve, including a ramp to the drive period, a drive period, a drive inversion period and a hold period in the electrochromic device.

Benefits of technology

The uniformity in the tinting transformation process of electrochromic devices is achieved, reducing the optical density difference between the edge and center of the window glass, and improving the user experience.

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Abstract

Methods, computer program products, and devices for controlling coloring of an electrochromic device are disclosed, including, for example, applying a ramp-to-drive voltage having a magnitude that increases during a ramp-to-drive period; applying a drive voltage having a substantially constant magnitude and the same polarity as the ramp-to-drive voltage at the end of the ramp-to-drive period; applying a driving reverse voltage; and applying a holding voltage having the same polarity as the driving voltage and a smaller magnitude than the driving voltage.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The PCT request form is filed concurrently with this specification as a part of this application. Each application to which this application claims the benefit of or priority as identified in the concurrently filed PCT request form is incorporated herein by reference in its entirety and for all purposes. Background Art

[0003] Electrochromism is a phenomenon in which a material exhibits a reversible electrochemically mediated change in an optical property when placed in different electronic states, usually when subjected to a voltage change. The optical property is usually one or more of color, transmittance, absorbance, and reflectance. A well-known electrochromic material is tungsten oxide (WO3). Tungsten oxide is a cathodic electrochromic material in which the color transition from transparent to blue occurs by electrochemical reduction.

[0004] Electrochromic materials can be incorporated into windows for residential, commercial and other uses, for example. The color, transmittance, absorptivity and / or reflectivity of such windows can be changed by changing the characteristics of the electrochromic material, i.e., an electrochromic window is a window that can be darkened or lightened electronically. A small voltage applied to the electrochromic device of the window will darken the window; reversing the voltage will lighten the window. This capability allows the amount of light passing through the window to be controlled and provides an opportunity for electrochromic windows to be used as energy-saving devices.

[0005] Despite the discovery of electrochromism in the 1960s, electrochromic devices (and, in particular, electrochromic windows) unfortunately continue to suffer from a variety of problems and, despite many recent advances in electrochromic technology, apparatus, and related methods of manufacturing and / or using electrochromic devices, have not yet begun to realize their full commercial potential. Summary of the invention

[0006] In some embodiments, methods for controlling tinting transitions of electrochromic devices and optically switchable windows are provided.

[0007] One aspect of the present disclosure provides a method for controlling the optical state of an electrochromic device. In some embodiments, the method includes: applying a ramp-to-drive voltage to the electrochromic device in a ramp-to-drive period, wherein the ramp-to-drive voltage has a magnitude that increases in the ramp-to-drive period; after the ramp-to-drive period, applying a drive voltage to the electrochromic device in a drive period, wherein the drive voltage has a substantially constant magnitude and a polarity that is the same as the polarity of the ramp-to-drive voltage at the end of the ramp-to-drive period; after the drive period, applying a drive reversal voltage to the electrochromic device in a drive reversal period, wherein the drive reversal voltage has a polarity opposite to the polarity of the drive voltage; and after the drive reversal period, applying a hold voltage to the electrochromic device in a hold period, wherein the hold voltage has a polarity that is the same as the polarity of the drive voltage and has a magnitude that is smaller than the magnitude of the drive voltage.

[0008] Another aspect of the present disclosure provides a device including a controller. The controller includes a processor and a memory. The controller is configured to control the optical state of an electrochromic device by performing any of the methods disclosed herein.

[0009] Another aspect of the present disclosure provides a non-transitory machine-readable medium storing instructions that, when executed by a controller including a processor and a memory, cause the controller to perform a method for controlling an optical state of an electrochromic device, the method being any of the methods disclosed herein.

[0010] These objects and features and other objects and features of the present disclosure will become more fully apparent from the following description and appended claims, or may be learned by the practice of the present disclosure as set forth hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1A A top view of an electrochromic device is shown.

[0012] Figure 1B is a diagram showing a plot of a local voltage in a first transparent conductive layer and a local voltage in a second transparent conductive layer.

[0013] Figure 1C is a graph showing the V across the electrochromic device. eff Illustration of a drawing.

[0014] Figure 1D is a cross-sectional representation of an electrochromic window.

[0015] Figure 1E An end view of an electrochromic window is shown.

[0016] Figure 1F A top view of the electrochromic window is shown.

[0017] Figure 2A A schematic cross-sectional view of an electrochromic window is shown.

[0018] Figure 2B A schematic cross-sectional view of another electrochromic window is shown.

[0019] Figure 3A An electrochromic device is schematically depicted in cross section.

[0020] Figure 3B is a schematic cross-section of an electrochromic device in a faded state (or transitioning to a faded state).

[0021] Figure 3C is a schematic cross-section of an electrochromic device in a colored state (or transitioning to a colored state).

[0022] Figure 4 Depicted is a simplified block diagram of some components of a window controller and other components of a window controller system.

[0023] Figure 5A The voltage control curve achieved by varying the voltage supplied to the ECD is shown.

[0024] Figure 5B and Figure 5C The voltage curve of the coloring transition process according to some embodiments of the present disclosure is schematically illustrated.

[0025] Figure 5D Another voltage curve of the coloring transition process is schematically illustrated.

[0026] Fig. 6A Two voltage curves are shown according to some embodiments.

[0027] Figure 6B Optical density curves of ECD controlled by methods according to some embodiments are shown.

[0028] Figure 7 Data demonstrating the improvements in color transition speed and color uniformity provided by methods according to some embodiments are presented.

[0029] Figure 8 A flow chart of a process for controlling an electrochromic device according to some embodiments is shown.

[0030] Fig. 9 A flow chart of a process for controlling an electrochromic device is shown.

[0031] Fig.10The optical density during the tinting transition from T1 to T4 is shown for an ECD with a bus bar distance of 59 inches.

[0032] Fig.11 Similar data are shown for the ECD transition from T1 to T3.

[0033] Fig.12 The ECD optical density of ECDs of various sizes at four different stages of the color transition process from T1 to T4 is shown.

[0034] Fig.13 Data obtained from a staining process that changes the staining state of the ECD from T1 to T3 are shown.

[0035] Fig.14 Data for comparing coloration performance between methods according to some embodiments and conventional methods are shown for coloration transition from T1 to T4.

[0036] Fig.15 Comparative data of the staining transition process changing the ECD staining level from T1 to T3 are shown.

[0037] Fig.16 Data comparing the time to reach a steady-state optical density target between the disclosed method according to some embodiments and a conventional method are shown.

[0038] Fig.17 The driving time was compared between the disclosed method and the conventional method.

[0039] Fig.18 Data is shown for a method directed to improving color uniformity after the ECD has reached a steady-state target optical density, according to some embodiments. DETAILED DESCRIPTION

[0040] The disclosed embodiments relate to methods, apparatus, and systems for controlling tinting transitions of electrochromic devices and optically switchable windows.

[0041] Numerical ranges include the values ​​that limit the range. Each maximum numerical limit given throughout this specification is intended to include each lower numerical limit, as if such lower numerical limits were explicitly written out herein. Each minimum numerical limit given throughout this specification will include each higher numerical limit, as if such higher numerical limits were explicitly written out herein. Each numerical range given throughout this specification will include each narrower numerical range that falls within such wider numerical ranges, as if such narrower numerical ranges were all explicitly written out herein.

[0042] The terms "switchable window", "optically switchable window", "electrochromic window", "smart window" and "tintable window" are used interchangeably. These terms refer to building windows made of one or more electrochromic devices, each of which includes an electrochromic stack.

[0043] The terms "electrochromic device", "optically switchable device" and "dynamic glass" are used interchangeably herein. These terms refer to a device that changes optical state in response to an electrical input. It can reversibly cycle between two or more optical states. Switching between these states is controlled by applying a predefined current and / or voltage to the device. The device typically includes two thin conductive sheets spanning at least one optically active layer. An electrical input that drives the change in optical state is applied to the thin conductive sheets. In certain embodiments, the input is provided by a bus bar that is electrically connected to the conductive sheets.

[0044] "Bus bar" refers to a conductive strip attached to a conductive layer, such as a transparent conductive electrode that spans the area of ​​an optically switchable device. The bus bar delivers potential and current to the conductive layer from external leads. An optically switchable device comprises two or more bus bars, each of which is connected to a single conductive layer of the device. In various embodiments, the bus bars form elongated lines that span a majority of the length or width of the device. Typically, the bus bars are located near the edge of the device.

[0045] The “applied voltage” or V app Refers to the difference in potential applied to two opposite polarity bus bars on an electrochromic device. Each bus bar is electronically connected to a separate transparent conductive layer. The applied voltage can have different magnitudes or functions, such as driving an optical transition or maintaining an optical state. An optically switchable device material, such as an electrochromic material, is sandwiched between the transparent conductive layers. Each of the transparent conductive layers experiences a potential drop between the location where the bus bar is connected to it and a location away from the bus bar. Generally, the greater the distance from the bus bar, the greater the potential drop in the transparent conductive layer. The local potential of the transparent conductive layer is generally referred to herein as V TCL The bus bars of opposite polarity may be laterally separated from each other on the surface of the optically switchable device.

[0046] The “effective voltage” or V eff Refers to the potential between the positive transparent conductive layer and the negative transparent conductive layer at any particular location on the optically switchable device. In Cartesian space, the effective voltage is defined for a specific x,y coordinate on the device. When measuring V eff At the point where the two transparent conductive layers are separated in the z-direction (by the device material), but share the same x,y coordinates.

[0047] In the present disclosure, when used to modify a numerical value or amount, the word "about" or "approximately" extends the coverage of the numerical value or amount to a range of numerical values ​​or amounts that are 10% lower than the numerical value or amount to a range of numerical values ​​or amounts that are 10% higher than the numerical value or amount. For example, the phrase "a range of about 2 minutes to 10 minutes" covers a range of 1.8 minutes to 10.1 minutes.

[0048] The headings provided herein are not intended to limit the disclosure.

[0049] Unless otherwise defined herein, all technical and scientific terms used herein have the same meaning as those generally understood by those of ordinary skill in the art. Various scientific dictionaries including the terms included herein are well known and available to those skilled in the art. Although any methods and materials similar or equivalent to those described herein can be used to practice or test the embodiments disclosed herein, some methods and materials are described.

[0050] The terms defined immediately below are more fully described by reference to the specification as a whole.It is to be understood that this disclosure is not limited to the particular methodology, protocols, and reagents described, as these may vary depending on the context in which they are used by one skilled in the art.

[0051] As used herein, the singular terms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise.

[0052] I. Introduction

[0053] Switchable windows or electrochromic devices (ECDs) controlled by conventional methods have many problems that impair the user experience. First, during the color transition process, such as using Figure 5A During the transition process of the voltage curve shown in , the tinting distribution over the face of the window glass tends to be uneven. When the window changes from a clearer state to a more tinted state, the tinting level at the two edges where the two bus bars are located tends to be darker compared to the center. When the window changes from a more tinted state to a clearer state, the two edges of the window glass tend to be clearer compared to the center. For example, Figure 7 Included are images 710-716, which show two windows transitioning from a clearer state to a more tinted state. During the transition, the windows are more tinted at the two vertical edges and clearer at the center of the window glass.

[0054] As explained above, a voltage or current is applied to the electrochromic device across the two conductive layers of the ECD to cause the electrochromic stack to change color states. Figure 5AA voltage-time curve 5001 is shown for a conventional method of changing the electrochromic stack of an ECD from a clearer state to a more tinted state. The charge applied by the busbars to the conductive layers of the ECD tends to decrease from the busbars toward the center of the window glass. The charge gradient may result in an uneven tinting distribution. Different materials and electrical properties of the conductive layers may also result in an uneven tinting distribution.

[0055] In various embodiments, driving the transition in a typical electrochromic device is accomplished by applying a defined voltage to two spaced-apart bus bars on the device. In such a device, it is convenient to position the bus bars perpendicular to the smaller dimension of the rectangular window (see Figure 1A ). This is because the transparent conductive layer used to deliver the applied voltage on the surface of the thin film device has an associated sheet resistance, and the bus bar arrangement allows the shortest span that the current must travel to cover the entire area of ​​the device, thus shortening the time it takes for the conductor layer to fully charge over its respective area, and therefore shortening the time it takes to switch the device.

[0056] When the applied voltage V app When supplied across the busbars, substantially all areas of the device experience a lower local effective voltage (V eff The center of the device (midway between the two bus bars) usually has the lowest V eff This can result in an unacceptably small optical switching range and / or unacceptably slow switching times in the center of the device. These problems may not exist at the edge of the device, closer to the busbars. Figure 1B and Figure 1C Explain this in more detail.

[0057] Figure 1A A top view of an electrochromic window sheet 1100 including bus bars having a planar configuration is shown. The electrochromic window sheet 1100 includes a first bus bar 1105 disposed on a first conductive layer 1110 and a second bus bar 1115 disposed on a second conductive layer 1120. An electrochromic stack (not shown) is sandwiched between the first conductive layer 1110 and the second conductive layer 1120. As shown, the first bus bar 1105 may extend substantially across one side of the first conductive layer 1110. The second bus bar 1115 may extend substantially across the side of the second conductive layer 1120 opposite to the side of the electrochromic window sheet 1100 on which the first bus bar 1105 is disposed. Some devices may have additional bus bars, for example, on all four edges, but this complicates manufacturing. Further discussion of bus bar configurations, including bus bars in planar configurations, is found in US Patent Application No. 13 / 452,032, filed April 20, 2012, which is incorporated herein by reference in its entirety.

[0058] Figure 1B 1125 is a diagram showing, for example, a local voltage in the first transparent conductive layer 1110 and a voltage in the second transparent conductive layer 1120 that drives the transition of the electrochromic window 1100 from a clear state to a tinted state. TCL As shown, due to the sheet resistance and the current through the first conductive layer 1110, the voltage drops from the left hand side of the first conductive layer 1110 (e.g., the location where the first bus bar 1105 is disposed on the first conductive layer 1110 and the location where the voltage is applied) to the right hand side. Plot 1130 also shows the local voltage V in the second conductive layer 1120. TCL As shown, due to the sheet resistance of the second conductive layer 1120, the voltage increases (decreases in magnitude) from the right-hand side of the second conductive layer 1120 (e.g., the location where the second bus bar 1115 is disposed on the second conductive layer 1120 and the location where the voltage is applied) to the left-hand side. In this example, the applied voltage V app The value of is the voltage difference between the right end of the potential plot 130 and the left end of the potential plot 1125. The effective voltage V at any location between the bus bars eff The value of is the difference between the values ​​of curves 1130 and 1125 at the location on the x-axis corresponding to the location of interest.

[0059] Figure 1C 1 is a diagram showing V between the first conductive layer 1110 and the second conductive layer 1120 of the electrochromic window 1100 at both ends of the electrochromic device. eff 1135 is a diagram of a drawing. As explained, the effective voltage is the local voltage difference between the first conductive layer 1110 and the second conductive layer 1120. The area of ​​the electrochromic device subjected to a higher effective voltage transitions between optical states faster than the area subjected to a lower effective voltage. As shown, the effective voltage is lowest at the center of the electrochromic window 1100 and highest at the edge of the electrochromic window 1100. The voltage drop on the device is due to the ohmic loss when the current passes through the device. The voltage drop on the large electrochromic window can be mitigated by configuring additional bus bars in the viewing area of ​​the window, actually dividing a large optical window into multiple smaller electrochromic windows, which can be driven in series or in parallel. However, due to the contrast between the visible area and the bus bars in the visible area, this approach may not be aesthetically attractive. That is, it may be more pleasing to have a monolithic electrochromic device without any dispersed bus bars in the visible area.

[0060] In the case of an electrochromic device with planar bus bars, it can be shown that Veff Usually given by:

[0061]

[0062] in:

[0063] V app is the voltage difference applied to the busbars to drive the electrochromic window aperture;

[0064] ΔV(0) is the V at the bus bar connected to the first transparent conductive layer. eff ;

[0065] ΔV(L) is the V at the bus bar connected to the second transparent conductive layer eff ;

[0066] ΔV(L / 2) is the V at the center of the device eff , located in the middle between the two planar bus bars;

[0067] R = sheet resistance of transparent conductive layer;

[0068] J = instantaneous average current density; and

[0069] L = distance between bus bars of the electrochromic device.

[0070] It is assumed that the transparent conductive layer has a sheet resistance substantially similar (if not identical) to the calculations. However, one of ordinary skill in the art will appreciate that even if the transparent conductive layer has a different sheet resistance, the applicable physics of ohmic voltage drop and local effective voltage still applies.

[0071] As R, J, or L increases, the V across the device eff Reduced, thereby slowing or reducing device coloration during transition and even in the final optical state.

[0072] In summary, it has been recognized that both transparent conductive layers experience an ohmic drop and that this drop increases with distance from the associated bus bar, so for both transparent conductive layers, V TCL Decreases with distance from the busbar. V eff Reduced in the position removed from the two bus bars. Figure 1C As shown in , this voltage curve can lead to non-uniformity in the ECD. The center of the window tends to transition more slowly than the edge, with the center being less tinted when transitioning from a faded state to a tinted state and more tinted when transitioning from a tinted state to a faded state.

[0073] Some embodiments of the present disclosure solve the problem of uneven coloration distribution during coloration transition by applying a reversal voltage pulse during application of a driving voltage to an electrochromic device, at the end of the application, or after the application. Typically, a reversal voltage pulse is a voltage of relatively short duration with a polarity opposite to the driving voltage and / or a magnitude smaller than the driving voltage. A clearing pulse is a reversal pulse that makes the ECD clearer. In the case of transitioning from a clearer state to a more colored state, some embodiments apply a clearing pulse during application of a driving voltage, at the end of the application, or after the application.

[0074] Another problem with some switchable windows or ECDs and control methods thereof is that the tinting distribution of the window is not uniform when the window is held in a stable tinted state. Some embodiments of the present disclosure address this problem by periodically applying clearing pulses while the tinted window is in a hold state. The effective voltage applied to the ECD during the hold state has a value similar to Figure 1C A voltage curve similar to the voltage curve shown in , which will result in uneven coloring of the ECD.

[0075] In some cases, the problem of uneven tinting may be particularly significant or noticeable when the transition is made from a clearer state to a more tinted state. The human visual processing system may more easily detect non-uniformities in darker areas, such as those formed at the edges of the busbars of a switchable window when the window undergoes a tinting transition. The human eye may not be as easy to discern changes in a relatively clear range of tinting states. For example, if the initial tinting state of the window is 30% transmittance and the final tinting state is 60% transmittance, it may not be easy for an observer to discern that a change is occurring or that the tinting level on the window glass is uneven. Therefore, in the context of the present disclosure, most examples will be in the context of darkening occurring at the edges of the window near the busbars. However, unless expressly excluded, the disclosed embodiments also apply to transitions from a more tinted state to a clearer state.

[0076] For example, switchable window can have 4 different tinting states, which are called T1, T2, T3 and T4 from light to dark, and these tinting states have different optical density or transmittance levels. During the transition from brighter state to darker state, for example, during the transition from T1 to T4, from T2 to T4, from T3 to T4, from T1 to T3, from T2 to T3 and from T1 to T2, uneven tinting distribution is usually more significant. The example of T1-T4 tinting state is described below. When the state transition from more tinting to clearer state, uneven tinting distribution is not too problematic. When the transition is from a relatively clear state to another relatively clear state (such as from tinting 2 to tinting 1), the situation may be particularly so. In many embodiments, when the end state of tinting transition is relatively dark, with high optical density or low transmittance, uneven tinting distribution is more serious. For example, this problem may be most significant when the transmittance (% Tvis) is in the range of about 0.01% to 50%, 0.1% to 40%, 0.2% to 30%, or 0.3% to 25%, 0.4% to 20%. In some embodiments, the difference in optical density ("OD") between the center of the glass and the edge of the glass may be 0.5 OD to 1.5 OD. For example, if the center is at 1.22 OD (6% Tvis), the edge of the glass may be at 2.5 OD (0.32% Tvis) at the end of the drive step for the T1-T3 transition from 55% Tvis to 6% Tvis.

[0077] Although some of the examples and embodiments presented herein describe switchable windows with four tinting states, the present disclosure is not limited to such windows. For example, the disclosed embodiments are also applicable to windows with 2, 3, 4, 5, 6, 7, 8, 9, 10 or more tinting states.

[0078] Yet another problem with some switchable windows or ECDs and their associated control methods may be slow tinting transitions. Some embodiments of the present disclosure address this problem by increasing the ramp to drive rate and / or increasing the magnitude of the drive voltage. Increasing the ramp to drive rate may speed up the onset of the tinting transition as perceived by occupants of the building. Increasing the drive voltage magnitude may speed up the time to complete the transition to the target tinting level. Thus, by increasing the ramp to drive rate, the tinting transition may be accelerated. Figure 5A Two different adjustments to the color transition voltage curve 5001 are used to increase the transition speed. One of these adjustments - increasing the slope to the drive rate - speeds up the time when the user can detect the beginning of the transition. Another of these adjustments - increasing the magnitude of the drive voltage - speeds up the completion of the entire color transition.

[0079] Electrochromic device

[0080] In order to orient the reader to the embodiments of the systems and methods disclosed herein, a brief discussion of electrochromic devices and window controllers is provided. This initial discussion is for context only, and the embodiments of the systems, window controllers, and methods described subsequently are not limited to the specific features and manufacturing processes of this initial discussion.

[0081] refer to Figure 1D-1F Specific examples of electrochromic windows are described to illustrate the embodiments described herein. Figure 1D is a cross-sectional representation of the electrochromic window 100 (see Figure 1F The electrochromic window pane is manufactured starting with a glass plate 105 (see section line X'-X'). Figure 1E An end view of the electrochromic window 100 is shown (see Figure 1F The observation angle Y-Y') and Figure 1F A top view of the electrochromic window pane 100 is shown. Figure 1D An electrochromic window after manufacturing on a glass plate 105 is shown, with the edges deleted to produce an area 140 around the periphery of the window. The electrochromic window is also laser-scribed and has a bus bar attached. A bus bar is a metal strip or strip used to distribute current. The glass window 105 has a diffusion barrier 110 and a first transparent conductive oxide layer (TCO) 115 on the diffusion barrier. In this example, the edge deletion process removes the TCO 115 and the diffusion barrier 110, but in other embodiments, only the TCO is removed, leaving the diffusion barrier intact. The TCO 115 is the first of the two conductive layers used to form an electrode of an electrochromic device manufactured on a glass plate. In this example, the glass plate includes a lower layer of glass and a diffusion barrier. Therefore, in this example, a diffusion barrier is formed, and then a first TCO, an electrochromic stack 125 (e.g., having an electrochromic ion conductor and an opposing electrode layer) and a second TCO 130 are formed. In one embodiment, the electrochromic device (electrochromic stack and second TCO) is manufactured in an integrated deposition system, wherein the glass sheet does not leave the integrated deposition system at any time during the manufacture of the stack. In one embodiment, the first TCO layer is also formed using the integrated deposition system, wherein the glass sheet does not leave the integrated deposition system during deposition of the electrochromic stack and the (second) TCO layer. In one embodiment, all layers (diffusion barrier layer, first TCO, electrochromic stack, and second TCO) are deposited in an integrated deposition system, wherein the glass sheet does not leave the integrated deposition system during deposition. In this example, isolation trenches 120 are cut through the TCO 115 and diffusion barrier layer 110 prior to deposition of the electrochromic stack 125. After fabrication is complete, the trenches 120 are made with the assumption that electrically isolating the area of ​​the TCO 115 that will be present below the bus bar 1 (see Figure 1D). This is done to avoid charge accumulation and coloration of the electrochromic device under the bus bar, which is undesirable.

[0082] After the electrochromic device is formed, an edge delete process and additional laser scribing are performed. Figure 1D Region 140 is depicted where the device has been removed, in this example, from the peripheral area around laser-scribed grooves 150, 155, 160, and 165. Grooves 150, 160, and 165 pass through the electrochromic stack and also through the first TCO and the diffusion barrier. Grooves 155 pass through the second TCO 130 and the electrochromic stack, but not through the first TCO 115. Laser-scribed grooves 150, 155, 160, and 165 are made to isolate portions 135, 145, 170, and 175 of the electrochromic device that are potentially damaged during the deletion process from the edge of the operable electrochromic device. In this example, laser-scribed grooves 150, 160, and 165 pass through the first TCO to help isolate the device (laser-scribed grooves 155 do not pass through the first TCO, otherwise they would cut off the electrical connection of bus bar 2 first with the TCO and therefore with the electrochromic stack). The one or more lasers used in the laser scribing process are typically, but not necessarily, pulsed lasers, such as diode-pumped solid-state lasers. For example, the laser scribing process can be performed using a suitable laser from IPG Photonics (Oxford, MA) or from Ekspla (Vilnius, Lithuania). Scribing can also be performed mechanically, such as by diamond tip scribing. One of ordinary skill in the art will appreciate that the laser scribing process can be performed at different depths and / or in a single process, thereby varying or not varying the laser cutting depth during a continuous path around the perimeter of the electrochromic device. In one embodiment, edge deletion is performed to the depth of the first TCO.

[0083] After the laser scribing is complete, the busbars are attached. Non-penetrating busbar 1 is applied to the second TCO. Non-penetrating busbar 2 is applied to areas of the undeposited device that are in contact with the first TCO (e.g., due to a mask protecting the first TCO from device deposition), or in this example, an edge deletion process (e.g., laser ablation using an apparatus with an XY or XYZ galvanometer) is used to remove material down to the first TCO. In this example, both busbar 1 and busbar 2 are non-penetrating busbars. Penetrating busbars are typically pressed into and through the electrochromic stack to make contact with the TCO at the bottom of the stack. A non-penetrating busbar is a busbar that does not penetrate into the layers of the electrochromic stack, but instead makes electrical and physical contact on the surface of a conductive layer, such as a TCO.

[0084] The TCO layer can be electrically connected using non-conventional bus bars, for example, bus bars made using screen and photolithography patterning methods. In one embodiment, electrical communication is established with the device's transparent conductive layer by screen printing (or using another patterning method) a conductive ink and then thermally curing or sintering the ink. Advantages of using the above device configuration include, for example, simpler manufacturing and less laser scribing than conventional techniques using through bus bars.

[0085] After the busbars are connected, the device is integrated into an insulating glass unit (IGU), which includes wiring for example busbars, etc. In some embodiments, one or two of the busbars are inside the finished IGU, however in one embodiment, one busbar is located outside the seal of the IGU and one busbar is located inside the IGU. In the previous embodiment, the zone 140 is used to form a seal with one face of a spacer for forming an IGU. Therefore, the wire or other connection to the busbar extends between the spacer and the glass. Since many spacers are made of conductive metal (e.g., stainless steel), it is desirable to take measures to avoid short circuits caused by electrical connectivity between the busbar and the connector and the metal spacer. In the embodiment described here, both busbars are in the main seal of the finished IGU.

[0086] Figure 2A Shows about Figure 1D-1F Schematic diagram of a cross-section of an electrochromic window integrated into an IGU 200. Spacer 205 is used to separate the electrochromic window from the second window 210. The second window 210 in the IGU 200 is a non-electrochromic window, however, the embodiments disclosed herein are not limited thereto. For example, the window 210 may have an electrochromic device and / or one or more coatings thereon, such as a low-E coating, etc. The window 201 may be a laminated glass, such as Figure 2B As shown (window 201 is laminated to reinforcing pane 230 by resin 235). Between spacer 205 and glass 201 of electrochromic window is primary seal material 215. This primary seal material is also located between spacer 205 and second glass window 210. Around the perimeter of spacer 205 is secondary seal 220. Busbar wiring / leads pass through the seal to connect to the controller. Secondary seal 220 can be much thicker than depicted. These seals help keep moisture out of interior space 225 of IGU. They are also used to prevent argon or other gases inside IGU from escaping.

[0087] Figure 3AElectrochromic device 300 is schematically depicted in cross section. Electrochromic device 300 includes substrate 302, first conductive layer (CL) 304, electrochromic layer (EC) 306, ion conductive layer (IC) 308, counter electrode layer (CE) 310, and second conductive layer (CL) 314. Layers 304, 306, 308, 310, and 314 are collectively referred to as electrochromic stack 320. Voltage source 316 operable to apply a potential across electrochromic stack 320 effects transition of the electrochromic device from, for example, a faded state to a (depicted) colored state. The order of the layers may be reversed relative to the substrate.

[0088] Electrochromic devices with the different layers described can be manufactured as all solid-state devices and / or all inorganic devices. Such devices and methods of manufacturing them are described in more detail in the following documents: U.S. patent application serial number 12 / 645,111, filed on December 22, 2009, and named "Fabrication of Low-Defectivity Electrochromic Devices" by Mark Kozlowski et al. as inventors, and U.S. patent application serial number 12 / 645,159, filed on December 22, 2009, and named "Electrochromic Devices" by Zhongchun Wang et al. as inventors, both of which are hereby incorporated by reference in their entirety. However, it should be understood that any one or more layers in the stack may contain a certain amount of organic material. The same is true for liquids that may be present in small amounts in one or more layers. It should also be understood that solid-state materials can be deposited or otherwise formed by a process using a liquid component, such as certain processes using sol-gel or chemical vapor deposition.

[0089] In addition, it should be understood that the reference to the transition between the faded state and the colored state is non-limiting and only provides one example of many electrochromic transitions that can be these. Unless otherwise specified herein (including the aforementioned discussion), whenever a faded-colored transition (or an equivalent clear-colored transition) is mentioned, the corresponding device or process covers other optical state transitions, such as non-reflective-reflective, transparent-opaque, etc. In addition, the term "faded" or "clear" refers to an optically neutral state, for example, colorless, transparent or translucent. Still further, unless otherwise specified herein, the "color" or "coloring" of the electrochromic transition is not limited to any specific wavelength or wavelength range. As understood by those skilled in the art, the selection of appropriate electrochromic and counter electrode materials determines the relevant optical transitions.

[0090] In the embodiments described herein, the electrochromic device reversibly cycles between a faded / clear state and a colored / colored state. In some cases, when the device is in a faded state, a potential is applied to the electrochromic stack 320 so that the available ions in the stack are primarily located in the opposing electrode 310. When the potential on the electrochromic stack is reversed, the ions are transported across the ion conductive layer 308 to the electrochromic material 306 and the material is transformed to a colored state. In a similar manner, the electrochromic device of the embodiments described herein can reversibly cycle between different coloration levels (e.g., a faded state, a darkest colored state, and an intermediate level between the faded state and the darkest colored state).

[0091] Reference again Figure 3A , voltage source 316 can be configured to operate with radiation and other environmental sensors. As described herein, voltage source 316 interacts with a device controller (not shown in this figure). In addition, voltage source 316 can interact with an energy management system that controls the electrochromic device based on various criteria such as time of year, time of day, and measured environmental conditions. Such an energy management system combined with large area electrochromic devices (e.g., electrochromic windows) can significantly reduce the energy consumption of a building.

[0092] Any material having suitable optical, electrical, thermal and mechanical properties can be used as substrate 302. Such substrates include, for example, glass, plastics and mirrored materials. Suitable glass includes transparent or tinted soda-lime glass, including soda-lime float glass. The glass can be tempered or untempered.

[0093] In many cases, the substrate is a glass pane of a size suitable for residential window applications. The size of such a glass pane can vary widely according to the specific needs of the residence. In other cases, the substrate is architectural glass. Architectural glass is typically used in commercial buildings, but can also be used in residential buildings, and typically but not necessarily separates an indoor environment from an outdoor environment. In certain embodiments, architectural glass is at least 20 inches by 20 inches, and can be larger, such as up to about 80 inches by 120 inches. Architectural glass is usually at least about 2 mm thick, usually between about 3 mm and about 6 mm thick. Of course, the electrochromic device can be scaled relative to a substrate smaller or larger than architectural glass. In addition, the electrochromic device can be arranged on a mirror of any size and shape.

[0094] On top of substrate 302 is conductive layer 304. In certain embodiments, one or both of conductive layers 304 and 314 are inorganic and / or solid. Conductive layers 304 and 314 can be made of many different materials, including conductive oxides, thin metal coatings, conductive metal nitrides, and composite conductors. Typically, conductive layers 304 and 314 are transparent at least in the wavelength range in which the electrochromic layer exhibits electrochromism. Transparent conductive oxides include metal oxides and metal oxides doped with one or more metals. Examples of these metal oxides and doped metal oxides include indium oxide, indium tin oxide, doped indium oxide, tin oxide, doped tin oxide, zinc oxide, aluminum zinc oxide, doped zinc oxide, ruthenium oxide, doped ruthenium oxide, etc. Since oxides are commonly used in these layers, they are sometimes referred to as "transparent conductive oxide" (TCO) layers. Substantially transparent thin metal coatings, as well as combinations of TCO and metal coatings, can also be used.

[0095] In some embodiments, a commercially available substrate, such as a glass substrate, contains a transparent conductive layer coating. Such products can be used for both the substrate and the conductive layer. Examples of such glass substrates include those sold under the trademark TEC Glass by Pilkington, Inc. of Toledo, Ohio. TM Sold and marketed by PPG Industries of Pittsburgh, Pennsylvania under the trademark SUNGATE TM 300 and SUNGATE TM 500 Conductive coated glass for sale. TEC Glass TM It is glass coated with a conductive layer of tin oxide fluoride.

[0096] In some embodiments of the present invention, the same conductive layer is used for both conductive layers (i.e., conductive layers). In some embodiments, different conductive materials are used for each conductive layer. For example, in some embodiments, TEC Glass is used for the substrate (float glass) and the conductive layer (fluorinated tin oxide). TM , and indium tin oxide (ITO) is used for the conductive layer. TM In some embodiments, a sodium diffusion barrier layer is present between the glass substrate and the TEC conductive layer.

[0097] The function of the conductive layer is to spread the potential provided by the voltage source 316 over the surface of the electrochromic stack 320 to the interior regions of the stack with a relatively small ohmic potential drop. The potential is transferred to the conductive layer through an electrical connection to the conductive layer. In some embodiments, bus bars (one in contact with the conductive layer 304 and one in contact with the conductive layer 314) provide the electrical connection between the voltage source 316 and the conductive layers 304 and 314. The conductive layers 304 and 314 can also be connected to the voltage source 316 by other conventional methods.

[0098] Covering the conductive layer 304 is the electrochromic layer 306. In some embodiments, the electrochromic layer 306 is inorganic and / or solid. The electrochromic layer can comprise any one or more of a number of different electrochromic materials, including metal oxides. Such metal oxides include tungsten oxide (WO3), molybdenum oxide (MoO3), niobium oxide (Nb2O5), titanium oxide (TiO2), copper oxide (CuO), iridium oxide (Ir2O3), chromium oxide (Cr2O3), manganese oxide (Mn2O3), vanadium oxide (V2O5), nickel oxide (Ni2O3), cobalt oxide (Co2O3), and the like. During operation, the electrochromic layer 306 transfers ions to the counter electrode layer 310 and receives ions from the counter electrode layer to cause an optical transition.

[0099] Generally, the coloring (or change in any optical property - e.g., absorbance, reflectance, and transmittance) of an electrochromic material is caused by reversible ion insertion (e.g., intercalation) into the material and the corresponding charge-balancing electron injection. Generally, some of the ions responsible for the optical transition are irreversibly bound in the electrochromic material. Some or all of the irreversibly bound ions are used to compensate for the "blind charge" in the material. In most electrochromic materials, suitable ions include lithium ions (Li+) and hydrogen ions (H+) (i.e., protons). However, in some cases, other ions will be suitable. In various embodiments, lithium ions are used to produce the electrochromic phenomenon. Lithium ion intercalation into tungsten oxide (WO 3-y (0 < y ≤ ~0.3)) causes tungsten oxide to change from transparent (bleached state) to blue (colored state).

[0100] Refer again to Figure 3A, in the electrochromic stack 320, the ion conductive layer 308 is sandwiched between the electrochromic layer 306 and the counter electrode layer 310. In some embodiments, the counter electrode layer 310 is inorganic and / or solid. The counter electrode layer can include one or more of a variety of different materials that act as an ion reservoir when the electrochromic device is in a faded state. During the electrochromic transition initiated by, for example, application of an appropriate potential, the counter electrode layer transfers some or all of the ions it holds to the electrochromic layer, changing the electrochromic layer to a colored state. At the same time, in the case of NiWO, the counter electrode layer is colored as the ions are lost.

[0101] In some embodiments, suitable materials for a counter electrode complementary to WO3 include nickel oxide (NiO), nickel tungsten oxide (NiWO), nickel vanadium oxide, nickel chromium oxide, nickel aluminum oxide, nickel manganese oxide, nickel magnesium oxide, chromium oxide (Cr2O3), manganese oxide (MnO2), and Prussian blue.

[0102] When charge is removed from the counter electrode 310 made of nickel tungsten oxide (ie, ions are transferred from the counter electrode 310 to the electrochromic layer 306), the counter electrode layer will change from a transparent state to a colored state.

[0103] In the depicted electrochromic device, between the electrochromic layer 306 and the counter electrode layer 310, there is an ion conductive layer 308. When the electrochromic device is transformed between the faded state and the colored state, the ion conductive layer 308 serves as a medium through which ions (in the form of an electrolyte) are transmitted. Preferably, the ion conductive layer 308 has a high conductivity for the relevant ions of the electrochromic layer and the counter electrode layer, but has a sufficiently low electronic conductivity so that negligible electron transfer occurs during normal operation. A thin ion conductive layer with high ion conductivity allows fast ion conduction, and therefore fast switching for achieving high performance electrochromic devices. In certain embodiments, the ion conductive layer 308 is inorganic and / or solid.

[0104] Examples of suitable ion-conducting layers (for electrochromic devices with different IC layers) include silicates, silicon oxides, tungsten oxides, tantalum oxides, niobium oxides, and borates. These materials can be doped with different dopants, including lithium. Lithium-doped silicon oxides include lithium silicon-aluminum-oxides. In some embodiments, the ion-conducting layer includes a silicate-based structure. In some embodiments, silicon-aluminum-oxide (SiAlO) is used for the ion-conducting layer 308.

[0105] The electrochromic device 300 may include one or more additional layers (not shown), such as one or more passive layers. Passive layers for improving certain optical properties may be included in the electrochromic device 300. Passive layers for providing moisture or scratch resistance may also be included in the electrochromic device 300. For example, the conductive layer may be treated with an anti-reflective or protective oxide or nitride layer. Other passive layers may be used to hermetically seal the electrochromic device 300.

[0106] Figure 3B 4 is a schematic cross-section of an electrochromic device in a faded state (or transitioning to a faded state). According to a specific embodiment, electrochromic device 400 includes a tungsten oxide electrochromic layer (EC) 406 and a nickel-tungsten oxide counter electrode layer (CE) 410. Electrochromic device 400 also includes substrate 402, conductive layer (CL) 404, ion conductive layer (IC) 408, and conductive layer (CL) 414.

[0107] Power source 416 is configured to apply a potential and / or current to electrochromic stack 420 through appropriate connections (e.g., bus bars) to conductive layers 404 and 414. In some embodiments, the voltage source is configured to apply a potential of about a few volts to drive the transition of the device from one optical state to another. Figure 3B The polarity of the potential shown in is such that the ions (lithium ions in this example) reside primarily in the nickel-tungsten oxide counter electrode layer 410 (as indicated by the dashed arrows).

[0108] Figure 3C yes Figure 3B Schematic cross-section of electrochromic device 400 as shown in , but in a colored state (or transitioning to a colored state). Figure 3C 406. In the embodiment of the present invention, the polarity of the voltage source 416 is reversed, so that the electrochromic layer is more positive to accept additional lithium ions, thereby changing to a colored state. As shown by the dotted arrows, the lithium ions are transmitted across the ion conductive layer 408 to the tungsten oxide electrochromic layer 406. The tungsten oxide electrochromic layer 406 is shown in a colored state. The nickel-tungsten oxide counter electrode 410 is also shown in a colored state. As explained, the nickel-tungsten oxide gradually becomes more opaque as it gives up (deintercalates) lithium ions. In this example, there is a synergistic effect, in which the transition to the colored state of both layers 406 and 410 helps to reduce the amount of light transmitted through the stack and substrate.

[0109] As described above, an electrochromic device may include an electrochromic (EC) layer and a counter electrode (CE) layer, which are separated by an ion conductive (IC) layer having high conductivity to ions and high resistance to electrons. As conventionally understood, the ion conductive layer thus prevents a short circuit between the electrochromic layer and the counter electrode layer. The ion conductive layer allows the electrochromic layer and the counter electrode layer to retain charge, thereby maintaining their faded state or colored state. In an electrochromic device with different layers, the components form a stack, which includes an ion conductive layer sandwiched between an electrochromic electrode layer and a counter electrode layer. The boundaries between these three stacked components are defined by abrupt changes in composition and / or microstructure. Therefore, these devices have three different layers with two abrupt interfaces.

[0110] According to certain embodiments, the counter electrode and the electrochromic layer are formed in close proximity to each other, sometimes in direct contact, without separately depositing an ion conductive layer. In some embodiments, an electrochromic device having an interface region rather than different IC layers is used. Such devices and methods of making them are described in the following documents: U.S. Patent No. 8,300,298 and U.S. Patent Application Serial No. 12 / 772,075 filed on April 30, 2010, and U.S. Patent Application Serial Nos. 12 / 814,277 and 12 / 814,279 filed on June 11, 2010, each of which is named "Electrochromic Devices", each of which is Zhongchun Wang et al. as the inventor, and each of which is incorporated herein by reference in its entirety.

[0111] II.Window Controller

[0112] The window controller is used to control the tinting level of the electrochromic device of the electrochromic window. In some embodiments, the window controller is capable of transitioning the electrochromic window between two tinting states (levels), namely a faded state and a tinted state. In other embodiments, the controller may additionally transition the electrochromic window (e.g., having a single electrochromic device) to an intermediate tinting level. In some disclosed embodiments, the window controller is capable of transitioning the electrochromic window to four or more tinting levels. Certain electrochromic windows allow intermediate tinting levels by using two (more than two) electrochromic window sheets in a single IGU, each of which is a dual-state window sheet.

[0113] In some embodiments, an electrochromic window may be included in an IGU (e.g., Figure 2A An electrochromic device (e.g., Figure 3B 400) and another electrochromic device on another window of the IGU (e.g., Figure 3B400 in the electrochromic device). If the window controller is capable of transitioning each electrochromic device between two states (a faded state and a tinted state), the electrochromic window is capable of achieving four different states (tinting levels): a tinted state in which both electrochromic devices are tinted, a first intermediate state in which one electrochromic device is tinted, a second intermediate state in which the other electrochromic device is tinted, and a faded state in which both electrochromic devices are faded. Embodiments of multi-pane electrochromic windows are further described in U.S. Pat. No. 8,270,059, to Robin Friedman et al., and entitled “MULTI-PANE ELECTROCHROMIC WINDOWS,” which is hereby incorporated by reference in its entirety.

[0114] In some embodiments, a window controller may be implemented to transform an electrochromic window having an electrochromic device capable of transitioning between two or more tinting levels. For example, a window controller may be capable of transitioning an electrochromic window to a faded state, one or more intermediate levels, and a tinted state. In some other embodiments, a window controller is capable of transitioning an electrochromic window including an electrochromic device between any number of tinting levels between a faded state and a tinted state. Embodiments of methods and controllers for transitioning an electrochromic window to one or more intermediate tinting levels are further described in U.S. Patent No. 8,254,013, entitled “CONTROLLINGTRANSITIONS IN OPTICALLY SWITCHABLE DEVICES,” by Disha Mehtani et al., which is hereby incorporated by reference in its entirety.

[0115] In some embodiments, a window controller can power one or more electrochromic devices in an electrochromic window. Typically, this functionality of the window controller is enhanced by one or more other functions described in more detail below. The window controllers described herein are not limited to window controllers having the functionality of powering electrochromic devices that are associated with the window controller for control purposes. That is, the power supply for the electrochromic window can be separate from the window controller, wherein the controller has its own power supply and applies power from the window power supply to the window. However, it is convenient to include a power supply with the window controller and configure the controller to directly power the window because it eliminates the need for separate wiring to power the electrochromic window.

[0116] In addition, the window controller described in this section is described as a stand-alone controller that can be configured to control the functions of a single window or multiple electrochromic windows without integrating the window controller into a building control network or building management system (BMS). However, the window controller can be integrated into a building control network or BMS.

[0117] Figure 4 A simplified block diagram depicting some components of the window controller 450 and other components of the window controller system of the disclosed embodiment. More details about the components of the window controller can be found in the following documents: U.S. Patent Application Serial Nos. 13 / 449,248 and 13 / 449,251, both of which have Stephen Brown as inventor, both of which are entitled "CONTROLLER FOR OPTICALLY-SWITCHABLE WINDOWS" and both of which were filed on April 17, 2012; and U.S. Patent Serial No. 13 / 449,235, which is entitled "CONTROLLING TRANSITIONS IN OPTICALLY SWITCHABLE DEVICES", which is Stephen Brown et al. and was filed on April 17, 2012, all of which are hereby incorporated by reference in their entirety.

[0118] exist Figure 4 , the illustrated components of the window controller 450 include a microprocessor 455 or other processor, a pulse width modulator 460, one or more inputs 465, and a computer readable medium 470 (e.g., memory) having a configuration file 475. The window controller 450 electronically communicates with one or more electrochromic devices 400 in the electrochromic window via a network 480 (wired or wireless) to send instructions to the one or more electrochromic devices 400. In some embodiments, the window controller 450 can be a local window controller that communicates with a master window controller via a network (wired or wireless).

[0119] In the disclosed embodiment, the window controller 450 can instruct the PWM 460 to apply a voltage and / or current to the electrochromic window 505 to transform it to any one of four or more different tinting levels. In the disclosed embodiment, the electrochromic window 505 can be transformed into at least eight different tinting levels, described as: 0 (lightest), 5, 10, 15, 20, 25, 30, and 35 (darkest). The tinting levels can correspond linearly to the visual transmittance value and the solar heat gain coefficient (SHGC) value of the light passing through the electrochromic window 505. For example, using the eight tint levels described above, the lightest tint level 0 may correspond to a SHGC value of 0.80, tint level 5 may correspond to a SHGC value of 0.70, tint level 10 may correspond to a SHGC value of 0.60, tint level 15 may correspond to a SHGC value of 0.50, tint level 20 may correspond to a SHGC value of 0.40, tint level 25 may correspond to a SHGC value of 0.30, tint level 30 may correspond to a SHGC value of 0.20, and tint level 35 (darkest) may correspond to a SHGC value of 0.10.

[0120] The window controller 450, or a master controller in communication with the window controller 450, may use any one or more predictive control logic components to determine the desired tinting level based on signals from the external sensor 510 and / or other inputs. The window controller 450 may instruct the PWM 460 to apply a voltage and / or current to the electrochromic window 505 to transform it to the desired tinting level.

[0121] It should be understood that the control logic and other logic for implementing the above-mentioned technology can be implemented in the form of circuits, processors (including general-purpose microprocessors, digital signal processors, application-specific integrated circuits, programmable logic, such as field programmable gate arrays, etc.), computers, computer software, devices such as sensors, or combinations thereof. Based on the disclosure and teachings provided herein, those of ordinary skill in the art will know and understand other ways and / or methods of implementing the disclosed technology using hardware and / or a combination of hardware and software.

[0122] Any component or function of the software, firmware or machine instructions described in this application can be implemented as a code executed by a processor using any suitable computer language (e.g., Java, C++ or Python) using, for example, conventional or object-oriented techniques. The code can be stored as a series of instructions or commands on a computer or machine-readable medium, such as a random access memory (RAM), a read-only memory (ROM), a programmable memory (EEPROM), a magnetic medium such as a hard drive or a floppy disk, a disk, or an optical medium such as a CD-ROM. Any such computer or machine-readable medium may reside on or within a single computing device, and may exist on or within different computing devices within a system or network. In some embodiments, the computer or machine-readable medium is a non-transitory medium.

[0123] In some embodiments disclosed herein, one or more electrochromic devices are operatively coupled to at least one controller and / or processor. The controller may include a processing unit (e.g., a CPU or GPU). The controller may receive input (e.g., from at least one device or projection media). The controller may include circuits, electrical wiring, optical wiring, sockets, and / or power sockets. The controller may receive input and / or deliver output. The controller may include multiple (e.g., sub) controllers. (e.g., as disclosed herein) operations may be performed by a single controller or by multiple controllers. At least two operations may each be predetermined by different controllers. At least two operations may be predetermined by the same controller. The device and / or media may be controlled by a single controller or by multiple controllers. At least two devices and / or media may be controlled by different controllers. At least two devices and / or media may be controlled by the same controller. The controller may be part of a control system. The control system may include a master controller, a floor controller (e.g., including a network controller), or a local controller. The local controller may be a target controller. For example, the local controller may be a window controller (e.g., controlling an optically switchable window), a peripheral structure controller, or a component controller. The controller may be part of a hierarchical control system. The hierarchical control system may include a master controller that directs one or more controllers, such as a floor controller, a local controller (e.g., a window controller), a peripheral structure controller, and / or a component controller. The target may include a device or a medium. The device may include an electrochromic window, a sensor, a transmitter, an antenna, a receiver, a transceiver, or an actuator.

[0124] In some examples, the controlled device is a tintable window (e.g., an electrochromic window). In some embodiments, the dynamic state of the electrochromic window is controlled by changing a voltage signal sent to an electrochromic device (ECD) for providing tinting or coloring. The electrochromic window can be manufactured, configured, or otherwise provided as an insulating glass unit (IGU). When provided for installation in a building, the IGU can be used as a basic structure for holding an electrochromic pane (also referred to as a "window sheet"). The IGU sheet or pane can be a single substrate or a multi-substrate structure, such as a laminate of two substrates.

[0125] The controller may be implemented in an electronic device in the form of various digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are provided only as examples and are not intended to limit the embodiments of the present disclosure as described and / or claimed herein.

[0126] In some embodiments, the controller is coupled to a memory, such as a non-transient computer-readable or machine-readable medium. The memory stores instructions for the controller to operate the ECD using the method disclosed herein. In some embodiments, the controller includes a processor. The memory as a non-transient computer-readable storage medium can be used to store non-transient software programs, non-transient computer executable programs and modules, such as program instructions / modules corresponding to the method for controlling the ECD in the embodiments of the present disclosure. The processor executes the non-transient software programs, instructions and modules stored in the memory to perform various functional applications and data processing.

[0127] The memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system and at least one application required for a function; and the storage data area may store data created by using an electronic device according to the disclosed method. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory provided remotely relative to the processor, and these remote memories may be connected to the electronic device to implement a method for controlling the ECD. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0128] III. Voltage curve for color transition

[0129] Figure 5AAn example of a control curve 5001 is shown as a voltage control curve implemented by changing the voltage supplied to the ECD. For example, Figure 5A The solid line in FIG. 1 represents the effective voltage V applied across the ECD during the color transition and the subsequent maintenance period. Eff The solid line represents the voltage V applied to the two conductive layers of the ECD. App1 and V App2 relative difference. Figure 5A The dashed line in represents the corresponding current (I) through the device. In the illustrated example, the voltage control curve 5001 includes four periods or phases: a ramp-to-drive period to initiate the transition, a drive period to continue driving the transition, a ramp-to-hold period, and a subsequent hold period.

[0130] exist Figure 5A , the ramp-to-drive period is characterized by applying a voltage ramp 502 that increases in magnitude from an initial value at time t0 to a maximum drive value V at time t1. Drive For example, the ramp-to-drive period may be defined by three drive parameters known or set by the window controller: the initial voltage at t0 (the current voltage across the ECD when the transition begins), V Drive The window controller may also set a target ramp rate, a maximum ramp rate, or a ramp type (e.g., a linear ramp, a second degree ramp, or an nth degree ramp). In some embodiments, the ramp rate may be limited to avoid damaging the ECD.

[0131] exist Figure 5A The driving period includes applying a constant voltage V Drive 504, begins at time t1 and ends at time t2, when the end optical state is reached (or approximately reached). The ramp-to-hold period is characterized by applying a voltage ramp 506 that increases in magnitude from the drive value V at time t2 to Drive Decreases to the minimum hold value V at time t3 Hold In some embodiments, the ramp-to-hold period may be defined by three drive parameters known or set by the window controller: the drive voltage V Drive , maintain voltage V Hold , and the duration for which the ramp is applied. The window controller may also set the ramp rate or ramp type (eg, linear ramp, second degree ramp, or nth degree ramp).

[0132] exist Figure 5A The hold period is characterized by the application of a constant voltage V starting at time t3. Hold . Maintain voltage V HoldCan be used to maintain the ECD in the final optical state. Therefore, a holding voltage V Hold The duration of may be associated with the duration that the ECD will be held in the final optical state. For example, due to non-ideal factors associated with the ECD, the leakage current I Leak This can cause a slow discharge of charge from the ECD. This discharge of charge can cause a corresponding reversal of ions across the ECD and thus a slow reversal of the optical transition. A holding voltage V can be continuously applied. Hold To offset or prevent leakage current. In some embodiments, a holding voltage V is periodically applied. Hold , to "refresh" the desired optical state, or in other words, to return the ECD to the desired optical state.

[0133] As further described below, certain aspects of the disclosed embodiments are similar to Figure 5A The voltage profile of the embodiment of the present invention differs in that it includes one or more clearing pulses having a polarity opposite to the drive voltage and / or the hold voltage. In some embodiments, the one or more clearing pulses are applied after the drive voltage and before the start of the hold voltage. In some embodiments, the one or more clearing pulses are applied after the start of the hold voltage.

[0134] Figure 5B , Figure 5C and Figure 5D The voltage curve of the coloring transition process according to some embodiments of the present disclosure is schematically illustrated. Figure 5B Included with Figure 5A 5001 for comparison and illustration purposes, and also includes a voltage curve 5002 according to some embodiments of the present disclosure. As discussed in more detail below, the voltage curve 5002 includes a clearing pulse according to the disclosed embodiments. As can be seen, the voltage curve 5002 includes a ramp to drive voltage 510 in the ramp to drive period. The ramp rate of the ramp to drive voltage 510 is higher than the ramp rate of the ramp to drive voltage 502 of the voltage curve 5001.

[0135] like Figure 5B As further shown in FIG. 5001 , the voltage curve 5002 further includes a driving voltage 512 in the driving period. The magnitude of the driving voltage 512 is higher than the driving voltage 504 of the voltage curve 5001 .

[0136] Figure 5BThe voltage curve 5002 in also includes a clearing pulse after the driving voltage is applied. Here, the clearing pulse includes a ramp to a driving reversal voltage 514 in the ramp to driving reversal period, a driving reversal voltage 516 in the driving reversal period, and a ramp to a holding voltage 518 in the ramp to holding period. The ramp to driving reversal voltage 514 increases from the driving voltage 512 to the driving reversal voltage 516. In the depicted embodiment, the driving reversal voltage 516 has a polarity opposite to the polarity of the driving voltage 512. The driving reversal voltage 516 is applied in the driving reversal period. Here, for the voltage curve 5002, the polarity of the driving reversal voltage 516 is positive, while the polarity of the driving voltage 512 is negative. In such embodiments, the polarity of the ramp to the driving reversal voltage changes during the ramp to the driving reversal voltage period. In other embodiments, the driving reversal voltage 516 may have the same polarity as the driving voltage 512, but has a smaller magnitude than the driving voltage 512. The voltage curve 5002 also includes a ramp-to-hold voltage 518 in a ramp-to-hold time period following the drive reversal period. The ramp-to-hold voltage 518 changes from the drive reversal voltage 516 to a hold voltage 520. The voltage curve 5002 also includes a hold voltage 520 that remains substantially constant (e.g., coefficient of variation <0.1) during the hold period.

[0137] As mentioned above Figure 1C As explained, the effective voltage at the two edges of the ECD is greater in magnitude than the effective voltage at the center of the ECD. Therefore, the drive voltage 512 can make the edge of the ECD darker than the center of the ECD. The drive reversal voltage 516 has a polarity opposite to the drive voltage 512. The drive reversal voltage 516 also generates an effective voltage with a greater magnitude at the edge than at the center. Applying the drive reversal voltage 516 for a short period of time after applying the drive voltage 512 can make the edge of the ECD clear, thereby improving the edge to center uniformity of the ECD coloring.

[0138] In some embodiments, each voltage curve component may vary according to various parameters or characteristics of the window, such as according to the size of the window. The magnitude and / or duration of any of the voltage curve components may depend on one or more characteristics of the window, such as the distance between two bus bars of the window (or bus bar distance), the length of the bus bars of the window, and the aspect ratio (length to width) of the rectangular window.

[0139] In some embodiments, each voltage curve component may vary for different window types including, for example, different numbers of bus bars, bus bars at different angles, composite bus bars that may divide the window into different sections, or a combination thereof.

[0140] In some embodiments, the driving voltage 512 applied during the driving period can vary based on the bus bar distance (BBD). For example, the following driving voltage values ​​can be used in some embodiments for tinting transitions of windows with different BBDs:

[0141] ●BBD of about 14" = -2280mV

[0142] ●BBD of about 20" = -2289mV

[0143] ●BBD of about 30" = -2390mV

[0144] ●BBD of about 40" = -2600mV

[0145] ●BBD of about 48" = -4135mV

[0146] ●BBD of about 60" = -4316mV

[0147] ●BBD of about 72" = -4526mV

[0148] In some embodiments, a voltage curve (not shown here) is used to clear the ECD rather than color the ECD, and the drive voltage applied during the drive period is positive. In some such embodiments, the following drive voltage values ​​can be used for clearing transitions of windows with different BBDs.

[0149] ●BBD of about 14"=1432mV

[0150] ●BBD of about 20"=1473mV

[0151] ●BBD of about 30"=1541mV

[0152] ●BBD of about 40"=1609mV

[0153] ●BBD of about 48"=1664mV

[0154] ●BBD of about 60"=1747mV

[0155] ●BBD of about 72"=1831mV

[0156] Some embodiments use a driving voltage value within a range of about + / - 5% of the above value corresponding to BBD. Some embodiments use a driving voltage within a range of about + / - 10% of the above value corresponding to BBD. Some embodiments use a driving voltage within a range of about + / - 20% of the above value corresponding to BBD. Some embodiments use a driving voltage within a range of about + / - 30% of the above value corresponding to BBD. Some embodiments use a driving voltage within a range of about + / - 50% of the above value corresponding to BBD.

[0157] The driving reversal voltage 516 of the voltage curve 5002 has a polarity opposite to the driving voltage. In some embodiments, the magnitude of the driving reversal voltage 516 is in the range of 1400mV to 2600mV. In some embodiments, the magnitude of the driving reversal voltage 516 is different for different target coloration levels. In some embodiments, the duration of the driving reversal voltage may be different for different target coloration levels. In various embodiments, the duration of the driving reversal voltage 516 is about 30 seconds to 6 minutes.

[0158] Figure 5B The voltage curve 5002 also includes a holding voltage 520 having an amplitude less than the drive voltage 512. The holding voltage is applied to maintain the target color state. In some embodiments, the holding voltage 512 is similar to the holding voltage used in the conventional voltage curve. In some embodiments, the holding voltage 521 can be implemented as different voltage values ​​for different target color states.

[0159] When the ECD is in a target coloring state different from the baseline coloring state, if no voltage is applied to the ECD, electrons and lithium ions are gradually exchanged between the electrode layer and the counter electrode layer, thereby generating a leakage current that gradually reverses the ECD to the baseline coloring state. The holding voltage compensates for the leakage current in the target coloring state, thereby holding the ECD in the target coloring state. In various embodiments, various coloring states expressed as % transmittance or Tvis percentage use the following nominal holding voltages.

[0160] ● About 40% of Tvis = -250mV

[0161] ● About 30% of Tvis = -350mV

[0162] ● About 6% Tvis = -900mV

[0163] ● About 1% Tvis = -1400mV

[0164] ● About 0.5% Tvis = -1650mV

[0165] Some embodiments use a hold voltage within a range of about + / - 5% of the above values ​​for corresponding tinting levels. Some embodiments use a hold voltage within a range of about + / - 10% of the above values ​​for corresponding tinting levels. Some embodiments use a hold voltage within a range of about + / - 20% of the above values ​​for corresponding tinting levels. Some embodiments use a hold voltage within a range of about + / - 30% of the above values ​​for corresponding tinting levels. Some embodiments use a hold voltage within a range of about + / - 40% of the above values ​​for corresponding tinting levels. Some embodiments use a hold voltage within a range of about + / - 50% of the above values ​​for corresponding tinting levels.

[0166] In certain embodiments, the ramp rates of the various ramp periods described herein may have various characteristics. Figure 5B , the ramp rate of the ramp to drive 510 is between about 10 mV / s and about 250 mV / s, the ramp rate of the ramp to the drive reversal voltage 514 may be between about 10 mV / s and about 250 mV / s, and / or the ramp rate of the ramp to the hold voltage 518 may be between about 10 mV / s and about 250 mV / s. The ramp rates of the ramp to the drive voltage 510, the ramp to the drive reversal voltage 514, and the ramp to the hold voltage 518 are all constant in the voltage curve 5002. However, in various embodiments of the present disclosure, these ramp rates may be variable, and the average ramp rate over a period of time falls within the range described above. These various characteristics of the ramp rates also apply to other voltage curves of the various embodiments described herein (including but not limited to Figure 5C , Figure 5D , Fig. 6A , Figure 6B and Figures 7 to 9 The ramp rate of the voltage curve).

[0167] In some embodiments, the color conversion process application includes Figure 5BThe voltage curve of all parts of the voltage curve 5002 of the coloring process. However, in other embodiments, the coloring transition process applies a voltage curve including some but not all aspects of the voltage curve 5002. For example, some embodiments may include a ramp to a driving voltage 510, a driving voltage 512, a driving reversal voltage 516, and a holding voltage 520, and the ramp to the driving reversal voltage 514 and / or the ramp to the holding voltage 518 may be optional and may be omitted. When the voltage curve does not include a ramp voltage, the ramp voltage may be replaced by a "vertical" voltage with a ramp rate higher than the standard. Two continuous constant voltages with different amplitudes may be transformed instantly or in a very short period of time, thereby forming a step-shaped curve. However, the voltage change rate in this transition is higher than the standard of the "ramp" voltage disclosed herein. In various embodiments, the ramp voltage described herein needs to be less than about 20,000, 10,000, 5,000, 2,000 or 1,000 mV / s.

[0168] Figure 5B The voltage curve 5002 illustrated in FIG. 5 may be used to cause the window to transition from a clearer tinted state to a more tinted state. For some other embodiments that change the tinted state in the opposite direction, the voltage curve will be opposite in polarity. For example, in Figure 5B In the voltage curve 5002, the driving voltage 512 causes the ECD to become more colored, and the driving reversal voltage 516 causes the ECD to become clearer. Conversely, for the clearing voltage curve for changing the ECD from a more colored state to a clearer state, the driving voltage causes the ECD to become clearer, while the driving reversal voltage causes the ECD to become more colored. In various embodiments, the clearing voltage curve for changing the ECD from a more colored state to a clearer state has a voltage similar to that around V Eff = 0 is in the form of a voltage curve 5002 in which the line is reversed up and down. The clear voltage curve has a driving voltage, a driving reversal voltage, and a holding voltage having opposite polarities to the corresponding voltages of the voltage curve 5002.

[0169] The drive reversal voltage 516 and its adjacent voltages 514 and 518 are also referred to as drive reversal pulses or clear pulses because the voltage changes the ECD to a clearer state. The voltage curve 5002 includes only one drive reversal voltage 516. However, in some embodiments of the present disclosure, the voltage curve may include two or more drive reversal pulses. Two consecutive drive reversal pulses may be separated by an interval. In various embodiments, the range of the interval is about 1 to 3600 seconds, about 10 to 60 seconds, about 20 to 60 seconds, about 10 to 60 seconds, about 600 to 3600 seconds, about 1200 to 3600 seconds.

[0170] Summarizing some advantages of voltage curve 5002, first, compared with other voltage conversion technologies, the ramp rate of the slope of voltage curve 5002 to driving voltage 510 can advantageously make the optical density start to change faster. Compared with the slope of voltage curve 5001 to driving voltage 502, the ramp to driving voltage 510 has a higher ramp rate. Compared with the ramp to driving voltage 502 reaching driving voltage 504, the ramp to driving voltage 510 reaches driving voltage 512 faster. Therefore, using voltage curve 5002 can make ECD start to increase optical density at an earlier time than using voltage curve 5001. Second, voltage curve 5002 includes a driving voltage 512 with a magnitude greater than driving voltage 504, which can make the electrochromic device reach its target optical density faster, thereby helping to accelerate the completion of coloring conversion. Third, voltage curve 5002 includes a driving reversal voltage 516, which reduces the optical density of the electrochromic device at its edge close to the bus bar, thereby helping to improve the uniformity of the coloring level on the pane of the electrochromic device.

[0171] Although Figure 5A and 5B The voltage curve used to convert ECD in some applications is illustrated, but Fig. 6A exemplifies the same and Figure 5A and Figure 5B The voltage curve corresponds to the voltage curve associated with the current curve. Fig. 6A In the upper part, two voltage curves 602 and 606 are shown, which are respectively related to Figure 5A The voltage curve 5001 and Figure 5B The voltage curve 5002 is equivalent. Fig. 6A The lower half of FIG. 5 shows current curves 604 and 608 corresponding to voltage curves 602 and 606 , respectively.

[0172] Although Figure 5B A voltage curve 5002 is illustrated for converting ECD in some embodiments, but Figure 6B An optical density (OD) curve 6002 of an ECD near the edge of a bus bar during a color transition caused by a voltage curve 5002 is shown according to some embodiments. For a comparison of the OD between the edge and the center of the ECD, see e.g. Figures 10 to 15 . The figure includes Figure 5B The voltage curve 5002 is superimposed with the OD curve 6002. The right vertical axis represents the optical density (OD), while the left vertical axis represents the effective voltage (V eff ). Here, OD curve 6002 represents when according to Figure 5BOD of an ECD near the edge of a bus bar when a voltage is applied according to a voltage curve and the voltage varies according to the voltage curve. As explained in more detail, OD curve 6002 illustrates that a voltage clearing pulse including a drive reversal voltage 516 causes the OD to reduce its optical density, which helps to reduce edge-to-center non-uniformity when a greater effective voltage is applied to the two edges of the ECD than the effective voltage applied to the center of the ECD. As seen in the optical density curve 6002, the optical density of the ECD is relatively flat during the ramp to drive period and begins to rise near the end of the period. The optical density continues to rise during the drive period, increasing from point 616 on the optical density curve 6002 to point 618. The optical density of the ECD first increases and then decreases from point 618 to 620 during the ramp to drive reversal period. The optical density curve 6002 continues to decrease from point 620 to point 622 during the drive reversal period. Voltage curve 5002 applies the drive reversal voltage 516 during the drive reversal period. As described above with reference to Figure 1C As explained, the effective voltage at the two edges of the ECD close to the bus bars is higher than the effective voltage at the center, and the drive reversal voltage has a larger effective voltage at the two edges of the ECD. Therefore, the drive reversal voltage 516 effectively makes the edges of the ECD clear and improves the edge-to-center uniformity of the ECD. During the ramp to hold period, the optical density decreases further and then stabilizes. At the beginning of the hold period, the optical density of the ECD (point 614 on the optical density curve 6002) is lower than the optical density at the end of the drive period (point 618 on the optical density curve 6002, when the two edges of the ECD tend to be darker than the center of the ECD, as described below with reference to Figure 7 , image 716 further explained). Driving the reverse voltage helps reduce the optical density at the edge of the ECD where the busbars are located, thereby helping to improve the uniformity of coloring on the surface of the ECD. During the holding period, the optical density of the ECD increases slightly, but remains relatively stable.

[0173] As in Figure 6B As can be seen in FIG. 6 , the optical density of the ECD is lower at the beginning of the ramp to drive period (point 612) than at the beginning of the hold period (point 614), indicating that the color transition process darkens the ECD. Furthermore, the optical density of the ECD at the beginning of the hold period (point 614) is higher than the optical density of the ECD at the beginning of the drive period (point 616), but lower than the optical density of the ECD at the end of the drive period (point 618), indicating that the color transition process first darkens the ECD during the drive period and then brightens the ECD in the drive reversal period.

[0174] Similar to what is described above Figure 5B implementation plan, Figure 5CThe voltage curve 5003 according to some embodiments of the present disclosure and the conventional voltage curve 5001 (with Figure 5A 5001 is shown for comparison purposes. Voltage curve 5003 is similar to Figure 5B The voltage curve 5002 in the figure includes the same voltage segments, which include a ramp to a driving voltage 510, a driving voltage 512, a ramp to a driving reversal voltage 514, a driving reversal voltage 516, a ramp to a holding voltage 518, and a holding voltage 520. Figure 5B The various characteristics and features of these components of the voltage curve 5002 described also apply to the various embodiments. Figure 5C The corresponding component of the voltage curve 5003.

[0175] Voltage curve 5003 and Figure 5B The difference between voltage curve 5002 and voltage curve 5003 is that voltage curve 5003 includes four examples of holding reversal voltage 524 and four examples of holding forward voltage 528. Holding reversal voltage 524 has a polarity opposite to holding voltage 520. In an alternative embodiment, the holding reversal voltage has the same polarity as the holding voltage, but has a smaller magnitude than the holding voltage. Holding forward voltage 528 has the same polarity as holding voltage 520 and has a greater magnitude than the holding voltage. These examples of holding reversal voltage 524 and holding forward voltage 528 alternate and form oscillations in a manner above and below holding voltage 520.

[0176] The reverse voltage 524 is maintained to have a value in the range of about -4000mV to 2000mV. The duration of the reverse voltage 524 is maintained to be in the range of about 2 minutes to 10 minutes. Similarly, the forward voltage 528 is maintained to have a value in the range of about -4000mV to 2000mV and a duration in the range of about 2 minutes to 10 minutes. The magnitude and duration of the reverse voltage 524 and the forward voltage 528 can be adjusted for different target stable coloring levels. The magnitude and duration of the reverse voltage and the forward voltage can also be adjusted for different window sizes.

[0177] The voltage curve 5003 includes a ramp to hold reverse voltage 522, which changes at a ramp rate in the range of 10mV / s to 250mV / s until reaching a hold reverse voltage 524. In some embodiments, the ramp rate of the ramp to hold reverse voltage 522 is about 50mV / s. The voltage curve 5003 includes four examples of ramp to hold reverse voltage and four examples of hold reverse voltage. Moreover, the voltage curve file 5003 includes four ramps to hold forward voltage and four hold forward voltage. The ramp to hold forward voltage 526 changes from the hold reverse voltage 524 to the hold forward voltage 528 at a ramp rate of about 10mV / s to 250mV / s. In some embodiments, the ramp rate of the ramp to hold forward voltage 526 is about 50mV / s.

[0178] In some embodiments, a method of controlling an ECD uses a voltage curve including a ramp to a drive voltage 510, a drive voltage 512, a hold voltage 520, and a hold reversal voltage 524, with the remaining segments of the curve 5003 being optional. If the ramp voltage connected to the constant voltage is removed from the curve, the stepped portion of the curve is formed by two constant voltages. In some embodiments, the method uses a voltage curve including a ramp to a drive voltage 510, a drive voltage 510, a drive reversal voltage 516, a hold voltage 520, a hold reversal voltage 524, and a hold forward voltage 528, with the remaining segments of the curve 5003 being optional. Some embodiments apply a voltage curve including all segments of the voltage curve 5003.

[0179] Similar to what is described above Figure 5B implementation plan, Figure 5D The voltage curve 5421 of the coloring transition process according to some embodiments of the present disclosure is schematically illustrated. Figure 5D In some embodiments, the voltage curve 5421 is used to color the ECD to a desired color state and also includes a clearing voltage pulse. In some embodiments, a voltage curve is used to transition the ECD to an intermediate state, such as Figure 5D Here, voltage curve 5421 includes an initial voltage pulse 5423 having a magnitude at level 5427 that is substantially as large as the magnitude of the voltage pulse initially applied to reach the end state. Thereafter, the applied voltage is reduced to level 5425 corresponding to the voltage of the desired intermediate state. In a specific embodiment, the voltage curve 5421 is as described above (such as with respect to Figure 5C ) delivers the applied voltage at that level. Although the oscillating voltage centered at level 5425 is Figure 5D It cannot be seen, but it may still be there. In various embodiments, the oscillation may be asymmetric.

[0180] In some cases, the total duration of the initial high voltage pulse used to reach the intermediate state using this control sequence is typically between about 1 minute and 30 minutes, or more specifically between about 3 minutes and 15 minutes, or even more specifically between about 8 minutes and 11 minutes. Of course, this duration will depend on the desired end state (coloring level for the intermediate state), device size, leakage current, etc. In addition, in some cases, the magnitude (average) of this initial pulse is about 1 volt to 7 volts, and more specifically about 1 volt to 4 volts. Of course, the coloring threshold, sheet resistance, coloring speed and leakage current characteristics will be different between systems, so these magnitudes and other characteristics are not intended to be limiting.

[0181] It has been observed that the intermediate state coloring time for a control sequence not employing an initial high voltage pulse can be about 4 times the coloring time for a control sequence employing such a pulse.

[0182] It should be noted that control algorithms such as Figure 5D The control algorithm presented in allows for relatively uniform edge-to-center optical transitions between states. Higher voltages result in faster switching, but also amplify the non-uniformity between the center and the edge. On the other hand, lower voltages result in slower switching but more uniform transitions. By carefully selecting the magnitude of the initially applied voltage pulse, the optical transition in an electrochromic device achieves a balance between uniformity and speed.

[0183] Figure 5D The voltage curve 5421 is similar to Figure 5B 5425 and 520, respectively. The driving voltage has a polarity and magnitude that causes the ECD to transition from a first colored state to a second colored state. In some embodiments, the driving voltage has a substantially constant magnitude. The holding voltage 5425 has a magnitude that maintains the ECD in the second colored state. In some embodiments, the holding voltage 5425 has a polarity opposite to the tail voltage 5429, as further described below.

[0184] Moreover, the voltage curve 5421 includes a leading edge ramp voltage 5431 corresponding to the ramp to the driving voltage 510 of the voltage curve 5002. In addition, the voltage curve 5421 includes a trailing edge ramp voltage 5433 corresponding to the ramp to the driving reversal voltage 514 of the voltage curve 5002. In addition, the voltage curve 5421 includes a ramp to the holding voltage 5435 corresponding to the ramp to the holding voltage 518 of the voltage curve 5002. Figure 5B The various characteristics and features described for these components of voltage curve 5002 also apply to some embodiments. Figure 5DThe corresponding component of the voltage curve 5421.

[0185] Leading edge ramp voltage 5431 of voltage curve 5421 is applied before drive voltage 5427 and has a direction and polarity that causes the electrochromic device to switch in the direction of the transition.

[0186] A trailing ramp voltage 5433 is applied after the driving voltage 5427 and before the holding voltage 5425. The trailing ramp voltage has a direction opposite to that of the leading ramp voltage 5431 and reaches a tail voltage 5429 having a polarity opposite to that of the leading ramp voltage 5431. In some embodiments, the tail voltage 5429 has a polarity opposite to that of the holding voltage 5425.

[0187] The leading edge ramp voltage 5431, the driving voltage 5427, and the trailing edge ramp voltage 5433 form a voltage pulse 5423. The trailing edge ramp voltage 5433 and the ramp-to-hold voltage 5435 form a clear pulse having a peak at the tail end voltage 5429.

[0188] Unlike voltage curve 5002, the clear pulse of voltage curve 5421 does not include a substantially constant voltage between the trailing ramp voltage 5433 and the ramp to hold voltage 5435. Instead, Figure 5B The clearing pulse of voltage curve 5002 includes a substantially constant drive reversal voltage 516 between the ramp to drive reversal voltage 514 and the ramp to hold voltage 518. Additionally, various corresponding components of voltage curve 5421 and voltage curve 5002 may have different magnitudes, ramp rates, and durations.

[0189] In some embodiments, a method of controlling ECD uses a voltage curve 5421. The method includes applying a voltage pulse 5423 to an electrochromic device to initiate a transition of the electrochromic device between a first color state and a second color state. The method also includes applying a hold voltage 5425 to the electrochromic device after applying the voltage pulse 5423.

[0190] In some embodiments, the voltage pulse 5423 includes a drive voltage 5427 having a substantially constant magnitude after the leading ramp voltage 5431 and before the trailing ramp voltage 5433. In some embodiments, the magnitude of the hold voltage 5425 is less than the magnitude of the drive voltage 5427. In some embodiments, the tail voltage 5429 has a polarity opposite to that of the drive voltage 5427 and the hold voltage 5425.

[0191] In some embodiments, the hold voltage 5425 comprises an oscillating voltage. In some embodiments, the oscillating voltage improves edge-to-center uniformity of the coloration state across the electrochromic device.

[0192] In some embodiments, the voltage pulse 5423 has a duration between about 1 minute and 30 minutes. In some embodiments, the voltage pulse 5423 has a magnitude of about 1 volt to 7 volts. In some embodiments, the holding voltage 5425 and the tail voltage 5429 have opposite polarities. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 10μV / s to about 100V / s. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 10μV / s to about 10V / s. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 10μV / s to about 1V / s. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 10μV / s to about 1V / s. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 10μV / s to about 1mV / s. In some embodiments, the trailing edge ramp voltage has a ramp rate ranging from about 1mV / s to about 1V / s. In some embodiments, the trailing ramp voltage has a ramp rate ranging from about 1 mV / s to about 10 V / s.

[0193] refer to FIG. 5A to FIG. 5D The voltage control curves shown and described are merely examples of voltage control curves. However, many other curves may be desirable or appropriate. These other curves may also be easily implemented using the controllers and optically switchable devices disclosed herein. For example, current curves may be applied instead of voltage curves. In some embodiments, the same Fig. 6A 608 or current control curve similar to current curve 604 shown in FIG. 608. In some applications, the control curve may have more than four periods. For example, the voltage control curve may include one or more overdrive periods. For example, the voltage ramp applied during the ramp-to-drive period may increase in magnitude by more than the drive voltage V Drive , reaching the over-drive voltage VOD. The ramp-to-drive period may be followed by a ramp period during which the applied voltage decreases from the over-drive voltage VOD to the drive voltage V Drive In some embodiments, the drive voltage V Drive The overdrive voltage VOD was previously applied for a relatively short duration.

[0194] In some embodiments, the applied voltage or current profile is interrupted for a relatively short duration to provide an open circuit condition across the device. While this open circuit condition is effective, the actual voltage or other electrical characteristic may be measured, detected, or otherwise determined to monitor how far the optical transition has progressed, and in some cases, to determine whether a change in profile is required. Such an open circuit condition may also be provided during a hold period to determine whether a hold voltage V should be applied. Hold Or maintain the voltage V Hold Examples related to controlling optical transitions are provided in International Patent Application Serial No. PCT / US14 / 43514, filed on June 20, 2014, entitled “CONTROLLING TRANSITIONS IN OPTICALLY SWITCHABLE DEVICES,” which is hereby incorporated by reference in its entirety.

[0195] Figure 7 Experimental data demonstrating the improvements in color transition speed and color uniformity provided by the methods according to some embodiments of the present disclosure are shown. Figure 7 In FIG. 7 , the voltage curve 702 is similar to Figure 5A The voltage curve 5001 is a voltage curve used by some conventional methods, and the voltage curve 704 is similar to Figure 5B 5002 in the figure, which is used by the method according to some embodiments of the present disclosure. Images 710-726 show the tinting state of two switchable windows side by side. Voltage curve 704 is used to control the left window (e.g., Figure 5B The right window is controlled by the voltage curve 702 (e.g., Figure 5A 5001). Image 710 was taken at 3:58 pm, which is the time just before voltage was applied to the windows to change the tinting state of these windows. Both windows are in a clear state. Images 712, 714 and 716 were taken at 4:10 pm, 4:20 pm and 4:30 pm respectively during the period when both voltage curve 704 and voltage curve 702 applied driving voltage.

[0196] As can be seen in image 712, for example, taken early in a drive period of the disclosed method, by using a plurality of Figure 5B and Figure 5D716 ). The left window controlled by the method of the disclosed method (embodiment of the disclosed method) is more tinted than the right window controlled by the conventional method, indicating that the disclosed method provides a tinting transition that starts earlier than the conventional method. Image 714 taken at the middle of the driving period of the disclosed method shows that the left window controlled by the disclosed method is more tinted than the right window controlled by the conventional method. Image 716 taken at the end of the driving period of the voltage curve 704 of the disclosed method shows that the left window controlled by the disclosed method is fully darkened to exceed the target tinting state. At this time, the right window controlled by the conventional method in image 716 is significantly less tinted than the left window controlled by the disclosed method. The difference between the two windows proves that the disclosed method takes less time to reach or exceed the target tinting level than the conventional method.

[0197] As can be seen in the two windows in all three images 712, 714 and 716, the window is darker on the two vertical edges and brighter in the center, and the two vertical edges are the positions where the busbars are located. During the coloring transition during these images 712, 714 and 716, coloring distribution non-uniformity has occurred in both windows. Image 720 is taken at 4:31 pm at the beginning of the clear pulse. At this time, both windows have a coloring state similar to the coloring state in image 716, showing some edge to center non-uniformity. Image 722 is taken at 4:34 pm in the middle of the clear pulse interval of voltage curve 704. Compared with the earlier window as shown in image 720 and compared with the right window, the left window using voltage curve 704 has improved (that is, increased) coloring uniformity. The right window controlled by conventional methods continues to darken, still showing significant edge to center non-uniformity. Image 724 is taken at 4:36 pm at the end of the clear pulse and at the beginning of the holding voltage of voltage curve 704. The left window controlled by the disclosed method appears to be more uniformly colored than the left window in image 722. The right window controlled by the conventional method is further colored than the right window in image 722, while still showing edge-to-center non-uniformity. The right window is also less colored than the left window. Image 762 was taken at 4:59 p.m. Both windows are in a stable state with a target level. Images 720-724 show that the clear pulse of voltage curve 704 improves the uniformity of the coloring level on the face of the switchable window. Image 724 shows that the disclosed method enables the switchable window to reach its target stable coloring state ahead of the conventional method.

[0198] IV. Coloring Transformation Method

[0199] Figure 8A flow chart of a process 800 for controlling an electrochromic device according to some embodiments is shown. Process 800 includes operations 802, 804, 806, and 808, which in some embodiments may be performed in a chronological order. Some embodiments of process 800 include additional optional operations as explained below. Some embodiments include only these four operations. Other embodiments consist essentially of these four operations.

[0200] Process 800 begins by applying a ramp-to-drive voltage to an electrochromic device during a ramp-to-drive period. See box 802. The ramp-to-drive voltage has a magnitude that increases during the ramp-to-drive period. In some embodiments, the magnitude of the ramp-to-drive voltage increases during the ramp-to-drive period at a rate in the range of about 1 mV / s to 250 mV / s. In some embodiments, the magnitude increases at a rate of about 250 mV per second. In some embodiments, the magnitude increases at a rate that varies for different window sizes or CBDs. In some embodiments, the larger the window or the larger the BBD, the higher the rate of increase in magnitude. In some embodiments, process 800 controls the ECD to change from a clearer state to a more colored state. In some embodiments, the ramp-to-drive voltage of process 800 corresponds to Figure 5B The voltage curve 5002 and Figure 5C The slope of the voltage curve 5003 in FIG. 5004 is the slope of the voltage curve 5003 in FIG. 5004 to the driving voltage 510, and Figure 5D The leading edge ramp voltage 5431 of the voltage curve 5421.

[0201] Process 800 also involves applying a drive voltage to the ECD during a drive period. See block 804. In some embodiments, the drive voltage operation 804 corresponds to Figure 5B The driving voltage 512 and the driving curve 5002 in Figure 5C The voltage curve 5003 in FIG. Figure 5DThe driving voltage 5427 of the voltage curve 5421 of the embodiment of the present invention. The driving voltage has a substantially constant magnitude and a polarity that is the same as the polarity of the ramp to the driving voltage at the end of the ramp to driving period. In some embodiments, the driving voltage has a magnitude that is substantially the same as the magnitude of the ramp to the driving voltage at the end of the ramp to driving period. In some embodiments, the driving voltage is set based on an aging voltage determined during a quality control process. The aging voltage is a voltage determined during a quality control test that does not cause undesirable defects during normal use or normal life of the product. In some embodiments, the aging voltage is the highest voltage that is determined not to cause such defects. In various applications and conditions, the aging voltage is about 4000, 5000, 6000, 7000, 8000, 9000, 10,000, 15,000, 18,000, 20,000, 30,000 or 40,000 mV. In some embodiments, the driving voltage is equal to or close to the aging voltage. In other embodiments, the driving voltage is lower than the aging voltage, such as about 50%, 60%, 70%, 80%, or 90% of the aging voltage.

[0202] The duration of the driving voltage can be adjusted for different tinting states, where more tinted states require longer driving times. The duration of the driving voltage can also be adjusted for different window sizes, so that longer driving times are applied to larger windows. The duration of the driving period can increase as the distance between the two bus bars of the window increases.

[0203] In some embodiments, the magnitude of the driving voltage is in the range of about -40,000mV to 40,000mV. In some embodiments, the magnitude of the driving voltage is in the range of about -20,000mV to 20,000mV. In some embodiments, the driving voltage is in the range of about -20,000mV to 20,000mV. In some embodiments, the driving voltage is in the range of about -5,000mV to 5,000mV. In some embodiments, the magnitude of the holding voltage is determined empirically by an aging voltage determined by an aging test process of an electrochromic stack in an ECD.

[0204] Process 800 also includes an operation 806 of applying a drive reversal voltage to the electrochromic device during the drive reversal period. In some embodiments, the drive reversal voltage of operation 806 corresponds to Figure 5B The voltage curve 5002 and Figure 5C The driving reversal voltage 516 of the voltage curve 5003 in FIG. In some embodiments, the driving reversal voltage has a polarity opposite to that of the driving voltage, for example, Figure 5B and Figure 5C. In other embodiments, the drive reversal voltage has the same polarity as the polarity of the drive voltage, but its magnitude is less than the magnitude of the drive voltage. In some embodiments, the drive reversal voltage has a magnitude in the range of about 1400mV to 2600mV. In some embodiments, the duration of the drive reversal voltage is adjusted for different window sizes. In some embodiments, the duration of the drive reversal voltage is adjusted for different drive voltages. In some embodiments, the duration of the drive reversal voltage is different for different target coloration states. In some embodiments, the drive reversal voltage has a duration of about 30 seconds to 300 seconds.

[0205] Some embodiments include applying a ramp-to-drive reversal voltage to the electrochromic device during a ramp-to-drive reversal period after the drive period and before the drive reversal period, wherein the ramp-to-drive reversal voltage changes from the drive voltage to the drive reversal voltage during the ramp-to-drive reversal period at a rate in a range of about 1 millivolt per second (mV / s) to 250 mV / s. In some embodiments, the polarity of the ramp-to-drive reversal voltage changes during the ramp-to-drive reversal voltage period. For example, Figure 5B and Figure 5C , the ramp to drive reversal voltage 514 changes from the drive voltage 512 in the drive period to the drive reversal voltage 516 at a specific rate, and also changes polarity during the period. Here, in these examples, the polarity changes from negative to positive, where the drive voltage 512 is negative and the drive reversal voltage 516 is positive; in some other embodiments, the polarity can change from positive to negative.

[0206] Process 800 also involves applying a hold voltage to the ECD during a hold period. See block 808. The hold voltage has the same polarity as the drive voltage and has a smaller magnitude than the drive voltage, such as both the hold voltage and the drive voltage have negative polarity, and in some cases the drive reversal voltage has an opposite positive polarity. The hold voltage can be adjusted for different target steady-state coloration levels or different materials of the electrochromic stack of the ECD. The hold voltage can be similar to the hold voltage used in conventional methods for holding an ECD at a target steady-state coloration level. In some embodiments, the hold voltage of operation 808 corresponds to Figure 5B and Figure 5C The voltage curve 5002 in FIG. 5 is a holding voltage 520 and Figure 5D 5425. For example, in Figure 5B and Figure 5C , both the drive voltage 512 and the hold voltage 520 have negative polarity, and the drive reversal voltage 516 has positive polarity.

[0207] In some embodiments, process 800 causes the electrochromic device to transition from a clearer state to a more colored state. The electrochromic device has a higher optical density at the beginning of the hold period than at the beginning of the ramp to drive period. For example, see Figure 6B , which shows different time periods of a voltage curve 5002 and a corresponding optical density curve 6002 for an ECD; OD is indicated on the right axis of the figure. At the beginning of the ramp to the drive period, the optical density of the ECD is at a level indicated by point 612 on the optical density curve 6002, which is lower than the optical density at the beginning of the hold period indicated by point 614 on the optical density curve 6002. That is, the disclosed color transition process increases the optical density of the ECD in the target or hold state relative to the starting state. However, in other embodiments, a voltage curve with opposite polarity to the voltage curve 5002 can be used to change the ECD from a more colored state to a clearer state.

[0208] In some embodiments, process 800 causes one or more edges of the ECD to have a higher optical density at the beginning of the hold period than at the beginning of the drive period, and lower optical density at the end of the drive period. Each of the one or more edges of the ECD is adjacent to an electrode, such as a bus bar, configured to apply a voltage to the ECD. For example, as explained above, Figure 6B An optical density curve 6002 for the edge of an ECD is shown. The voltage curve 5002 is applied to cause the ECD to transform its optical state. The clear pulse including the drive reversal voltage 516 in the voltage curve 5002 causes the ECD to reduce its optical density at the edge, resulting in improved edge to center uniformity. The optical density of the edge of the ECD at the beginning of the holding period as indicated by point 614 on the optical density curve 6002 is higher than the optical density at the beginning of the driving period as indicated by point 616 on the optical density curve 6002. In addition, the optical density of the edge of the ECD at the beginning of the holding period as indicated by point 614 on the optical density curve 6002 is lower than the optical density at the end of the driving period as indicated by point 618 on the optical density curve 6002. In other words, the drive voltage in the driving period drives the edge of the ECD to an optical density level that is higher than the target steady-state coloring level, resulting in over-coloring of the edge of the ECD. Then, the drive reversal voltage 516 in the drive reversal period reverses the over-coloring. Because as shown in combination with Figure 1C As explained, the drive voltage during the drive period has a higher effective voltage at both edges of the ECD than at the center, so this makes the edge darker than the center of the ECD, resulting in edge-to-center non-uniformity. Because the drive reversal voltage 516 also has a higher effective voltage at both edges of the ECD than at the center, this makes the edge clearer than the center of the ECD, thereby improving edge-to-center uniformity.

[0209] Return to Figure 8 In some embodiments, process 800 optionally involves applying a ramp-to-hold voltage to the ECD during the ramp-to-hold period, but this operation is not included in the process because it is optional. Figure 8 In some embodiments, the ramp to hold voltage corresponds to Figure 5B and 5C The slope of the voltage curve 5002 in FIG. 5004 is to the holding voltage 518 and Figure 5D The ramp-to-hold period is after the drive reversal period and before the hold period. The ramp-to-hold voltage changes from the drive reversal voltage to the hold voltage at a rate in the range of about 1 mV / s to 25 mV / s. In some embodiments, the polarity of the ramp-to-hold voltage changes during the ramp-to-hold voltage period. For example, as in Figure 5B and Figure 5C As can be seen in , during this period the voltage changes from positive polarity to negative polarity.

[0210] In some embodiments, process 800 optionally further includes applying one or more hold reversal voltages to the ECD after the hold period. Although this operation is not included in the process because it is optional. Figure 8 In the example, but in the above Figure 5C Examples of hold reversal voltages are illustrated in . The one or more hold reversal voltages have a polarity opposite to the polarity of the hold voltage. In other embodiments, the hold reversal voltage has the same polarity as the hold voltage, but has a smaller magnitude than the hold voltage. In various embodiments, the hold reversal voltage is in a range of about -4000 mV / s to 2000 mV / s. In some embodiments, the hold reversal voltage is in a range of about -10,000 mV / s to 4,000 mV / s. In some embodiments, the hold reversal voltage is in a range of about -20,000 mV / s to 8,000 mV / s. In some embodiments, each hold reversal voltage is applied for about 2 minutes to 10 minutes. In some embodiments, the hold reversal voltage of process 800 corresponds to Figure 5C The voltage curve 5003 in FIG. 5 is a holding reversal voltage 524 .

[0211] In some embodiments, process 800 optionally further includes applying a hold forward voltage to the ECD after applying each hold reverse voltage. Although this operation is not included in the process because it is optional. Figure 8 In the example, but in the above Figure 5CAn example of maintaining a forward voltage is illustrated in . The one or more maintaining forward voltages have the same polarity as the polarity of the maintaining voltage. In some embodiments, the maintaining forward voltage has a greater magnitude than the maintaining voltage. In some embodiments, the maintaining forward voltage is in the range of about -4000mV to 2000mV. In some embodiments, the maintaining forward voltage is in the range of about -10,000mV / s to 4,000mV / s. In some embodiments, the maintaining forward voltage is in the range of about -20,000mV / s to 8,000mV / s.

[0212] In some embodiments, each of the forward voltages is applied for about 2 minutes to 10 minutes. In some embodiments, each of the forward voltages is applied for about 1 minute to 20 minutes. In some embodiments, the forward voltages of process 800 correspond to Figure 5C The voltage curve 5003 in the maintained forward voltage 528.

[0213] Depending on the associated hold voltage, the magnitude and / or duration of the hold reversal voltage and the hold forward voltage may be adjusted. The magnitude and / or duration of the hold reversal voltage and the hold forward voltage may also be adjusted based on the material and electrical properties of the electrochromic stack of the ECD.

[0214] In some embodiments, process 800 optionally further includes applying a ramp to the hold reversal voltage immediately before applying each hold reversal voltage. Although this operation is not included in the description because it is optional. Figure 8 In the example, but in the above Figure 5C An example of a ramp to hold reversal voltage is illustrated in . In some embodiments, the ramp to hold reversal voltage changes at a rate in the range of about 10 mV / s to 250 mV / s until the hold reversal voltage is reached. In some embodiments, the ramp to hold reversal voltage changes at a rate of about 50 mV / s until the hold reversal voltage is reached. In some embodiments, the ramp to hold reversal voltage corresponds to Figure 5C The voltage curve 5003 in the figure slopes to the holding reversal voltage 522.

[0215] In some embodiments, process 800 further includes applying a ramp to the holding forward voltage after applying the holding reverse voltage and before applying the holding forward voltage. Although this operation is not included in the description because it is optional, Figure 8 In the example, but in the above Figure 5C An example of a ramp to hold forward voltage is illustrated in FIG. The ramp to hold forward voltage changes from the hold reverse voltage to the hold forward voltage at a rate in the range of about 10 mV / s to 250 mV / s. In some embodiments, the ramp to hold forward voltage of process 800 corresponds to Figure 5CThe voltage curve 5003 in the example slopes to maintain the forward voltage 526.

[0216] In various embodiments, process 800 is applied to electrochromic devices that are larger than a certain standard, such as having a distance between bus bars (bus distance) greater than about 24, 36, 48, or 60 inches. This distance is also referred to as the distance between bus bars in this disclosure. See FIG. 8 for an example of an ECD and the distance between its two bus bars. Figures 1D to 1F ; In some cases, the distance can be a vertical or substantially vertical distance between the bus bars.

[0217] Fig. 9 A flow chart of a process 900 for controlling an electrochromic device according to some disclosed embodiments is shown. Some implementations of process 900 use Figure 5C In some embodiments, the process includes only operations 902, 904, 906, and 908 performed in chronological order. In other embodiments, as further explained below, additional operations are included, but in Fig. 9 These additional operations are not illustrated in FIG.

[0218] Process 900 begins by applying a ramp-to-drive voltage to the ECD during a ramp-to-drive period. See block 902. The ramp-to-drive voltage has a magnitude that increases during the ramp-to-drive period. In some embodiments, the ramp-to-drive voltage increases at a rate of about 1 mV / s to 250 mV / s. In some embodiments, the ramp-to-drive voltage of operation 902 corresponds to Figure 5C The slope of the voltage curve 5003 in FIG. 5 is to the driving voltage 510 .

[0219] Process 900 also involves applying a drive voltage to the ECD during the drive period. See block 904. The drive voltage has a substantially constant magnitude and the same polarity as the polarity of the ramp-to-drive voltage at the end of the ramp-to-drive period. In some embodiments, the drive voltage has a magnitude substantially the same as the magnitude of the ramp-to-drive voltage at the end of the ramp-to-drive period. In some embodiments, the magnitude of the drive voltage is in a range of approximately -2200 mV to -4600 mV, as explained above for operation 804. The drive voltage of operation 904 corresponds to Figure 5C The driving voltage 512 of the voltage curve 5003 in FIG. 5A . In some embodiments, the driving voltage does not exceed the aging voltage.

[0220] Process 900 also includes applying a holding voltage to the ECD during the holding period. See block 906. The holding voltage has the same polarity as the polarity of the drive voltage. The holding voltage has a magnitude that is smaller than the magnitude of the drive voltage. The holding voltage of operation 906 corresponds to Figure 5C5003 in the voltage curve 5003. In some embodiments, process 900 causes the ECD to have a higher optical density at the beginning of the hold period than at the beginning of the ramp to drive period.

[0221] Process 900 also includes applying one or more hold reversal voltages to the ECD after the hold period. See block 908. The one or more hold reversal voltages of operation 902 correspond to Figure 5C In some embodiments, the one or more hold reversal voltages have a polarity opposite to the polarity of the hold voltage. In other embodiments, the hold reversal voltage has the same polarity as the hold voltage, but a smaller magnitude. In some embodiments, the hold reversal voltage has a magnitude in the range of about -4,000mV to 2,000mV. In some embodiments, the hold reversal voltage has a magnitude in the range of about -10,000mV to 4,000mV. In some embodiments, the hold reversal voltage has a magnitude in the range of about -20,000mV to 8,000mV. In some embodiments, each hold reversal voltage is applied for about 2 minutes to 10 minutes. In some embodiments, each hold reversal voltage is applied for about 1 minute to 20 minutes. As explained above, the magnitude and duration of the hold reversal voltage can be adjusted for different hold voltages and / or various target coloring states.

[0222] exist Fig. 9 In some embodiments not illustrated in FIG. 9 , process 900 optionally further includes applying a holding forward voltage to the ECD after applying each holding reverse voltage. The holding forward voltage corresponds to Figure 5C In some embodiments, the forward voltage 528 of the voltage curve 5003 in the embodiment is maintained. The one or more forward voltages maintained have the same polarity as the polarity of the voltage maintained. In some embodiments, the one or more forward voltages maintained have a greater magnitude than the magnitude of the voltage maintained. In some embodiments, the forward voltage is maintained in the range of about -4,000mV / s to 2,000mV / s. In some embodiments, the forward voltage is maintained in the range of about -8,000mV / s to 4,000mV / s. In some embodiments, the forward voltage is maintained in the range of about -20,000mV / s to 8,000mV / s. In some embodiments, each forward voltage is applied for about 2 minutes to 10 minutes. In some embodiments, each forward voltage is applied for about 1 minute to 20 minutes. In various applications, the forward voltage can be adjusted for different hold voltages and / or various target coloring states.

[0223] exist Fig. 9In some embodiments not illustrated in FIG. 1 , process 900 optionally further includes applying a ramp to a hold reversal voltage immediately before applying each hold reversal voltage. The ramp to hold reversal voltage corresponds to Figure 5C The slope of the voltage curve 5003 in FIG. 5004 is to hold the reversal voltage 522. The ramp to hold the reversal voltage changes at a rate in the range of about 10 mV to 250 mV until the hold reversal voltage is reached. In some embodiments, the ramp to hold the reversal voltage changes at a rate of about 50 mV / s until the hold reversal voltage is reached.

[0224] exist Fig. 9 In some embodiments not illustrated in FIG. 1 , process 900 optionally further includes applying a ramp to a holding forward voltage after applying the holding reverse voltage and before applying the holding forward voltage. The ramp to the holding forward voltage corresponds to Figure 5C The slope of the voltage curve 5003 in FIG. 526 is to maintain the forward voltage. The ramp to maintain the forward voltage changes from the holding reversal voltage to the holding forward voltage at a rate in the range of about 10 mV to 250 mV until the holding reversal voltage is reached. In some embodiments, the ramp to maintain the reversal voltage changes at a rate of about 50 mV / s until the holding reversal voltage is reached.

[0225] exist Fig. 9 In some embodiments not illustrated in FIG. 1 , process 900 optionally further includes applying a ramp-to-hold voltage to the ECD during a ramp-to-hold period. The ramp-to-hold period is after the drive period and before the hold period. The ramp-to-hold voltage corresponds to Figure 5C 5003 in the ramp to hold voltage 518. The ramp to hold voltage changes at a rate in the range of about 10 mV to 250 mV during the ramp to hold period until the hold voltage is reached. In some embodiments, the ramp to hold voltage changes at a rate of about 50 mV / s until the hold voltage is reached.

[0226] In various embodiments, process 900 is applied to windows that are larger than a certain size. In various embodiments, the window has a bus bar distance of at least about 24, 36, 48, or 60 inches.

[0227] V. Examples

[0228] Various example implementations, techniques, and data will now be discussed.The ECD in the examples herein has four colored states labeled T1, T2, T3, and T4 from the clearest state to the most colored state.

[0229] Example 1

[0230] Example 1 shows the tinting state data of windows of different sizes controlled by the method according to some embodiments of the present disclosure. The data of Example 1 is Figures 10 to 13 The shading data for the window compares the optical density at the center of the window to the two edges of the window where the two bus bars are located. One of the edges is where the bus bar contacts the ITO TCO layer, and this edge is called the ITO edge. The other edge is where the bus bar later contacts the TEC TCO, and this edge is called the TEC edge.

[0231] The ECD in this embodiment has four coloration states labeled T1, T2, T3, and T4. In this embodiment, T1 has an optical density (or absorbance) of 0.3 and a transmittance of 50%. T2 has an optical density of 0.52 and a transmittance of 30%. T3 has an optical density of 1.22 and a transmittance of 6%. T4 has an optical density of 2.3 and a transmittance of 0.5%. In some cases, T4 has an optical density of 2.0 and a transmittance of 1%.

[0232] Fig.10 The optical density data for the ECD with a busbar distance of 59 inches during the color transition from T1 to T4 is shown. Fig.10 The upper part of the voltage curve 1000 is similar to Figure 5B 5002 in FIG. The upper half of the figure shows the optical density of the TEC edge, ITO edge, and center of the ECD. The lower half of the figure shows the optical density difference between the TEC edge and the center (labeled "TEC" in the figure) and the difference between the ITO edge and the center (labeled "ITO" in the figure). As can be seen from the upper half of the figure, when the driving voltage is applied, the optical density of the TEC edge, the ITO edge, and the center increases. At the end of the driving period (1002), the optical density of the TEC edge, the ITO edge, and the center reaches a higher optical density level than the optical density level at the beginning of the holding voltage. The TEC edge has the highest optical density, followed by the ITO edge, and then the center. This is consistent with the Figure 7 The images 712, 714, 716 in FIG. 7 are consistent, where the window on the left half of each image transitions from a brighter state to a darker state, and the center is brighter than the two vertical edges. Figure 7 The window on the left half of the image in Fig.10 The curve 1000 is similar to the voltage curve 704 for control.

[0233] When a driving reverse voltage 1012 (clearing voltage) is applied (the driving reverse voltage 1012 corresponds to, for example, Figure 5B , Figure 5C and Figure 6B516 in the drive reversal voltage), the optical densities of the TEC edge, ITO edge and center all decrease. These optical densities are all different from each other during the drive period. However, these optical densities all converge quickly during the drive reversal period, resulting in improved edge-to-center OD uniformity, which is what the user expects. The ITO edge optical density decreases faster than the center optical density. The ITO optical density time curve in the upper half of the figure also crosses the curve of the center at time 1004, which is also regarded as the zero crossing of the ITOΔOD curve (the difference between the ITO edge and the center) in the lower half of the figure. Time 1004 is the time when the OD of the ITO edge and the center is the same, and occurs when the drive reversal voltage is applied during the drive reversal period. In the upper half of the figure, at time 1006, the OD curve of the TEC average crosses the curve of the center of the ECD. This is also regarded as the zero crossing of the TECΔOD curve (the difference between the TEC edge and the center) in the lower half of the figure. Time 1006 is when the OD of the ITO edge and center are the same, and occurs when the drive reversal voltage is applied during the drive reversal period. During the clearing voltage, the OD difference between the edge and center decreases. When the hold voltage is applied, the optical density approaches the target optical density T4 (indicated by dashed line 1010) as seen in the upper half of the figure. Fig.10 The ΔOD curves of the TEC edge and the ITO edge in the lower half of exemplify that during the drive interval, the TEC edge is significantly more colored than the center. The ITO edge is also darker than the center, but to a lesser extent during the drive period. The clearing pulse in the voltage curve helps reduce the difference between the edge and the center to zero and then slightly negative; thus, the clearing pulse reduces the non-uniformity between each edge and the center of the window, which provides a window that looks more uniform across its width. These differences remain relatively small during the hold period, such as at time 1008.

[0234] Fig.11 shows the same ECD with Fig.10 Similar data. Fig.11 shows the color transition process from T1 to T3, and Fig.10 The transition process from T1 to T4 is shown. Figure 5B The voltage curve is similar to the voltage curve 1101. Fig.11 The optical density curve in Fig.10 The optical density curves in the graph are similar in shape and pattern. Fig.11 The driving period ratio Fig.10 The driving period in is shorter because it takes less time to change the coloring of the ECD from T1 to T3. As can be seen from the upper half of the figure, the driving voltage quickly increases the OD at the edge and center of the ECD to a target OD of 1.22. Fig.11The ΔOD curves of the TEC edge and the ITO edge in the lower half of exemplify that during the driving interval, the TEC edge is significantly more colored than the center. The ITO edge is also darker than the center, but to a lesser extent during the driving period. The clear pulse in the voltage curve helps reduce the difference between the edge and the center to nearly zero. The coloring method here still effectively reduces the non-uniformity from T1 to T3.

[0235] Fig.12 The optical density of various sizes of ECDs at four different stages of the color transition process from T1 to T4 is shown. The horizontal axis is the separation distance between bus bars that are parallel or substantially parallel to each other in feet, or the bus bar distance (BBD). The vertical axis indicates OD or ΔOD as explained above. Fig.12 Each subpanel of includes data with different sizes of ECD. As measured by the busbar distance, the ECD ranges from 2.5 feet to 5 feet. The graph includes four columns for four different stages of the color transition process. The first stage is at Fig.12 The driving end stage listed in the first column from the left in Fig.10 The second stage of the coloring transition process is Fig.12 The ITO uniformity stage is shown in the second column from the left. This stage corresponds to Fig.10 The time point 1004 in FIG. 1 is when the edge and center of the ITO have the same OD. Fig.10 In the upper part of the graph, at this point in time, the ITO OD curve crosses the center OD curve. The third stage of the color transition process is Fig.12 The TEC uniformity stage is shown in the third column from the left. This stage corresponds to Fig.10 The time point 1006 in FIG. 1 is when the edge and the center of the TEC have the same OD. Fig.10 The fourth stage of the color transition process is Fig.12 The holding phase is shown in the fourth column from the left in . This phase corresponds to Fig.10 Time point 1008 in the video. Fig.12 The upper part of the graph shows the optical density at the TEC edge, ITO edge and center. Fig.12 The lower part of shows the optical density difference between the edge and the center of the TEC and the difference between the edge and the center of the ITO.

[0236] like Fig.12As seen in the upper half of the figure, the TEC edge and ITO edge of the ECD of various sizes have an optical density higher than the target optical density (0.5 transmittance) of 2.3 at the end of the drive stage, and the center of the ECD is close to or slightly below the target OD. Under ITO uniformity, the OD of the ITO edge and the center overlap and are close to or below the target OD, while the TEC edge is higher than or close to the target OD. Under TEC uniformity, the OD of the TEC edge and the center overlap and are close to or slightly below the target OD. The ITO optical density is lower than the TEC optical density. These stages show the dynamic changes in the time OD of the edge and center of the ECD before approaching the target OD. During the holding state, the TEC edge, the center and the ITO edge are all close to the target OD, which indicates that these methods achieve uniform OD across the ECD in the holding state.

[0237] Fig.12 The lower half of the diagram shows the edge-to-center OD difference or ΔOD. At the end of the drive phase, the ΔOD is relatively large. The ΔOD of the TEC edge is generally greater than the ΔOD of the ITO edge. In the ITO uniformity phase, the optical density of the ITO edge and the center overlaps. The difference between the TEC edge and the center is positive (the TEC edge is darker) and relatively large, especially for smaller windows. In the TEC uniformity phase, the optical density of the TEC edge and the center overlaps. The difference between the ITO edge and the center is negative, where the ITO edge is brighter than the center. These phases show the OD time dynamics of the edge and center of each ECD before reaching the target OD. In the hold state, the difference between the edge and the center becomes significantly smaller than the difference at the end of the drive, indicating that the drive reversal voltage or clear pulse applied in the disclosed method improves the coloring uniformity of the ECD. In the first three stages of the transition, windows with smaller BBD tend to have a larger difference between the ITO edge and the TEC edge than windows with larger BBD. However, these methods achieve OD uniformity for all window sizes during the hold phase.

[0238] Fig.13 Data obtained from a staining process that changes the staining state of the ECD from T1 to T3 are shown. Fig.13 The data in is usually related to Fig.12 The data in have the same pattern. However, Fig.12 Compared with Fig.13 In the ΔOD values ​​of the TEC edge and the ITO edge decrease more significantly from the end of the drive to the hold state. This indicates that there is a greater degree of edge-to-center non-uniformity in the coloring transition from T1 to T3 than in the coloring transition from T1 to T4. However, the disclosed methods can achieve OD uniformity in both transitions. It seems that the effectiveness of these methods exists for different window sizes.

[0239] Example 2

[0240] This example shows that some methods according to some embodiments provide various advantages over conventional methods as explained above. This example compares coloring performance between methods according to some embodiments and conventional methods. The data of Example 2 is Figures 14 to 17 The switchable window or ECD in this embodiment also has four tinting states similar to those in Example 1, except that the most tinted level T4 of this embodiment has an optical density of 2 or a transmittance of 1%. Fig.14 Data for the shading transition from T1 to T4 is shown. The left column shows data for two windows with a bus bar distance of about 48.5 inches. The middle column shows data for two windows with a bus bar distance of about 53.25 inches. The right column shows data for two windows with a bus bar distance of about 60 inches. One window of each size is controlled by a method according to some embodiments, and the data for that window is labeled FAST. Another window of each size is controlled by a conventional method, and the data for that window is labeled POR (abbreviation for process of recording).

[0241] Fig.14 The top row shows the Figure 5B The voltage curves FAST and POR of curves 5002 and 5001 in FIG. 5001 are shown in FIG. Figure 5A . The second row shows the OD curves for the center of each window in the window. The third row shows the ΔOD curves for the TEC edge. The bottom row shows the ΔOD curves for the ITO edge. As seen in the second row, the disclosed method causes the ECD to increase its optical density faster than the conventional method, and reaches the target OD of 2 (1% transmittance) before the conventional method. This is advantageous because it is generally desirable to have the window switch OD quickly once a switching command is issued. This advantage is observed for windows of all three sizes (48.5 inches, 53.25 inches, and 60 inches). As seen in the third row, the disclosed FAST method causes relatively large OD differences between the TEC edge and the center during the drive interval, but these differences are reduced to near zero by the clear pulse (maintaining the inversion voltage), which is less than those produced by the conventional POR method during the holding period. This advantage of the FAST method over the POR method exists for windows of all three sizes. This indicates that the clear pulse (maintaining the inversion voltage) effectively reduces the TEC center coloring non-uniformity of windows of various sizes. As shown in the fourth row, similar data patterns are also seen for the ITO edge. For all three windows, the FAST method achieves a near-zero ITO center OD difference.

[0242] Fig.15Data for the staining transition process changing the ECD staining level from T1 to T3 are shown. Fig.15 The data pattern in is usually similar to Fig.14 The data patterns in are consistent, which proves that the disclosed method accelerates the shading transition and improves the shading uniformity of the shading transition from T1 to T3 and the shading transition from T1 to T4. As seen in the second row, the disclosed FAST method makes the ECD increase its optical density faster than the conventional method and reaches the target OD of 1.22 (6% transmittance) faster than the conventional method. This advantage is observed for all three sizes of windows. Moreover, as seen in the third row, for all sizes of windows, the FAST method effectively reduces the TEC center OD difference to near zero. And, as shown in the fourth row, for all sizes of windows, the FAST method effectively reduces the ITO center OD difference to near zero.

[0243] Fig.16 Data comparing the time to reach a steady-state optical density target between the disclosed method according to some embodiments and a conventional method are shown. Fig.16 The left column shows data for the shading transition from T1 to T2. The middle column shows data for the shading transition from T1 to T3. The right column shows data for the shading transition from T1 to T4. According to some embodiments, each column includes data for two groups of windows, one group of windows being controlled by the POR method and the other group of windows being controlled by the FAST method. Each group of windows includes three (3) windows having a BBD of 4.0, 4.5, and 5.0 feet. Fig.16 The top row shows the time it takes for the process to reach the optical density target (i.e., the stained state of T2 in the left column, the stained state of T3 in the middle column, and the stained state of T4 in the right column). The middle row shows the time difference between the two methods to reach the optical density target. The bottom row shows the percentage reduction in time. For all three window sizes and for all three staining transitions, the disclosed method is faster than the conventional method, as seen in the top row of the figure. The middle row of the figure shows that for the transition from T1 to T2, the disclosed method is about five minutes faster. For the transition from T1 to T3, the disclosed method is about 10 minutes faster. For the transition from T1 to T4, the disclosed method is about 15 minutes faster. As shown in FIG. Fig.16 As seen in the bottom row of Figure 1, the disclosed method reduced the time to reach the target optical density by about 45% to 65% when transitioning from T1 to T2. When transitioning from T1 to T3 and from T1 to T4, the disclosed method reduced the time to reach the OD target by about 40%.

[0244] Fig.17 The driving time is compared between the disclosed method and the conventional method, and the driving time is as described above (e.g., reference FIG. 5A to FIG. 5D) is the duration of the driving voltage during the driving period explained by . Five columns from left to right show the data of the coloring transition process from T1 to T2, from T1 to T3, from T1 to T4, from T2 to T4 and from T3 to T4. The upper half of the figure shows the driving time, and the lower half of the figure shows the driving time reduction percentage. Each sub-figure of the figure includes the data of the window between 50 inches and 70 inches. As seen in the upper half of the figure, in each transition process and for each window size, the disclosed method spends less time to drive ECD than the conventional method. The lower half of the figure shows that the disclosed method provides the maximum driving time reduction percentage for the transition from T1 to T2 and provides the minimum reduction percentage for the transition from T2 to T4. With regard to the absolute time difference between the two methods, as seen in the upper half of the figure, the driving time interval between the two methods is the largest for the coloring transition from T1 to T3 and from T1 to T4.

[0245] In summary, the results of Example 2 show that the disclosed method accelerates the color transition, resulting in a shorter drive period and a shorter time to reach the optical target light density. Moreover, the disclosed method improves the color uniformity of the ECD by applying a clearing pulse before reaching the steady-state target light density.

[0246] Example 3

[0247] The data of Example 3 are Fig.18 Presented in. Fig.18 Data are presented for a method for improving color uniformity after the ECD has reached a steady-state target optical density according to some embodiments. Fig.18 The voltage curve is similar to the voltage curve shown in the top row of Figure 5C The voltage curve 5003 in FIG. The second row of the figure shows the optical density curves of the TEC edge, ITO edge and center of the ECD. Fig.18 The third row of shows the ΔOD curves of the ITO edge, ie, the optical density difference between the ITO edge and the center of the ECD. The bottom row shows the ΔOD curves of the TEC edge, ie, the optical density difference between the TEC edge and the center of the ECD.

[0248] At time 1802, after applying the clear pulse, the ITO ΔOD is significantly reduced to near zero, as shown in the third row of the figure. The ΔOD of the TEC edge shown in the bottom row is also significantly reduced. After time 1802 and when the holding voltage is applied, the ΔOD of both the ITO edge and the TEC edge gradually increases. After time 1804, multiple holding pulses are applied. Each holding pulse changes between holding the reverse voltage and holding the forward voltage. These holding pulses cause the ΔOD of both the ITO edge and the TEC edge to oscillate, thereby bringing the ΔOD closer to zero. Therefore, in some such embodiments, the holding pulse reduces the edge-to-center non-uniformity after time 1804.

[0249] The term "system" may encompass all kinds of equipment, devices, and machines for processing data, including (for purposes of illustration and not limitation) a programmable processor, a computer, or multiple processors or computers. A processing system may include special-purpose logic circuits, such as an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit). In addition to hardware, a processing system may also include code that creates an execution environment for the computer program in question, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0250] A computer program (which may also be referred to or described as a program, software, software application, engine, pipeline, module, software module, script or code) may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be deployed in any form, including as a standalone program or as a module, component, subroutine or other unit suitable for use in a computing environment. A computer program may, but need not, correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store portions of one or more modules, subroutines or codes). A computer program may also be deployed to execute on a single computer or on multiple computers, which are, for example, located at one site or distributed over multiple sites and interconnected by a communication network.

[0251] The processes and logic flows described in this specification may be performed by one or more programmable computers executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and the device may be implemented as, a special purpose logic circuit, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[0252] A computer suitable for executing a computer program may include, for example, a general purpose microprocessor or a special purpose microprocessor or both, or any other kind of central processing unit. Typically, the central processing unit will receive instructions and data from a read-only memory or a random access memory or both. A computer typically includes a central processing unit for executing or implementing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data, or be operatively coupled to receive data from and / or transmit data to the one or more mass storage devices. However, a computer need not have such devices. Moreover, a computer may be embedded in another device, such as a mobile or cellular phone, a personal digital assistant (PDA), a mobile audio or video player, a game console, a global positioning system (GPS) receiver, or a portable storage device (e.g., a universal serial bus (USB) flash drive), to name just a few examples.

[0253] Computer-readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media, and memory devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by, or incorporated in, special purpose logic circuitry.

[0254] To provide interaction with a user, embodiments of the subject matter described in this specification may be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user, and a keyboard and pointing device (e.g., a mouse or trackball) that the user can use to provide input to the computer. Other kinds of devices may also be used to provide interaction with the user; for example, feedback provided to the user may be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback; and input from the user may be received in any form, including sound, voice, or tactile input. In addition, a computer may interact with a user by sending documents to and receiving documents from a device used by the user; for example, by sending a Web page to a Web browser on a user device of a user in response to a request received from the Web browser.

[0255] Embodiments of the subject matter described in this specification may be implemented in a computing system that includes a back-end component (e.g., as a data server), or includes a middleware component (e.g., an application server), or includes a front-end component (e.g., a client computer with a graphical user interface or a web browser through which a user can interact with an embodiment of the subject matter described in this specification), or includes any combination of one or more such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include local area networks ("LANs") and wide area networks ("WANs"), such as the Internet.

[0256] Although this specification contains many specific implementation details, these details should not be understood as limitations on the scope of protection that can be claimed, but rather as descriptions of features that may be specific to a particular embodiment. Certain features described in this specification in the context of a separate embodiment may also be implemented in a single embodiment in combination. Conversely, the various features described in the context of a single embodiment may also be implemented in multiple embodiments individually or in any suitable sub-combination. Moreover, although the above features may be described as functioning in certain combinations and even initially claimed as such, one or more features from the claimed combination may be cut out of the combination in some cases, and the claimed combination may involve a sub-combination or a variation of the sub-combination.

[0257] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be understood as requiring that such operations be performed in the particular order shown or in a sequential order, or that all illustrated operations be performed, in order to achieve the desired results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0258] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the order in which they occur sequentially to achieve the desired results. In certain embodiments, multitasking and parallel processing may be advantageous. Other steps or stages may be provided, or steps or stages may be eliminated from the described processes. Therefore, other embodiments are within the scope of the following claims.

[0259] Terms such as "a", "an", and "the" are not intended to refer to only a singular entity, but include the general class of specific examples that may be used for illustration. The terms herein are used to describe specific embodiments, but their usage is not intended to delineate limitations.

[0260] When referring to a range, unless otherwise specified, the range is meant to be inclusive. For example, a range between value 1 and value 2 is meant to be inclusive, and includes value 1 and value 2. An inclusive range will span any value from about value 1 to about value 2. As used herein, the term "adjacent" or "adjacent to..." includes "immediately adjacent," "abutting," "contacting," and "close to."

[0261] As used herein, the conjunction "and / or" in the phrases included in the claims (such as "including X, Y, and / or Z") means including any combination of X, Y, and Z or multiple X, Y, and Z. For example, such phrases mean including X. For example, such phrases mean including Y. For example, such phrases mean including Z. For example, such phrases mean including X and Y. For example, such phrases mean including X and Z. For example, such phrases mean including multiple X. For example, such phrases mean including multiple Y. For example, such phrases mean including multiple Z. For example, such phrases mean including multiple X and multiple Y. For example, such phrases mean including multiple X and multiple Z. For example, such phrases mean including multiple Y and multiple Z. For example, such phrases mean including multiple X and one Y. For example, such phrases mean including multiple X and one Z. For example, such phrases mean including multiple Y and one Z. For example, such phrases mean including one X and multiple Y. For example, such phrases mean including one X and multiple Z. For example, such phrases mean including one Y and multiple Z. The conjunction "and / or" is meant to have the same effect as the phrase "X, Y, Z, or any combination of X, Y, Z, or multiples of X, Y, Z." The conjunction "and / or" is meant to have the same effect as the phrase "one or more X, Y, Z, or any combination of X, Y, Z."

[0262] The term "operably coupled" or "operably connected" refers to a first element (e.g., a mechanism) coupled (e.g., connected) to a second element to allow for the intended operation of the second element and / or the first element. Coupling can include physical or non-physical coupling (e.g., communicative coupling). Non-physical coupling can include signal inductive coupling (e.g., wireless coupling). Coupling can include physical coupling (e.g., physical connection) or non-physical coupling (e.g., via wireless communication). Operationally coupled can include communicatively coupled.

[0263] An element (e.g., a mechanism) that is "configured to" perform a function includes structural features that enable the element to perform the function. Structural features may include electrical features, such as circuits or circuit elements. Structural features may include actuators. Structural features may include circuits (e.g., including electrical circuits or optical circuits). The electrical circuit may include one or more wires. The electrical circuit may be configured to be coupled to a power source (e.g., coupled to a power grid). For example, the electrical circuit may include a socket. The optical circuit may include at least one optical element (e.g., a beam splitter, a reflector, a lens, and / or an optical fiber). Structural features may include mechanical features. Mechanical features may include latches, springs, closures, hinges, chassis, supports, fasteners, or cantilevers, etc. Executing the function may include utilizing logical features. Logical features may include programming instructions. Programming instructions may be executed by at least one processor. Programming instructions may be stored or encoded on a medium accessible to one or more processors. In addition, in the following description, the phrases "operable as," "adapted to," "configured to," "designed to," "programmed to," or "capable of" may be used interchangeably where appropriate.

[0264] Without departing from the scope of the present disclosure, any of the above-described embodiments may be modified, added or omitted. Without departing from the scope of the present disclosure, any of the above-described embodiments may include more, less or other features. In addition, without departing from the scope of the present disclosure, the steps of the described features may be performed in any suitable order. In addition, without departing from the scope of the present disclosure, one or more features from any embodiment may be combined with one or more features of any other embodiment. Without departing from the scope of the present disclosure, the components of any embodiment may be integrated or separated according to specific needs.

[0265] It should be understood that some aspects described above can be implemented in a modular or integrated manner using computer software in a logical form. Based on the disclosure and teachings provided herein, those of ordinary skill in the art will know and understand other ways and / or methods of implementing various aspects using hardware and / or a combination of hardware and software.

[0266] Any software component or function described in the present application may be implemented as software code using any suitable computer language and / or computing software (such as, for example, Java, C, C#, C++ or Python, LabVIEW, Mathematica or other suitable language / computing software, including low-level code, including, for example, code for field programmable gate arrays written in VHDL). The code may include software libraries for functions such as data acquisition and control, motion control, image acquisition and display. Some or all of the code may also be run on a personal computer, single board computer, embedded controller, microcontroller, digital signal processor, field programmable gate array and / or any combination thereof or any similar computing device and / or logic device. The software code may be stored as a series of instructions or commands on a CRM, such as a random access memory (RAM), a read-only memory (ROM), a magnetic medium (such as a hard drive or floppy disk), or an optical medium (such as a CD-ROM), or a solid-state storage device (such as a solid-state hard drive or a removable flash memory device) or any suitable storage device. Any such CRM may reside on or within a single computing device, and may exist on or within different computing devices within a system or network. Although the foregoing disclosed embodiments have been described in some detail to facilitate understanding, the described embodiments should be considered illustrative rather than restrictive. It will be apparent to one of ordinary skill in the art that certain changes and modifications may be implemented within the scope of the appended claims.

[0267] The terms "include," "have," and "include" are open-ended linking verbs. Any form or tense of one or more of these verbs, such as "include," "have," and "include," are also open-ended. For example, any method that "includes," "has," and "includes" one or more steps is not limited to having only those one or more steps, but may also encompass other unlisted steps. Similarly, any composition or device that "includes," "has," and "includes" one or more features is not limited to having only those one or more features, but may encompass other unlisted features.

[0268] All methods described herein may be performed in any suitable order, unless otherwise specified herein or otherwise clearly contradictory to the context. The use of any and all examples or exemplary language (e.g., "such as") provided with respect to certain embodiments herein is intended only to better illustrate the present disclosure and does not limit the scope of the present disclosure otherwise claimed. The language in this specification should not be understood to indicate any unclaimed elements necessary for the practice of the present disclosure.

[0269] The grouping of alternative elements or embodiments of the present disclosure disclosed herein should not be construed as limiting. Each group member may be referred to and claimed individually or in any combination with other members of the group or other elements found herein. For convenience or patentability reasons, one or more members in the group may be included in the group or deleted from the group. When any such inclusion or deletion occurs, this specification is considered to include the modified group in this article, so the written description of all Markush groups used in the appended claims is met.

Claims

1. A method for controlling the optical state of an electrochromic device, the method comprising: applying a ramp-to-drive voltage to the electrochromic device during a ramp-to-drive period, wherein the ramp-to-drive voltage has a magnitude that increases during the ramp-to-drive period; applying a drive voltage to the electrochromic device during a drive period after the ramp-to-drive period, wherein the drive voltage has a substantially constant magnitude and a same polarity as the ramp-to-drive voltage at the end of the ramp-to-drive period; applying a drive reversal voltage to the electrochromic device in a drive reversal period after the drive period, wherein the drive reversal voltage has a polarity opposite to that of the drive voltage; as well as After the drive reversal period, a hold voltage is applied to the electrochromic device in a hold period, wherein the hold voltage has the same polarity as that of the drive voltage and has a smaller magnitude than that of the drive voltage. 2 . The method of claim 1 , wherein the electrochromic device has a higher optical density at the beginning of the hold period than at the beginning of the ramp-to-drive period. 3 . The method of claim 1 , wherein the drive voltage has substantially the same magnitude as a magnitude of the ramp-to-drive voltage at the end of the ramp-to-drive period.

4. The method of claim 1, wherein the ramp-to-drive voltage has a magnitude that increases at a rate in a range of approximately 1 millivolt / second (mV / s) to 250 mV / s during the ramp-to-drive period.

5. The method of claim 1, wherein the drive reversal voltage has a magnitude of approximately 1400 to 1900 millivolts. The method of claim 1 , wherein the driving reversal voltage has a duration of about 30 seconds to 300 seconds.

7. The method according to claim 1, wherein: At the beginning of the hold period, one or more edges of the electrochromic device have a higher optical density than at the beginning of the drive period and lower than at the end of the drive period, and Each of the one or more edges of the electrochromic device is adjacent to a bus bar configured to apply a voltage to the electrochromic device.

8. The method according to claim 1, further comprising: A ramp-to-hold voltage is applied to the electrochromic device in a ramp-to-hold period after the drive reversal period and before the hold period, wherein the ramp-to-hold voltage changes from the drive reversal voltage to the hold voltage in the ramp-to-hold period at a rate in a range of approximately 1 millivolt / second (mV / s) to 250 mV / s. 9 . The method of claim 8 , wherein a polarity of the ramp-to-hold voltage changes during the ramp-to-hold voltage period.

10. The method according to claim 1, further comprising: After the drive period and before the drive reversal period, a ramp to drive reversal voltage is applied to the electrochromic device in a ramp to drive reversal period, wherein the ramp to drive reversal voltage changes from the drive voltage to the drive reversal voltage at a rate in a range of approximately 1 millivolt / second (mV / s) to 250 mV / s in the ramp to drive reversal period. 11 . The method of claim 10 , wherein a polarity of the ramp-to-drive-reversal voltage changes during the ramp-to-drive-reversal period.

12. The method according to claim 1, further comprising: applying one or more hold reversal voltages to the electrochromic device after the hold period, wherein: Each holding inversion voltage is applied during the holding inversion period, and The one or more hold reversal voltages have a polarity opposite to a polarity of the hold voltage.

13. The method according to claim 12, further comprising: After applying each hold reverse voltage, a hold forward voltage is applied to the electrochromic device during a hold forward period, wherein the hold forward voltage has the same polarity as that of the hold voltage.

14. The method according to claim 13, further comprising: A ramp to a holding reversal voltage is applied immediately prior to applying each holding reversal voltage, wherein the ramp to a holding reversal voltage changes at a rate in a range of about 10 mV / s to about 250 mV / s until the holding reversal voltage is reached.

15. The method of claim 14, wherein the ramp to hold reversal voltage is changed at a rate of about 50 mV / s until the hold reversal voltage is reached.

16. The method according to claim 13, further comprising: A ramp to a holding forward voltage is applied after applying the holding reverse voltage and before applying the holding forward voltage, wherein the ramp to the holding forward voltage changes at a rate in a range of about 10 mV / s to about 250 mV / s until the holding forward voltage is reached. The method according to claim 1 , wherein the driving voltage does not exceed a aging voltage.

18. A method of controlling the optical state of an electrochromic device, the method comprising: applying a ramp-to-drive voltage to the electrochromic device during a ramp-to-drive period, wherein the ramp-to-drive voltage has a magnitude curve that increases during the ramp-to-drive period; applying a drive voltage to the electrochromic device during a drive period after the ramp-to-drive period, wherein the drive voltage has a substantially constant magnitude and a same polarity as the ramp-to-drive voltage at the end of the ramp-to-drive period; applying a drive reversal voltage to the electrochromic device in a drive reversal period after the drive period, wherein the drive reversal voltage has: (a) a polarity opposite to that of the drive voltage, (b) a magnitude of about 1400 millivolts to 1900 millivolts, and (c) a duration of about 30 seconds to 300 seconds; as well as A hold voltage is applied to the electrochromic device during a hold period, wherein the hold voltage has the same polarity as the drive voltage, wherein the hold voltage has a magnitude smaller than the drive voltage, and wherein the ramp to drive period, the drive period, the drive reversal period, and the hold period occur sequentially in time.

19. A method of controlling the optical state of an electrochromic device, the method comprising: applying a ramp-to-drive voltage to the electrochromic device during a ramp-to-drive period, wherein the ramp-to-drive voltage has a magnitude that increases during the ramp-to-drive period; applying a drive voltage to the electrochromic device during a drive period after the ramp-to-drive period, wherein the drive voltage has a substantially constant magnitude and a same polarity as the ramp-to-drive voltage at the end of the ramp-to-drive period; applying a holding voltage to the electrochromic device in a holding period after the driving period, wherein the holding voltage has the same polarity as the driving voltage and has a smaller magnitude than the driving voltage; as well as After the hold period, one or more hold reversal voltages are applied to the electrochromic device, wherein the one or more hold reversal voltages have a polarity opposite to that of the hold voltage.

20. The method of claim 19, wherein the method causes the electrochromic device to have a higher optical density at the beginning of the hold period than at the beginning of the ramp-to-drive period.

21. The method of claim 19, wherein the drive voltage has substantially the same magnitude as a magnitude of the ramp-to-drive voltage at the end of the ramp-to-drive period.

22. The method of claim 19, wherein the ramp-to-drive voltage has a magnitude that increases at a rate in a range of approximately 1 millivolt / second (mV / s) to 250 mV / s during the ramp-to-drive period.

23. The method of claim 19, wherein each of the hold reversal voltages is in a range of about -4000 mV to about 2000 mV.

24. The method of claim 19, wherein each of the hold reversal voltages is applied for about 2 minutes to about 10 minutes.

25. The method of claim 19, further comprising: After application of each hold reversal voltage, a hold forward voltage is applied to the electrochromic device, wherein the hold forward voltage has the same polarity as the hold voltage.

26. The method according to claim 25, further comprising: A ramp to a holding reversal voltage is applied immediately prior to applying each holding reversal voltage, wherein the ramp to a holding reversal voltage changes at a rate in a range of about 10 mV / s to about 250 mV / s until the holding reversal voltage is reached.

27. The method of claim 26, wherein the ramp to hold reversal voltage is changed at a rate of about 50 mV / s until the hold reversal voltage is reached.

28. The method of claim 25, further comprising: A ramp to a holding forward voltage is applied after applying the holding reverse voltage and before applying the holding forward voltage, wherein the ramp to the holding forward voltage changes at a rate in a range of about 10 mV / s to about 250 mV / s until the holding forward voltage is reached.

29. The method of claim 19, further comprising: After the drive period and before the hold period, a ramp-to-hold voltage is applied to the electrochromic device in a ramp-to-hold period, wherein the ramp-to-hold voltage changes at a rate in a range of approximately 1 millivolt / second (mV / s) to 250 mV / s in the ramp-to-hold period.

30. An apparatus comprising a controller comprising a processor and a memory, the controller being configured to control the optical state of an electrochromic device by performing any of the methods of claims 1 to 29.

31. A non-transitory machine-readable medium storing instructions which, when executed by a controller comprising a processor and a memory, cause the controller to perform a method for controlling the optical state of an electrochromic device, the method being any of the methods of claims 1 to 29.

32. A method of controlling an electrochromic device, the method comprising: (a) applying a voltage pulse to the electrochromic device to initiate a transition of the electrochromic device between a first coloring state and a second coloring state, wherein the voltage pulse comprises: (i) a leading ramp voltage having a direction and polarity that causes the electrochromic device to switch in the direction of the transition; and (ii) a trailing ramp voltage having a direction opposite to the direction of the leading ramp voltage and reaching a tail voltage having a polarity opposite to the polarity of the leading ramp voltage; and (b) applying a hold voltage to the electrochromic device after applying the voltage pulse, wherein the hold voltage has a magnitude that maintains the electrochromic device in the second colored state.

33. The method of claim 32, wherein the voltage pulse comprises a drive voltage after the leading ramp voltage and before the trailing ramp voltage, the drive voltage having a substantially constant magnitude.

34. The method of claim 33, wherein the magnitude of the hold voltage is less than the magnitude of the drive voltage.

35. The method of claim 33, wherein the tail voltage has a polarity opposite to polarities of the drive voltage and the sustain voltage.

36. The method of claim 32, wherein the holding voltage comprises an oscillating voltage.

37. The method of claim 36, wherein the oscillating voltage improves edge-to-center uniformity of coloration states across the electrochromic device.

38. The method of claim 32, wherein the voltage pulse has a duration of between about 1 minute and 30 minutes.

39. The method of claim 32, wherein the voltage pulse has a magnitude of approximately 1 volt to 7 volts.

40. The method of claim 32, wherein the hold voltage and the tail voltage have opposite polarities.

41. The method of claim 32, wherein the trailing ramp voltage has a ramp rate ranging from about 10 μV / s to about 1000 μV / s.

42. A method of controlling an electrochromic device, the method comprising: (a) applying a voltage pulse to the electrochromic device to initiate a transition of the electrochromic device between a first coloring state and a second coloring state, comprising: (i) ramping the voltage to a drive voltage, (ii) applying the drive voltage at a substantially constant magnitude, and (iii) ramping the drive voltage to a tail voltage having a polarity opposite to that of the drive voltage; and (b) applying a hold voltage to the electrochromic device after applying the voltage pulse, wherein the hold voltage has an opposite polarity to the tail voltage, and wherein the hold voltage maintains the electrochromic device in the second colored state.

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