Light detection device, method for manufacturing light detection device, and electronic apparatus

Abstract

Provided is a light detection device having a pixel structure in which an on-chip lens is formed for each pixel group and allows for a reduction in the number of processes of inter-pixel spacers and reduction in light scattering. The light detection device includes a semiconductor substrate, a pixel isolation portion, and an on-chip lens. The pixel isolation portion is disposed in the semiconductor substrate to isolate pixels adjacent to each other. The on-chip lens is arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels and focusing light from the outside onto the pixel group. The pixel isolation portion includes an intra-pixel-group isolation portion disposed between pixels adjacent to each other in the pixel group, and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region different from the first recessed region and located at a condensing position of light condensed by the on-chip lens. In the intra-pixel-group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view.

Description

Technical Field

[0001] The technology according to the present disclosure (the present technology) relates to a light detecting device, a method for manufacturing the light detecting device, and an electronic device including the light detecting device. Background Art

[0002] Conventionally, in electronic devices having an imaging function such as a digital still camera or a digital video camera, for example, a solid-state imaging element such as a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) image sensor is used as a light detection device. The light detection device includes a pixel composed of a photodiode (photoelectric conversion element) that performs photoelectric conversion and a transistor, and constructs an image based on pixel signals output from a plurality of pixels arranged on a plane.

[0003] At the same time, when strong light is incident on a pixel, the charge accumulated in the photodiode of the pixel is likely to be saturated and overflow into an adjacent pixel, causing a phenomenon known as color mixing. A solid-state imaging device that isolates pixels by a through groove has been considered, but the through groove is formed between all pixels, so that a well contact for providing a ground potential must be formed for each pixel. Therefore, a solid-state imaging device has been proposed in which a non-through groove is formed at a region where an element such as a transistor is arranged between pixels (for example, Patent Document 1). Citation List Patent Literature

[0004] Patent Document 1: Japanese Patent Application Publication No. 2019-145544 Summary of the invention Problems to be solved by the present invention

[0005] However, in the solid-state imaging device disclosed in Patent Document 1, the through groove and the non-through groove are formed separately, resulting in an increase in the number of processes. In addition, misalignment at the joint between the through groove and the non-through groove also causes double processing or trench separation. Furthermore, a structure that allows multiple pixels to share one on-chip lens suffers from light scattering caused by a non-through trench at the center of the on-chip lens.

[0006] The present disclosure is made in view of this situation, and the purpose of the present disclosure is therefore to provide a light detection device, a method for manufacturing a light detection device, and an electronic device, wherein the light detection device has a pixel structure in which an on-chip lens is formed for each group of pixels, and allows the number of processes for pixel isolation to be reduced and light scattering to be reduced. Solution to the problem

[0007] According to one aspect of the present disclosure, a light detection device includes: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating an electrical signal according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens provided on a light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein the pixel isolation portion includes: an intra-pixel group isolation portion provided between pixels adjacent to each other in the pixel group and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a light collecting position of the light collected by the on-chip lens, the second recessed region being different from the first recessed region, and in the intra-pixel group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view.

[0008] According to another aspect of the present disclosure, a light detection device includes: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating an electrical signal according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor layer for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to focus the light from the outside onto the pixel group, wherein the pixel isolation portion includes: an isolation portion within a pixel group, the isolation portion within the pixel group being arranged between pixels adjacent to each other in the pixel group and having an opening at least in a portion of a focusing position of the light focused by the on-chip lens, the on-chip lens being arranged to be offset in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and a formation position of the opening of the isolation portion within the pixel group being offset according to the pupil correction position.

[0009] According to another aspect of the present disclosure, a method for manufacturing a light detection device includes: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating an electrical signal according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to focus the light from the outside onto the pixel group, the method including: a first process of forming an isolation portion within a pixel group between pixels adjacent to each other in the pixel group, the isolation portion within the pixel group including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a focusing position of the light focused by the on-chip lens, the second recessed region being different from the first recessed region, wherein in the first process, the second recessed region is formed to be narrower than the first recessed region in a plan view. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a block diagram showing a schematic configuration example of a light detection device according to the first embodiment of the present disclosure. Figure 2 yes Figure 1 The circuit structure diagram of the pixel shown. Figure 3 : is a partial longitudinal cross-sectional view showing an example of the semiconductor structure of the light detecting device according to the first embodiment of the present disclosure. Figure 4 : is a plan view showing a configuration example of a pixel layout according to the first embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Figure 5 It is along Figure 4 A partial longitudinal cross-sectional view of an example of a semiconductor structure is shown in a schematic cross-section taken along line B1 - B1 ′ of the illustrated pixel group. Figure 6 : is a plan view showing a configuration example of a pixel layout according to a second embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Figure 7 It is along Figure 6 A partial longitudinal cross-sectional view of an example of a semiconductor structure is shown in a schematic cross-section taken along line B2 - B2 ′ of the illustrated pixel group. Figure 8 is a cross-sectional view specifically showing a through region according to the second embodiment. Fig. 9: is a plan view showing a configuration example of a pixel layout according to a third embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Fig.10 : is a plan view showing a configuration example of a pixel layout according to a fourth embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Fig.11A is a plan view of the light detecting device according to the fifth embodiment as viewed from the back surface side and a partial cross-sectional view (part 1) showing an example of the semiconductor structure of the light detecting device taken along line C1 - C1 ′. Fig. 11B is a plan view of the light detecting device according to the fifth embodiment as viewed from the back surface side and a partial cross-sectional view (part 2) showing an example of the semiconductor structure of the light detecting device taken along line C1 - C1 ′. Fig. 11C is a plan view of the light detecting device according to the fifth embodiment as viewed from the back surface side and a partial cross-sectional view (part 3) showing an example of the semiconductor structure of the light detecting device taken along line C1 - C1 ′. Fig. 12A is a plan view of the photodetecting device according to the sixth embodiment as viewed from the back surface side and a partial cross-sectional view (part 1) showing an example of the semiconductor structure of the photodetecting device taken along line D1 - D1 ′. Fig. 12B is a plan view of the photodetecting device according to the sixth embodiment as viewed from the back surface side and a partial cross-sectional view (part 2) showing an example of the semiconductor structure of the photodetecting device taken along line D1 - D1 ′. Fig. 12C is a plan view of the light detecting device according to the sixth embodiment as viewed from the back surface side and a partial cross-sectional view (part 3) showing an example of the semiconductor structure of the light detecting device taken along line D1 - D1 ′. Fig.13 : is a plan view showing a configuration example of a pixel layout of a light detection device according to a seventh embodiment of the present disclosure. Fig.14 : is a plan view showing a configuration example of a pixel layout of a light detection device according to a comparative example of the seventh embodiment. Fig.15 : is a plan view showing a configuration example of a pixel layout of a light detection device according to an eighth embodiment of the present disclosure. Fig.16A is a plan view of the light detecting device according to the seventh embodiment as viewed from the back surface side and a partial cross-sectional view (part 1) showing an example of the semiconductor structure of the light detecting device taken along line G1 - G1 ′. Fig. 16Bis a plan view of the light detecting device according to the seventh embodiment as viewed from the back surface side and a partial cross-sectional view (part 2) showing an example of the semiconductor structure of the light detecting device taken along line G1 - G1 ′. Fig. 16C is a plan view of the light detecting device according to the seventh embodiment as viewed from the back surface side and a partial cross-sectional view (part 3) showing an example of the semiconductor structure of the light detecting device taken along line G1 - G1 ′. Fig.17 : is a plan view showing a configuration example of a pixel layout according to a tenth embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Fig.18 is along Fig.17 A partial cross-sectional view showing an example of a semiconductor structure of a light detecting device, taken along line H1 - H1 ′ in FIG. Fig.19 : is a cross-sectional diagram showing a configuration example of a pixel layout according to an eleventh embodiment of the present disclosure and an arrangement example of an on-chip lens with respect to the pixel layout. Fig. 20A : is a partial cross-sectional view (part 1) showing an example of the semiconductor structure of a light detecting device according to a twelfth embodiment. Fig. 20B : is a partial cross-sectional view (Part 2) showing an example of the semiconductor structure of the light detecting device according to the twelfth embodiment. Fig. 20C : is a partial cross-sectional view (Part 3) showing an example of the semiconductor structure of the light detecting device according to the twelfth embodiment. Fig.20D : is a partial cross-sectional view (Part 4) showing an example of the semiconductor structure of the light detecting device according to the twelfth embodiment. Fig.21 : is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied. Fig. 22 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of an offset structure control system to which the technology according to the present disclosure can be applied. Fig.23 It is shown Fig. 22 A diagram showing an example of the installation position of the imaging unit. DETAILED DESCRIPTION

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the illustrations of the accompanying drawings referred to in the following description, the same or similar parts are represented by the same or similar reference numerals to avoid redundant description. It should be noted that the accompanying drawings are schematic, and the relationship between thickness and plane size, the thickness ratio of each device or each component, etc. are different from the actual ones. Therefore, the specific thickness and size should be determined in consideration of the following description. In addition, it goes without saying that the dimensional relationship and ratio between the drawings are partially different.

[0012] Here, "first conductivity type" refers to one of p-type and n-type, and "second conductivity type" refers to one of p-type and n-type that is different from "first conductivity type". In addition, "+" or "-" added to "n" or "p" refers to a semiconductor region having a higher or lower impurity concentration than a semiconductor region to which "+" or "-" is not added. Note that even if semiconductor regions to which the same "n" and "n" are added do not necessarily mean that the impurity concentrations of these semiconductor regions are exactly the same.

[0013] In addition, the definitions of directions such as up and down in the following description are given only for convenience of explanation and are not intended to limit the technical ideas of the present disclosure. For example, it goes without saying that when an object is observed by rotating the object by 90°, up and down will be converted to left and right, and when the object is observed by rotating the object by 180°, up and down will be reversed. Note that the effects described herein are merely examples and not limiting, and other effects may exist.

[0014] <First Embodiment> (Overall structure of light detection device) Figure 1 : is a block diagram showing a schematic configuration example of a light detection device according to the first embodiment of the present disclosure. The light detection device 1 is a semiconductor device that converts the amount of charge corresponding to the intensity of light formed as an image on each pixel into an electric signal using a photoelectric conversion element such as a photodiode as a component of each pixel, and outputs the electric signal as a pixel signal, and is configured as a CMOS image sensor, for example. The light detection device 1 can be integrally configured as a system on chip (SoC: System on Chip) such as a CMOS LSI, but, for example, some components described below can be configured as separate LSIs.

[0015] As shown in the figure, the light detection device 1 includes components such as a pixel array unit 11 , a vertical driving unit 12 , a column processing unit 13 , a horizontal driving unit 14 , a system control unit 15 , a signal processing unit 16 , and a data storage unit 17 .

[0016] The pixel array unit 11 includes a group of photoelectric conversion elements such as photodiodes arranged in the horizontal direction (row direction) and the vertical direction (column direction), which are components of the pixel 110. The pixel array unit 11 converts the amount of charge corresponding to the intensity of incident light formed as an image on each pixel 110 into an electric signal, and outputs the electric signal as a pixel signal. The pixel array unit 11 may, for example, include effective pixels arranged in an area capable of receiving actual light and dummy pixels arranged outside the area and shielded by metal or the like. Note that an optical element (not shown) such as a micro-on-chip lens or a color filter for collecting incident light is formed on each pixel 110 of the pixel array unit 11. The area occupied by the arranged pixels 110 serves as a so-called "image height" corresponding to the target space to be imaged.

[0017] The vertical driving unit 12 includes a shift register and an address decoder, etc. The vertical driving unit 12 provides a driving signal, etc. to each pixel 110 through a plurality of pixel driving lines 18, thereby driving each pixel 110 of the pixel array unit 11, for example, simultaneously or row by row.

[0018] The column processing unit 13 reads a pixel signal from each pixel through a vertical signal line (VSL) 19 of each pixel column (column) of the pixel array unit 11 , and performs noise removal processing, correlated double sampling (CDS) processing, analog-to-digital (A / D) conversion processing, etc. The pixel signal processed by the column processing unit 13 is output to the signal processing unit 16 .

[0019] The horizontal driving unit 14 includes a shift register and an address decoder, etc. The horizontal driving unit 14 sequentially selects the pixels 110 corresponding to the pixel columns of the column processing unit 13. Through the selective scanning of the horizontal driving unit 14, the pixel signal of each pixel 110 that has been signal-processed in the column processing unit 13 is sequentially output to the signal processing unit 16.

[0020] The system control unit 15 includes a timing generator for generating various timing signals, etc. The system control unit 15 drives and controls the vertical driving unit 12 , the column processing unit 13 , and the horizontal driving unit 14 based on the timing signals generated by the timing generator (not shown), for example.

[0021] The signal processing unit 16 performs signal processing such as arithmetic processing on the pixel signal supplied from the column processing unit 13, while temporarily storing the data in the data storage unit 17 as needed, and outputs an image signal based on each pixel signal. In addition, the signal processing unit 16 performs signal processing according to the flag output from the column processing unit 13.

[0022] Note that the light detection device 1 to which the present technology is applied is not limited to the above-described configuration. For example, the light detection device 1 may be configured such that the data storage unit 17 is arranged downstream of the column processing unit 13, and the pixel signal output from the column processing unit 13 is provided to the signal processing unit 16 through the data storage unit 17. Alternatively, the light detection device 1 may be configured such that the column processing unit 13, the data storage unit 17, and the signal processing unit 16 connected in cascade process respective pixel signals in parallel.

[0023] (Pixel circuit structure) Figure 2 is a circuit configuration diagram of the pixel 110 . like Figure 2 As shown, each of the plurality of pixels 110 includes a photoelectric conversion region 21 and a pixel circuit (readout circuit) 22. The photoelectric conversion region 21 includes a photoelectric converter 23, a transfer transistor TR, and a charge holding region (floating diffusion) FD. The pixel circuit 22 is electrically connected to the charge holding region FD of the photoelectric conversion region 21. The first embodiment has, but is not limited to, a circuit configuration that allows each pixel 110 to use one pixel circuit 22 individually as an example, and a circuit configuration that allows a plurality of pixels 110 to share one pixel circuit 22 may be adopted, for example. For example, a circuit configuration that allows four pixels 110 (one pixel block) arranged in a 2×2 layout to share one pixel circuit 22 may be adopted, where two pixels 110 are arranged in the horizontal direction and two pixels 110 are arranged in the vertical direction.

[0024] The photoelectric converter 23 includes, for example, a pn junction photodiode (PD) and generates signal charges according to the amount of light received. The cathode of the photoelectric converter 23 is electrically connected to the source region of the transfer transistor TR, and the anode is electrically connected to a reference potential line (eg, ground).

[0025] The transfer transistor TR transfers the signal charge generated by the photoelectric conversion in the photoelectric converter 23 to the charge holding region FD. The source region of the transfer transistor TR is electrically connected to the cathode of the photoelectric converter 23, and the drain region is electrically connected to the charge holding region FD. In addition, the gate electrode of the transfer transistor TR is electrically connected to the pixel drive line 18 (see Figure 1 ) in the pass transistor driver line.

[0026] The charge holding region FD temporarily holds (accumulates) the signal charge transferred from the photoelectric converter 23 via the transfer transistor TR.

[0027] The pixel circuit 22 reads the signal charge retained in the charge retention area FD, converts the read signal charge into a pixel signal, and outputs the pixel signal. In other words, the pixel circuit 22 converts the signal charge generated by the photoelectric conversion in the photoelectric conversion element PD into a pixel signal based on the signal charge, and outputs the pixel signal. For example, the pixel circuit 22 includes, but is not limited to, an amplifier transistor AMP, a selection transistor SEL, a reset transistor RST, and a switching transistor FDG as pixel transistors. These pixel transistors (AMP, SEL, RST, FDG) and the above-mentioned transfer transistor TR all include, for example, MOSFETs as field effect transistors. Alternatively, these transistors may be MISFETs.

[0028] Among the pixel transistors included in the pixel circuit 22 , the selection transistor SEL, the reset transistor RST, and the switching transistor FDG each function as a switching element, and the amplifier transistor AMP functions as an amplification element. In addition, the selection transistor SEL and the switching transistor FDG may be omitted as necessary.

[0029] The source region of the amplifier transistor AMP is electrically connected to the drain region of the selection transistor SEL, and the drain region is electrically connected to the power supply line Vdd and the drain region of the reset transistor RST. In addition, the gate electrode of the amplifier transistor AMP is electrically connected to the charge holding region FD and the source region of the switching transistor FDG.

[0030] The source region of the selection transistor SEL is electrically connected to the vertical signal line 19 (VSL), and the drain region is electrically connected to the source region of the amplifier transistor AMP. In addition, the gate electrode of the selection transistor SEL is electrically connected to the pixel drive line 18 (see Figure 1 ) in the select transistor drive line.

[0031] The source region of the reset transistor RST is electrically connected to the drain region of the switching transistor FDG, and the drain region is electrically connected to the power supply line Vdd and the drain region of the amplifier transistor AMP. In addition, the gate electrode of the reset transistor RST is electrically connected to the pixel drive line 18 (see Figure 1 ) in the reset transistor drive line.

[0032] The source region of the switching transistor FDG is electrically connected to the charge holding region FD and the gate electrode of the amplifier transistor AMP, and the drain region is electrically connected to the power supply line Vdd and the drain region of the amplifier transistor AMP. In addition, the gate electrode of the switching transistor FDG is electrically connected to the pixel drive line 18 (see Figure 1 ) in the switching transistor drive line.

[0033] Note that when the selection transistor SEL is omitted, the source region of the amplifier transistor AMP is electrically connected to the vertical signal line (VSL) 19. Furthermore, when the switching transistor FDG is omitted, the source region of the reset transistor RST is electrically connected to the gate electrode of the amplifier transistor AMP and the charge holding region FD.

[0034] The transfer transistor TR transfers the signal charge generated by the photoelectric converter 23 to the charge holding region FD when turned on.

[0035] The reset transistor RST resets the potential (signal charge) of the charge holding region FD to the potential of the power supply line Vdd when turned on. The selection transistor SEL controls the timing of outputting the pixel signal from the pixel circuit 22 .

[0036] The amplifier transistor AMP generates a voltage signal corresponding to the level of the signal charge held in the charge holding region FD as a pixel signal. The amplifier transistor AMP functions as a source follower amplifier circuit and outputs a pixel signal representing a voltage corresponding to the level of the signal charge generated by the photoelectric converter 23. When the selection transistor SEL is turned on, the amplifier transistor AMP amplifies the potential of the charge holding region FD and outputs a voltage corresponding to the potential to the column signal processing circuit 5 through the vertical signal line (VSL) 19.

[0037] The switching transistor FDG controls charge retention of the charge retention region FD, and adjusts a voltage gain in accordance with the potential amplified by the amplification transistor AMP.

[0038] (Semiconductor structure of light detection device) Figure 3 1 is a partial longitudinal cross-sectional view showing an example of a semiconductor structure of the light detecting device 1 according to the first embodiment of the present disclosure. As shown in the figure, for example, the semiconductor structure 30 generally includes a wiring layer 31, a semiconductor layer 32, a planarization film 33, a color filter 34, and an on-chip lens 35. For example, such a semiconductor structure 30 can be formed by integrally bonding a first silicon substrate including the wiring layer 31 and various logic circuits (not shown) to a second silicon substrate including the semiconductor layer 32.

[0039] The on-chip lens 35 is an optical lens for efficiently collecting light incident on the light detecting device 1 from the outside to form an image on the corresponding plurality of pixels 110 of the semiconductor layer 32. In this example, one on-chip lens 35 is arranged for every four pixels 110 arranged in a 2×2 manner in the horizontal direction (column direction) and the vertical direction (row direction) in a plan view. Note that the on-chip lens 35 includes, for example, silicon oxide, silicon nitride, silicon oxynitride, organic SOG, polyimide resin, fluorine resin, or the like.

[0040] The color filter 34 is an optical filter that selectively transmits light of a predetermined wavelength among the light collected by the on-chip lens 35. In this example, four color filters 24 that selectively transmit red light, green light, blue light, and near-infrared light wavelengths are used, but the present disclosure is not limited to this configuration. A color filter 34 corresponding to an arbitrary color (wavelength) is arranged in each pixel 110.

[0041] The semiconductor layer 32 is a functional layer formed with a pixel circuit group including a photoelectric converter 23 such as a photodiode as a component of each pixel 110. Each photoelectric converter 23 of the semiconductor layer 32 generates a charge amount corresponding to the intensity of light incident through the on-chip lens 35 and the color filter 34, converts the charge amount into an electric signal, and outputs the electric signal as a pixel signal.

[0042] The photoelectric conversion element 23 includes an n-type region 231 and a p-type region 232. The semiconductor layer 32 is formed on a silicon substrate using a semiconductor manufacturing process. The photoelectric conversion element 23 and various electronic components are electrically connected to predetermined metal wiring in the wiring layer 31.

[0043] In addition, in the semiconductor layer 32, a pixel isolation portion 37 for isolating each pixel 110 may be formed. The pixel isolation portion 37 has a groove structure formed, for example, by an etching process. The pixel isolation portion 37 prevents light incident on the pixel 110 from entering the adjacent pixel 110. An insulating film 371 is embedded in the pixel isolation portion 37. In addition, a fixed charge film 372 for generating negative fixed charges is formed on the inner wall surface of the pixel isolation portion 37. As the fixed charge film 372, it is preferable to use a material that can enhance pinning by generating fixed charges when deposited on a substrate such as silicon, and a high refractive index material film or a high dielectric film having negative charges may be used. This configuration suppresses the generation of dark current.

[0044] The wiring layer 31 is a layer formed with a metal wiring pattern 311, which is used to transmit power and various driving signals to each pixel 110 in the semiconductor layer 32 and transmit a pixel signal read from each pixel 110. The wiring layer 31 may generally include a plurality of metal wiring patterns 311, which are stacked together with an interlayer insulating film therebetween. In addition, the stacked metal wiring patterns 311 are electrically connected by, for example, a through-hole interconnection portion as required.

[0045] A light shielding wall 38 is provided on the back side (light incident side) of the semiconductor layer 32. The light shielding wall 38 is formed in a grid pattern so as to form an opening for the photoelectric converter 23. That is, the light shielding wall 38 is formed at a position corresponding to the pixel isolation portion 37. The material of the light shielding wall 38 may be any light shielding material, and tungsten (W), aluminum (Al), or copper (Cu) may be used, for example.

[0046] (Pixel layout construction example) Figure 4 : is a plan view showing a configuration example of a pixel layout according to the first embodiment of the present disclosure and an arrangement example of the on-chip lens 35 with respect to the pixel layout. Figure 5 It is along Figure 4 A partial longitudinal cross-sectional view of an example of a semiconductor structure is shown in a schematic cross-section taken along line B1 - B1 ′ of the illustrated pixel group.

[0047] like Figure 4 As shown, the light detection device 1 includes, for example, a pixel group 110G covered with a color filter 34 that transmits green light. The pixel group 110G includes four pixels 110 arranged in a 2×2 manner in the horizontal direction and the vertical direction in a plan view. Note that, for example, the pixel group 110G may be covered with a color filter 34 that transmits red light, may be covered with a color filter 34 that transmits blue light, or may be covered with a color filter 34 that transmits light of a different color.

[0048] like Figure 4 As shown, one on-chip lens 35 is arranged for every four pixels 110 arranged in a 2×2 manner in the horizontal direction and the vertical direction in a plan view. In the configuration example of the pixel layout, the pixels 110 are isolated from each other by a pixel isolation section 37 having a trench isolation structure. For example, the pixel isolation section 37 includes a through region 37a having a width a1 in a plan view and a non-through region 37b having a width b1 smaller than the width a1.

[0049] As a comparative example of the first embodiment of the present disclosure, the through region 37a and the non-through region 37b are formed separately, resulting in an increase in the number of processes. In addition, the misalignment at the joint between the through region 37a and the non-through region 37b causes double processing or discontinuity of the pixel isolation portion 37.

[0050] Therefore, in the first embodiment of the present disclosure, by forming the non-penetrating region 37b of the pixel isolation portion 37 narrower than the through region 37a, the non-penetrating region 37b can be formed shallowly in a self-aligned manner, thereby allowing the through region 37a and the non-penetrating region 37b to be processed simultaneously and reducing the number of processes. In addition, the joint between the through region 37a and the non-penetrating region 37b is continuous, thereby eliminating the need for double processing and preventing the pixel isolation portion 37 from becoming discontinuous. In addition, at the light-collecting position of the light collected by the on-chip lens 35, light scattering caused by the non-penetrating region 37b is small.

[0051] In addition, in the first embodiment of the present disclosure, Figure 5As shown, the charge holding region FD can be arranged in a region located on the side opposite to the light incident surface of the non-penetrating region 37b, thereby effectively utilizing the silicon region located on the side opposite to the light incident surface of the semiconductor layer 32.

[0052] <Effects Produced by the First Embodiment> As described above, in the first embodiment, by forming the non-penetrating region 37b of the pixel isolation portion 37 narrower than the through region 37a, the non-penetrating region 37b can be formed shallowly in a self-aligned manner, thereby allowing the through region 37a and the non-penetrating region 37b to be processed simultaneously and reducing the number of processes. In addition, the joint between the through region 37a and the non-penetrating region 37b is continuous, thereby eliminating the need for double processing and preventing the pixel isolation portion 37 from becoming discontinuous. In addition, at the light-collecting position of the light collected by the on-chip lens 35, light scattering caused by the non-penetrating region 37b is small.

[0053] <Second Embodiment> (Pixel layout construction example) Figure 6 : is a plan view showing a configuration example of a pixel layout according to the second embodiment of the present disclosure and an arrangement example of the on-chip lens 35 with respect to the pixel layout. Figure 7 It is along Figure 6 A partial longitudinal cross-sectional view of an example of a semiconductor structure is shown in the schematic cross-section taken along line B2-B2' of the pixel group shown. Figure 6 and 7 In, with Figure 4 and 5 The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0054] In the light detection device 1A, one on-chip lens 35 is arranged for every four pixels 110 arranged in a 2×2 manner in the horizontal direction and the vertical direction in a plan view. In the configuration example of the pixel layout, the pixels 110 are isolated from each other by a pixel isolation section 37A having a trench isolation structure. For example, the pixel isolation section 37A has a through region 37a1 and a non-through region 37b narrower than the through region 37a1 in a plan view.

[0055] like Figure 8As shown, an insulating film 373 and a light shielding film 374 are embedded in the through region 37a1. An insulating film 371 is embedded in the non-through region 37b. For example, the light shielding film 374 uses aluminum (Al) or tungsten (W). In addition, the insulating films 371 and 373 use silicon oxide (SiO), titanium oxide (TiO), or hafnium oxide (HfO). The refractive index of silicon oxide (SiO) is 1.45, the refractive index of titanium oxide (TiO) is 2.5, and the refractive index of hafnium oxide (HfO) is 2.1. The refractive index of silicon (Si) is 3.5. That is, the closer the refractive index is to that of silicon (Si), the less vignetting (scattering) occurs.

[0056] <Effects Produced by the Second Embodiment> As described above, according to the second embodiment, by filling the through-region 37a1 with a light-shielding film 374 including (for example) a metal and filling the non-through-region 37b with an insulating film 371 including (for example) silicon oxide other than a metal, light scattering at the focusing position of the light collected by the on-chip lens 35 can be reduced, and light-shielding and reflection properties can be given to the through-region 37a1.

[0057] <Third Embodiment> Fig. 9 3 is a plan view showing a configuration example of a pixel layout according to a third embodiment of the present disclosure and an arrangement example of an on-chip lens 35 relative to the pixel layout. Fig. 9 In, with Figure 4 The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0058] In the configuration example of the pixel layout, the pixels 110 are isolated from each other by the pixel isolation section 37B having a trench isolation structure. Fig. 9 In order to effectively utilize light at a high image height of the light detection device 1B, the on-chip lens 35 is arranged according to the so-called pupil correction. Fig. 9 As shown in (c) of FIG. 1 , the on-chip lens 35 corresponding to the pixel 110 located at the center (zero image height) is arranged so that its optical axis substantially coincides with the center of the pixel 110. The boundaries 37c1, 37c2, 37c3, and 37c4 between the through-region 37a and the non-through-region 37b are equidistant from the charge holding region FD.

[0059] The higher the image height, the greater the offset of the on-chip lens 35 relative to the center of the pixel 110. That is, Fig. 9 As shown in (a), the on-chip lens 35 is located relative to the center (along Fig. 9 In the case of an upward shift (in the direction indicated by the arrow Y1 in FIG. 1 ), the boundaries 37c2 and 37c4 are shifted from Fig. 9 The state of (c) Fig. 9The axis is shifted upward in the direction indicated by the arrow Y1.

[0060] like Fig. 9 As shown in (b), the on-chip lens 35 is located relative to the center (along Fig. 9 In the case where the boundary 37c1 and 37c3 are shifted to the upper right direction (in the direction indicated by the arrow X1 and the direction indicated by the arrow Y1 in FIG. 1 ), the boundary 37c1 and 37c3 are shifted from Fig. 9 The state of (c) Fig. 9 The direction indicated by the arrow X1 in FIG. 1 is shifted to the right, and the boundaries 37c2 and 37c4 are shifted from Fig. 9 The state of (c) Fig. 9 The axis is shifted upward in the direction indicated by the arrow Y1. That is, Fig. 9 As shown in (d), when the on-chip lens 35 is relative to the center (along Fig. 9 In the case where the boundary 37c1 and 37c3 shift to the right (in the direction indicated by the arrow X1 in FIG. Fig. 9 The state of (c) Fig. 9 The device shifts to the right in the direction indicated by the arrow X1.

[0061] <Effects Produced by the Third Embodiment> As described above, according to the third embodiment, light scattering can be reduced by shifting the on-chip lens 35 relative to the center of the pixel group 110G and shifting the boundaries 37c1, 37c2, 37c3, and 37c4 between the through area 37a and the non-through area 37b according to the pupil correction position.

[0062] <Fourth Embodiment> Fig.10 : is a plan view showing a configuration example of a pixel layout according to a fourth embodiment of the present disclosure and an arrangement example of an on-chip lens 35 relative to the pixel layout. Fig.10 In, with Figure 6 The same components as those in the above parts are denoted by the same reference numerals to omit their detailed description. In the light detection device 1C, the pixels 110 are isolated from each other by a pixel isolation section 37C having a trench isolation structure. For example, the pixel isolation section 37A has a penetration region 37a1 and a non-penetration region 37b narrower than the penetration region 37a1 in a plan view. An insulating film 373 and a light shielding film 374 are embedded in the penetration region 37a1.

[0063] That is, Fig.10 As shown in (c), the on-chip lens 35 corresponding to the pixel 110 located at the center (zero image height) is arranged so that its optical axis substantially coincides with the center of the pixel 110. The boundaries 37c1, 37c2, 37c3, and 37c4 between the through-region 37a1 and the non-through-region 37b are equidistant from the charge holding region FD. The higher the image height, the greater the offset of the on-chip lens 35 relative to the center of the pixel 110. That is, Fig.10 As shown in (a), the on-chip lens 35 is located relative to the center (along Fig.10 In the case of an upward shift (in the direction indicated by the arrow Y1 in FIG. 1 ), the boundaries 37c2 and 37c4 are shifted from Fig.10 The state of (c) Fig.10 The axis is shifted upward in the direction indicated by the arrow Y1.

[0064] like Fig.10 As shown in (b), the on-chip lens 35 is located relative to the center (along Fig.10 In the case where the boundary 37c1 and 37c3 are shifted to the upper right direction (in the direction indicated by the arrow X1 and the direction indicated by the arrow Y1 in FIG. 1 ), the boundary 37c1 and 37c3 are shifted from Fig.10 The state of (c) Fig.10 The direction indicated by the arrow X1 in FIG. 1 is shifted to the right, and the boundaries 37c2 and 37c4 are shifted from Fig.10 The state of (c) Fig.10 The axis is shifted upward in the direction indicated by the arrow Y1. That is, Fig.10 As shown in (d), the on-chip lens 35 is located relative to the center (along Fig.10 In the case where the boundary 37c1 and 37c3 shift to the right (in the direction indicated by the arrow X1 in FIG. Fig.10 The state of (c) Fig.10 The device shifts to the right in the direction indicated by the arrow X1.

[0065] <Effects Produced by the Fourth Embodiment> As described above, according to the fourth embodiment, the light component reflected by the insulating film 373 and the light shielding film 374 can be reduced by means of the shift of the on-chip lens 35 in the photodetection device 1C caused by pupil correction, and contributes to improving the optical characteristics (sensitivity).

[0066] <Fifth Embodiment> In the fifth embodiment of the present disclosure, a basic procedure of a method for manufacturing the light detecting device 1 according to the first embodiment will be described. Fig.11A (1) to (1) of 11C are plan views of the light detecting device 1 according to the fifth embodiment as viewed from the back side. Fig.11A (2) to (2) of 11C are partial cross-sectional views showing an example of the semiconductor structure of the light detecting device 1 taken along line C1-C1'. Line C1-C1' is an imaginary line passing through the through region 37a and the non-through region 37b of the pixel isolation portion 37 in a plan view.

[0067] First, a silicon substrate 41 is prepared, a resist film 42 is formed on the back side of the silicon substrate 41, and patterning is performed so that a resist space line width 421 becomes wider when a through region 37a is formed on the resist film 42 by a photolithography process, and a resist space line width 422 becomes narrower when a non-through region 37b is formed ( Fig.11A ).

[0068] Next, a hole is formed on the resist spacer line widths 421 and 422 by dry etching to form an opening 43 ( Fig. 11B ). In the opening 43, the resist space line width 421 is dug deeper, while the resist space line width 422 is dug shallower. Next, the resist film 42 is removed, and the insulating film 371 is embedded in the opening 43 to form the through region 37a and the non-through region 37b of the pixel isolation portion 37 ( Fig. 11C ). Subsequently, the on-chip lens 35 and the color filter 34 are formed on the back surface side of the silicon substrate 41.

[0069] <Effects Produced by the Fifth Embodiment> As described above, according to the fifth embodiment, by forming the non-penetration region 37b of the pixel isolation portion 37 which is narrower than the through region 37a, the non-penetration region 37b can be formed shallower in a self-aligned manner, thereby allowing the through region 37a and the non-penetration region 37b to be processed simultaneously and reducing the number of processes.

[0070] <Sixth Embodiment> In the sixth embodiment of the present disclosure, a basic procedure of a method for manufacturing the light detecting device 1A according to the second embodiment will be described. Fig. 12A (1) to (1) of FIG12C are plan views of the light detecting device 1A according to the sixth embodiment as viewed from the back side. Fig. 12A (2) to (2) of 12C are partial cross-sectional views showing an example of the semiconductor structure of the light detecting device 1A taken along line D1-D1'. Line D1-D1' is an imaginary line passing through the through region 37a1 and the non-through region 37b of the pixel isolation portion 37A in a plan view. Note that Figures 12A to 12C In, with Figures 11A to 11C The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0071] First, a silicon substrate 41 is prepared, a resist film 42 is formed on the back side of the silicon substrate 41, patterning is performed so that the resist spacing line width becomes wider when the through region 37a1 is formed on the resist film 42 by a photolithography process and the resist spacing line width becomes narrower when the non-through region 37b is formed, and a hole is opened in the resist spacing line width by dry etching to form an opening 43 ( Fig. 12A ).

[0072] Next, the resist film 42 is removed, and the insulating film 371 is embedded in the opening 43 to form the non-penetrating region 37 b ( Fig. 12B ). In addition, the through region 37a1 is embedded with the insulating film 373 on the side wall and has a cavity at the center. Next, the light shielding film 374 is embedded in the center of the groove of the opening 43 to form the through region 37a1 ( Fig. 12C ). Subsequently, the on-chip lens 35 and the color filter 34 are formed on the back surface side of the silicon substrate 41.

[0073] <Effects Produced by the Sixth Embodiment> As described above, according to the sixth embodiment, it is possible to simultaneously process the through region 37a1 and the non-through region 37b in a manner similar to the fifth embodiment and reduce the number of processes.

[0074] Seventh Embodiment Fig.13 is a plan view showing a configuration example of a pixel layout of a light detection device 1D according to a seventh embodiment of the present disclosure. Fig.13 In, with Figure 4 The same components as those described above are denoted by the same reference numerals to omit their detailed description. Fig.13 (2) is a partial cross-sectional view showing an example of the semiconductor structure of the light detecting device 1D taken along the line E1 - E1 ′.

[0075] like Fig.13 As shown in (1), the light detection device 1D includes four pixel groups 110G1, 110G2, 110G3, and 110G4. The pixel groups 110G1, 110G2, 110G3, and 110G4 each include four pixels 110 arranged in a 2×2 manner in the horizontal and vertical directions in a plan view.

[0076] The pixel groups 110G1, 110G2, 110G3, and 110G4 are isolated from each other by a pixel isolation section 37D having a trench isolation structure. For example, the pixel isolation section 37D includes a through region 37d and a non-through region 37e narrower than the through region 37d in a plan view.

[0077] <Comparative Example to Seventh Embodiment> Fig.14 is a plan view showing a configuration example of a pixel layout of a light detecting device B1 according to a comparative example of the seventh embodiment. Fig.14 In, with Fig.13 The same components as those described above are denoted by the same reference numerals to omit their detailed description. Fig.14 (2) is a partial cross-sectional view showing an example of the semiconductor structure of the light detecting device B1 taken along line E2 - E2 ′.

[0078] In the light detection device B1, each pixel group 110G1, 110G2, 110G3, and 110G4 includes one well contact 39 for supplying a ground (GND) potential. Meanwhile, in the light detection device B1, the wiring structure of the contact wiring leading to the pixel transistor becomes complicated.

[0079] <Means for implementing the seventh embodiment> Therefore, in the seventh embodiment of the present disclosure, the well contacts 39 of the respective pixel groups 110G1 , 110G2 , 110G3 , and 110G4 that are opposite in the diagonal direction are collectively arranged in one well contact 51 in the non-penetrating region 37 e .

[0080] <Effects Produced by the Seventh Embodiment> As described above, according to the seventh embodiment, by arranging the well contacts 39 of the diagonally opposite pixel groups 110G1, 110G2, 110G3 and 110G4 respectively in a well contact 51 in the non-penetrating area 37e of the pixel isolation portion 37D, the number of contact wirings leading to the pixel transistor can be reduced and the wiring spacing can be increased.

[0081] <Eighth Embodiment> Fig.15 1 is a plan view showing a configuration example of a pixel layout of a light detection device 1E according to an eighth embodiment of the present disclosure. Fig.15 In, with Fig.13 The same components as those described above are denoted by the same reference numerals to omit their detailed description. Fig.15 (2) is a partial cross-sectional view showing an example of the semiconductor structure of the light detecting device 1E taken along line F1 - F1 ′.

[0082] like Fig.15 As shown in (1), the light detection device 1E includes four pixel groups 110G1, 110G2, 110G3, and 110G4. The pixel groups 110G1, 110G2, 110G3, and 110G4 each include four pixels 110 arranged in a 2×2 manner in the horizontal and vertical directions in a plan view.

[0083] The pixel groups 110G1, 110G2, 110G3, and 110G4 are isolated from each other by a pixel isolation section 37E having a trench isolation structure. For example, the pixel isolation section 37E includes a non-penetrating region 37f, in which the pixel isolation section 37E is located along the row direction ( Fig.15 The through region 37dx extending in the direction indicated by the arrows X1-X2 in FIG. 1 and extending in the column direction ( Fig.15 The through region 37dy extending in the direction indicated by the arrow Y1-Y2 in FIG. 37 intersects with the non-through region 37f. In a plan view, the non-through region 37f is formed to be narrower than the through region 37d.

[0084] <Effects Produced by the Eighth Embodiment> As described above, according to the eighth embodiment, the light collection efficiency of each pixel 110 can be adjusted by symmetrically arranging the non-penetrating regions 37 f in the pixel isolation section 37E. Furthermore, in the eighth embodiment, in the row direction ( Fig.15 The through region 37dx extending in the direction indicated by the arrows X1-X2 in FIG. 1 and extending in the column direction ( Fig.15 The area where the through area 37ay extending in the direction indicated by the arrow Y1-Y2 in the row direction intersects and the area where the through area 37ay extends in the row direction ( Fig.15 The through region 37ax extending in the direction indicated by the arrows X1-X2 in FIG. 1 and extending in the column direction ( Fig.15 A non-penetrating region may be formed at the region where the through region 37dy extending in the direction indicated by the arrow Y1-Y2 in FIG. 1 intersects. With this configuration, the light collection efficiency of each pixel 110 may be further adjusted.

[0085] Ninth Embodiment In a ninth embodiment of the present disclosure, a basic procedure of a method for manufacturing the light detecting device 1E according to the seventh embodiment will be described. Fig.16A (1) to (1) of FIG16C are plan views of the light detecting device 1E according to the seventh embodiment as viewed from the back side. Fig.16A (2) to (2) of 16C are partial cross-sectional views showing an example of the semiconductor structure of the light detecting device 1E taken along line G1-G1'. Line G1-G1' is an imaginary line passing through the through region 37d and the non-through region 37e of the pixel isolation portion 37D in a plan view.

[0086] First, a silicon substrate 61 is prepared, a resist film 62 is formed on the back side of the silicon substrate 61, and patterning is performed so that the resist spacing line width 621 becomes wider when the through region 37d is formed on the resist film 62 by a photolithography process and the resist spacing line width 622 becomes narrower when the non-through region 37e is formed ( Fig.16A).

[0087] Next, holes are formed in the resist spacer line widths 621 and 622 by dry etching to form openings 63 ( Fig. 16B ). In the opening 63, the resist space line width 621 is dug deeper, and the resist space line width 622 is dug shallower. Next, the resist film 62 is removed, and the insulating film 371 is embedded in the opening 63 to form the through region 37d and the non-through region 37e of the pixel isolation portion 37D ( Fig. 16C ). Subsequently, the on-chip lens 35 and the color filter 34 are formed on the back surface side of the silicon substrate 61.

[0088] <Effects Produced by Ninth Embodiment> As described above, according to the ninth embodiment, by forming a non-penetration region 37e of the pixel isolation portion 37D that is narrower than the through region 37d, the non-penetration region 37e can be formed shallower in a self-aligned manner, thereby allowing the through region 37d and the non-penetration region 37e to be processed simultaneously and reducing the number of processes.

[0089] <Tenth Embodiment> Fig.17 1 is a plan view showing a configuration example of a pixel layout according to a tenth embodiment of the present disclosure and an arrangement example of an on-chip lens 35 relative to the pixel layout. Fig.17 In, with Figure 4 The same components as those described above are denoted by the same reference numerals to omit their detailed description. Fig.18 is shown along Fig.17 A partial cross-sectional view of an example of a semiconductor structure of a light detection device 1F taken along line H1-H1' in FIG. Fig.18 In, with Figure 3 The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0090] In the light detection device 1F, the pixels 110 are isolated from each other by a pixel isolation section 37F having a trench isolation structure. The pixel isolation section 37F includes an opening 37h near the charge holding region FD.

[0091] exist Fig.17 In order to effectively utilize light at a high image height of the light detection device 1F, the on-chip lens 35 is arranged according to the so-called pupil correction. Fig.17 As shown in (c), the on-chip lens 35 corresponding to the pixel group 110G located at the center (zero image height) is arranged so that its optical axis substantially coincides with the center of the pixel group 110G. The through regions 37g1, 37g2, 37g3, and 37g4 extend at equal distances from the charge holding region FD.

[0092] The higher the image height, the greater the offset of the on-chip lens 35 relative to the center of the pixel group 110G. Fig.17 As shown in (a), the on-chip lens 35 is located relative to the center (along Fig.17 In the case of a downward shift (in the direction indicated by the arrow Y2 in FIG. 1 ), the through area 37g4 is shifted from Fig.17 The state of (c) Fig.17 The through area 37g2 extends downward from the Fig.17 The state of (c) Fig.17 The device shrinks downward in the direction indicated by the arrow Y2.

[0093] That is, Fig.17 (b) and Fig.18 As shown in (b), the on-chip lens 35 is located relative to the center (along Fig.17 In the case where the through area 37g4 is offset to the upper right end (in the direction indicated by the arrow X2 and the direction indicated by the arrow Y2), the through area 37g4 is Fig.17 The state of (c) Fig.17 The through area 37g2 extends downward from the Fig.17 The state of (c) Fig.17 In addition, the through area 37g3 is contracted downward from Fig.17 The state of (c) Fig.17 The through area 37g1 extends leftward from the direction indicated by the arrow X2 in FIG. Fig.17 The state of (c) Fig.17 The device shrinks to the left (in the direction indicated by the arrow X2 in the figure).

[0094] That is, Fig.17 As shown in (d) and (d) of 18, the on-chip lens 35 is located relative to the center (along Fig.17 In the case where the through area 37g3 is shifted to the left (in the direction indicated by the arrow X2 in FIG. Fig.17 The state of (c) Fig.17 The through area 37g1 extends leftward from the direction indicated by the arrow X2 in FIG. Fig.17 The state of (c) Fig.17 The device shrinks to the left (in the direction indicated by the arrow X2 in the figure).

[0095] <Effects Produced by the Tenth Embodiment> As described above, according to the tenth embodiment, as the image height increases, the position of the on-chip lens 35 is shifted according to the emission direction of the principal ray, and the formation position of the opening 37h of the pixel isolation portion 37F is also shifted, so that the principal ray obliquely incident at a high image height can be utilized, eliminating the need for a non-through groove at the light-collecting position in the on-chip lens 35, and contributing to improvement of optical characteristics. In addition, the number of processes can be reduced.

[0096] Furthermore, according to the tenth embodiment, the component of light reflected or scattered by the light shielding wall 38 and the embedding film can be reduced by means of the shift of the on-chip lens 35 in the light detecting device 1F (chip) caused by pupil correction, and contributes to improving optical characteristics.

[0097] <Eleventh Embodiment> Fig.19 1 is a cross-sectional view showing a configuration example of a pixel layout according to an eleventh embodiment of the present disclosure and an arrangement example of an on-chip lens 35 relative to the pixel layout. Fig.19 In, with Fig.18 The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0098] That is, Fig.19 As shown in (c), the on-chip lens 35 corresponding to the pixel group 110G located at the center (zero image height) is arranged so that its optical axis substantially coincides with the center of the pixel group 110G. The penetration regions 37g1 and 37g3 extend at equal distances from the charge holding region FD. like Fig.19 As shown in (a), when the on-chip lens 35 is relative to the center (along Fig.17 When the through area 37g4 is displaced downward (in the direction indicated by the arrow Y2 in FIG. Fig.19 The state of (c) Fig.17 The through area 37g2 extends downward from the Fig.19 The state of (c) Fig.17 The device shrinks downward in the direction indicated by the arrow Y2.

[0099] That is, Fig.19 As shown in (b), the on-chip lens 35 is located relative to the center (along Fig.17 In the case where the through area 37g3 is shifted to the upper right end (in the direction indicated by the arrow X2 and the direction indicated by the arrow Y2), the through area 37g3 is shifted from Fig.19 The state of (c) Fig.19 The through area 37g1 extends leftward from the direction indicated by the arrow X2 in FIG. Fig.19 The state of (c) Fig.19In addition, the formation position of the charge holding region FD also shrinks from Fig.19 The state of (c) Fig.19 The axis is shifted to the left in the direction indicated by the arrow X2 in the figure.

[0100] like Fig.19 As shown in (d), the on-chip lens 35 is located relative to the center (along Fig.19 In the case where the through area 37g3 is shifted to the left (in the direction indicated by the arrow X2 in FIG. Fig.19 The state of (c) Fig.19 The through area 37g1 extends leftward from the direction indicated by the arrow X2 in FIG. Fig.19 The state of (c) Fig.19 In addition, the formation position of the charge holding region FD also shrinks from Fig.19 The state of (c) Fig.19 The axis is shifted to the left in the direction indicated by the arrow X2 in the figure.

[0101] <Effects Produced by the Eleventh Embodiment> As described above, according to the eleventh embodiment, by shifting the formation position of the charge holding region FD according to the pupil correction position, the influence of the strong electric field from the pixel isolation portion 37F can be reduced.

[0102] <Twelfth Embodiment> In the twelfth embodiment of the present disclosure, a basic procedure of a method for manufacturing the light detecting device 1F according to the tenth embodiment will be described. Figures 20A to 20D 1F is a partial cross-sectional view showing an example of the semiconductor structure of the light detecting device 1F according to the twelfth embodiment. Figures 20A to 20D In, with Figure 3 and 18 The same components as those described above are denoted by the same reference numerals to omit their detailed description.

[0103] The semiconductor layer 32 having the wiring layer 31 bonded to the front surface is prepared, and the semiconductor layer 32 is penetrated from the back side to the STI portion 71 ( Fig. 20A ). In addition, as a modification, processing and flattening starting from the surface process may also be performed. Next, an insulating film 73 such as silicon oxide (SiO) is embedded in the through hole 72 to form the pixel separation section 37F, and a fixed charge film 372 ( Fig. 20B ).

[0104] Next, a light shielding wall 38 is formed on the back side of the pixel isolation portion 37F, and a color filter 34 ( Fig. 20C As the light shielding wall 38, a highly reflective metal film or a low refractive index material film can be used. Subsequently, an on-chip lens 35 ( Fig.20D ).

[0105] <Other embodiments> The present technology is described above based on the first to twelfth embodiments, but it should not be understood that the description and drawings constituting a part of the present disclosure limit the present technology. When the spirit of the technical content disclosed in the first to twelfth embodiments described above is understood, it is obvious to those skilled in the art that various alternative embodiments, examples and operating techniques may be included in the present technology. In addition, the configurations disclosed in the first to twelfth embodiments can be appropriately combined within the scope of no contradiction. For example, the configurations disclosed in multiple different embodiments can be combined, or the configurations disclosed in multiple different variations of the same embodiment can be combined.

[0106] 〈Application examples in electronic devices〉 The above-described light detection device can be applied to various electronic devices, such as imaging devices such as digital still cameras or digital video cameras, mobile phones with imaging functions, or other types of devices with imaging functions. Fig.21 : is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

[0107] Fig.21 The imaging device 2201 shown includes an optical system 2202, a shutter device 2203, a solid-state imaging element 2204 as a light detection device, a control circuit 2205, a signal processing circuit 2206, a monitor 2207 and two memories 2208, and can capture still images and moving images.

[0108] The optical system 2202 includes one or more lenses, and guides light (incident light) from a subject to the solid-state imaging element 2204 to form an image on a light receiving surface of the solid-state imaging element 2204 . The shutter device 2203 is arranged between the optical system 2202 and the solid-state imaging element 2204 , and controls a light irradiation period and a light shielding period of the solid-state imaging element 2204 under the control of the control circuit 2205 .

[0109] The solid-state imaging element 2204 includes a package including the above-mentioned solid-state imaging element. The solid-state imaging element 2204 accumulates signal charges for a certain period of time according to the light forming an image on the light receiving surface through the optical system 2202 and the shutter device 2203. The signal charges accumulated in the solid-state imaging element 2204 are transferred according to the drive signal (timing signal) provided from the control circuit 2205.

[0110] The control circuit 2205 outputs a drive signal for controlling the transfer operation of the solid-state imaging element 2204 and the shutter operation of the shutter device 2203 to drive the solid-state imaging element 2204 and the shutter device 2203 .

[0111] The signal processing circuit 2206 performs various signal processing on the signal charge output from the solid-state imaging element 2204. An image (image data) obtained by the signal processing performed by the signal processing circuit 2206 is supplied to the monitor 2207 for display or supplied to the memory 2208 for storage (recording). In the imaging device 2201 configured as described above, the light detection device 1 may also be applied instead of the above-described solid-state imaging element 2204 .

[0112] 〈Application examples on mobile objects〉 The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented in the form of a device installed on any type of mobile body, such as a car, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobile device, an airplane, a drone, a ship, or a robot.

[0113] Fig. 22 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a moving body control system to which the technology according to the present disclosure can be applied. The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig. 22 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an inside information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output section 12052, and an in-vehicle network interface (I / F) 12053 are shown as a functional configuration of the integrated control unit 12050.

[0114] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 acts as a control device for the following devices: a drive force generating device (such as an internal combustion engine, a drive motor, etc.) for generating a vehicle drive force, a drive force transmitting mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a vehicle braking force, etc.

[0115] The body system control unit 12020 controls the operation of various devices provided on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for the following devices: a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a reverse light, a brake light, a turn signal, or a fog light. In this case, a radio wave or a signal of various switches transmitted from a portable device as a key substitute may be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls the door lock device, the power window device, or the lights of the vehicle.

[0116] The vehicle exterior information detection unit 12030 detects external information about the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the imaging unit 12031. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to image the exterior of the vehicle and receive the captured image. Based on the received image, the vehicle exterior information detection unit 12030 may perform processing for detecting objects such as people, vehicles, obstacles, signs, or characters on the road surface, or processing for detecting their distances.

[0117] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may also output an electrical signal as an image, or may output an electrical signal as measured distance information. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays.

[0118] The in-vehicle information detection unit 12040 detects interior information about the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting a driver state. The driver state detection unit 12041 includes, for example, a camera for imaging the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or the driver's concentration, or can determine whether the driver is dozing off.

[0119] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information about the inside and outside of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform coordinated control of functions intended to implement an advanced driver assistance system (ADAS), such as collision avoidance or shock absorption of the vehicle, following driving based on vehicle spacing, speed maintenance driving, vehicle collision warning, or vehicle lane departure warning.

[0120] In addition, based on the environmental information about the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can perform coordinated control for automatic driving by controlling the driving force generating device, steering mechanism or braking device, etc., which enables the vehicle to drive automatically without relying on the driver's operation, etc.

[0121] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the external information about the vehicle acquired by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 can perform coordinated control intended for preventing glare by, for example, controlling the headlights to change from high beam to low beam according to the position of a preceding vehicle or an oncoming vehicle detected by the vehicle exterior information detection unit 12030.

[0122] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle occupants or the outside of the vehicle of information. Fig. 22 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and a dashboard 12063 are shown as output devices. The display portion 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0123] Fig.23 12031 is a diagram showing an example of the installation position of the imaging unit 12031. exist Fig.23 In the figure, vehicle 12100 includes imaging units 12101, 12102, 12103, 12104 and 12105 as imaging unit 12031.

[0124] The imaging units 12101, 12102, 12103, 12104 and 12105 are, for example, disposed at locations such as the front nose, rearview mirror, rear bumper, rear door and upper portion of the windshield inside the vehicle 12100. The imaging unit 12101 disposed at the front nose and the imaging unit 12105 disposed at the upper portion of the windshield inside the vehicle mainly acquire images in front of the vehicle 12100. The imaging units 12102 and 12103 disposed at the rearview mirror mainly acquire images on both sides of the vehicle 12100. The imaging unit 12104 disposed at the rear bumper or rear door mainly acquires images behind the vehicle 12100. The imaging unit 12105 disposed at the upper portion of the windshield inside the vehicle is mainly used to detect vehicles ahead, pedestrians, obstacles, signal lights, traffic signs or lanes, etc.

[0125] Notice, Fig.23 An example of the imaging ranges of the imaging units 12101 to 12104 is shown. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front nose. The imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging units 12102 and 12103 provided at the rearview mirror. The imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 is obtained by superimposing the image data imaged by the imaging units 12101 to 12104.

[0126] At least one of the imaging units 12101 to 12104 may have a function for obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0127] For example, the microcomputer 12051 can determine the distance of each three-dimensional object within the imaging ranges 12111 to 12114 and the time change of the distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, and extract the nearest three-dimensional object as the preceding vehicle, which is particularly present on the travel path of the vehicle 12100 and travels at a predetermined speed (e.g., equal to or greater than 0 km / h) in substantially the same direction as the vehicle 12100. In addition, the microcomputer 12051 can pre-set the following distance to be maintained in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Therefore, it is possible to perform coordinated control for automatic driving so that the vehicle can travel automatically without relying on the operation of the driver, etc.

[0128] For example, the microcomputer 12051 can classify the three-dimensional object data of the three-dimensional object into two-wheeled vehicles, standard-sized vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be visually identified by the driver of the vehicle 12100 and obstacles that are difficult to be visually identified by the driver of the vehicle 12100. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle. When the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver through the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering through the driving system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collisions.

[0129] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the captured images of the imaging units 12101 to 12104. This pedestrian recognition is performed, for example, by the following process: a process of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras; and a process of determining whether it is a pedestrian by performing pattern matching processing on a series of feature points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the captured images of the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so as to display a square contour line for emphasis superimposed on the identified pedestrian. In addition, the sound / image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.

[0130] Note that the present disclosure may also have the following configurations. (1) A light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an intra-pixel group isolation portion, the intra-pixel group isolation portion being arranged between mutually adjacent pixels in the pixel group and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a light focusing position of light concentrated by the on-chip lens, the second recessed region being different from the first recessed region, and In the intra-pixel group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view. (2) The light detection device according to (1) above, wherein the semiconductor substrate includes an element arranged in a region located on a side of the second recessed region opposite to the light incident surface. (3) The light detection device according to (1) above, wherein: The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and The in-pixel group isolation section shifts a position of a boundary between the first recessed region and the second recessed region according to the pupil correction position. (4) The light detection device according to (1) above, wherein the first recessed region of the intra-pixel group isolation portion is filled with a first film, and the second recessed region of the intra-pixel group isolation portion is filled with a second film different from the first film. (5) The light detection device according to (4) above, wherein: The first film includes a metal film, and The second film includes a film other than a metal film. (6) The light detection device according to (1) above, wherein Many of them, Each of the plurality of pixel groups comprises a well contact portion for providing a ground potential, The pixel isolation portion includes a pixel group isolation portion, the pixel group isolation portion is arranged between pixel groups adjacent to each other and includes a third recessed region extending in a thickness direction of the semiconductor substrate, and The pixel group isolation portion includes a fourth recessed region in which well contacts of diagonally opposite pixel groups among the plurality of pixel groups are centrally arranged and the fourth recessed region is formed to be narrower than the third recessed region in a plan view. (7) The light detection device according to (6) above, wherein the pixel group isolation portion includes a fifth recessed region, the third recessed region extending in the row direction intersects with the third recessed region extending in the column direction at the fifth recessed region, and the fifth recessed region is formed to be narrower than the third recessed region in a plan view. (8) The light detection device according to (6) above, wherein the pixel group isolation section includes a sixth recessed region intersecting with the intra-pixel group isolation section, and the sixth recessed region is formed to be narrower than the third recessed region in a plan view. (9) A method for manufacturing a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, The method comprises: In a first process, an intra-pixel group isolation portion is formed between mutually adjacent pixels in the pixel group, wherein the intra-pixel group isolation portion includes a first recessed region extending along the thickness direction of the semiconductor substrate and a second recessed region located at a focusing position of light collected by the on-chip lens, wherein the second recessed region is different from the first recessed region, wherein: In the first process, the second recessed region is formed to be narrower than the first recessed region in a plan view. (10) The method for manufacturing a light detection device according to (9) above, further comprising: a second process of filling the second recessed area with a first film; and In a third process, the first recessed region is filled with a second film different from the first film. (11) The method for manufacturing a light detection device according to (10) above, wherein: The second film includes a metal film, and The first film includes a film other than a metal film. (12) A light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an in-pixel group partitioning portion, the in-pixel group partitioning portion being arranged between mutually adjacent same-color pixels and having an opening at least in a portion of a light-collecting position of light collected by the on-chip lens, The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and A formation position of the opening of the intra-pixel group partition is shifted according to the pupil correction position. (13) The light detection device according to (12) above, wherein an extension distance of the in-pixel group partition portion in a row direction or a column direction is changed according to the pupil correction position. (14) The light detection device according to (12) above, further comprising: a charge accumulation portion formed in the semiconductor substrate and configured to store the charge generated by each of the pixels, wherein The formation position of the charge accumulation portion is shifted according to the pupil correction position. (15) An electronic device including a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an intra-pixel group isolation portion, the intra-pixel group isolation portion being arranged between mutually adjacent pixels in the pixel group and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a light focusing position of light concentrated by the on-chip lens, the second recessed region being different from the first recessed region, and In the intra-pixel group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view. (16) An electronic device including a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; a pixel isolation portion provided in the semiconductor substrate to isolate the pixels adjacent to each other; and an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an in-pixel group partitioning portion, the in-pixel group partitioning portion being arranged between pixels adjacent to each other in the pixel group and having an opening at least in a portion of a light focusing position of light collected by the on-chip lens, The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and A formation position of the opening of the intra-pixel group partition is shifted according to the pupil correction position. Reference numerals list

[0131] 1, 1A, 1B, 1C, 1D, 1E, 1F Photodetection device 5 columns of signal processing circuits 11 Pixel Array Unit 12 Vertical drive device 13 columns of processing units 14 Horizontal drive device 15 System control unit 16 Signal Processing Unit 17 Data storage unit 18 pixel drive lines 19 vertical signal line 21 Photoelectric conversion area 22 Pixel circuit (readout circuit) 23 Photoelectric converter 24 Color Filters 30 Semiconductor Structure 31 Wiring Layer 32 Semiconductor layer 33 Flattening film 34 Color Filters 35 On-chip lens 37, 37A, 37B, 37C, 37D, 37E, 37F pixel isolation part 37a, 37a1, 37ax, 37ay, 37d, 37dx, 37dy, 37g1, 37g2, 37g3, 37g4 through area 37b, 37e, 37f Non-penetrating areas 37c1, 37c2, 37c3, 37c4 borders 37h Open 38 blackout wall 39 Well contact 41, 61 Silicon substrate 42, 62 Resist film 43, 63 opening 51 Well contact 71, 72 STI Department 73 Insulation film 110 pixels 110G, 110G1, 110G2, 110G3, 110G4 pixel groups 231 n-type region 232 p-type region 311 Metal Wiring Pattern 371 Insulation film 372 Fixed Charge Membrane 373 Insulation film 374 shading film 421, 422, 621, 622 Resist spacing line width 2201 Imaging Device 2202 Optical System 2203 Shutter Device 2204 Solid-state imaging element 2205 Control Circuit 2206 Signal Processing Circuit 2207 Monitor 2208 Memory 12000 Vehicle Control Systems 12001 Communication Network 12010 Drive system control unit 12020 Body system control unit 12030 External vehicle information detection unit 12031 Imaging Department 12040 In-vehicle information detection unit 12041 Driver status detection unit 12050 Integrated control unit 12051 Microcomputer 12052 Sound / image output unit 12061 Audio Speaker 12062 Display unit 12063 Dashboard 12100 Vehicles 12101 to 12105 Imaging Department 12111 to 12114 Imaging range

Claims

1. A light detection device, comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; A pixel isolation portion, the pixel isolation portion is provided in the semiconductor substrate to isolate the pixels adjacent to each other; as well as an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an intra-pixel group isolation portion, the intra-pixel group isolation portion being arranged between mutually adjacent pixels in the pixel group and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a light focusing position of light concentrated by the on-chip lens, the second recessed region being different from the first recessed region, and In the intra-pixel group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view.

2. The light detection device according to claim 1, wherein: The semiconductor substrate includes an element arranged in a region located on a side opposite to a light incident surface of the second recessed region.

3. The light detection device according to claim 1, wherein: The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and The in-pixel group isolation section shifts a position of a boundary between the first recessed region and the second recessed region according to the pupil correction position.

4. The light detection device according to claim 1, wherein: The first recessed region of the intra-pixel group isolation portion is filled with a first film, and the second recessed region of the intra-pixel group isolation portion is filled with a second film different from the first film.

5. The light detection device according to claim 4, wherein: The first film includes a metal film, and The second film includes a film other than a metal film.

6. The light detection device according to claim 1, wherein: Each of the plurality of pixel groups comprises a well contact portion for providing a ground potential, The pixel isolation portion includes a pixel group isolation portion, the pixel group isolation portion is arranged between pixel groups adjacent to each other and includes a third recessed region extending in a thickness direction of the semiconductor substrate, and The pixel group isolation portion includes a fourth recessed region in which well contacts of diagonally opposite pixel groups among the plurality of pixel groups are centrally arranged and the fourth recessed region is formed to be narrower than the third recessed region in a plan view.

7. The light detection device according to claim 6, wherein: The pixel group isolation portion includes a fifth recessed region at which the third recessed region extending in the row direction intersects with the third recessed region extending in the column direction and is formed to be narrower than the third recessed region in a plan view.

8. The light detection device according to claim 6, wherein: The pixel group isolation portion includes a sixth recessed region intersecting the intra-pixel group isolation portion, and the sixth recessed region is formed to be narrower than the third recessed region in a plan view.

9. A method for manufacturing a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; A pixel isolation portion, the pixel isolation portion is provided in the semiconductor substrate to isolate the pixels adjacent to each other; as well as an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, The method comprises: In a first process, an intra-pixel group isolation portion is formed between mutually adjacent pixels in the pixel group, wherein the intra-pixel group isolation portion includes a first recessed region extending along the thickness direction of the semiconductor substrate and a second recessed region located at a focusing position of light collected by the on-chip lens, wherein the second recessed region is different from the first recessed region, wherein: In the first process, the second recessed region is formed to be narrower than the first recessed region in a plan view.

10. The method for manufacturing a light detection device according to claim 9, further comprising: A second process of filling the second recessed area with a first film; as well as In a third process, the first recessed region is filled with a second film different from the first film.

11. The method for manufacturing a light detecting device according to claim 10, wherein: The second film includes a metal film, and The first film includes a film other than a metal film.

12. A light detection device, comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; A pixel isolation portion, the pixel isolation portion is provided in the semiconductor substrate to isolate the pixels adjacent to each other; as well as an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an in-pixel group partitioning portion disposed between pixels adjacent to each other and having an opening at least in a portion of a light-collecting position of light collected by the on-chip lens, The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and A formation position of the opening of the intra-pixel group partition is shifted according to the pupil correction position.

13. The light detection device according to claim 12, wherein: The in-pixel group partitioning portion changes an extension distance of the in-pixel group partitioning portion in a row direction or a column direction according to the pupil correction position.

14. The light detection device according to claim 12, further comprising: a charge accumulation portion formed in the semiconductor substrate and configured to store the charge generated by each of the pixels, wherein The formation position of the charge accumulation portion is shifted according to the pupil correction position.

15. An electronic device comprising a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; A pixel isolation portion, the pixel isolation portion is provided in the semiconductor substrate to isolate the pixels adjacent to each other; as well as an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an intra-pixel group isolation portion, the intra-pixel group isolation portion being arranged between mutually adjacent pixels in the pixel group and including a first recessed region extending in a thickness direction of the semiconductor substrate and a second recessed region located at a light focusing position of light concentrated by the on-chip lens, the second recessed region being different from the first recessed region, and In the intra-pixel group isolation portion, the second recessed region is formed to be narrower than the first recessed region in a plan view.

16. An electronic device comprising a light detection device, the light detection device comprising: a semiconductor substrate in which a plurality of pixels are arranged in a matrix, the pixels being capable of generating electrical signals according to light incident from the outside; A pixel isolation portion, the pixel isolation portion is provided in the semiconductor substrate to isolate the pixels adjacent to each other; as well as an on-chip lens arranged on the light incident surface side of the semiconductor substrate for each pixel group, the pixel group including at least two pixels among the plurality of pixels, the on-chip lens being configured to collect the light from the outside onto the pixel group, wherein The pixel isolation unit comprises: an in-pixel group partitioning portion, the in-pixel group partitioning portion being arranged between pixels adjacent to each other in the pixel group and having an opening at least in a portion of a condensing position of light condensed by the on-chip lens, The on-chip lenses are arranged to be shifted in a predetermined direction relative to the center of the pixel group according to a pupil correction position, and A formation position of the opening of the intra-pixel group partition is shifted according to the pupil correction position.

Images