Vehicle chip performance detection system and method

Abstract

The invention discloses a vehicle chip performance detection system and method, and belongs to the technical field of performance management. The system comprises a data collection module, a detection analysis module, a performance management module and a data storage module. The data collection module is used for collecting a performance parameter comparison table, environment data and running logs of all chips, and collecting actual temperature through a temperature sensor; the detection and analysis module is used for analyzing the relationship among various parameters in the running log of each chip, establishing a relational expression and calculating an abnormal coefficient of each chip so as to find out an abnormal chip; the performance management module screens out a roll-out object from the abnormal chip and screens out a roll-in object from other chips, associates the roll-out object with the roll-in object, and cooperatively processes and associates a computing power task in the roll-out object through the roll-in object; the data storage module collects parameter information in the running process of each chip in real time, and parameter records are generated and then stored in a running log.

Description

Technical Field

[0001] The present invention relates to the field of performance management technology, and in particular to a system and method for detecting performance of a vehicle chip. Background Art

[0002] As the degree of automotive electronics increases, modern vehicles are equipped with multiple electronic control units, which are critical to the overall performance and safety of the vehicle. When automotive chips perform complex control logic, data processing and communication tasks, the impact of temperature on their performance cannot be ignored.

[0003] At present, in terms of the performance management of automotive chips, mechanical heat dissipation or automatic frequency reduction is usually used to improve the performance stability of the chip. This method has certain problems. On the one hand, both mechanical heat dissipation and automatic frequency reduction are only mechanical behaviors for excessive chip temperature, and the operation logic only improves the performance stability of the chip by roughly reducing the chip temperature. As for the computing power utilization, calculation error rate and specific temperature influencing factors during the operation of the chip, it does not care. This chip performance management method is not intelligent enough. On the other hand, this performance management method adopts a post-event response mechanism, that is, a passive behavior taken after the problem occurs. When the chip performance has begun to decline and the consequences caused by the problem have already occurred, it will be less efficient than the technical solution of predicting and adjusting in advance. Especially in the field of automotive chips, which rely on driving safety and chip stability, it is more likely to cause safety hazards. Therefore, at this stage, a more intelligent and efficient chip performance detection and management technical solution is needed to solve the above problems. Summary of the invention

[0004] The purpose of the present invention is to provide a system and method for detecting the performance of a vehicle chip to solve the problems raised in the above-mentioned background technology.

[0005] In order to solve the above technical problems, the present invention provides a method for detecting the performance of a vehicle chip, comprising the following steps:

[0006] S100, collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect the actual temperature in the current environment in real time through the temperature sensor.

[0007] S200, analyzing the relationship between various parameters in the operation log of each chip, using a machine learning algorithm to establish a relational expression for each chip, calculating the abnormal coefficient of each chip based on the relational expression and finding the abnormal chip.

[0008] S300, filter out the transfer-out objects from the abnormal chip and filter out the transfer-in objects from other chips, associate the transfer-out objects with the transfer-in objects, and collaboratively process the computing tasks in the associated transfer-out objects through the transfer-in objects.

[0009] S400, collecting parameter information of each chip in real time during operation, and automatically generating parameter records when parameter variables change and storing them in corresponding operation logs.

[0010] In S100, the performance parameter comparison table includes the total computing power of each chip, which refers to the total computing power that the automotive chip can provide. Environmental data refers to the temperature at different times, including expected temperature and actual temperature. The expected temperature is the temperature change in the future obtained through weather forecasts, and the actual temperature is the temperature change in the current environment collected in real time by the temperature sensor.

[0011] As time goes by, the estimated temperature corresponding to each moment will be continuously revised according to the actual temperature, and the temperature actually measured by the temperature sensor will replace the temperature at that moment obtained according to the weather forecast.

[0012] A chip is a circuit that integrates electronic components. The chip is specifically used for data processing during vehicle operation. An operation log is a record of chip parameters when the chip is working. Each parameter record includes the chip number, operation time period, computing power utilization, and bit error rate. The chip number is used to distinguish different chips. The computing power utilization rate refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio between the number of bits that have errors when the chip transmits or processes data and the total number of bits transmitted.

[0013] The operating time period refers to the time period during which the computing power utilization rate and the bit error rate of the chip do not change. When either of them changes, a new parameter record is automatically generated.

[0014] The bit error rate is usually measured in errors per million calculations. This indicator is critical for the electronic control units of automobiles, especially in functions involving safety and critical operations. The bit error rate of automotive chips is a key indicator for evaluating their performance and reliability.

[0015] The bit error rate of automotive chips is greatly affected by ambient temperature. High temperature will cause changes in the internal electrical characteristics of the chip, such as increased power consumption and reduced signal noise margin, thereby increasing the probability of bit errors. Low temperature may cause increased resistance and changes in signal delay, affecting the accuracy of data transmission. In addition, physical stress and thermal noise caused by temperature fluctuations will also have an adverse effect on data integrity. Therefore, the performance testing of automotive chips must fully consider the impact of temperature on the bit error rate, and take measures to ensure the reliability of the chip under various environmental conditions.

[0016] In S200, the specific steps are as follows:

[0017] S201. Obtain all parameter records in the operation log, analyze the actual temperature changes in the operation time period in each parameter record in the environmental data, and calculate the average temperature in the operation time period as the influencing temperature of the corresponding parameter record. Establish a training set for each chip, use the influencing temperature and computing power utilization of the parameter record as independent variables and the bit error rate as the dependent variable, and package the independent variables and dependent variables of each parameter record as samples and put them into the corresponding training set. Establish a linear regression model, input all training sets for training, and obtain the relationship expression of each chip.

[0018] The samples generated by each parameter record will only be put into the training set of the corresponding chip. Each training set is trained independently in the linear regression model, and only one relationship expression will be obtained for one training set, and each relationship expression has an influence relationship with only one training set.

[0019] The specific training content of the expression includes: taking the independent variable of each sample in the training set as the input value of the linear regression model, and taking the difference between the output result of each sample and the dependent variable as the gap coefficient. Setting the error threshold, adjusting the intercept f, regression coefficients V1 and V2 so that the gap coefficients of all samples in the training set are less than the error threshold, and obtaining the expression after training:

[0020] h=f+V1O+V2P;

[0021] In the formula, h is the dependent variable, O is the first independent variable, and P is the second independent variable.

[0022] S202, obtain current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in the bit error rate of each chip in the TC and draws a fault line graph. Analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to get the total failed computing power, and draw a failed computing power line graph based on the changes in the total failed computing power.

[0023] S203. Obtain the maximum total amount of failed computing power on the failed computing power line chart The corresponding time T max , set the number of sampling points m, evenly set m sampling points on the failure computing power line graph, analyze the time corresponding to each sampling point and the total amount of failure computing power, and substitute them into the formula to calculate the abnormal coefficient of each chip. Set the coefficient threshold e, and treat the chips with abnormal coefficients greater than e as abnormal chips, and other chips as normal chips. The abnormal coefficient calculation formula is as follows:

[0024]

[0025] In the formula, YX is the abnormal coefficient, α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

[0026] The abnormality coefficient indicates the degree of abnormality of each chip. When the maximum total amount of failed computing power is larger and the time from the current time is shorter, the total amount of failed computing power corresponding to each sampling point is larger and the time from the current time is shorter, the degree of chip abnormality is higher, and intervention and adjustment need to be made in advance.

[0027] In S300, the specific steps are as follows:

[0028] S301, analyze the failure computing power line graph of each abnormal chip, mark the sampling point closest to the current time in the failure computing power line graph, and subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time as the failure computing power increment of the corresponding abnormal chip Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed.

[0029] S302, obtain the current computing power utilization rate of each normal chip, and calculate the remaining computing power SXS according to the total computing power of each chip in the performance parameter comparison table sy , marking the remaining computing power is greater than Normal chips; obtain the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip

[0030] Subtract the current computing power utilization of the normal chip from 100% and then multiply it by the corresponding total computing power to get the remaining computing power SXS sy First, multiply the current computing power utilization of the marked chip by the corresponding total computing power and then add the maximum failed computing power increment. Then divide the result by the corresponding total computing power to get the pre-calculation power utilization rate

[0031] S303, first mark the ambient temperature of the chip and pre-calculated capacity utilization Substitute it into the corresponding relationship expression, and then multiply the calculated estimated bit error rate by the corresponding total computing power to get the estimated total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects.

[0032] S304: Sort the outgoing objects in descending order according to the abnormal coefficients, match the outgoing objects and incoming objects according to their arrangement order, and associate the outgoing objects and incoming objects with the same arrangement position. Obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation. k After that, the next sampling point is marked again and the process goes into step S301 to reset the transfer-in object and the transfer-out object for task allocation. When the time corresponding to the last sampling point has passed, the fault line graph and the failure computing power line graph are redrawn, and the abnormal coefficient of each chip is calculated to re-allocate tasks.

[0033] In S400, the bit error rate and computing power utilization are calculated in real time during the operation of the chip. When any of the values ​​changes, the chip number and the operation time period are recorded to automatically generate a parameter record and store it in the corresponding operation log.

[0034] A vehicle chip performance detection system comprises a data collection module, a detection and analysis module, a performance management module and a data storage module.

[0035] The data collection module is used to collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect actual temperature through temperature sensors.

[0036] The detection and analysis module is used to analyze the relationship between various parameters in the operation log of each chip, establish a relational expression, calculate the abnormal coefficient of each chip, and thus find out the abnormal chip.

[0037] The performance management module selects the transfer-out objects from the abnormal chips and the transfer-in objects from other chips, associates the transfer-out objects with the transfer-in objects, and collaboratively processes the computing tasks in the associated transfer-out objects through the transfer-in objects.

[0038] The data storage module collects parameter information of each chip during operation, generates parameter records and stores them in the operation log.

[0039] The data collection module includes an operation log collection unit, an environmental data collection unit and a table information collection unit.

[0040] The operation log collection unit is used to collect parameter records when the chip is working. Each parameter record includes the chip number, operation time period, computing power utilization and bit error rate. The computing power utilization refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio between the number of bits that the chip has errors in when transmitting or processing data and the total number of bits transmitted.

[0041] The environmental data acquisition unit is used to collect the expected temperature and actual temperature. The expected temperature is the temperature change in the future period obtained through weather forecast, and the actual temperature is the temperature change in the current environment collected by the temperature sensor.

[0042] The table information collection unit is used to collect a performance parameter comparison table, which includes the total computing power of each chip. The total computing power refers to the total computing power that the automotive chip can provide.

[0043] The detection and analysis module includes a relationship analysis unit and an anomaly screening unit.

[0044] The relational analysis unit is used to establish relational expressions.

[0045] First, the actual temperature change during the operation time period of each parameter record in the operation log is analyzed in the environmental data, and the average temperature during the operation time period is calculated as the influencing temperature of the corresponding parameter record.

[0046] Secondly, a training set is established for each chip, with the parameter records influencing temperature and computing power utilization as independent variables and bit error rate as dependent variable respectively. The independent variables and dependent variables of each parameter record are packaged as samples and put into the corresponding training set.

[0047] Finally, a linear regression model is established, and all training sets are input into the linear regression model for training to obtain the relational expression of each chip.

[0048] The abnormal screening unit is used to calculate the abnormal coefficient of each chip and find out the abnormal chips.

[0049] First, get the current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in the bit error rate of each chip in the TC and draws a fault line graph.

[0050] Secondly, analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to get the total failed computing power, and draw a failed computing power line graph based on the change in the total failed computing power. Get the maximum total failed computing power on the failed computing power line graph The corresponding time T max , set the number of sampling points m, and evenly set m sampling points on the failure computing power line graph.

[0051] Finally, analyze the time and total amount of failed computing power corresponding to each sampling point, according to the formula Calculate the abnormal coefficient of each chip. Set the coefficient threshold e, and treat the chips with abnormal coefficients greater than e as abnormal chips, and other chips as normal chips. Among them, α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

[0052] The performance management module includes a fault prediction unit and a performance planning unit.

[0053] The fault prediction unit is used to screen outgoing objects and incoming objects.

[0054] First, mark the sampling point closest to the current time in the failure computing power line graph of each abnormal chip, subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time, and use the result as the failure computing power increment of the corresponding abnormal chip. Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed.

[0055] Secondly, the remaining computing power SXS is calculated based on the current computing power utilization rate and total computing power of each normal chip sy , marking the remaining computing power is greater than Get the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip

[0056] Finally, the ambient temperature of the chip will be marked and pre-calculated capacity utilization Substituting into the corresponding relationship expression, the calculated expected bit error rate is multiplied by the corresponding total computing power to obtain the expected total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects.

[0057] The performance planning unit is used to allocate computing tasks between the transferred-out objects and the transferred-in objects.

[0058] First, the transfer-out objects are sorted in descending order according to the abnormal coefficients, and the transfer-in objects are matched according to their arrangement order, and the transfer-out objects and transfer-in objects with the same sorting position are associated.

[0059] Secondly, obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation. k After that, the next sampling point is marked again and the incoming and outgoing objects are reset to perform task allocation.

[0060] Finally, when the time corresponding to the last sampling point has passed, the fault line graph and the failure computing power line graph are redrawn, and the abnormal coefficient of each chip is calculated to reallocate tasks.

[0061] The data storage module calculates the bit error rate and computing power utilization in real time during the operation of the chip, and records the chip number and operation time period to automatically generate parameter records and store them in the operation log.

[0062] Compared with the prior art, the beneficial effects achieved by the present invention are:

[0063] 1. Intelligent performance prediction: This application analyzes the historical parameter records of each chip, and uses a machine learning algorithm to obtain a relational expression based on the bit error rate corresponding to different computing power utilization and actual temperature. The fault line graph and the failed computing power line graph are drawn through the relational expression to calculate the abnormal coefficient of each chip and filter out abnormal chips. Compared with the mechanical temperature judgment in the prior art, it is more accurate and intelligent.

[0064] 2. Efficient performance management: In this application, each sampling point in the failure computing power line graph is planned in batches. Before the corresponding time of each sampling point, the transfer-out object and the transfer-in object are planned and matched and associated. By sharing part of the computing power tasks of the transfer-in object with the transfer-out object, the bit error rate is reduced and the increase in failure computing power is suppressed. The overall operating stability of all chips is improved, which is more reliable and efficient than the mechanical frequency reduction in the prior art.

[0065] In summary, compared with traditional technologies, the present invention has the advantages of intelligent performance prediction and efficient performance management, and can improve the efficiency of chip performance detection management. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0067] Figure 1 It is a flow chart of a method for detecting performance of a vehicle chip according to the present invention.

[0068] Figure 2 It is a structural schematic diagram of a vehicle chip performance detection system of the present invention. DETAILED DESCRIPTION

[0069] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0070] See also Figure 1 The present invention provides a method for detecting the performance of a vehicle chip, comprising the following steps:

[0071] S100, collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect the actual temperature in the current environment in real time through the temperature sensor.

[0072] S200, analyzing the relationship between various parameters in the operation log of each chip, using a machine learning algorithm to establish a relational expression for each chip, calculating the abnormal coefficient of each chip based on the relational expression and finding the abnormal chip.

[0073] S300, filter out the transfer-out objects from the abnormal chip and filter out the transfer-in objects from other chips, associate the transfer-out objects with the transfer-in objects, and collaboratively process the computing tasks in the associated transfer-out objects through the transfer-in objects.

[0074] S400, collecting parameter information of each chip in real time during operation, and automatically generating parameter records when parameter variables change and storing them in corresponding operation logs.

[0075] In S100, the performance parameter comparison table includes the total computing power of each chip, which refers to the total computing power that the automotive chip can provide. Environmental data refers to the temperature at different times, including expected temperature and actual temperature. The expected temperature is the temperature change in the future obtained through weather forecasts, and the actual temperature is the temperature change in the current environment collected in real time by the temperature sensor.

[0076] As time goes by, the estimated temperature corresponding to each moment will be continuously revised according to the actual temperature, and the temperature actually measured by the temperature sensor will replace the temperature at that moment obtained according to the weather forecast.

[0077] A chip is a circuit that integrates electronic components. The chip is specifically used for data processing during vehicle operation. An operation log is a record of chip parameters when the chip is working. Each parameter record includes the chip number, operation time period, computing power utilization, and bit error rate. The chip number is used to distinguish different chips. The computing power utilization rate refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio between the number of bits that have errors when the chip transmits or processes data and the total number of bits transmitted.

[0078] The operating time period refers to the time period during which the computing power utilization rate and the bit error rate of the chip do not change. When either of them changes, a new parameter record is automatically generated.

[0079] The bit error rate is usually measured in errors per million calculations. This indicator is critical for the electronic control units of automobiles, especially in functions involving safety and critical operations. The bit error rate of automotive chips is a key indicator for evaluating their performance and reliability.

[0080] The bit error rate of automotive chips is greatly affected by ambient temperature. High temperature will cause changes in the internal electrical characteristics of the chip, such as increased power consumption and reduced signal noise margin, thereby increasing the probability of bit errors. Low temperature may cause increased resistance and changes in signal delay, affecting the accuracy of data transmission. In addition, physical stress and thermal noise caused by temperature fluctuations will also have an adverse effect on data integrity. Therefore, the performance testing of automotive chips must fully consider the impact of temperature on the bit error rate, and take measures to ensure the reliability of the chip under various environmental conditions.

[0081] In S200, the specific steps are as follows:

[0082] S201. Obtain all parameter records in the operation log, analyze the actual temperature changes in the operation time period in each parameter record in the environmental data, and calculate the average temperature in the operation time period as the influencing temperature of the corresponding parameter record. Establish a training set for each chip, use the influencing temperature and computing power utilization of the parameter record as independent variables and the bit error rate as the dependent variable, and package the independent variables and dependent variables of each parameter record as samples and put them into the corresponding training set. Establish a linear regression model, input all training sets for training, and obtain the relationship expression of each chip.

[0083] The samples generated by each parameter record will only be put into the training set of the corresponding chip. Each training set is trained independently in the linear regression model, and only one relationship expression will be obtained for one training set, and each relationship expression has an influence relationship with only one training set.

[0084] The specific training content of the expression includes: taking the independent variable of each sample in the training set as the input value of the linear regression model, and taking the difference between the output result of each sample and the dependent variable as the gap coefficient. Setting the error threshold, adjusting the intercept f, regression coefficients V1 and V2 so that the gap coefficients of all samples in the training set are less than the error threshold, and obtaining the expression after training:

[0085] h=f+V1O+V2P;

[0086] In the formula, h is the dependent variable, O is the first independent variable, and P is the second independent variable.

[0087] S202, obtain current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in the bit error rate of each chip in the TC and draws a fault line graph. Analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to get the total failed computing power, and draw a failed computing power line graph based on the changes in the total failed computing power.

[0088] S203. Obtain the maximum total amount of failed computing power on the failed computing power line chart The corresponding time T max , set the number of sampling points m, evenly set m sampling points on the failure computing power line graph, analyze the time corresponding to each sampling point and the total amount of failure computing power, and substitute them into the formula to calculate the abnormal coefficient of each chip. Set the coefficient threshold e, and treat the chips with abnormal coefficients greater than e as abnormal chips, and other chips as normal chips. The abnormal coefficient calculation formula is as follows:

[0089]

[0090] In the formula, YX is the abnormal coefficient, α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

[0091] The abnormality coefficient indicates the degree of abnormality of each chip. When the maximum total amount of failed computing power is larger and the time from the current time is shorter, the total amount of failed computing power corresponding to each sampling point is larger and the time from the current time is shorter, the degree of chip abnormality is higher, and intervention and adjustment need to be made in advance.

[0092] In S300, the specific steps are as follows:

[0093] S301, analyze the failure computing power line graph of each abnormal chip, mark the sampling point closest to the current time in the failure computing power line graph, and subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time as the failure computing power increment of the corresponding abnormal chip Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed.

[0094] S302, obtain the current computing power utilization rate of each normal chip, and calculate the remaining computing power SXS according to the total computing power of each chip in the performance parameter comparison table sy , marking the remaining computing power is greater than Normal chips; obtain the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip

[0095] Subtract the current computing power utilization of the normal chip from 100% and then multiply it by the corresponding total computing power to get the remaining computing power SXS sy First, multiply the current computing power utilization of the marked chip by the corresponding total computing power and then add the maximum failed computing power increment. Then divide the result by the corresponding total computing power to get the pre-calculation power utilization rate

[0096] S303, first mark the ambient temperature of the chip and pre-calculated capacity utilization Substitute it into the corresponding relationship expression, and then multiply the calculated estimated bit error rate by the corresponding total computing power to get the estimated total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects.

[0097] S304: Sort the outgoing objects in descending order according to the abnormal coefficients, match the outgoing objects and incoming objects according to their arrangement order, and associate the outgoing objects and incoming objects with the same arrangement position. Obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation. k After that, the next sampling point is marked again and the process goes into step S301 to reset the transfer-in object and the transfer-out object for task allocation. When the time corresponding to the last sampling point has passed, the fault line graph and the failure computing power line graph are redrawn, and the abnormal coefficient of each chip is calculated to re-allocate tasks.

[0098] In S400, the bit error rate and computing power utilization are calculated in real time during the operation of the chip. When any of the values ​​changes, the chip number and the operation time period are recorded to automatically generate a parameter record and store it in the corresponding operation log.

[0099] See also Figure 2 The present invention provides a vehicle chip performance detection system, including a data collection module, a detection and analysis module, a performance management module and a data storage module.

[0100] The data collection module is used to collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect actual temperature through temperature sensors.

[0101] The detection and analysis module is used to analyze the relationship between various parameters in the operation log of each chip, establish a relational expression, calculate the abnormal coefficient of each chip, and thus find out the abnormal chip.

[0102] The performance management module selects the transfer-out objects from the abnormal chips and the transfer-in objects from other chips, associates the transfer-out objects with the transfer-in objects, and collaboratively processes the computing tasks in the associated transfer-out objects through the transfer-in objects.

[0103] The data storage module collects parameter information of each chip during operation, generates parameter records and stores them in the operation log.

[0104] The data collection module includes an operation log collection unit, an environmental data collection unit and a table information collection unit.

[0105] The operation log collection unit is used to collect parameter records when the chip is working. Each parameter record includes the chip number, operation time period, computing power utilization and bit error rate. The computing power utilization refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio between the number of bits that the chip has errors in when transmitting or processing data and the total number of bits transmitted.

[0106] The environmental data acquisition unit is used to collect the expected temperature and actual temperature. The expected temperature is the temperature change in the future period obtained through weather forecast, and the actual temperature is the temperature change in the current environment collected by the temperature sensor.

[0107] The table information collection unit is used to collect a performance parameter comparison table, which includes the total computing power of each chip. The total computing power refers to the total computing power that the automotive chip can provide.

[0108] The detection and analysis module includes a relationship analysis unit and an anomaly screening unit.

[0109] The relational analysis unit is used to establish relational expressions.

[0110] First, the actual temperature change during the operation time period of each parameter record in the operation log is analyzed in the environmental data, and the average temperature during the operation time period is calculated as the influencing temperature of the corresponding parameter record.

[0111] Secondly, a training set is established for each chip, with the parameter records influencing temperature and computing power utilization as independent variables and bit error rate as dependent variable respectively. The independent variables and dependent variables of each parameter record are packaged as samples and put into the corresponding training set.

[0112] Finally, a linear regression model is established, and all training sets are input into the linear regression model for training to obtain the relational expression of each chip.

[0113] The abnormal screening unit is used to calculate the abnormal coefficient of each chip and find out the abnormal chips.

[0114] First, get the current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in the bit error rate of each chip in the TC and draws a fault line graph.

[0115] Secondly, analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to get the total failed computing power, and draw a failed computing power line graph based on the change in the total failed computing power. Get the maximum total failed computing power on the failed computing power line graph The corresponding time T max , set the number of sampling points m, and evenly set m sampling points on the failure computing power line graph.

[0116] Finally, analyze the time and total amount of failed computing power corresponding to each sampling point, according to the formula Calculate the abnormal coefficient of each chip. Set the coefficient threshold e, and treat the chips with abnormal coefficients greater than e as abnormal chips, and other chips as normal chips. Among them, α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

[0117] The performance management module includes a fault prediction unit and a performance planning unit.

[0118] The fault prediction unit is used to screen outgoing objects and incoming objects.

[0119] First, mark the sampling point closest to the current time in the failure computing power line graph of each abnormal chip, subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time, and use the result as the failure computing power increment of the corresponding abnormal chip. Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed.

[0120] Secondly, the remaining computing power SXS is calculated based on the current computing power utilization rate and total computing power of each normal chip sy , marking the remaining computing power is greater than Get the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip

[0121] Finally, the ambient temperature of the chip will be marked and pre-calculated capacity utilization Substituting into the corresponding relationship expression, the calculated expected bit error rate is multiplied by the corresponding total computing power to obtain the expected total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects.

[0122] The performance planning unit is used to allocate computing tasks between the transferred-out objects and the transferred-in objects.

[0123] First, the transfer-out objects are sorted in descending order according to the abnormal coefficients, and the transfer-in objects are matched according to their arrangement order, and the transfer-out objects and transfer-in objects with the same sorting position are associated.

[0124] Secondly, obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation. k After that, the next sampling point is marked again and the incoming and outgoing objects are reset to perform task allocation.

[0125] Finally, when the time corresponding to the last sampling point has passed, the fault line graph and the failure computing power line graph are redrawn, and the abnormal coefficient of each chip is calculated to reallocate tasks.

[0126] The data storage module calculates the bit error rate and computing power utilization in real time during the operation of the chip, and records the chip number and operation time period to automatically generate parameter records and store them in the operation log.

[0127] Embodiment 1:

[0128] Assume that there are 3 sampling points on the failure computing power line graph of chip A1. The total amount of failure computing power corresponding to each sampling point and the time from the current time are:

[0129] Sampling point 1: 0.002MIPS, 0.03h;

[0130] Sampling point 2: 0.0025 MIPS, 0.06 h;

[0131] Sampling point 3: 0.004MIPS, 0.09h;

[0132] When the maximum total amount of failed computing power on the failed computing power line chart is 0.005 MIPS, and the corresponding time is 0.08 hours from the current time, and the constant α is 0.001, substitute it into the formula to calculate the abnormal coefficient:

[0133] The anomaly coefficient of A1 is:

[0134] When the coefficient threshold is 0.002, chip A1 is regarded as an abnormal chip.

[0135] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0136] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for detecting performance of a vehicle chip, characterized in that: The method comprises the following steps: S100, collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect the actual temperature in the current environment in real time through the temperature sensor; S200, analyzing the relationship between various parameters in the operation log of each chip, using a machine learning algorithm to establish a relational expression for each chip, calculating the abnormal coefficient of each chip according to the relational expression and finding the abnormal chip; S300, screening outgoing objects from abnormal chips and screening incoming objects from other chips, associating the outgoing objects with the incoming objects, and collaboratively processing computing tasks in the associated outgoing objects through the incoming objects; S400, collecting parameter information of each chip in real time during operation, and automatically generating parameter records when parameter variables change and storing them in corresponding operation logs.

2. A method for detecting performance of a vehicle chip according to claim 1, characterized in that: In S100, the performance parameter comparison table includes the total computing power of each chip, which refers to the total computing power that the automotive chip can provide; environmental data refers to the temperature at different times, including expected temperature and actual temperature; the expected temperature is the temperature change in the future obtained through weather forecast, and the actual temperature is the temperature change in the current environment collected in real time by the temperature sensor; A chip refers to a circuit that integrates electronic components. The chip is specifically used for data processing during vehicle operation. An operation log refers to a record of chip parameters when the chip is working. Each parameter record includes the chip number, operating time period, computing power utilization, and bit error rate. The chip number is used to distinguish different chips. The computing power utilization refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio of the number of bits in which errors occur when the chip transmits or processes data to the total number of bits transmitted.

3. A method for detecting performance of a vehicle chip according to claim 2, characterized in that: In S200, the specific steps are as follows: S201, obtain all parameter records in the operation log, analyze the actual temperature changes in the operation time period in each parameter record in the environmental data, calculate the average temperature in the operation time period as the influencing temperature of the corresponding parameter record; establish a training set for each chip, use the influencing temperature and computing power utilization of the parameter record as independent variables and the bit error rate as dependent variables, respectively, and package the independent variables and dependent variables of each parameter record as samples and put them into the corresponding training set; Establish a linear regression model, input all training sets for training, and obtain the relational expression of each chip; S202, obtain current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in bit error rate of each chip in TC and draws a fault line graph; Analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to obtain the total failed computing power, and draw a failed computing power line graph based on the change in the total failed computing power; S203. Obtain the maximum total amount of failed computing power on the failed computing power line chart The corresponding time T max , set the number of sampling points m, evenly set m sampling points on the failure computing power line graph, analyze the time corresponding to each sampling point and the total amount of failure computing power, substitute them into the formula to calculate the abnormal coefficient of each chip; set the coefficient threshold e, and treat the chip with an abnormal coefficient greater than e as an abnormal chip, and other chips as normal chips; the abnormal coefficient calculation formula is as follows: In the formula, YX is the abnormal coefficient, α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

4. A method for detecting performance of a vehicle chip according to claim 3, characterized in that: In S300, the specific steps are as follows: S301, analyze the failure computing power line graph of each abnormal chip, mark the sampling point closest to the current time in the failure computing power line graph, and subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time as the failure computing power increment of the corresponding abnormal chip Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed. S302, obtain the current computing power utilization rate of each normal chip, and calculate the remaining computing power SXS according to the total computing power of each chip in the performance parameter comparison table sy , marking the remaining computing power is greater than Normal chips; obtain the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip S303, first mark the ambient temperature of the chip and pre-calculated capacity utilization Substitute it into the corresponding relationship expression, and then multiply the calculated estimated bit error rate by the corresponding total computing power to get the estimated total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects; S304, sort the outgoing objects in descending order according to the abnormal coefficient, match the outgoing objects and the incoming objects according to their arrangement order, and associate the outgoing objects and the incoming objects with the same arrangement position; obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation; when the time has passed T k Afterwards, mark the next sampling point again and enter step S301 to reset the transfer-in object and transfer-out object for task allocation; when the time has passed the time corresponding to the last sampling point, redraw the fault line graph and the failure computing power line graph, and calculate the abnormal coefficient of each chip to re-allocate tasks.

5. A method for detecting performance of a vehicle chip according to claim 4, characterized in that: In S400, the bit error rate and computing power utilization are calculated in real time during the operation of the chip. When any of the values ​​changes, the chip number and the operation time period are recorded to automatically generate a parameter record and store it in the corresponding operation log.

6. A vehicle chip performance detection system, characterized in that: The system includes a data collection module, a detection and analysis module, a performance management module and a data storage module; The data collection module is used to collect performance parameter comparison tables, environmental data and operation logs of all chips, and collect actual temperature through temperature sensors; The detection and analysis module is used to analyze the relationship between various parameters in the operation log of each chip, establish a relational expression, calculate the abnormal coefficient of each chip, and thus find the abnormal chip; The performance management module selects the outgoing objects from the abnormal chips and the incoming objects from other chips, associates the outgoing objects with the incoming objects, and collaboratively processes the computing tasks in the associated outgoing objects through the incoming objects; The data storage module collects parameter information of each chip during operation, generates parameter records and stores them in the operation log.

7. The automotive chip performance detection system according to claim 6, characterized in that: The data collection module includes an operation log collection unit, an environmental data collection unit and a table information collection unit; The operation log collection unit is used to collect parameter records when the chip is working. Each parameter record includes the chip number, operation time period, computing power utilization and bit error rate. The computing power utilization refers to the ratio of the computing power actually used by the chip to its total computing power. The bit error rate refers to the ratio between the number of bits that have errors when the chip transmits or processes data and the total number of transmitted bits. The environmental data acquisition unit is used to collect the expected temperature and actual temperature; the expected temperature is the temperature change in the future period obtained through weather forecast, and the actual temperature is the temperature change in the current environment collected by the temperature sensor; The table information collection unit is used to collect a performance parameter comparison table, which includes the total computing power of each chip. The total computing power refers to the total computing power that the automotive chip can provide.

8. The automotive chip performance detection system according to claim 7, characterized in that: The detection and analysis module includes a relationship analysis unit and an anomaly screening unit; The relational analysis unit is used to establish relational expressions; First, the actual temperature change during the operation time period of each parameter record in the operation log is analyzed in the environmental data, and the average temperature during the operation time period is calculated as the impact temperature of the corresponding parameter record; Secondly, a training set is created for each chip, with the parameter record’s influencing temperature and computing power utilization as independent variables and the bit error rate as dependent variable. The independent variables and dependent variables of each parameter record are packaged as samples and put into the corresponding training set. Finally, a linear regression model is established, and all training sets are input into the linear regression model for training to obtain the relational expression of each chip; The abnormal screening unit is used to calculate the abnormal coefficient of each chip and find out the abnormal chips; First, get the current time T now And set the prediction time TC, get T in the environmental data now to T now The expected temperature in the +TC time period is substituted into the relational expression together with the current computing power utilization of each chip to calculate the future time period T now to T now +Changes in bit error rate of each chip in TC and draws a fault line graph; Secondly, analyze the total computing power of each chip in the performance parameter comparison table, multiply the total computing power by the bit error rate in the fault line graph of each chip to get the total failed computing power, and draw a failed computing power line graph based on the change in the total failed computing power; obtain the maximum total failed computing power on the failed computing power line graph The corresponding time T max , set the number of sampling points m, and evenly set m sampling points on the failure computing power line graph; Finally, analyze the time and total amount of failed computing power corresponding to each sampling point, according to the formula Calculate the abnormal coefficient of each chip; set the coefficient threshold e, and treat the chips with abnormal coefficients greater than e as abnormal chips, and other chips as normal chips; where α is a constant, is the total amount of failed computing power corresponding to the nth sampling point, T n is the time corresponding to the nth sampling point.

9. The automotive chip performance detection system according to claim 8, characterized in that: The performance management module includes a fault prediction unit and a performance planning unit; The fault prediction unit is used to screen outgoing objects and incoming objects; First, mark the sampling point closest to the current time in the failure computing power line graph of each abnormal chip, subtract the total failure computing power of the marked sampling point from the total failure computing power of the current time, and use the result as the failure computing power increment of the corresponding abnormal chip. Will The abnormal chips with positive values ​​are taken as the transfer objects, the number of all transfer objects u is counted, and the maximum failure computing power increment among these transfer objects is analyzed. Secondly, the remaining computing power SXS is calculated based on the current computing power utilization rate and total computing power of each normal chip sy , marking the remaining computing power is greater than Normal chips; obtain the failure computing power line chart of each marked chip and analyze the ambient temperature of the marked sampling point and the total amount of failed computing power Will Add them to the computing power tasks of each marked chip respectively, and calculate the pre-calculated power utilization after adding according to the current computing power utilization of the marked chip Finally, the ambient temperature of the chip will be marked and pre-calculated capacity utilization Substituting into the corresponding relationship expression, the calculated expected bit error rate is multiplied by the corresponding total computing power to obtain the expected total failure computing power Each marker chip minus Get the failed computing power increment Mark the chip according to the failed computing power increment Arrange them in order from small to large, and select the first u labeled chips as the transfer objects; The performance planning unit is used to allocate computing tasks between the transfer-out objects and the transfer-in objects; First, the transfer-out objects are sorted in descending order according to the abnormal coefficients, and the transfer-in objects are matched according to the arrangement order, and the transfer-out objects and transfer-in objects with the same arrangement position are associated; Secondly, obtain the time T corresponding to the marked sampling point k , in T k Previously, each transferred object was Tasks with the same total computing power are transferred to the associated input object for calculation; when the time has passed T k After that, the next sampling point is marked again and the transfer-in object and transfer-out object are reset to perform task allocation; Finally, when the time corresponding to the last sampling point has passed, the fault line graph and the failure computing power line graph are redrawn, and the abnormal coefficient of each chip is calculated to reallocate tasks.

10. The automotive chip performance detection system according to claim 9, characterized in that: The data storage module calculates the bit error rate and computing power utilization in real time during the operation of the chip, and records the chip number and operation time period to automatically generate parameter records and store them in the operation log.

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