Vehicle gauge semiconductor chip scanning detection device and control method

Abstract

The invention discloses a vehicle gauge semiconductor chip scanning detection device and a control method. The device adopts a laminated design and comprises a test substrate, a test circuit layer and a chip mounting layer. The chip installation layer is provided with a plurality of to-be-tested chip installation grooves, and each groove is internally provided with a test input pad and a test output pad which are electrically connected with the test circuit layer, thereby facilitating the quick and accurate connection of to-be-tested chips. The test circuit layer is responsible for signal transmission and guidance, and ensures that a test signal can be accurately sent and a response from a chip is received. Particularly, a heating unit and a vibration unit are integrated on the test substrate, so that the extreme temperature and high-vibration environment in the actual operation of the automobile can be simulated. According to the scheme, simultaneous detection of multiple chips is realized, the test efficiency is improved, the test result is closer to reality, and the test accuracy and reliability are enhanced.

Description

Technical Field

[0001] The present application relates to the field of chip detection, and in particular to a scanning detection device and control method for automotive-grade semiconductor chips. Background Art

[0002] With the rapid development of automotive electronic technology, automotive semiconductor chips, as core components of automotive electronic systems, have performance and reliability that are directly related to the overall performance and safety of the vehicle. Automotive semiconductor chips are designed specifically for the automotive field and must meet extremely high environmental adaptability and stability requirements, such as being able to operate normally at extreme temperatures and maintain stable performance in high-vibration environments. Typical automotive chips include, but are not limited to, engine control unit (ECU) chips, body control module (BCM) chips, and advanced driver assistance system (ADAS) chips.

[0003] At present, scan detection technology based on scan chain is a common method in semiconductor chip testing. This technology connects the triggers inside the chip in series to form a scan chain, then inputs the test vector into the scan chain in the test mode, and judges the correctness of the logic circuit inside the chip by observing the output response.

[0004] Existing scanning and detection technologies mainly test individual chips. It is impossible to scan and detect all chips on a car at one time, which greatly reduces the test efficiency. In addition, automotive semiconductor chips need to work in a complex and changeable operating environment, including extreme temperatures, high vibrations and other harsh conditions. However, most of the current scanning and detection methods are carried out under standard laboratory conditions, which cannot simulate these harsh conditions well, resulting in a large deviation between the test results and actual usage. Summary of the invention

[0005] The purpose of this application is to provide a vehicle-grade semiconductor chip scanning detection device and control method, which can improve the above-mentioned problems.

[0006] The embodiment of the present application is implemented as follows: In a first aspect, the present application provides a vehicle-grade semiconductor chip scanning and detection device, which includes a test substrate, a test circuit layer, and a chip mounting layer stacked in sequence; The surface of the chip mounting layer facing away from the test circuit layer is provided with at least two chip mounting grooves to be tested, each of the mounting grooves is provided with a test input pad and a test output pad electrically connected to the test circuit layer, when the chip to be tested is placed in the chip mounting groove, the scan test input pin of the chip to be tested just contacts the corresponding test input pad, and the scan test output pin of the chip to be tested just contacts the corresponding test output pad; the chip mounting layer also includes a test signal input interface and a test signal output interface electrically connected to the test circuit layer; The test circuit layer includes a test signal guiding circuit arranged on the test substrate, which is used to transmit the signal of the test signal input interface to the test input pad of the corresponding chip installation slot to be tested, and is also used to transmit the signal of the test output pad of the chip installation slot to the test signal output interface; A heating unit and a vibration unit are arranged in an array on a surface of the test substrate away from the test circuit layer. The sizes of the heating unit and the vibration unit are both smaller than the mounting groove of the chip to be tested.

[0007] It can be understood that the automotive-grade semiconductor chip scanning and detection device provided in this application can scan and detect multiple chips on the car at the same time through an integrated design, avoiding the tediousness of testing each chip one by one and significantly improving the test efficiency. The design of the mounting slot and test pad provided in the automotive-grade semiconductor chip scanning and detection device ensures the precise docking between the chip to be tested and the test circuit, and improves the accuracy and stability of the test. In addition, the heating unit and vibration unit integrated on the test substrate of the automotive-grade semiconductor chip scanning and detection device can simulate the extreme temperature and high vibration environment in the actual operation of the car, so that the test results are closer to the actual use situation, and the accuracy and reliability of the test are improved.

[0008] In an optional embodiment of the present application, the automotive-grade semiconductor chip scanning and detection device also includes at least one of the following items.

[0009] Example 1: Each of the chip mounting slots to be tested on the same chip mounting layer is used to place various automotive-grade semiconductor chips in the same car. This method is suitable for comprehensive testing of all automotive-grade semiconductor chips in a single car. By placing each chip in the same car in the same layer of mounting slots, the performance and reliability test of all chips in the vehicle can be completed at one time. Example 1 can greatly improve the test efficiency and reduce the time and labor costs required for testing each chip one by one. At the same time, since all chips are tested under the same conditions, the consistency and comparability of the test results are ensured, which helps to accurately evaluate the performance of the electronic system of the entire vehicle.

[0010] Example 2: Each of the chip mounting slots to be tested on the same chip mounting layer is used to place the same chip of different vehicles. This method is suitable for batch testing of the same chip used in different vehicles. By placing the same chips in different vehicles in the same layer of mounting slots, the performance differences of these chips can be quickly compared and analyzed. Example 2 helps to discover possible batch problems or production anomalies, and provides strong support for quality control and troubleshooting. At the same time, batch testing can also reduce testing costs and improve production efficiency.

[0011] In an optional embodiment of the present application, when each of the chip mounting slots to be tested on the same chip mounting layer is used to place various automotive-grade semiconductor chips in the same car, the chip mounting layer includes a control chip area, a power semiconductor chip area, a sensor chip area, a communication chip area and a memory chip area, the chip mounting slot to be tested in the control chip area is used to place the control chip to be tested, the chip mounting slot to be tested in the power semiconductor chip area is used to place the power semiconductor chip to be tested, the chip mounting slot to be tested in the sensor chip area is used to place the sensor chip to be tested, the chip mounting slot to be tested in the communication chip area is used to place the communication chip to be tested, and the chip mounting slot to be tested in the memory chip area is used to place the memory chip to be tested.

[0012] It can be understood that in the optional embodiment of the present application, the chip installation layer is divided into different areas such as control chip, power semiconductor chip, sensor chip, communication chip and memory chip. This design brings many benefits. First, it makes the chip placement more orderly, and the tester can quickly find the chip installation slot of the corresponding type, which greatly improves the test efficiency. Secondly, through regional division, the confusion of different types of chips is effectively avoided, the accuracy of the test is ensured, and the test errors caused by confusion are reduced. In addition, this design is also convenient for troubleshooting and quality control. When a problem is found in a certain type of chip, the relevant area can be quickly located for targeted analysis and processing. Finally, regional division also helps to optimize the utilization of test resources, avoid waste of resources, and reduce test costs.

[0013] In an optional embodiment of the present application, the automotive-grade semiconductor chip scanning and detection device also includes a light-emitting backplane and light-emitting chips arranged in an array on the light-emitting backplane, each of the light-emitting chips constitutes the heating unit, the light-emitting backplane includes a chip driving circuit, the light-emitting chip is electrically connected to the chip driving circuit, and the chip driving circuit is used to independently drive each of the light-emitting chips to light up.

[0014] It can be understood that the automotive-grade semiconductor chip scanning and detection device brings significant benefits by integrating the light-emitting backplane and the light-emitting chip as a heating unit. The light-emitting chip is lit up under the independent drive of the chip driving circuit, which can effectively simulate the high temperature state and provide a real working environment test for the chip to be tested. This design not only simplifies the structure of the heating system, improves the uniformity and accuracy of heating, but also enhances the flexibility and controllability of the test. At the same time, the independent drive of the light-emitting chip enables the device to flexibly adjust the heating area and temperature as needed, further improving the pertinence and accuracy of the test.

[0015] In an optional embodiment of the present application, the light-emitting backplane includes a substrate, a driving circuit layer and a planarization layer stacked in sequence, the driving circuit layer includes the chip driving circuit arranged on the surface of the substrate; the surface of the planarization layer is provided with a light driving pad group electrically connected to the chip driving circuit, each of the light driving pad groups includes a first driving pad and a second driving pad, the positive electrode of the light-emitting chip is welded to the first driving pad, and the negative electrode of the light-emitting chip is welded to the second driving pad.

[0016] In an optional embodiment of the present application, a light-blocking structure is further provided on the planarization layer, and the light-blocking structure forms an illumination cavity around each of the light-emitting chips; the top of the light-blocking structure is fixed to the test substrate. It can be understood that the light-blocking structure provided on the light-emitting backplane forms an illumination cavity around each light-emitting chip, and this design effectively locks in heat. The light-blocking structure not only prevents heat loss, but also enables the heat generated by the light-emitting chip to act more concentratedly on the chip to be tested, thereby improving the heating efficiency and the accuracy of simulating a high-temperature environment.

[0017] In an optional embodiment of the present application, the driving circuit layer also includes the piezoelectric driving circuit arranged on the surface of the substrate, and a piezoelectric driving pad group electrically connected to the piezoelectric driving circuit is arranged on the surface of the flattening layer, and each of the piezoelectric driving pad groups includes a third driving pad and a fourth driving pad; a notch is also provided at the top of the light blocking structure toward each of the illumination cavities, and a piezoelectric cantilever beam is also provided in each of the illumination cavities, and a fixed end of the piezoelectric cantilever beam is fixed on the notch; a first electrode layer is provided on the front surface of the piezoelectric cantilever beam, and a second electrode layer is provided on the back surface of the piezoelectric cantilever beam, the first electrode layer is electrically connected to the third driving pad, and the second electrode layer is electrically connected to the fourth driving pad.

[0018] In an optional embodiment of the present application, the piezoelectric cantilever beam swings when driven by electrical signals from the first electrode layer and the second electrode layer, and the piezoelectric cantilever beam touches the test substrate during the swinging process.

[0019] It can be understood that the design of the piezoelectric cantilever beam has achieved an accurate simulation of the vibration scene. The piezoelectric cantilever beam swings under the drive of the electrical signal and directly touches the test substrate. This mechanical vibration transmission method makes the simulated vibration environment more realistic and direct. Compared with the traditional vibration simulation method, this embodiment has higher simulation accuracy and stronger controllability, and can accurately reproduce various vibration conditions that the car may encounter in actual operation. At the same time, the application of piezoelectric drive technology makes the vibration frequency and amplitude flexible to meet different testing requirements, greatly improving the testing capability and practicality of the automotive semiconductor chip scanning and detection device.

[0020] In an optional embodiment of the present application, the fourth driving pad and the first driving pad are integrally formed; the first driving pad extends along the surface of the planarization layer and the light-blocking structure to the notch surface, and the second electrode layer is welded to the extended part of the first driving pad; a conductive channel connecting the third driving pad and the first electrode layer is formed in the light-blocking structure, and the first electrode layer is welded to the conductive channel via solder.

[0021] In the second aspect, the present application discloses a scanning and detection control method for automotive semiconductor chips, which is applied to the scanning and detection device for automotive semiconductor chips described in any one of the first aspects, and includes step S1 and step S2. Among them, S1, S2, etc. are only step identifiers, and the execution order of the method is not necessarily in the order from small to large numbers. For example, step S2 may be executed first and then step S1, and this application does not limit it.

[0022] S1, placing the chip to be tested in the corresponding chip installation slot to be tested; S2, adjust the working power of the heating unit and / or the vibration unit, input the scanning signal to the test signal input interface again, and receive the test signal output by the test signal output interface, analyze the test signal corresponding to each test chip, and determine whether the test chip is qualified. Beneficial Effects

[0023] The automotive-grade semiconductor chip scanning and detection device provided in this application can scan and detect multiple chips on a car at the same time through an integrated design, avoiding the tediousness of testing each chip one by one and significantly improving the test efficiency. The design of the mounting slot and test pad provided in the automotive-grade semiconductor chip scanning and detection device ensures the precise docking between the chip to be tested and the test circuit, improving the accuracy and stability of the test. In addition, the heating unit and vibration unit integrated on the test substrate of the automotive-grade semiconductor chip scanning and detection device can simulate the extreme temperature and high vibration environment in the actual operation of the car, making the test results closer to the actual usage and improving the accuracy and reliability of the test.

[0024] In order to make the above-mentioned objects, features and advantages of the present application more obvious and understandable, optional embodiments are specifically listed below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 It is a partial cross-sectional structural schematic diagram of a vehicle-grade semiconductor chip scanning and detection device provided by the present application; Figure 2 yes Figure 1 A top view of a scanning and testing device for automotive semiconductor chips is shown; Figure 3 yes Figure 1 A schematic diagram of a heating unit of a scanning and testing device for automotive semiconductor chips is shown; Figure 4 It is a partial cross-sectional structural schematic diagram of another automotive semiconductor chip scanning and detection device provided by the present application; Figure 5 This is a schematic diagram of the partial cross-sectional structure of another automotive-grade semiconductor chip scanning and detection device provided in the present application. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0028] First, as Figure 1 As described above, the present application provides a vehicle-grade semiconductor chip scanning and detection device, which includes a test substrate 11, a test circuit layer 12 and a chip mounting layer 13 which are stacked in sequence.

[0029] The surface of the chip mounting layer 13 facing away from the test circuit layer 12 is provided with at least two chip mounting grooves to be tested, such as Figure 2 The chip mounting layer 13 shown is provided with eight chip mounting grooves to be tested, such as a first chip mounting groove 21 , a second chip mounting groove 22 , a third chip mounting groove 23 , a fourth chip mounting groove 24 , and a fifth chip mounting groove 25 . Figure 1Only the fifth chip-to-be-tested mounting groove 25 is shown.

[0030] Each mounting slot is provided with a test input pad and a test output pad electrically connected to the test circuit layer 12. When the chip to be tested is placed in the chip to be tested mounting slot, the scan test input pin of the chip to be tested just contacts the corresponding test input pad, and the scan test output pin of the chip to be tested just contacts the corresponding test output pad. Figure 2 Taking the fifth chip-to-be-tested mounting slot 25 in FIG. 1 as an example, the slot is provided with 6 test input pads a1-a6 and 4 test output pads b1-b4 electrically connected to the test circuit layer 12. Figure 2 As shown, the chip mounting layer 13 further includes a test signal input interface 14 and a test signal output interface 15 electrically connected to the test circuit layer 12 .

[0031] The test circuit layer 12 includes a test signal guiding circuit arranged on the test substrate 11, which is used to transmit the signal of the test signal input interface 14 to the test input pad of the corresponding chip mounting slot to be tested, and is also used to transmit the signal of the test output pad of the chip mounting slot to the test signal output interface 15.

[0032] like Figure 1 As shown, the surface of the test substrate 11 facing away from the test circuit layer 12 is also arrayed with heating units 31 and vibration units 32, and the sizes of the heating units 31 and vibration units 32 are both smaller than the mounting groove of the chip to be tested. In an optional embodiment of the present application, the heating unit 31 and the vibration unit 32 can be combined into the same unit, such as Figure 3 As shown in the figure, the solid line frame represents the above-mentioned heating unit 31 and / or vibration unit 32, and the dotted line frame represents the corresponding position of the above-mentioned chip mounting groove. It can be seen that each chip mounting groove covers multiple heating units 31 and / or vibration units 32.

[0033] It can be understood that the automotive-grade semiconductor chip scanning and detection device provided in the present application can scan and detect multiple chips on the car at the same time through an integrated design, avoiding the tediousness of testing each chip one by one and significantly improving the test efficiency. The design of the mounting slot and the test pad provided in the automotive-grade semiconductor chip scanning and detection device ensures the precise docking between the chip to be tested and the test circuit, and improves the accuracy and stability of the test. In addition, the heating unit 31 and the vibration unit 32 integrated on the test substrate 11 of the automotive-grade semiconductor chip scanning and detection device can simulate the extreme temperature and high vibration environment in the actual operation of the car, so that the test results are closer to the actual use conditions, and the accuracy and reliability of the test are improved.

[0034] In an optional embodiment of the present application, the automotive-grade semiconductor chip scanning and detection device also includes at least one of the following examples 1 and 2.

[0035] Example 1, each chip mounting slot to be tested on the same chip mounting layer 13 is used to place each automotive-grade semiconductor chip in the same car. This method is suitable for comprehensive testing of all automotive-grade semiconductor chips in a single car. By placing each chip in the same car in the same layer of mounting slots, the performance and reliability test of all chips in the vehicle can be completed at one time. Example 1 can greatly improve the test efficiency and reduce the time and labor costs required for testing each chip one by one. At the same time, since all chips are tested under the same conditions, the consistency and comparability of the test results are ensured, which helps to accurately evaluate the performance of the electronic system of the entire vehicle.

[0036] Example 2: Each chip mounting slot to be tested on the same chip mounting layer 13 is used to place the same chip of different vehicles. This method is suitable for batch testing of the same chip used in different vehicles. By placing the same chips in different vehicles in the same layer of mounting slots, the performance differences of these chips can be quickly compared and analyzed. Example 2 helps to discover possible batch problems or production anomalies, and provides strong support for quality control and troubleshooting. At the same time, batch testing can also reduce testing costs and improve production efficiency.

[0037] In an optional embodiment of the present application, when each chip mounting slot to be tested on the same chip mounting layer 13 is used to place each vehicle-standard semiconductor chip in the same car, the chip mounting layer 13 includes a control chip area, a power semiconductor chip area, a sensor chip area, a communication chip area and a memory chip area. The chip mounting slot to be tested in the control chip area is used to place the control chip to be tested, the chip mounting slot to be tested in the power semiconductor chip area is used to place the power semiconductor chip to be tested, the chip mounting slot to be tested in the sensor chip area is used to place the sensor chip to be tested, the chip mounting slot to be tested in the communication chip area is used to place the communication chip to be tested, and the chip mounting slot to be tested in the memory chip area is used to place the memory chip to be tested.

[0038] It can be understood that in the optional embodiment of the present application, the chip mounting layer 13 is divided into different areas such as control chip, power semiconductor chip, sensor chip, communication chip and memory chip. This design brings many benefits. First, it makes the chip placement more orderly, and the tester can quickly find the chip mounting slot of the corresponding type, which greatly improves the test efficiency. Secondly, through regional division, the confusion of different types of chips is effectively avoided, the accuracy of the test is ensured, and the test errors caused by confusion are reduced. In addition, this design is also convenient for troubleshooting and quality control. When a problem is found in a certain type of chip, the relevant area can be quickly located for targeted analysis and processing. Finally, regional division also helps to optimize the utilization of test resources, avoid waste of resources, and reduce test costs.

[0039] In an optional embodiment of the present application, if Figure 4 As shown, the automotive semiconductor chip scanning and detection device also includes a light-emitting backplane 41 and light-emitting chips arranged in an array on the light-emitting backplane 41, such as Figure 4 The partial diagram shown includes a first light-emitting chip 42, a second light-emitting chip 43, and a third light-emitting chip 44. Each light-emitting chip constitutes the above-mentioned heating unit 31. The light-emitting backplane 41 includes a chip driving circuit. Each light-emitting chip is electrically connected to the chip driving circuit. The chip driving circuit is used to independently drive each light-emitting chip to light up.

[0040] It can be understood that the automotive-grade semiconductor chip scanning and detection device brings significant benefits by integrating the light-emitting backplane 41 and the light-emitting chip as the heating unit 31. The light-emitting chip is lit under the independent drive of the chip driving circuit, which can effectively simulate the high temperature state and provide a real working environment test for the chip to be tested. This design not only simplifies the structure of the heating system, improves the uniformity and accuracy of the heating, but also enhances the flexibility and controllability of the test. At the same time, the independent drive of the light-emitting chip enables the device to flexibly adjust the heating area and temperature as needed, further improving the pertinence and accuracy of the test.

[0041] In the optional embodiment of the present application, continue to refer to Figure 4 The light-emitting backplane 41 includes a substrate 45, a driving circuit layer 46 and a planarization layer 47 stacked in sequence. The driving circuit layer 46 includes a chip driving circuit arranged on the surface of the substrate 45. The surface of the planarization layer 47 is provided with a light driving pad group electrically connected to the chip driving circuit. Each light driving pad group includes a first driving pad and a second driving pad. The positive electrode of the light-emitting chip is welded to the first driving pad, and the negative electrode of the light-emitting chip is welded to the second driving pad. Taking the second light-emitting chip 43 as an example, it can be seen that Figure 4 In the embodiment, the first driving pad 51 is welded to the positive electrode 48 of the second light emitting chip 43 , and the second driving pad 52 is welded to the negative electrode 49 of the second light emitting chip 43 .

[0042] In the optional embodiment of the present application, continue to refer to Figure 4 , a light-blocking structure 60 is also provided on the planarization layer 47, and the light-blocking structure 60 forms an illumination cavity around each light-emitting chip; the top of the light-blocking structure 60 is fixed to the test substrate 11. It can be understood that the light-blocking structure 60 provided on the light-emitting backplane 41 forms an illumination cavity around each light-emitting chip, for example, a first illumination cavity 61 is formed around the first light-emitting chip 42, a second illumination cavity 62 is formed around the second light-emitting chip 43, and a third illumination cavity 63 is formed around the third light-emitting chip 43. This design effectively locks in heat. The light-blocking structure 60 not only prevents the loss of heat, but also enables the heat generated by the light-emitting chip to act more concentratedly on the chip to be tested, thereby improving the heating efficiency and the accuracy of simulating a high-temperature environment.

[0043] In an optional embodiment of the present application, the driving circuit layer 46 further includes a piezoelectric driving circuit disposed on the surface of the substrate 45, and a piezoelectric driving pad group electrically connected to the piezoelectric driving circuit is disposed on the surface of the planarization layer 47, and each piezoelectric driving pad group includes a third driving pad and a fourth driving pad. Taking the second illumination cavity 62 as an example, Figure 4 As shown, the surface of the planarization layer 47 is provided with a third driving pad 71 and a fourth driving pad 72. A notch is also provided at the top of the light-blocking structure 60 toward each illumination cavity. A piezoelectric cantilever beam is also provided in each illumination cavity, and the fixed end of the piezoelectric cantilever beam is fixed on the notch. Taking the second illumination cavity 62 as an example, Figure 4 As shown, a piezoelectric cantilever beam 74 is fixed on the notch 73, a first electrode layer (not shown in the figure) is arranged on the front surface of the piezoelectric cantilever beam 74, and a second electrode layer (not shown in the figure) is arranged on the back surface of the piezoelectric cantilever beam 74, the first electrode layer is electrically connected to the third driving pad 71, and the second electrode layer is electrically connected to the fourth driving pad 72.

[0044] In an optional embodiment of the present application, the piezoelectric cantilever beam swings under the driving of the electrical signals of the first electrode layer and the second electrode layer, and the piezoelectric cantilever beam touches the test substrate 11 during the swinging process.

[0045] It can be understood that the design of the piezoelectric cantilever beam achieves accurate simulation of the vibration scene. The piezoelectric cantilever beam swings under the drive of the electrical signal and directly touches the test substrate 11. This mechanical vibration transmission method makes the simulated vibration environment more real and direct. Compared with the traditional vibration simulation method, this embodiment has higher simulation accuracy and stronger controllability, and can accurately reproduce various vibration conditions that the car may encounter in actual operation. At the same time, the application of piezoelectric drive technology makes the vibration frequency and amplitude flexible to meet different testing requirements, greatly improving the testing capability and practicality of the automotive semiconductor chip scanning and detection device.

[0046] In an optional embodiment of the present application, if Figure 5 As shown, the fourth driving pad 72 and the first driving pad 51 are integrally formed; the first driving pad 51 extends along the surface of the planarization layer 47 and the light-blocking structure 60 to the surface of the notch 73, and the second electrode layer is welded to the extended portion of the first driving pad 51; a conductive channel 80 connecting the third driving pad 71 and the first electrode layer is formed in the light-blocking structure 60, and the first electrode layer is welded to the conductive channel 80 by solder.

[0047] In the second aspect, the present application discloses a method for scanning and detecting automotive semiconductor chips, which is applied to any automotive semiconductor chip scanning and detecting device of the first aspect, and includes step S1 and step S2. Among them, S1, S2, etc. are only step identifiers, and the execution order of the method is not necessarily in the order from small to large numbers. For example, step S2 may be executed first and then step S1, and the present application does not limit this.

[0048] S1, placing the chip to be tested in the corresponding chip installation slot to be tested; S2, adjust the working power of the heating unit 31 and / or the vibration unit 32, input the scanning signal to the test signal input interface 14 again, and receive the test signal output by the test signal output interface 15, analyze the test signal corresponding to each test chip, and determine whether the test chip is qualified.

[0049] The expressions "first", "second", "the first" or "the second" used in various embodiments of the present disclosure may modify various components regardless of order and / or importance, but these expressions do not limit the corresponding components. The above expressions are only configured for the purpose of distinguishing an element from other elements. For example, a first user device and a second user device represent different user devices, although both are user devices. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the present disclosure.

[0050] When one element (e.g., a first element) is referred to as being "(operably or communicatively) coupled" or "(operably or communicatively) coupled to" or "connected to" another element (e.g., a second element), it is understood that the one element is directly connected to the other element or the one element is indirectly connected to the other element via yet another element (e.g., a third element). Conversely, it is understood that when an element (e.g., a first element) is referred to as being "directly connected" or "directly coupled" to another element (the second element), no element (e.g., a third element) is interposed between the two.

[0051] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0052] As used herein, the words "if" and "if" may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0053] The above description is only an optional embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above invention concept. For example, the above features are replaced with the technical features with similar functions disclosed in this application (but not limited to) by each other.

[0054] The above description is only an optional embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A scanning and testing device for automotive semiconductor chips, characterized in that: It includes a test substrate, a test circuit layer and a chip mounting layer which are stacked in sequence; The surface of the chip mounting layer facing away from the test circuit layer is provided with at least two chip mounting grooves to be tested, each of the mounting grooves is provided with a test input pad and a test output pad electrically connected to the test circuit layer, when the chip to be tested is placed in the chip mounting groove, the scan test input pin of the chip to be tested just contacts the corresponding test input pad, and the scan test output pin of the chip to be tested just contacts the corresponding test output pad; the chip mounting layer also includes a test signal input interface and a test signal output interface electrically connected to the test circuit layer; The test circuit layer includes a test signal guiding circuit arranged on the test substrate, which is used to transmit the signal of the test signal input interface to the test input pad of the corresponding chip installation slot to be tested, and is also used to transmit the signal of the test output pad of the chip installation slot to the test signal output interface; A heating unit and a vibration unit are arranged in an array on a surface of the test substrate away from the test circuit layer. The sizes of the heating unit and the vibration unit are both smaller than the mounting groove of the chip to be tested.

2. The automotive grade semiconductor chip scanning and detection device according to claim 1 is characterized in that: The automotive grade semiconductor chip scanning and detection device further includes at least one of the following: Each of the chip mounting slots to be tested on the same chip mounting layer is used to place each automotive-grade semiconductor chip in the same car; Each of the chip-to-be-tested mounting slots on the same chip mounting layer is used to place the same type of chip for different vehicles.

3. The automotive semiconductor chip scanning and detection device according to claim 2 is characterized in that: When the various chip mounting slots to be tested on the same chip mounting layer are used to place various automotive-grade semiconductor chips in the same car, the chip mounting layer includes a control chip area, a power semiconductor chip area, a sensor chip area, a communication chip area and a memory chip area. The chip mounting slot to be tested in the control chip area is used to place the control chip to be tested, the chip mounting slot to be tested in the power semiconductor chip area is used to place the power semiconductor chip to be tested, the chip mounting slot to be tested in the sensor chip area is used to place the sensor chip to be tested, the chip mounting slot to be tested in the communication chip area is used to place the communication chip to be tested, and the chip mounting slot to be tested in the memory chip area is used to place the memory chip to be tested.

4. The automotive semiconductor chip scanning and detection device according to claim 1, characterized in that: The automotive-grade semiconductor chip scanning and detection device also includes a light-emitting backplane and light-emitting chips arranged in an array on the light-emitting backplane, each of the light-emitting chips constitutes the heating unit, the light-emitting backplane includes a chip driving circuit, the light-emitting chips are electrically connected to the chip driving circuit, and the chip driving circuit is used to independently drive each of the light-emitting chips to light up.

5. The automotive grade semiconductor chip scanning and detection device according to claim 4, characterized in that: The light-emitting backplane includes a substrate, a driving circuit layer and a planarization layer stacked in sequence, the driving circuit layer includes the chip driving circuit arranged on the surface of the substrate; the surface of the planarization layer is provided with a light driving pad group electrically connected to the chip driving circuit, each of the light driving pad groups includes a first driving pad and a second driving pad, the positive electrode of the light-emitting chip is welded to the first driving pad, and the negative electrode of the light-emitting chip is welded to the second driving pad.

6. The automotive semiconductor chip scanning and detection device according to claim 5, characterized in that: A light-blocking structure is also provided on the planarization layer, and the light-blocking structure forms an illumination cavity around each of the light-emitting chips; and the top of the light-blocking structure is fixed to the test substrate.

7. The automotive semiconductor chip scanning and detection device according to claim 6, characterized in that: The driving circuit layer further comprises a piezoelectric driving circuit arranged on the surface of the substrate, and a piezoelectric driving pad group electrically connected to the piezoelectric driving circuit is arranged on the surface of the planarization layer, and each of the piezoelectric driving pad groups comprises a third driving pad and a fourth driving pad; A notch is also provided on the top of the light-blocking structure toward each illumination cavity, and a piezoelectric cantilever beam is also provided in each illumination cavity, and a fixed end of the piezoelectric cantilever beam is fixed on the notch; A first electrode layer is disposed on the front surface of the piezoelectric cantilever beam, and a second electrode layer is disposed on the back surface of the piezoelectric cantilever beam. The first electrode layer is electrically connected to the third driving pad, and the second electrode layer is electrically connected to the fourth driving pad.

8. The automotive semiconductor chip scanning and detection device according to claim 7, characterized in that: The piezoelectric cantilever beam swings under the driving of the electrical signals of the first electrode layer and the second electrode layer, and the piezoelectric cantilever beam touches the test substrate during the swinging process.

9. The automotive grade semiconductor chip scanning and detection device according to claim 7, characterized in that: The fourth driving pad and the first driving pad are integrally formed; the first driving pad extends along the surface of the planarization layer and the light-blocking structure to the notch surface, and the second electrode layer is welded to the extended part of the first driving pad; a conductive channel connecting the third driving pad and the first electrode layer is formed in the light-blocking structure, and the first electrode layer is welded to the conductive channel by solder.

10. A method for scanning and detecting a vehicle-grade semiconductor chip, applied to a scanning and detecting device for a vehicle-grade semiconductor chip as claimed in any one of claims 1 to 9, characterized in that: The following steps are involved: S1, placing the chip to be tested in the corresponding chip installation slot to be tested; S2, adjust the working power of the heating unit and / or the vibration unit, input the scanning signal to the test signal input interface again, and receive the test signal output by the test signal output interface, analyze the test signal corresponding to each test chip, and determine whether the test chip is qualified.

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