Voltage build-up rate control circuit and low dropout regulator

Abstract

The invention discloses a voltage build-up rate control circuit and a low dropout regulator, and the circuit comprises a pre-stage signal generator which is used for generating a first output signal; the signal superposition module is used for providing a second output signal according to the first output signal; the sampling capacitor is used for providing pull-up current for the first node according to the establishment rate of the second output signal; the current generator is used for providing pull-down current with a set rate curve for the first node; and the negative feedback regulation module is used for comparing the voltage of the first node with a set reference voltage and providing regulation current for the output end of the signal superposition module according to a comparison result, so that the establishment rate of the second output signal is the same as a rate curve set by the current generator. According to the voltage establishment rate control circuit, the output voltage of various circuit systems can be established according to the determined rate curve, so that the circuit stability can be improved, and the transient response of the circuit can be optimized.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply, and in particular to a voltage establishment rate control circuit and a low voltage drop linear regulator. Background Art

[0002] Low Dropout Regulator (LDO) is widely used in system-on-chip and high-performance power supply scenarios due to its low cost, low noise, high precision and simple peripheral circuits. It can provide stable, low noise and low ripple voltage for the subsequent system. With the rapid development of integrated circuit systems, the position of power management chips in integrated systems is becoming more and more important. The popularity of consumer electronics, wearable devices, automotive electronics and medical equipment has made the use of power management chips more extensive.

[0003] like Figure 1 As shown, the conventional low voltage drop linear regulator 100 mainly includes a reference circuit 110, an error amplifier (Error Amplifier) ​​AMP, a resistor voltage divider network (including feedback resistors R1 and R2), a power transistor MP (enhanced power PMOS tube, enhanced NMOS power tube can also be used here, the corresponding VFB and VREF need to be reversed) and a load (load resistance is RL, output capacitance is CL). Among them, the resistor voltage divider network, error amplifier AMP and power transistor MP constitute the feedback adjustment loop of LDO. When LDO 100 is working, the reference circuit 110 outputs a reference voltage VREF, the error amplifier AMP amplifies the difference between VFB and VREF, changes the gate terminal signal of the power transistor MP, and changes its on-resistance, so as to obtain a stable output voltage VOUT under different power input and load current conditions.

[0004] In LDO applications, the reference voltage VREF generally acts as a voltage reference. Its build-up rate determines the time required for the LDO to start and reach a stable output voltage and affects the LDO's transient response speed to load changes. Therefore, under some application conditions, such as voltage fluctuations in power supply equipment or load switching, it is necessary to control the reference voltage build-up rate curve to ensure that when these changes occur, the output voltage has a small fluctuation amplitude and a fast recovery time, thereby improving the stability of the power supply. However, the reference voltage build-up rate of the prior art is generally fixed, which causes the LDO to be unable to stabilize the output voltage when these changes occur, reducing the stability of the power supply. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a voltage building rate control circuit and a low voltage dropout linear regulator, which can control the output voltage to be built according to a certain rate curve, thereby improving the stability of the circuit and optimizing the transient response of the circuit.

[0006] According to one aspect of the present invention, there is provided a voltage establishment rate control circuit, comprising: a front-stage signal generator for generating a first output signal; a signal superposition module connected to the output end of the front-stage signal generator and providing a second output signal according to the first output signal; a sampling capacitor arranged between the output end of the signal superposition module and a first node and used for providing a pull-up current to the first node according to the establishment rate of the second output signal; a current generator connected to the first node and used for providing a pull-down current to the first node; and a negative feedback regulation module for comparing the voltage of the first node with a set reference voltage and providing a regulation current to the output end of the signal superposition module according to the comparison result, so that the establishment rate of the second output signal is proportional to the pull-down current.

[0007] Optionally, the signal superposition module includes a current limiting resistor, a first end of the current limiting resistor is connected to the output end of the front-stage signal generator, and a second end of the current limiting resistor is used to provide the second output signal.

[0008] Optionally, the negative feedback regulation module includes: a voltage comparison unit, used to compare the voltage of the first node with the reference voltage; and a pull-down transistor, connected to the output end of the signal superposition module and providing the regulation current according to the output of the voltage comparison unit.

[0009] Optionally, the voltage comparison unit is used to control the pull-down transistor to increase the regulation current to reduce the establishment rate of the second output signal when the voltage of the first node is greater than the reference voltage, and to control the pull-down transistor to reduce the regulation current to increase the establishment rate of the second output signal when the voltage of the first node is less than the reference voltage.

[0010] Optionally, when the second input signal is equal to the first input signal, the voltage of the first node is equal to zero, and the comparison unit is further configured to control the pull-down transistor to be turned off when the voltage of the first node is equal to zero.

[0011] Optionally, the voltage comparison unit includes: a first transistor, a control end of the first transistor is connected to the first node; a second transistor, a control end of the second transistor is connected to the reference voltage; a third transistor, a control end and a first end of the third transistor are connected to the second end of the first transistor, and the second end of the third transistor is connected to a reference ground; a fourth transistor, a first end of the fourth transistor is connected to the second end of the second transistor, a control end of the fourth transistor is connected to the control end of the third transistor, and the second end of the fourth transistor is connected to the reference ground; and a tail current source, a first end of the tail current source is connected to the power supply voltage, and a second end of the tail current source is connected to the first ends of the first transistor and the second transistor, wherein a second node connected to the control end of the pull-down transistor is provided between the second transistor and the fourth transistor, and a voltage of the second node is used to control the on and off of the pull-down transistor.

[0012] Optionally, the first transistor and the second transistor are PMOS transistors, and the third transistor, the fourth transistor and the pull-down transistor are NMOS transistors.

[0013] Optionally, the current generator generates the pull-down current as a linear current, and the linear current has at least one slope.

[0014] According to another aspect of the present invention, a low-dropout linear regulator is provided, comprising: a power transistor having a current conduction path coupled between an input voltage and an output voltage; a reference circuit for generating a first reference voltage; the above-mentioned voltage establishment rate control circuit for converting the first reference voltage into a second reference voltage; and an error amplifier for comparing a feedback voltage of the output voltage with the second reference voltage and controlling the gate voltage of the power transistor according to the comparison result.

[0015] In summary, the embodiment of the present invention discloses a voltage establishment rate control circuit, which generates a first output signal according to a pre-stage signal generator through a signal superposition module to obtain a second output signal, and then uses a sampling capacitor to convert the establishment rate of the obtained second output signal into a pull-up current, and then compares the pull-up current with a pull-down current having a set rate curve, and adjusts the establishment rate of the second output signal according to the comparison negative feedback, and finally makes the establishment rate of the second output signal the same as the set rate curve of the pull-down current. Therefore, the circuit disclosed in the present invention can realize the control of the output voltage to establish and start at a constant rate. When applied to a low-dropout linear regulator, it can ensure that the circuit can establish a reference voltage according to a certain rate curve, thereby improving the circuit stability, optimizing the transient response of the circuit, and reducing the output noise and ripple. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0017] Figure 1 A schematic circuit diagram of a conventional low dropout linear regulator is shown.

[0018] Figure 2 FIG. 4 is a schematic circuit diagram of a voltage building rate control circuit according to an embodiment of the present invention.

[0019] Figure 3 FIG. 4 shows a schematic circuit diagram of a low voltage dropout linear regulator according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings.Where possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

[0021] In the specification, it should be noted that similar reference numerals that have been used to represent similar parts in other drawings are used for these elements as much as possible. In the following description, when functions and configurations known to those skilled in the art are not related to the basic configuration of the present disclosure, their detailed description will be omitted. The terms described in the specification should be understood as follows.

[0022] The advantages and features of the present disclosure and their implementation methods will be described through the following embodiments described with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms and should not be interpreted as being limited to the embodiments described herein. Rather, these embodiments are provided to make the present disclosure comprehensive and complete, so as to fully convey the scope of the present disclosure to those skilled in the art. In addition, the present disclosure is limited only by the scope of the claims.

[0023] The shapes, sizes, ratios, angles, and quantities disclosed in the drawings used to describe the embodiments of the present disclosure are merely examples, and the present disclosure is therefore not limited to the illustrated details. Similar reference numerals always represent similar elements. In the following description, when it is determined that a detailed description of a related known function or construction will inevitably obscure the focus of the present disclosure, the detailed description will be omitted.

[0024] As those skilled in the art can fully understand, the features of the various embodiments of the present disclosure can be partially or completely combined or combined with each other, and can interoperate and technically drive each other in various ways. The embodiments of the present disclosure can be performed independently of each other, or can be performed together in a mutually dependent relationship.

[0025] In the present application, a MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first terminal, a second terminal and a control terminal. When the MOS transistor is in the on state, current flows from the first terminal to the second terminal. The first terminal, the second terminal and the control terminal of a PMOS transistor are the source, the drain and the gate, respectively, and the first terminal, the second terminal and the control terminal of an NMOS transistor are the drain, the source and the gate, respectively.

[0026] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0027] Figure 2 FIG. 2 shows a schematic circuit diagram of a voltage build-up rate control circuit 200 according to an embodiment of the present invention. Figure 2 As shown, the voltage establishing rate control circuit 200 of this embodiment includes a front-stage signal generator GEN, a signal superposition module 210 , a sampling capacitor Cs, a current generator 220 and a negative feedback regulation module 230 .

[0028] The pre-stage signal generator GEN is used to output the first output signal OUT1. For example, the establishment rate of the first output signal OUT1 generated by the pre-stage signal generator GEN is uncontrollable. Taking the power management chip as an example, the pre-stage signal generator GEN is, for example, a reference circuit or a bandgap reference circuit in the power management chip, and the first output signal OUT1 is, for example, a reference voltage VREF generated by it.

[0029] The signal superposition module 210 is connected to the output end of the pre-stage signal generator GEN, and is used to provide the second output signal OUT2 according to the first output signal OUT1. For example, the signal superposition module 210 can be implemented by a current limiting resistor R1, a first end of the current limiting resistor R1 is connected to the output end of the pre-stage signal generator GEN, and a second end of the current limiting resistor R1 is used to output the second output signal OUT2. Further, after the first output signal OUT1 is established, the second output signal OUT2 gradually rises following the first output signal OUT1.

[0030] The sampling capacitor Cs is disposed between the signal superposition module 210 and the node A, and is used to provide a pull-up current Ics to the node A according to the establishment rate of the second output signal OUT2. It can be understood that the establishment rate of the second output signal OUT2 is generally defined as a voltage change (e.g., a voltage rise value) per unit time (e.g., 1ns, 1ms, or 1s).

[0031] The current generator 220 is connected to the node A, and is used to provide a pull-down current Is to the node A. For example, the pull-down current Is has a set rate curve. Further, the pull-down current Is is, for example, a linearly increasing current, and the linear current has one or more slopes. For example, when the pull-down current Is has multiple slopes, some of the multiple slopes are different.

[0032] The negative feedback regulation module 230 is used to compare the voltage Va of the node A with the set reference voltage Vb, and provide the regulation current Ictrl to the output end of the signal superposition module 210 according to the comparison result, so that the establishment rate of the second output signal OUT2 is the same as the rate curve set by the current generator 220. For example, the magnitude of the voltage Va of the node A is controlled by the voltage difference between the pull-up current Ics and the pull-down current Is. Further, when the voltage Va is greater than the reference voltage Vb, the regulation current Ictrl increases, thereby reducing the establishment rate of the second output signal OUT2; when the voltage Va is less than the reference voltage Vb, the regulation current Ictrl decreases, thereby increasing the establishment rate of the second output signal OUT2. Through the regulation of the negative feedback loop, the establishment rate of the second output signal OUT2 is finally stabilized at the rate curve set by the linear generator 220.

[0033] Further, the negative feedback regulation module 230 includes a voltage comparison unit 231 and a pull-down transistor M5. The voltage comparison unit 231 is used to compare the voltage Va with the reference voltage Vb. The pull-down transistor M5 is, for example, an NMOS transistor, the drain of the pull-down transistor M5 is connected to the output end of the signal superposition module 210, the gate of the pull-down transistor M5 is connected to the output of the voltage comparison unit 231, the source of the pull-down transistor M5 is connected to the reference ground GND, and the pull-down transistor M5 is used to provide the regulation current Ictrl to the output end of the signal superposition module 210 according to the output of the voltage comparison unit 231.

[0034] Further, the voltage comparison unit 231 includes transistors M1 to M4 and a tail current source 201. Among them, transistors M1 and M2 are, for example, PMOS transistors, transistors M3 and M4 are, for example, NMOS transistors, the gate of transistor M1 is connected to node A to receive the voltage Va, and the gate of transistor M2 is connected to the reference voltage Vb. One end of the tail current source 201 is connected to the power supply voltage VDD, and the other end of the tail current source 201 is connected to the source of transistors M1 and M2. The tail current source 201 is used to provide a bias current Ib to transistors M1 and M2. Transistors M3 and M4 constitute a current mirror load of transistors M1 and M2. For example, the drain and gate of transistor M3 and the gate of transistor M4 are connected to the drain of transistor M1, the drain of transistor M4 is connected to the drain of transistor M2, and a node B connected to the pull-down transistor M5 is provided between transistors M2 and M4, and the sources of transistors M3 and M4 are connected to the reference ground GND.

[0035] In this embodiment, when the second output signal OUT2 has not been established, the voltage difference across the sampling capacitor Cs is 0V, so the node A is pulled down to the reference ground GND by the pull-down current Ics, so the current in the transistor M1 is greater than the current in the transistor M2, which then pulls down the potential of the node B, and the pull-down transistor M5 is in the off state. When the second output signal OUT2 starts to be established following the first output signal OUT1, the voltage difference across the sampling capacitor Cs is equal to the establishment rate of the second output signal OUT2. According to the capacitance formula It can be calculated that the pull-up current is equal to:

[0036]

[0037] in, is the establishment rate of the second output signal OUT2, Cs is the capacitance value of the sampling capacitor, when the establishment rate of the second output signal OUT2 increases, the pull-up current Ics will be greater than the pull-down current Is, then the potential of the node A is pulled up, when the voltage Va is greater than the reference voltage Vb, the current in the transistor M1 is less than the current in the transistor M2, then the potential of the node B increases, and then the conduction degree of the pull-down transistor M5 increases, that is, the regulating current Ictrl increases, and the establishment rate of the second output signal OUT2 is reduced by the pull-down effect of the pull-down transistor M5. Similarly, when the establishment rate of the second output signal OUT2 is reduced to the point where the pull-up current Ics is less than the pull-down current Is, the potential of the node A is pulled down, thereby reducing the potential of the node B, and the current Ictrl in the pull-down transistor M5 decreases, and then the establishment rate of the second output signal OUT2 increases. Through the control of the loop, the pull-up current Ics and the pull-down current Is can be made equal during the establishment of the second output signal OUT2, that is, the establishment rate of the second output signal OUT2 is the same as the rate curve set by the current generator 220.

[0038] Furthermore, when the voltage value of the second output signal OUT2 is equal to the voltage value of the first output signal OUT1, the voltage establishment process of the second output signal OUT2 has ended, and the establishment rate of the second output signal OUT2 is reduced to zero, so that the potential of the node B is pulled down to the reference ground GND again, and then the pull-down transistor M5 is turned off. Therefore, the voltage establishment rate control circuit 200 of this embodiment will not affect the stability of the original system.

[0039] Figure 3 FIG. 4 shows an application example of a voltage establishment rate control circuit according to an embodiment of the present invention. Figure 3 As shown, the voltage establishment rate control circuit 200 can be applied to a low voltage dropout linear regulator 300, so that the obtained reference voltage can be established according to a set rate curve, thereby controlling the start-up time of the low voltage dropout linear regulator 300 and improving the stability of the circuit. It should be noted that the present invention is not limited to this, and the voltage establishment rate control circuit provided by the present invention can also be applied to other types of circuits including power management chips, and the power management chip can be a DC-DC converter or an AC-DC converter of various topological structures.

[0040] refer to Figure 3 The low dropout linear regulator 300 includes a power transistor MP, an error amplifier AMP, a reference circuit 310 , a resistor divider network, a load (the load resistor is RL, the output capacitor is CL), and a voltage establishment rate control circuit 200 .

[0041] The power transistor MP is the main output transistor of the chip, and has a current conduction path and a control terminal coupled between the input voltage VIN and the output voltage VOUT. For example, the power transistor MP is a PMOS transistor, the source of the power transistor MP is coupled to the input voltage VIN, and the drain of the power transistor MP is used to provide the output voltage VOUT to the subsequent load. In other embodiments, the power transistor MP may also be other types of transistors, such as NMOS transistors, NPN Darlington transistors, and NPN bipolar transistors.

[0042] The reference circuit 210 is used to generate a first reference voltage VREF1, and the voltage establishment rate control circuit 200 is connected to the reference circuit 210, and is used to shape the first reference voltage VREF1 to generate a second reference voltage VREF2 established according to a set rate curve. The resistor divider network composed of resistors R1 and R2 is coupled between the output terminal of the output voltage VOUT and the ground, and is used to obtain a feedback voltage VFB after dividing the output voltage VOUT, that is, the node between resistors R1 and R2 provides the feedback voltage VFB. The positive input terminal of the error amplifier AMP is used to receive the feedback voltage VFB, and the inverting input terminal of the error amplifier AMP is used to receive the second reference voltage VREF2. The output terminal of the error amplifier AMP is connected to the gate of the power transistor MP. The error amplifier AMP is used to compare the feedback voltage VFB with the second reference voltage VREF2, and to control the gate-source voltage of the power transistor MP by amplifying the difference between the two, so as to stabilize the output voltage VOUT at a set value. Although Figure 3 The embodiment shown in the figure adopts an error amplifier AMP, but those skilled in the art will appreciate that other suitable analog or digital circuits are also applicable as long as the error amplification function can be achieved.

[0043] In summary, the embodiment of the present invention discloses a voltage establishment rate control circuit, which generates a first output signal according to a pre-stage signal generator through a signal superposition module to obtain a second output signal, and then uses a sampling capacitor to convert the establishment rate of the obtained second output signal into a pull-up current, and then compares the pull-up current with a pull-down current having a set rate curve, and adjusts the establishment rate of the second output signal according to the comparison negative feedback, and finally makes the establishment rate of the second output signal the same as the set rate curve of the pull-down current. Therefore, the circuit disclosed in the present invention can realize the control of the output voltage to establish and start at a constant rate. When applied to a low-dropout linear regulator, it can ensure that the circuit can establish a reference voltage according to a certain rate curve, thereby improving the circuit stability, optimizing the transient response of the circuit, and reducing the output noise and ripple.

[0044] Furthermore, the voltage establishment rate control circuit disclosed in the present invention can realize adaptive switching. When the voltage value of the second output signal is equal to the voltage value of the first output signal, the voltage establishment rate control circuit can be automatically closed without affecting the operation of the original system. In addition, the voltage establishment rate control circuit of the present invention does not need to improve the structure of the front-stage signal generator, so it will not affect the stability of the overall system and can be widely loaded in various systems.

[0045] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0046] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present invention, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present invention.

Claims

1. A voltage build-up rate control circuit, comprising: A front-stage signal generator, used for generating a first output signal; A signal superposition module, connected to the output end of the preceding signal generator, and providing a second output signal according to the first output signal; a sampling capacitor, disposed between the output end of the signal superposition module and the first node, and configured to provide a pull-up current to the first node according to a build-up rate of the second output signal; a current generator, connected to the first node, and configured to provide a pull-down current to the first node; as well as A negative feedback regulation module is used to compare the voltage of the first node with a set reference voltage, and provide a regulation current to the output end of the signal superposition module according to the comparison result, so that the establishment rate of the second output signal is proportional to the pull-down current.

2. The voltage establishing rate control circuit according to claim 1, wherein: The signal superposition module comprises a current limiting resistor, a first end of the current limiting resistor is connected to the output end of the front-stage signal generator, and a second end of the current limiting resistor is used to provide the second output signal.

3. The voltage establishing rate control circuit according to claim 1, wherein: The negative feedback regulation module comprises: a voltage comparison unit, configured to compare the voltage of the first node with the reference voltage; and A pull-down transistor is connected to the output end of the signal superposition module and provides the regulating current according to the output of the voltage comparison unit.

4. The voltage establishing rate control circuit according to claim 3, wherein: The voltage comparison unit is used to control the pull-down transistor to increase the regulation current so as to reduce the establishment rate of the second output signal when the voltage of the first node is greater than the reference voltage, and to control the pull-down transistor to reduce the regulation current so as to increase the establishment rate of the second output signal when the voltage of the first node is less than the reference voltage.

5. The voltage establishing rate control circuit according to claim 4, wherein: When the second input signal is equal to the first input signal, the voltage of the first node is equal to zero, and the voltage comparison unit is further used to control the pull-down transistor to be turned off when the voltage of the first node is equal to zero.

6. The voltage establishing rate control circuit according to claim 5, wherein: The voltage comparison unit comprises: a first transistor, wherein a control terminal of the first transistor is connected to the first node; a second transistor, wherein a control terminal of the second transistor is connected to the reference voltage; a third transistor, wherein the control terminal and the first terminal of the third transistor are connected to the second terminal of the first transistor, and the second terminal of the third transistor is connected to a reference ground; a fourth transistor, a first terminal of the fourth transistor being connected to the second terminal of the second transistor, a control terminal of the fourth transistor being connected to the control terminal of the third transistor, and a second terminal of the fourth transistor being connected to the reference ground; and a tail current source, wherein a first end of the tail current source is connected to a power supply voltage, and a second end of the tail current source is connected to first ends of the first transistor and the second transistor, There is a second node connected to the control end of the pull-down transistor between the second transistor and the fourth transistor, and the voltage of the second node is used to control the on and off of the pull-down transistor.

7. The voltage establishing rate control circuit according to claim 6, wherein: The first transistor and the second transistor are PMOS transistors, and the third transistor, the fourth transistor and the pull-down transistor are NMOS transistors.

8. The voltage establishing rate control circuit according to claim 1, wherein: The current generator generates the pull-down current as a linear current, and the linear current has at least one slope.

9. A low voltage dropout linear regulator, comprising: a power transistor having a current conduction path coupled between an input voltage and an output voltage; A reference circuit, configured to generate a first reference voltage; The voltage establishing rate control circuit according to any one of claims 1 to 8, configured to convert the first reference voltage into a second reference voltage; as well as An error amplifier is used to compare the feedback voltage of the output voltage with the second reference voltage, and control the gate voltage of the power transistor according to the comparison result.

Images