Resource application method and system based on multi-core network chip, and medium

Abstract

The invention discloses a resource application method and system based on a multi-core network chip and a medium. Relates to the technical field of network resource allocation. A flow control unit FCU adds messages belonging to the same data stream into a linked list of the CQID, constructs a linked list node based on the messages meeting an aggregation condition, and allocates an independent OEID by taking the node of the CQID linked list as a scheduling unit; each network processor NP performs serial order-preserving execution by adding concurrent resource application API commands of each network processor NP into a flow control unit FCU according to a global memory resource with a size required by dynamic application, and after MMU memory resource application succeeds, each network processor NP concurrently executes a subsequent flow of each network processor NP after REBIND operation is performed, so that the subsequent flow of each network processor NP is completed. The problems that message receiving and forwarding of the same data stream are executed according to the same sequence, and deadlock occurs to multiple network processors NP and an application global memory resource pool are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of network resource allocation, and in particular to a resource application method, system and medium based on a multi-core network chip. Background Art

[0002] As Internet technology has gone through multiple stages of development, network bandwidth and business connections have increased dramatically, and the construction of large data centers, cloud services and high-performance computing environments has urgently required higher-speed, lower-latency network chips. However, the growth rate of single-core performance cannot meet the performance requirements of network chips. To improve data processing efficiency and reduce data processing latency, multi-core concurrent processing network chip solutions have emerged.

[0003] In the solution of multi-core concurrent processing network chip, each core is a network processor (Network Processor), referred to as NP; NP is responsible for parsing, identifying, editing, modifying, discarding or forwarding the received data packets. The network data packets received by the network chip will be temporarily stored in the memory management unit (Memory Management Unit), referred to as MMU. After the message is sent out of the network chip, the storage resources of the message will be released. Since there is a requirement for the order of sending the message, there is also a sequence in the release of the message resources. In the message processing logic of NP, not only the original message needs to be edited and modified, but there may also be a need to copy a new message. For example, in scenarios such as message fragmentation, message segmentation, message tunnel encapsulation, and message data encryption / decryption, there will be a need for NP to apply for memory resources from MMU.

[0004] When multiple NPs process data stream messages concurrently, there may be competition for the application and use of global resources on the chip. For example, timers, MMU memory resources for storing messages, global locks, user configuration information and other resources cannot be monopolized by a single NP when multiple NPs are running concurrently. In the face of competing for limited global resources in the chip, the efficiency of each NP's successful application may be affected, seriously affecting the performance of the network chip, and even causing the risk of deadlock or low global resource utilization. Technical problems.

[0005] Therefore, when processing large-scale data transmission, how to take advantage of multi-core concurrent processing while avoiding various problems caused by global resource application and release operations has become an important direction that requires continuous attention and improvement in network chip design and use. Summary of the invention

[0006] The technical problem to be solved by the present invention is: when processing large-scale data transmission, how to utilize the advantages of multi-core concurrent processing while avoiding the problems of locks, poor performance and low resource utilization caused by the application and release operations of global resources; the purpose of the present invention is to provide a resource application method, system and medium based on a multi-core network chip, and in the resource application process, improve the method, through the data interaction between the process control unit FCU, MMU and the network processor NP, to achieve the reasonable allocation of network processor NP resources, solve the problem that the message reception and forwarding of the same data stream are executed in the same order, and the deadlock of multiple NPs and the application of the global memory resource pool occurs, while improving the use efficiency and application success rate of the global resource pool, and reducing the rate of multiple NPs and the application of global memory resources.

[0007] The present invention is implemented through the following technical solution: This solution provides a resource application method based on a multi-core network chip, including:

[0008] Acquire and store message data;

[0009] Pushing message data to the process control unit FCU, the process control unit FCU allocates an idle network processor NP for the message data, and updates the idle network processor NP to a busy state, the network processor NP in the busy state builds a CQID linked list based on the message data, and aggregates the message data into the CQID linked list;

[0010] Assign an independent virtual thread OEID to each node in the CQID linked list, and construct a queue for the virtual thread OEID according to the order of each node in the CQID linked list to obtain an FQID linked list;

[0011] The network processor NP parses the aggregated message data, and determines whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command for applying for MMU memory resources to the process control unit FCU;

[0012] After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

[0013] Working principle of this solution: When processing large-scale data transmission, how to take advantage of multi-core concurrent processing while avoiding the problems of locks, poor performance, and low resource utilization caused by the application and release operations of global resources; This solution provides a resource application method, system, and medium based on multi-core network chips, and uses global resources as a resource pool. The process control unit FCU adds the messages belonging to the same data stream to the linked list of the same CQID, and combines the messages that meet the aggregation conditions into a linked list node. The process control unit FCU uses the nodes of the CQID linked list as scheduling units and assigns them independent OEIDs. Each concurrently running network processor NP can dynamically apply for global memory resources of the required size according to business needs, by adding the concurrent resource application API commands of each network processor NP to the process control unit FCU, which is then executed serially and in order by the process control unit FCU. After successfully applying for MMU memory resources and performing a REBIND operation, each network processor NP concurrently executes the subsequent processes of its own network processor NP. This method and system solves the problem that message reception and forwarding of the same data stream are executed in the same order, and also solves the problem of deadlock in multiple network processors NP and application of a global memory resource pool, and improves the use efficiency and application success rate of the global resource pool, and also reduces the rate of multiple network processors NP and application of global memory resources, giving full play to the performance advantages of multi-core concurrent processing and ensuring the orderly transmission of messages.

[0014] A further optimization scheme is that the method further comprises:

[0015] When the network processor NP fails to apply for MMU memory resources from the process control unit FCU, the network processor NP in a blocked waiting state continues to repeatedly apply for MMU memory resources from the process control unit FCU until the application for MMU memory resources from the process control unit FCU succeeds;

[0016] After the process control unit FCU executes all API commands in the OEID queue in serial order, it returns the execution result to the network processor NP which is in the blocked waiting state.

[0017] A further optimization scheme is that the process control unit FCU executes all API commands in the OEID queue in serial order, including the method:

[0018] The process control unit FCU only executes the API command in the first OEID node in the FQID list;

[0019] After the process control unit FCU executes all API commands under the first OEID node in the FQID chain list, it removes the OEID node from the FQID chain list;

[0020] The process control unit FCU unlinks all OEID nodes in the same FQID linked list in serial order, and the API commands of each OEID node in the same FQID linked list are executed in order.

[0021] A further optimization plan is that after the network processor NP successfully applies for MMU memory resources from the process control unit FCU, the current network processor NP performs a REBIND operation to remove the OEID queue associated with the current network processor NP from the first node of the current FQID linked list and add it to the tail node of the next FQID linked list, so that the OEID queue sequence of the second node of the current FQID linked list becomes the first node.

[0022] A further optimization scheme is that the method of pushing message data to the process control unit FCU includes:

[0023] Obtain the storage address of the message data, carry the storage address of the message data and notify the process control unit FCU of the arrival of the message data.

[0024] A further optimization scheme is that the network processor NP constructs a CQID linked list based on the message data, including the method:

[0025] The network processor NP parses the message data, extracts characteristic information belonging to the same data flow in the message data, calculates the CQID based on the characteristic information, and constructs a CQID linked list.

[0026] A further optimization solution is that when there is a need to apply for MMU memory resources, during the process in which the network processor NP sends an API command to the process control unit FCU to apply for MMU memory resources, when the rate at which the multi-core network chip processes message data reaches a threshold V, multiple network processors NP will be awakened to concurrently process message data of the same data stream; each network processor NP runs concurrently and sends an API command to the process control unit FCU to apply for MMU memory resources.

[0027] A further optimization scheme is that, when the network processor NP does not apply for MMU memory resource requirements, the network processor NP performs a REBIND operation, removes the OEID associated with the network processor NP from the first node of the current FQID linked list, and adds it to the tail node of the next FQID linked list.

[0028] This solution also provides a resource application system based on a multi-core network chip, which is used to implement the above-mentioned resource application method based on a multi-core network chip. The system includes:

[0029] The MMU module acquires and stores message data; the MMU module pushes message data to the process control unit FCU;

[0030] The process control unit FCU is used to allocate an idle network processor NP to the message data; and update the idle network processor NP to a busy state;

[0031] The network processor NP is used to construct a CQID linked list based on the message data, and aggregate the message data into the CQID linked list;

[0032] The process control unit FCU is also used to allocate an independent virtual thread OEID to each node of the CQID linked list, and construct a queue of the virtual thread OEID according to the order of each node in the CQID linked list to obtain the FQID linked list;

[0033] The network processor NP is also used to parse the aggregated message data, and determine whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command to apply for MMU memory resources to the process control unit FCU;

[0034] After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

[0035] The present solution provides a computer-readable medium on which a computer program is stored. The computer program is executed by a processor to implement the resource application method based on a multi-core network chip as described above.

[0036] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0037] The resource application method, system and medium based on a multi-core network chip provided by the present invention regard global resources as a resource pool. The process control unit FCU adds messages belonging to the same data stream into a linked list of the same CQID, and combines messages that meet the aggregation conditions into a linked list node. The process control unit FCU uses the node of the CQID linked list as a scheduling unit and allocates an independent OEID to it. Each concurrently running network processor NP can dynamically apply for the required size of global memory resources according to business needs. By adding the concurrent resource application API commands of each network processor NP to the process control unit FCU, Then, the process control unit FCU executes the process in serial order, and after successfully applying for MMU memory resources and performing REBIND operation, each network processor NP concurrently executes the subsequent process of its own network processor NP. This method and system solves the problem that the message reception and forwarding of the same data stream are executed in the same order, and also solves the problem of deadlock in multiple network processors NP and the application of the global memory resource pool, and improves the utilization efficiency and application success rate of the global resource pool, while reducing the rate of multiple network processors NP and the application of global memory resources, giving full play to the performance advantages of multi-core concurrent processing, and ensuring the orderly transmission of message data. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other relevant drawings can be obtained based on these drawings without creative work. In the drawings:

[0039] Figure 1 This is a schematic diagram of the resource application principle based on a multi-core network chip;

[0040] Figure 2 Schematic diagram of the process of applying for memory resources;

[0041] Figure 3 This is a schematic diagram of the CQID linked list structure;

[0042] Figure 4 This is a schematic diagram of the FQID linked list structure;

[0043] Figure 5 The flowchart of the network processor NP processing the message group. DETAILED DESCRIPTION

[0044] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention.

[0045] In order to reduce the reliance on shared global resources when multiple network processors NP are running concurrently, a common solution is: before each network processor NP applies for the use of global resources, it first issues a request for a global mutex lock, blocks and waits for the global mutex lock to be successfully applied for, then applies for global resources, releases the global resources after using them, and finally releases the global mutex lock to achieve the shared and synchronous use of global resources among multiple NPs. The advantage of this solution is that the implementation logic is clear and simple, but there is an obvious defect that it needs to block and wait for the global mutex lock to be successfully applied for before applying for global resources, which will eventually lead to the phenomenon that it takes too long to apply for global resources when multiple network processors NP are running concurrently to process high-traffic services. This phenomenon will determine the bottleneck of the network chip's message throughput performance in the application of network chips, so this solution is only used for the path of sending synchronous configuration information. Another solution: divide the global resources into modules, and allocate a whole global resource to each network processor NP for independent access and use according to business needs. In this way, it is possible to avoid multiple network processors NP from competing for the same part of the global resources, and each network processor NP can enjoy a part of the global resources exclusively. The advantage of this solution is that it can quickly access the global resources that are applied for exclusive use, and multiple network processors NP run concurrently without interfering with each other, which can meet the performance requirements of the network chip for the release of global resource applications. It is suitable for the scenario where the network chip stores the same network configuration information in each NP exclusive global resource. However, this solution may not be suitable for scenarios where the number of global resources is small, the value is expensive, the physical space is large, and the network processor NP cannot be dynamically allocated during use. In view of this, this solution provides the following embodiments to solve the above technical problems:

[0046] Example 1

[0047] This embodiment provides a resource application method based on a multi-core network chip, such as Figure 1 and Figure 2 As shown, including:

[0048] Acquire and store message data;

[0049] Pushing message data to the process control unit FCU, the process control unit FCU allocates an idle network processor NP for the message data, and updates the idle network processor NP to a busy state, the network processor NP in the busy state builds a CQID linked list based on the message data, and aggregates the message data into the CQID linked list;

[0050] Assign an independent virtual thread OEID to each node in the CQID linked list, and construct a queue of the virtual thread OEIDs according to the order of the nodes in the CQID linked list to obtain an FQID linked list; the FQID linked list is as follows: Figure 3 As shown;

[0051] The network processor NP parses the aggregated message data, and determines whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command for applying for MMU memory resources to the process control unit FCU;

[0052] After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

[0053] After the message enters the network chip, it will be stored in the MMU module, and its storage address is the packet pointer (Packet ptr), referred to as PPTR; the MMU carries the PPTR to notify the process control unit FCU that the message has arrived; the process control unit FCU schedules the network processor NP to the MMU module; the MMU copies part of the message data in the message specified by PPTR and pushes it to the network processor NP assigned by the process control unit FCU; after the network processor NP is awakened, it parses the message information pushed by the MMU, extracts the feature information (7-tuple) that the message belongs to the same data flow, and then calculates the CQID, and finally aggregates the message into the linked list of the calculated CQID. The message format is as follows Figure 2 As shown; the process control unit FCU allocates an independent virtual thread ID number, referred to as OEID, to each node in the CQID linked list, and adds the OEID to the FQID linked list in the order of each node in the CQID linked list. The structure is as follows Figure 4As shown, one of the functions of OEID is to wait for the awakened network processor NP to send the API that needs to be preserved in order to the FCU, and add it to the queue under OEID, which includes the API that the network processor NP uses to apply for MMU memory resources by sending it to the process control unit FCU, and then schedules NP to parse the aggregated message group; after the network processor NP is awakened, it parses the first message in the message group, and determines whether there is a need to apply for MMU memory resources according to the functional module. In the scenario where there is a need to apply for MMU memory resources, the network processor NP first sends an API to apply for MMU memory resources to the FCU. When the network chip processes messages at a certain threshold, it will wake up multiple network processor NP cores to concurrently process messages of the same data stream. Each network processor NP runs concurrently and can send an API to apply for MMU memory resources to the process control unit at the same time. FCU module, the process control unit FCU does not execute immediately when receiving the API for applying for MMU memory resources from the network processor NP, but adds the API to the queue for sending the OEID corresponding to each network processor NP. When the OEID is arranged to the first node of the FQID linked list, all APIs in the OEID queue begin to be executed serially by the FCU module; after the process control unit FCU executes the API for applying for MMU memory resources, it returns the information of the memory resource application status to the network processor NP in the blocked waiting state; the network processor NP continues to run according to the result of returning the memory resource application status, and when the memory resource application fails, it continues to repeatedly send the MMU memory resource application API to the FCU, and then blocks and waits for the FCU to execute and return the information of the memory resource application status until the MMU memory resource application is successful;

[0054] The process control unit FCU strictly follows the following rules when scheduling and executing the API commands in the OEID node in the FQID linked list:

[0055] The process control unit FCU only executes the API command in the first OEID node in the FQID list;

[0056] The process control unit FCU blocks and executes all API commands under the first OEID node in the FQID linked list. After the execution is completed, the OEID node is removed from the FQID linked list.

[0057] The process control unit FCU serially delinks all OEID nodes of the same FQID linked list, and the API commands of each OEID node in the same FQID linked list are executed in order;

[0058] The process control unit FCU concurrently unlinks the first OEID node of different FQID linked lists, and the API commands of the OEID nodes in different FQID linked lists are not executed in order.

[0059] After the network processor NP successfully applies for MMU memory resources in a cyclic blocking wait, it indicates that the OEID associated with the network processor NP is at the first node of the FQID linked list. At this time, the network processor NP performs a REBIND operation to remove the OEID associated with the network processor NP from the first node of the current FQIDx linked list and add it to the tail node of the FQIDy linked list, so that the OEID sequence of the second node of the original FQIDx linked list becomes the first OEID node of the FQIDx linked list, and the API stored in its queue is executed by the FCU; each network processor NP, after blocking and waiting for the process control unit FCU to return the status information of executing the API command, From the macro perspective of the chip, each network processor NP is in a concurrent operation state, and each executes the subsequent message processing logic flow in sequence; in the scenario where there is no need to apply for MMU memory resources, in order to achieve the function of preserving the order of the message group belonging to the same data stream entering the same FQID, it is also necessary to perform a REBIND operation, remove the OEID associated with the network processor NP from the first node of the FQIDx linked list and add it to the tail node of the FQIDy linked list; after the network processor NP edits and forwards the message, the MMU memory resources that have been successfully applied are released, and the network processor NP and its associated corresponding OEID resources are released. The flowchart of the network processor NP processing the message group is as follows Figure 5 shown.

[0060] Example 2

[0061] This embodiment provides a resource application system based on a multi-core network chip, which is used to implement the resource application method based on a multi-core network chip described in Example 1. The system includes:

[0062] The MMU module acquires and stores message data; the MMU module pushes message data to the process control unit FCU;

[0063] The process control unit FCU is used to allocate an idle network processor NP to the message data; and update the idle network processor NP to a busy state;

[0064] The network processor NP is used to construct a CQID linked list based on the message data, and aggregate the message data into the CQID linked list;

[0065] The process control unit FCU is also used to allocate an independent virtual thread OEID to each node of the CQID linked list, and construct a queue of the virtual thread OEID according to the order of each node in the CQID linked list to obtain the FQID linked list;

[0066] The network processor NP is also used to parse the aggregated message data, and determine whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command to apply for MMU memory resources to the process control unit FCU;

[0067] After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

[0068] Example 2

[0069] This embodiment provides a computer-readable medium on which a computer program is stored. The computer program is executed by a processor to implement the resource application method based on a multi-core network chip as described in Example 1.

[0070] Example 3

[0071] This embodiment provides the following implementation case, where the value of n can be 63, and when the network chip processes data traffic at full speed, up to 64 network processors NP run concurrently at the same time. Figure 1As shown in the figure, when the network processor NP0 processes a message, it needs to apply for 5 units of memory resources from the MMU, when the network processor NP1 processes a message, it needs to apply for 8 units of memory resources from the MMU, and when the network processor NPn processes a message, it needs to apply for 6 units of memory resources from the MMU. These n+1 network processors NP run concurrently and send a total of 19 units of memory resources to the process control unit FCU, but there are only 16 units of memory resources in the MMU resource pool of the chip system. If the resource allocation management is not appropriate, deadlock may occur. This solution is based on the compliance criteria of the process control unit FCU in the system, integrates the operation of applying for memory resources from the MMU into the scheduling and execution module of the process control unit FCU, and implements the requirements of multiple network processors NP to concurrently apply for MMU memory resources based on the order preservation mechanism of the FCU module to execute the corresponding serially in the OEID order. When the network processor NP receives the result of the successful application for MMU memory resources, it executes the REBIND operation, removes the first node OEID of the linked list at the current FQID and adds it to the tail of the linked list of the FQID of the REBIND linked list, and transfers the execution right of the process control unit FCU to the next linked list OEID node of the original FQID, so that each network processor NP can continue to concurrently run the API commands and instructions of the non-process control unit FCU ; All OEID nodes on the entire FQID execute the REBIND operation in order, and all OEID0, OEID1, and OEIDn will enter the new FQID in order. Since the API command of the NP to send the message is after the API order of applying for MMU memory resources in the OEID queue, the API command of the network processor NP to send the message will be executed in the order of OEID in the new FQID after the network processor NP executes the REBIND operation, so that the message groups processed by each network processor NP are sent out of the network chip in the order of OEID in the FQID, and the message groups of the same data stream are sent out of the network chip in the order of entering the network chip. Finally, each network processor NP releases the MMU memory resources that have been applied for.

[0072] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A resource application method based on a multi-core network chip, characterized in that: include: Acquire and store message data; Pushing message data to the process control unit FCU, the process control unit FCU allocates an idle network processor NP for the message data, and updates the idle network processor NP to a busy state, the network processor NP in the busy state builds a CQID linked list based on the message data, and aggregates the message data into the CQID linked list; Assign an independent virtual thread OEID to each node in the CQID linked list, and construct a queue for the virtual thread OEID according to the order of each node in the CQID linked list to obtain an FQID linked list; The network processor NP parses the aggregated message data, and determines whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command for applying for MMU memory resources to the process control unit FCU; After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

2. The resource application method based on a multi-core network chip according to claim 1, characterized in that: Also includes: When the network processor NP fails to apply for MMU memory resources from the process control unit FCU, the network processor NP in a blocked waiting state continues to repeatedly apply for MMU memory resources from the process control unit FCU until the application for MMU memory resources from the process control unit FCU succeeds; After the process control unit FCU executes all API commands in the OEID queue in serial order, it returns the execution result to the network processor NP which is in the blocked waiting state.

3. The resource application method based on a multi-core network chip according to claim 2, characterized in that: The process control unit FCU executes all API commands in the OEID queue in serial order, including the following method: The process control unit FCU only executes the API command in the first OEID node in the FQID list; After the process control unit FCU executes all API commands under the first OEID node in the FQID chain list, it removes the OEID node from the FQID chain list; The process control unit FCU unlinks all OEID nodes in the same FQID linked list in serial order, and the API commands of each OEID node in the same FQID linked list are executed in order.

4. The resource application method based on a multi-core network chip according to claim 2, characterized in that: After the network processor NP successfully applies for MMU memory resources from the process control unit FCU, the current network processor NP performs a REBIND operation to remove the OEID queue associated with the current network processor NP from the first node of the current FQID linked list and add it to the tail node of the next FQID linked list, so that the OEID queue sequence of the second node of the current FQID linked list becomes the first node.

5. The resource application method based on a multi-core network chip according to claim 2, characterized in that: The method of pushing message data to the process control unit FCU includes: Obtain the storage address of the message data, carry the storage address of the message data and notify the process control unit FCU of the arrival of the message data.

6. The resource application method based on a multi-core network chip according to claim 5, characterized in that: The network processor NP constructs a CQID linked list based on the message data, including a method: The network processor NP parses the message data, extracts characteristic information belonging to the same data flow in the message data, calculates the CQID based on the characteristic information, and constructs a CQID linked list.

7. The resource application method based on a multi-core network chip according to claim 1, characterized in that: When there is a need to apply for MMU memory resources, the network processor NP sends an API command to the process control unit FCU to apply for MMU memory resources. When the rate at which the multi-core network chip processes message data reaches the threshold V, multiple network processors NP will be awakened to concurrently process the message data of the same data stream; each network processor NP runs concurrently and sends an API command to the process control unit FCU to apply for MMU memory resources at the same time.

8. The resource application method based on a multi-core network chip according to claim 2, characterized in that: When the network processor NP does not apply for MMU memory resource requirements, the network processor NP also performs a requeue operation: after removing the OEID associated with the network processor NP from the first node of the current FQID linked list, it is added to the tail node of the next FQID linked list.

9. The resource application system based on multi-core network chips is characterized by: A system for implementing the resource application method based on a multi-core network chip according to any one of claims 1 to 8, comprising: The MMU module acquires and stores message data; the MMU module pushes message data to the process control unit FCU; The process control unit FCU is used to allocate the network processor NP to the message data; The network processor NP is used to construct a CQID linked list based on the message data, and aggregate the message data into the CQID linked list; The process control unit FCU is also used to allocate an independent virtual thread OEID to each node of the CQID linked list, and construct a queue of the virtual thread OEID according to the order of each node in the CQID linked list to obtain the FQID linked list; The network processor NP is also used to parse the aggregated message data, and determine whether there is a need to apply for MMU memory resources according to the parsed data. If there is a need to apply for MMU memory resources, the network processor NP sends an API command to apply for MMU memory resources to the process control unit FCU; After the process control unit FCU receives the API command for applying for MMU memory resources, it adds the API command to the OEID queue corresponding to the network processor NP. When the current OEID queue is arranged at the first node of the FQID linked list, the process control unit FCU starts to execute all APIs in the current OEID queue in serial order.

10. A computer readable medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement the resource application method based on a multi-core network chip as described in any one of claims 1 to 8.

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