A frequency compensation circuit, frequency compensation phase-locked loop and chip of a voltage-controlled oscillator

Abstract

The invention discloses a frequency compensation circuit, a frequency compensation phase-locked loop and a chip of a voltage-controlled oscillator. The invention performs voltage compensation by increasing the effective capacitance value of a first capacitor in the voltage-controlled oscillator. Thus, when the ambient temperature rises, the voltage at both ends of the first capacitor can be reduced on the basis of keeping the charge amount unchanged by increasing the effective capacitance value of the first capacitor, thereby keeping the output voltage of the voltage-controlled oscillator unchanged. Thus, through the above-mentioned design, it can be ensured that the current between two MOS tubes in the charge pump is nearly equal, thereby reducing the periodic jitter introduced by the need to increase the output voltage of a low-pass filter due to temperature changes. At the same time, the invention does not need to increase the VC value to adjust the output frequency of the voltage-controlled oscillator, therefore, it can solve the problem of PLL loss of lock due to temperature changes in the traditional technology. Therefore, the invention is very suitable for large-scale application and promotion.

Description

Technical Field

[0001] The invention belongs to the technical field of phase-locked loops, and in particular relates to a frequency compensation circuit of a voltage-controlled oscillator, a frequency compensation phase-locked loop and a chip. Background Art

[0002] A phase locked loop (PLL) is a negative feedback control system that uses a voltage generated by phase synchronization to tune a voltage controlled oscillator to produce a target frequency; see Figure 1 As shown, Figure 1 It is the basic structure of a phase-locked loop. In the phase-locked loop, the function of the phase frequency detector is to identify the frequency and phase difference between the reference clock and the feedback clock of the phase-locked loop, and then transmit this difference to the charge pump, so that the charge pump generates a current according to the difference and outputs it to the low-pass filter. The low-pass filter generates a voltage VC to adjust the frequency of the voltage-controlled oscillator, and the divider divides the clock frequency generated by the voltage-controlled oscillator to obtain the feedback clock. In this way, after locking, the output frequency is N times the input frequency (N is the division ratio of the divider).

[0003] from Figure 1 It can be seen that the relationship between VC and frequency is a linear relationship. Therefore, if the output clock frequency of the PLL is certain, the value of VC will also be determined. After the VC value is determined, the entire PLL is in a locked state, that is, the output clock is N times the reference clock.

[0004] However, when the ambient temperature changes, the frequency of the voltage controlled oscillator will also change, see Figure 2 As shown, Figure 2 The output clock frequency of the traditional PLL is affected by temperature changes. Figure 2 It can be seen that when the temperature increases, the VC-to-frequency curve will move upward. In this way, when achieving the same target frequency, the VC value needs to be increased to lock the target frequency. Therefore, when the ambient temperature increases, the VC value required by the voltage-controlled oscillator will also increase.

[0005] In practical applications, the output frequency of the voltage-controlled oscillator can be adjusted by increasing the value of VC. However, the above-mentioned prior art has the following deficiencies: (1) When the value of VC becomes larger, the voltage difference between the two MOS tubes in the charge pump will become larger. At this time, the current deviation between the two MOS tubes will be too large, which will cause the PLL to produce fixed periodic jitter when it is locked; (2) When the temperature changes too much, it is easy to adjust the value of VC to the power supply voltage, but the frequency of the voltage-controlled oscillator cannot be adjusted to the target frequency. This will cause the PLL to lose lock. Therefore, based on the above-mentioned deficiencies, how to provide a frequency compensation circuit for a voltage-controlled oscillator that can avoid introducing periodic jitter and solve the problem of PLL losing lock has become an urgent problem to be solved. Summary of the invention

[0006] The purpose of the present invention is to provide a frequency compensation circuit, a frequency compensation phase-locked loop and a chip of a voltage-controlled oscillator, so as to solve the problem in the prior art that when adjusting the output frequency of the voltage-controlled oscillator, periodic jitter is introduced and PLL is easily lost.

[0007] In order to achieve the above object, the present invention adopts the following technical solutions:

[0008] In a first aspect, a frequency compensation circuit of a voltage-controlled oscillator is provided, wherein an input end of the voltage-controlled oscillator is electrically connected to a voltage output end of a low-pass filter in a phase-locked loop, a first capacitor is provided in the voltage-controlled oscillator, one end of the first capacitor is electrically connected to the voltage output end of the low-pass filter, and the other end of the first capacitor is grounded:

[0009] The input end of the frequency compensation circuit is electrically connected to the output end of the voltage-controlled oscillator, and the output end of the frequency compensation circuit is electrically connected to the voltage output end of the low-pass filter, wherein the frequency compensation circuit is used to increase the effective capacitance value of the first capacitor in the voltage-controlled oscillator when the ambient temperature rises, so as to maintain the output voltage of the low-pass filter by increasing the effective capacitance value of the first capacitor.

[0010] Based on the above disclosed content, the frequency compensation circuit provided by the present invention performs voltage compensation by increasing the effective capacitance value of the first capacitor in the voltage-controlled oscillator; wherein one end of the first capacitor in the voltage-controlled oscillator is electrically connected to the voltage output end of the low-pass filter, and the other end thereof is grounded, so the voltage across the first capacitor is the output voltage of the voltage-controlled oscillator; thus, when the ambient temperature rises, by increasing the effective capacitance value of the first capacitor, the voltage across the first capacitor can be reduced on the basis of the unchanged charge amount, so that the output voltage of the voltage-controlled oscillator remains unchanged; thus, through the above-mentioned design, it can be ensured that the current between the two MOS tubes in the charge pump is nearly equal, thereby reducing the periodic jitter introduced by the need to increase the output voltage of the low-pass filter due to temperature changes; at the same time, the present invention does not need to adjust the output frequency of the voltage-controlled oscillator by increasing the VC value, so it can solve the problem of PLL unlocking caused by temperature changes in the traditional technology; therefore, the present invention is very suitable for large-scale application and promotion.

[0011] In one possible design, the frequency compensation circuit includes: an RC filter subcircuit and a second capacitor;

[0012] The input end of the RC filter subcircuit and one end of the second capacitor are both electrically connected to the output end of the voltage-controlled oscillator, wherein the output end of the RC filter subcircuit serves as the output end of the frequency compensation circuit, is electrically connected to the voltage output end of the low-pass filter, and the other end of the second capacitor is grounded.

[0013] In one possible design, the RC filter subcircuit includes: a third capacitor and a resistor;

[0014] One end of the resistor serves as the input end of the RC filter subcircuit and is electrically connected to the output end of the voltage-controlled oscillator, wherein one end of the resistor is also electrically connected to one end of the third capacitor and one end of the second capacitor, the other end of the resistor is electrically connected to the voltage output end of the low-pass filter, and the other end of the third capacitor is grounded.

[0015] In one possible design, both the first capacitor and the second capacitor are variable capacitors.

[0016] In a possible design, the input end of the frequency compensation circuit is electrically connected to the output end of the voltage-controlled oscillator through a fourth capacitor.

[0017] In a possible design, the voltage-controlled oscillator further includes: a fifth capacitor, an inductor, and a sixth capacitor;

[0018] One end of the first capacitor is electrically connected to one end of the fifth capacitor and the voltage output end of the low-pass filter in the phase-locked loop, wherein the other end of the fifth capacitor is electrically connected to one end of the inductor and one end of the sixth capacitor, and the other ends of the sixth capacitor and the inductor are grounded respectively.

[0019] In a possible design, the low-pass filter is also electrically connected to a charge pump in a phase-locked loop, for receiving a current signal output by the charge pump, so as to generate the output voltage according to the current signal.

[0020] In one possible design, the charge pump includes: an NMOS tube and a PMOS tube, wherein the NMOS tube is connected in series with the PMOS tube, and the common end of the NMOS tube and the PMOS tube is electrically connected to the input end of the low-pass filter.

[0021] In a second aspect, a frequency compensated phase-locked loop is provided, comprising a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator, a frequency divider, and a frequency compensation circuit of the voltage-controlled oscillator of the first aspect or any possible design of the first aspect.

[0022] In a fourth aspect, a chip is provided, wherein the chip includes the frequency compensation phase-locked loop described in the second aspect.

[0023] Beneficial effects:

[0024] (1) The present invention can effectively keep the output voltage VC of the low-pass filter relatively stable, so that the charge pump can operate in a relatively good area; thus, the periodic jitter introduced by the need to increase the output voltage of the low-pass filter due to temperature changes can be reduced.

[0025] (2) The present invention does not need to increase the VC value to adjust the output frequency of the voltage-controlled oscillator, and therefore can solve the problem of PLL unlocking caused by temperature changes in the traditional technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of the structure of a conventional phase-locked loop provided in an embodiment of the present invention;

[0027] Figure 2 A schematic diagram showing the effect of temperature changes on the output clock frequency of a conventional PLL provided by an embodiment of the present invention;

[0028] Figure 3 A specific circuit diagram of a frequency compensation circuit of a voltage-controlled oscillator provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in combination with the drawings and the description of the embodiments or the prior art. Obviously, the following description of the structure of the drawings is only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention.

[0030] It should be understood that although the terms first, second, etc. may be used herein to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another unit. For example, a first unit can be referred to as a second unit, and similarly, a second unit can be referred to as a first unit without departing from the scope of the exemplary embodiments of the present invention.

[0031] It should be understood that the term "and / or" that may appear in this article is merely a description of the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, B exists alone, and A and B exist at the same time. The term " / and" that may appear in this article describes another type of association object relationship, indicating that two relationships may exist. For example, A / and B can represent two situations: A exists alone, and A and B exist alone. In addition, the character " / " that may appear in this article generally indicates that the previous and next associated objects are in an "or" relationship.

[0032] Example:

[0033] See also Figure 3 As shown, before explaining the frequency compensation circuit of the voltage-controlled oscillator provided in this embodiment, the connection structure of the voltage-controlled oscillator in the phase-locked loop is first explained, wherein the input end of the voltage-controlled oscillator is electrically connected to the voltage output end of the low-pass filter in the phase-locked loop, and the low-pass filter is also electrically connected to the charge pump in the phase-locked loop, for receiving the current signal output by the charge pump to generate the output voltage according to the current signal, thereby realizing the adjustment of the output frequency of the voltage-controlled oscillator based on this.

[0034] In this embodiment, see Figure 3As shown, for example, the voltage-controlled oscillator is provided with a first capacitor C_var, a fifth capacitor C2, an inductor L and a sixth capacitor C_tank; wherein, one end of the first capacitor C_var is electrically connected to the voltage output end of the low-pass filter, and the other end of the first capacitor C_var is grounded; at the same time, one end of the first capacitor C_var is also electrically connected to one end of the fifth capacitor C2 and the voltage output end of the low-pass filter in the phase-locked loop, respectively, the other end of the fifth capacitor C2 is electrically connected to one end of the inductor L and one end of the sixth capacitor C_tank, respectively, and the other ends of the sixth capacitor C_tank and the inductor L are grounded, respectively.

[0035] Further, the charge pump may include, but is not limited to: an NMOS tube Q1 and a PMOS tube Q2, wherein the NMOS tube Q1 is connected in series with the PMOS tube Q2 (specifically, the drain of the PMOS tube Q2 is connected in series with the drain of the NMOS tube Q1, and at the same time, the drain of the PMOS tube Q2 is electrically connected to one end of the switch S2 through a switch S1, and the other end of the switch S2 is connected to the drain of the NMOS tube Q1); and the common connection end of the NMOS Q1 tube and the PMOS tube Q2 is electrically connected to the input end of the low-pass filter, so as to output the current signal between the PMOS tube Q2 and the NMOS tube Q1 to the low-pass filter.

[0036] Thus, from the above circuit structure, it can be seen that if VC is at a relatively medium voltage, then the In (i.e., the current in the NMOS tube Q1) and Ip (i.e., the current in the PMOS tube Q2) of the two MOS tubes in the charge pump are relatively close. The reason is that the voltage difference between vdsn and vdsp is relatively close. When the temperature rises and the frequency shifts, it is necessary to increase VC. Figure 3 For the charge pump circuit on the left, the vdsp voltage difference will be larger than the vdsn voltage difference at this time, which will cause the In and Ip current deviations to be too large. This will cause the PLL to produce fixed periodic jitter when locked. At the same time, if the output frequency of the voltage-controlled oscillator cannot be adjusted to the target frequency when VC is adjusted to the power supply voltage, the phase-locked loop will lose lock.

[0037] Based on this, this embodiment provides a frequency compensation circuit for keeping the output voltage of the low-pass filter unchanged when the ambient temperature rises, thereby reducing the periodic jitter caused by the increase of VC in traditional technology and solving the problem of phase-locked loop loss of lock. Its specific working description is as follows.

[0038] In this embodiment, the input end of the frequency compensation circuit is electrically connected to the output end of the voltage-controlled oscillator, and the output end of the frequency compensation circuit is electrically connected to the voltage output end of the low-pass filter, wherein the frequency compensation circuit is used to increase the effective capacitance value of the first capacitor in the voltage-controlled oscillator when the ambient temperature rises, so as to maintain the output voltage of the low-pass filter by increasing the effective capacitance value of the first capacitor.

[0039] See also Figure 3 As shown, one end of the aforementioned first capacitor C_var is electrically connected to the voltage output end of the low-pass filter, and the other end thereof is grounded, so the voltage across the first capacitor C_var is the output voltage of the voltage-controlled oscillator; thus, on the basis of its total capacity remaining unchanged, its charge amount remains unchanged, and when its effective capacitance increases, it can be known from the calculation formula of the charge amount that the voltage across it will decrease; thus, when the ambient temperature rises, this embodiment reduces the voltage across it by increasing the effective capacitance value of the first capacitor, thereby keeping the output voltage of the voltage-controlled oscillator unchanged; based on this, the current Ip and the current In in the charge pump can be kept nearly equal when the temperature changes, thereby reducing the periodic jitter introduced by excessive voltage deviation; at the same time, since there is no need to adjust the output voltage of the low-pass filter, the problem of phase-locked loop losing lock can also be avoided.

[0040] In a specific implementation, the present embodiment discloses a circuit structure of a frequency compensation circuit as follows:

[0041] In a specific implementation, the frequency compensation circuit may include, but is not limited to: an RC filtering subcircuit and a second capacitor C_var_temp, wherein the input end of the RC filtering subcircuit and one end of the second capacitor C_var_temp are both electrically connected to the output end of the voltage-controlled oscillator, the output end of the RC filtering subcircuit serves as the output end of the frequency compensation circuit, is electrically connected to the voltage output end of the low-pass filter, and the other end of the second capacitor C_var_temp is grounded.

[0042] Meanwhile, the RC filter subcircuit may include, but is not limited to: a third capacitor C_temp and a resistor R_temp; see Figure 3 As shown, one end of the resistor R_temp serves as the input end of the RC filter subcircuit and is electrically connected to the output end of the voltage-controlled oscillator, wherein one end of the resistor R_temp is also electrically connected to one end of the third capacitor C_temp and one end of the second capacitor C_var_temp, the other end of the resistor R_temp is electrically connected to the voltage output end of the low-pass filter, and the other end of the third capacitor C_temp is grounded.

[0043] Furthermore, in this embodiment, for example, the first capacitor C_var and the second capacitor C_var_temp are both variable capacitors, so their capacitance can be adjusted (i.e., the actual effective capacitance), but their actual total capacitance remains unchanged; based on this, the output voltage of the low-pass filter can be kept unchanged by changing the effective capacitance of the first capacitor.

[0044] Thus, the working principle of the frequency compensation circuit is as follows: by adding a large resistor and capacitor filter, a very slow signal that can keep up with the VC voltage can be drawn from VC, and then a capacitor similar to C_var (i.e., C_var_temp) is added to perform frequency compensation, that is, when the temperature changes, although the voltage across the first capacitor C_var changes, due to the presence of an RC filter sub-circuit, the actual effective capacitance of the first capacitor C_var will be greatly increased (i.e., C_var_temp is increased), so when the temperature changes, the absolute value of VC can be kept almost unchanged; based on this, the current Ip and the current In in the charge pump are always close to equal when the temperature changes; in this way, the problem of periodic jitter existing in traditional technology can be reduced, and the problem of phase-locked loop loss of lock can be solved.

[0045] In addition, in this embodiment, the input end of the frequency compensation circuit is electrically connected to the output end of the voltage controlled oscillator through the fourth capacitor C_ac; that is, the other end of the fifth capacitor C2 is electrically connected to the other end of the fourth capacitor C_ac, and the other end of the fourth capacitor C_ac is electrically connected to one end of the second capacitor C_var_temp and one end of the resistor R_temp, respectively. The connection diagram can be seen in Figure 3 As shown, no further description is given here.

[0046] Based on this, this embodiment combines the aforementioned fourth capacitor to elaborate on frequency compensation:

[0047] Because the fourth capacitor C-ac is a large capacitor (its value can be set according to actual use), it is short-circuited at high speed, which is equivalent to a wire; so with the capacitor C-ac, the actual effective capacitance changes from the original C_tank to C_tank+C_var_temp (that is, the original first capacitor remains unchanged, and on its basis, an additional capacitor C_var_temp is added), which is equivalent to the effective capacitance becoming larger. Changes in temperature will cause changes in the frequency of vco, and changes in the frequency of vco will compensate for this change in frequency through changes in capacitance. At the same time, since the capacitance becomes C_tank+C_var_temp, the larger the capacitance, the smaller the change in voltage will be for the same change in capacitance, because the larger the variable capacitance, the smaller the voltage change will be for the same change in capacitance value.

[0048] Therefore, through the above detailed description of the frequency compensation circuit of the voltage-controlled oscillator, the present invention can keep VC almost unchanged when the temperature changes, thereby keeping the current In and the current Ip in the charge pump nearly equal. In this way, compared with the traditional technology, the present invention can greatly reduce the periodic jitter introduced by temperature changes and solve the problem of phase-locked loop loss of lock; therefore, it is very suitable for large-scale application and promotion.

[0049] In one possible design, the second aspect of this embodiment provides a frequency compensated phase-locked loop, wherein the frequency compensated phase-locked loop includes a frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator, a divider, and a frequency compensation circuit of the voltage-controlled oscillator described in the first aspect of the embodiment.

[0050] The working process, working details and technical effects of the frequency compensation phase-locked loop provided in this embodiment can be found in the first aspect of the embodiment and will not be described in detail here.

[0051] In one possible design, the third aspect of this embodiment provides a chip, wherein the chip includes the frequency compensation phase-locked loop described in the second aspect of the embodiment.

[0052] The working process, working details and technical effects of the chip provided in this embodiment can be found in the first aspect of the embodiment and will not be described in detail here.

[0053] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A frequency compensation circuit for a voltage-controlled oscillator, wherein: The input end of the voltage-controlled oscillator is electrically connected to the voltage output end of the low-pass filter in the phase-locked loop, wherein a first capacitor is provided in the voltage-controlled oscillator, one end of the first capacitor is electrically connected to the voltage output end of the low-pass filter, and the other end of the first capacitor is grounded; The input end of the frequency compensation circuit is electrically connected to the output end of the voltage-controlled oscillator, and the output end of the frequency compensation circuit is electrically connected to the voltage output end of the low-pass filter, wherein the frequency compensation circuit is used to increase the effective capacitance value of the first capacitor in the voltage-controlled oscillator when the ambient temperature rises, so as to maintain the output voltage of the low-pass filter by increasing the effective capacitance value of the first capacitor; The frequency compensation circuit includes: an RC filter subcircuit and a second capacitor; The input end of the RC filter subcircuit and one end of the second capacitor are both electrically connected to the output end of the voltage-controlled oscillator, wherein the output end of the RC filter subcircuit serves as the output end of the frequency compensation circuit, is electrically connected to the voltage output end of the low-pass filter, and the other end of the second capacitor is grounded.

2. The frequency compensation circuit of a voltage controlled oscillator according to claim 1, characterized in that: The RC filter subcircuit includes: a third capacitor and a resistor; One end of the resistor serves as the input end of the RC filter subcircuit and is electrically connected to the output end of the voltage-controlled oscillator, wherein one end of the resistor is also electrically connected to one end of the third capacitor and one end of the second capacitor, the other end of the resistor is electrically connected to the voltage output end of the low-pass filter, and the other end of the third capacitor is grounded.

3. The frequency compensation circuit of a voltage controlled oscillator according to claim 1, characterized in that: The first capacitor and the second capacitor are both variable capacitors.

4. The frequency compensation circuit of a voltage controlled oscillator according to claim 1, characterized in that: The input end of the frequency compensation circuit is electrically connected to the output end of the voltage controlled oscillator through a fourth capacitor.

5. The frequency compensation circuit of a voltage controlled oscillator according to claim 1, characterized in that: The voltage controlled oscillator further includes: a fifth capacitor, an inductor and a sixth capacitor; One end of the first capacitor is electrically connected to one end of the fifth capacitor and the voltage output end of the low-pass filter in the phase-locked loop, wherein the other end of the fifth capacitor is electrically connected to one end of the inductor and one end of the sixth capacitor, and the other ends of the sixth capacitor and the inductor are grounded respectively.

6. The frequency compensation circuit of a voltage controlled oscillator according to claim 1, characterized in that: The low-pass filter is also electrically connected to a charge pump in a phase-locked loop, and is used to receive a current signal output by the charge pump, so as to generate the output voltage according to the current signal.

7. The frequency compensation circuit of a voltage controlled oscillator according to claim 6, characterized in that: The charge pump comprises: an NMOS tube and a PMOS tube, wherein the NMOS tube is connected in series with the PMOS tube, and a common end of the NMOS tube and the PMOS tube is electrically connected to an input end of the low-pass filter.

8. A frequency compensated phase-locked loop, characterized in that: include: A frequency detector, a phase detector, a charge pump, a low-pass filter, a voltage-controlled oscillator, a frequency divider, and a frequency compensation circuit of the voltage-controlled oscillator as claimed in any one of claims 1 to 7.

9. A chip, characterized in that: include: The frequency compensated phase locked loop as claimed in claim 8.

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