System and method for alternately testing dynamic parameters of power semiconductor

Abstract

The invention belongs to the related technical field of integrated circuit testing, and discloses a power semiconductor dynamic parameter alternating test system, which comprises a plurality of groups of test fixtures, a protection device, a switching matrix and a limiting trigger circuit, and is characterized in that the test fixtures are independently and controllably used for clamping and fixing each test object; the protection device is designed to be capable of being switched among a plurality of groups of test clamps, and after the protection device is switched to a certain group of test clamps and completely covers the test clamps, the protection device immediately triggers the limiting trigger circuit installed at the test clamps. And the limiting trigger circuit is used for activating the switching matrix after being triggered, then distributing the test resources to the current test fixture, and executing an alternate dynamic parameter test. The invention further discloses a corresponding testing method. According to the invention, the test process is optimized, the test preparation time is reduced, the test efficiency of the power semiconductor can be significantly improved, and the safety and reliability of the test process are enhanced.

Description

Technical Field

[0001] The present invention belongs to the technical field related to integrated circuit testing, and more specifically, relates to a power semiconductor dynamic parameter alternating testing system and method. Background Art

[0002] In the testing process of power semiconductors, especially in the testing process of high-power devices such as silicon carbide, efficiency has always been a major problem plaguing the industry and testing field.

[0003] Specifically, power semiconductor testing usually includes the detection of static (DC) parameters and dynamic parameters. Static parameter testing has relatively constant conditions and fast testing speed for parameters such as voltage and current involved, so the test efficiency is relatively high. In contrast, dynamic parameter testing requires monitoring of signal fluctuations, including the rising edge, falling edge, and delay of the signal. After the test, the waveform needs to be calculated by slope and integration, which prolongs the test cycle and is relatively inefficient.

[0004] In the prior art, when performing dynamic parameter tests, a general oscilloscope is generally used for test control. The computer performs the test by controlling the oscilloscope and needs to communicate with the oscilloscope to read and analyze the graphics and parameters captured during the test. The key parameters and graphics are then transmitted to the host computer for further processing. This process further slows down the test speed. In addition, since power semiconductor testing involves higher voltages and currents, there are safety risks to operators, so corresponding protective devices must be equipped during the test. For example, a fixture cover or protective cover is used, and a protective device with a limited position is provided. In the prior art, the test program can only be started when the protective device completely covers the test fixture, otherwise the system will remain in a protective state. Summary of the invention

[0005] In view of the above defects or needs of the prior art, the purpose of the present invention is to provide a power semiconductor dynamic parameter alternating test system and method, wherein a set of alternating dynamic parameter testing schemes is redesigned, and improvements are made to the setting methods and working mechanisms of its multiple key components such as test fixtures, protection devices, switching matrices and limit trigger circuits. Compared with the prior art, the testing efficiency of power semiconductors can be significantly improved, and the safety and reliability of the testing process can be enhanced. Therefore, it is particularly suitable for dynamic parameter testing occasions of high-power devices such as silicon carbide.

[0006] To achieve the above object, according to one aspect of the present invention, a power semiconductor dynamic parameter alternating test system is provided, characterized in that the system includes a test fixture, a protection device, a switching matrix and a limit trigger circuit, wherein:

[0007] The number of the test fixtures is multiple groups, and they are independently and controllably used to clamp and fix each test object;

[0008] The protection device is designed to be switchable between multiple groups of test fixtures, and after switching to a certain group of test fixtures and completely covering the test fixture, immediately triggering the limit trigger circuit installed at the test fixture;

[0009] The limit trigger circuit is used to activate the switching matrix after being triggered, and the switching matrix is ​​used to allocate test resources to the current test fixture and perform the required dynamic parameter test; at the same time, another group of idle test fixtures is placed with a new test object;

[0010] When the test object currently clamped by the test fixture completes the test, the protection device is switched back to the other set of test fixtures, the corresponding limit trigger circuit is immediately triggered and activates the switching matrix, and the switching matrix again allocates test resources to perform new dynamic parameter tests and takes out the test object that has completed the test, thereby realizing an alternating continuous cycle of the entire test process.

[0011] As a further preference, the number of the test fixtures is two groups, and they are used in conjunction with other components for alternating testing of two groups of test objects.

[0012] As a further preference, the protection device is preferably a rotating structure, a seesaw structure, or a sliding door structure, and performs switching between the two groups of test fixtures by rotating, pressing, or sliding operations.

[0013] As a further preferred embodiment, the common end of the switching matrix is ​​used to connect the test resources, and the switch end thereof is used to connect the test fixtures, so that there is no redundant circuit in the test loop.

[0014] As a further preferred embodiment, the test resources include a high voltage power supply, a voltage capacitor, a freewheeling inductor, an oscilloscope, a drive signal generator, and the like.

[0015] As a further preference, for high-power test resources, the above system preferably uses high-power high-voltage relays for connection and switching; for high-speed test resources, the above system preferably uses high-speed relays for switching.

[0016] As a further preference, the protection device and the switching matrix are synchronously linked.

[0017] According to another aspect of the present invention, a corresponding testing method is also provided, characterized in that the method comprises the following steps:

[0018] S1, placing the test object on a set of idle test fixtures;

[0019] S2, operating the protection device to completely cover the current test fixture and triggering the corresponding limit protection circuit;

[0020] S3, the limit protection circuit activates the switching matrix to allocate test resources to the current test fixture;

[0021] S4, performing the required dynamic parameter test and monitoring the parameters such as voltage, current and temperature during the test process in real time; at the same time, a new test object is placed on another set of the test fixtures;

[0022] S5. After the current test is completed, the above steps S2 to S4 are repeated until the dynamic parameter test process of all test objects is completed.

[0023] In general, the above technical solution conceived by the present invention has the following technical advantages compared with the prior art:

[0024] 1. The present invention closely combines the dynamic parameter test characteristics and specific requirements of various power semiconductors. By setting multiple groups of test fixtures and cooperating with limit trigger circuits, switching matrices, etc., rapid switching during the test process can be achieved, greatly reducing the test preparation time. Compared with the prior art, the test efficiency of power semiconductors can be significantly improved;

[0025] 2. The present invention makes further improvements to the setting mode of the protection device, and accordingly, the switching between different test fixtures can be realized by simple pressing, rotating or sliding operations, and ensures that the working area is always under protection at any time, and the non-working area can be used for operations such as placing or removing devices;

[0026] 3. The alternating dynamic testing scheme of the present invention not only improves the testing efficiency of power semiconductors, but also helps to enhance the safety and reliability of the entire testing process, and is therefore particularly suitable for dynamic parameter testing of high-power devices such as silicon carbide. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the main structure of the dynamic parameter alternating test system according to the present invention;

[0028] Figure 2 is a schematic diagram of the application of a protection device according to a preferred embodiment of the present invention;

[0029] Figure 3 is a schematic diagram for exemplifying a sliding door structure of a preferred embodiment of the present invention;

[0030] Figure 4 is a trigger principle diagram for exemplarily illustrating a preferred embodiment of the present invention;

[0031] Figure 5 1 is a main process flow chart of the alternating test method according to the present invention. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] It should be understood that expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations or constituent elements, and do not limit one or more additional functions, operations and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components or combinations thereof.

[0034] It should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0035] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0036] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0037] Figure 1 This is a schematic diagram of the main structure of the dynamic parameter alternating test system according to the present invention. Figure 1 To explain the present invention in more detail.

[0038] like Figure 1 As shown, the dynamic parameter alternating test system according to the present invention mainly includes a test fixture, a protection device, a switching matrix and a limit trigger circuit, wherein:

[0039] There are multiple groups of test fixtures, which are independently and controllably used to clamp and fix each test object; the protection device is designed to be able to switch between multiple groups of test fixtures, and after switching to a certain group of test fixtures and completely covering the test fixture, immediately trigger the limit trigger circuit installed at the test fixture; after being triggered, the limit trigger circuit is used to activate the switching matrix, and the switching matrix is ​​used to allocate test resources to the current test fixture, preferably using a single-pole multi-throw switch, and when there are two groups of test fixtures, a single-pole double-throw switch is used, and the required dynamic parameter test is performed; at the same time, a new test object is placed in another idle group of test fixtures;

[0040] When the test object currently clamped by the test fixture completes the test, the protection device is switched back to the other set of test fixtures, the corresponding limit trigger circuit is immediately triggered and activates the switching matrix, and the switching matrix again allocates test resources to perform new dynamic parameter tests and takes out the test object that has completed the test, thereby realizing an alternating continuous cycle of the entire test process.

[0041] According to a preferred embodiment of the present invention, Figure 2As shown, the number of test fixtures is designed to be two groups, and the switch adopts a single-pole double-throw switch, and cooperates with other components for alternating testing of two groups of test objects. Accordingly, the protection device is preferably a rotary structure, and the switching between the two groups of test fixtures is performed by a rotary operation. When the revolving door is in the fixture 1 position, the limit switch A of the fixture 1 and the limit switch B of the fixture 1 are triggered, and the device on the test fixture 1 is in a state to be tested, and the test fixture 2 is not connected to the test resources, and the device can be installed or removed. When the revolving door is in the fixture 2 position, the limit switch A of the fixture 2 and the limit switch B of the fixture 2 are triggered, and the device on the test fixture 1 is in a state to be tested, and the test fixture 1 is not connected to the test resources, and the device can be installed or removed. When the rotating protective cover is in the triggering state of limit switch A of fixture 1 and limit switch A of fixture 2, or in the triggering state of limit switch B of fixture 1 and limit switch B of fixture 2, it means that the rotating protective cover is in the intermediate state and does not completely cover and protect fixture 1 or fixture 2. At this time, the test resources connected to the matrix switch are in the closed state, and the program waits for the protective cover to return to the full protection position of fixture 1 or fixture 2.

[0042] According to a preferred embodiment of the present invention, Figure 3 As shown, the number of the test fixtures is designed to be two groups, and the switch adopts a single-pole double-throw switch, and cooperates with other components for alternating testing of two groups of test objects. Accordingly, the protection device is preferably a sliding door structure, and the switching between the two groups of test fixtures is performed by sliding left and right. When the sliding door is in position 1, the device on the test fixture 1 is in a state to be tested, and the test fixture 2 is not connected to the test resource, and the device can be installed or removed. When the sliding door is in position 2, the device on the test fixture 2 is in a state to be tested, and the test fixture 1 is not connected to the test resource, and the device can be installed or removed. When the sliding door is in the triggering state of the limit switch A of the fixture 1 and the limit switch A of the fixture 2, or in the triggering state of the limit switch B of the fixture 1 and the limit switch B of the fixture 2, it means that the sliding door is in the middle state, and does not completely cover and protect the fixture 1 or the fixture 2. At this time, the test resources connected to the matrix switch are in the closed state, and the program waits for the protective cover to return to the full protection position of the fixture 1 or the fixture 2.

[0043] Through the above concept, since the protection device is designed as a structure similar to a seesaw or a rotating or sliding mechanism, it is ensured that at any time half of the area is always under protection and the other half is available for operation. When one fixture is in a protective state and triggers a test, the other set of fixtures is in a standby state, allowing the operator to place or remove the device. In this way, while one set of fixtures is testing, the other set of fixtures can be prepared. Once the test of the current fixture is completed and the new device is ready on the other set of fixtures, the protection device can be switched to start the test of the newly prepared fixture, and the fixture that has completed the test is exposed for the operator to remove and replace the device, thereby realizing the parallelization of the test process and the operator's work, and significantly improving the overall test efficiency.

[0044] According to another preferred embodiment of the present invention, Figure 4 As shown in the figure, in terms of the connection and switching of test resources, the common end of the matrix switch is connected to a variety of test resources including oscilloscopes, drive signal generators, high-voltage power supplies, etc. Through intelligent switching, these resources can be flexibly allocated to any test fixture. For high-power test resources, such as freewheeling inductors and high-voltage capacitors, the system preferably uses high-power high-voltage relays for connection and switching to ensure the stability and safety of the test. For high-speed signal resources, the system uses high-speed relays for switching to ensure the transmission speed and quality of the signal.

[0045] According to another preferred embodiment of the present invention, the system further optimizes the selection of relays, and preferentially adopts single-pole double-throw or double-pole double-throw relays to improve the flexibility and reliability of switching. In addition, the system is designed with a switch capable of managing multiple fixtures at the same time, allowing more than two test fixtures to be set at the same time, but at the same time point, only one fixture is in the actual test state, while the other fixtures are in the state of being ready for testing.

[0046] Accordingly, compared with the prior art, the present invention can significantly improve the overall operating efficiency, and its operating process is concise and clear: first, place the device to be tested on an idle fixture, adjust the protection device to trigger the limit protection circuit, activate the matrix switch, and connect the test resources to the fixture. Subsequently, place the device on another idle fixture in front of the tester, and wait for the test of the previous fixture to be completed. After that, by rotating or switching the protection device, trigger the limit switch at the fixture where the new device is placed, connect the test resources to the fixture, and take out the device on the fixture that has completed the test, thereby realizing a continuous cycle of the test process. In this way, the present invention not only improves the test efficiency of power semiconductors, but also enhances the safety and reliability of the test process, bringing significant technological progress to the field of semiconductor testing.

[0047] Figure 5This is a main process flow chart of the alternating test method according to the present invention. Figure 5 A specific implementation method of the present invention will be specifically explained.

[0048] Implementation preparation: Test system construction: configure special test fixtures, precision switching matrix, protection devices, limit trigger circuits and intelligent control circuits.

[0049] Test resource configuration: Ensure that all test resources, including oscilloscope, drive signal generator, high-voltage power supply, freewheeling inductor and high-voltage capacitor, are connected to the matrix switch.

[0050] Relay selection: According to the test requirements, select appropriate relays to achieve the switching of high-speed and high-power signals. High-speed relays are used for signal generators and oscilloscopes, and high-power switching relays are used for high-power devices such as freewheeling inductors.

[0051] System calibration: Calibrate all test equipment to ensure test accuracy and consistency.

[0052] Implementation process:

[0053] (1) Fixture preparation: Place the power semiconductor to be tested on an idle test fixture;

[0054] (2) Adjust the protection device to ensure that the protection device is in a certain test fixture protection position;

[0055] (3) operating the protection device so that it covers the current test fixture and exposes another fixture;

[0056] (4) Triggering the test process: By rotating or pressing the protection device, the limit trigger circuit is triggered, the matrix switch is activated, and the test resources are allocated to the current fixture;

[0057] (5) Test resource allocation: According to the test requirements, the matrix switch connects the corresponding test resources (such as voltage source, current monitor, etc.) to the current test fixture;

[0058] (6) Test execution: Start the test program, and the intelligent control circuit executes the test according to the preset test parameters;

[0059] (7) Test monitoring: Real-time monitoring of parameters such as voltage, current, and temperature during the test to ensure that the test is carried out within a safe range;

[0060] (8) Test completion and switching: After the test is completed, the limit switch of another fixture is triggered by rotating or switching the protection device to prepare for the next round of testing;

[0061] (9) Device replacement: While the previous fixture test is completed, the operator can place a new device under test on another fixture;

[0062] (10) Data logging: Record all test data, including test results and system status.

[0063] Continuous cycle test: Repeat the above steps (3) to (8) to achieve a continuous cycle of the test process and improve test efficiency.

[0064] In summary, the present invention provides a more efficient, safe and reliable alternating test scheme. During the test process, the operator can place and remove devices on other fixtures. After the test is completed, the fixture that has been placed and prepared is directly transferred to the protection device for testing. This not only improves the test efficiency of power semiconductors, but also enhances the safety and reliability of the test process without significantly increasing the test hardware overhead and cost. Therefore, it is particularly suitable for dynamic parameter testing of high-power devices such as silicon carbide.

[0065] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A power semiconductor dynamic parameter alternating test system, characterized in that: The system includes a test fixture, a protection device, a switching matrix and a limit trigger circuit, wherein: The number of the test fixtures is multiple groups, and they are independently and controllably used to clamp and fix each test object; The protection device is designed to be switchable between multiple groups of test fixtures, and after switching to a certain group of test fixtures and completely covering the test fixture, immediately triggering the limit trigger circuit installed at the test fixture; The limit trigger circuit is used to activate the switching matrix after being triggered, and the switching matrix is ​​used to allocate test resources to the current test fixture and perform the required dynamic parameter test; at the same time, another group of idle test fixtures is placed with a new test object; When the test object currently clamped by the test fixture completes the test, the protection device is switched back to the other set of test fixtures, the corresponding limit trigger circuit is immediately triggered and activates the switching matrix, and the switching matrix again allocates test resources to perform new dynamic parameter tests and takes out the test object that has completed the test, thereby realizing an alternating continuous cycle of the entire test process.

2. The system according to claim 1, characterized in that The number of the test fixtures is two, and they are used in conjunction with other components for alternating testing of two groups of test objects.

3. The system according to claim 3, characterized in that The protection device is preferably a rotating structure, a seesaw structure or a sliding door structure, and performs switching between the two groups of test fixtures by rotating, pressing or sliding operations.

4. The system according to any one of claims 1 to 3, characterized in that: The common end of the switching matrix is ​​used to connect the test resources, and the switch end thereof is used to connect the test fixtures so that there is no redundant circuit in the test loop.

5. The system according to any one of claims 1 to 4, characterized in that: The test resources include a high-voltage power supply, a voltage capacitor, a freewheeling inductor, an oscilloscope, a drive signal generator, and a matrix switch for switching the above resources.

6. The system according to claim 5, characterized in that For high-power test resources, the above system preferably uses high-power high-voltage relays for connection and switching; for high-speed test resources, the above system preferably uses high-speed relays for switching.

7. The system according to any one of claims 1 to 7, characterized in that: The protection device and the switching matrix are synchronously linked.

8. A method for alternating testing of dynamic parameters of power semiconductors, characterized in that: The method is performed by a system according to any one of claims 1 to 7, and comprises the following steps: S1, placing the test object on a set of idle test fixtures; S2, operating the protection device to completely cover the current test fixture and triggering the corresponding limit protection circuit; S3, the limit protection circuit activates the switching matrix to allocate test resources to the current test fixture; S4, performing the required dynamic parameter test and monitoring the parameters such as voltage, current and temperature during the test process in real time; at the same time, a new test object is placed on another set of the test fixtures; S5. After the current test is completed, the above steps S2 to S4 are repeated until the dynamic parameter test process of all test objects is completed.

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