Electronic equipment, load statistics method and frequency modulation method of processor

Abstract

The invention discloses an electronic device, a load statistics method and a frequency modulation method of a processor, the electronic device at least comprises a processor, load statistics hardware and a system memory, and the processor is connected with the load statistics hardware; the processor and the load statistics hardware are respectively connected with the system memory; and the load statistics hardware is used for responding to first trigger information, performing statistics on a first load corresponding to each processor and a second load corresponding to each task in a window period, and updating each first load and each second load to the system memory.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of electronic technology, and relate to but are not limited to an electronic device, a load statistics method, and a frequency modulation method of a processor. Background Art

[0002] In Android or Linux systems, the WALT and Per-Entity Load Tracing (PELT) algorithms can be used to measure task and processor CPU loads in order to balance loads and drive dynamic voltage and frequency control (Dynamic Vcc and Frequency Scaling, DVFS) to adjust CPU frequency. Among them, the PELT algorithm will cause the load to change slowly, which will lead to slow frequency modulation and poor user experience in interactive scenarios. The WALT algorithm will also introduce a certain amount of load because of its implementation. As the window becomes smaller, the load overhead it introduces will be further aggravated. At present, these algorithms are all implemented in software, which will introduce a certain amount of CPU overhead, and there are problems of low computing efficiency and poor computing accuracy. Summary of the invention

[0003] In view of this, embodiments of the present application provide an electronic device, a load statistics method, and a frequency modulation method of a processor.

[0004] The technical solution of the embodiment of the present application is implemented as follows:

[0005] In a first aspect, an embodiment of the present application provides an electronic device, comprising at least a processor, load statistics hardware, and a system memory.

[0006] The processor is connected to the load statistics hardware;

[0007] The processor and the load statistics hardware are respectively connected to the system memory;

[0008] The load statistics hardware is used to respond to the first trigger information, count the first load corresponding to each processor and the second load corresponding to each task within a statistics window period, and update each of the first load and the second load to the system memory.

[0009] In a second aspect, an embodiment of the present application provides a load statistics method, which is applied to an electronic device, wherein the electronic device at least includes a processor, load statistics hardware, and a system memory.

[0010] The load statistics hardware is used to execute a load statistics method, the load statistics method comprising:

[0011] In response to the first trigger information, counting a first load corresponding to each of the processors and a second load corresponding to each task within a window period;

[0012] Each of the first load and the second load is updated to the system memory.

[0013] In a third aspect, an embodiment of the present application provides a frequency modulation method for a processor, which is applied to an electronic device, wherein the electronic device at least includes a processor, load statistics hardware, a system memory, and a dynamic voltage frequency controller, wherein the dynamic voltage frequency controller is connected to the load statistics hardware.

[0014] Performing load statistics through the load statistics hardware includes: responding to the first trigger information, counting the first load corresponding to each processor and the second load corresponding to each task within the statistics window period;

[0015] When it is determined that the first load of the target processor is greater than the load threshold, the load statistics hardware sends a trigger signal to the dynamic voltage frequency controller to trigger the dynamic voltage frequency modulation hardware to read the first load of the target processor to adjust the frequency of the target processor.

[0016] In a fourth aspect, an embodiment of the present application provides a load statistics device, the device comprising:

[0017] A statistics module, configured to respond to the first trigger information and to count the first load corresponding to each processor and the second load corresponding to each task within a statistics window period;

[0018] An update module is used to update each of the first load and the second load to the system memory.

[0019] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, and the processor implements the above method when executing the program.

[0020] In a sixth aspect, an embodiment of the present application provides a storage medium storing executable instructions for implementing the above method when executed by a processor.

[0021] In the embodiment of the present application, load statistics hardware is added to the electronic device to count the first load corresponding to each processor and the second load corresponding to each task within the window period. In this way, by using the load statistics hardware unit to count the processor load and task load within the window statistics, the overhead of the statistical load on the central processor can be effectively reduced, and the load statistics efficiency can be improved. Since the second load corresponding to the task is counted, the load statistics accuracy can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0023] Figure 2A A schematic diagram of the structure of a load statistics hardware provided in an embodiment of the present application;

[0024] Figure 2B A flow chart of a load statistics method provided in an embodiment of the present application;

[0025] Figure 2C A schematic diagram of a flow chart of a second load of a statistical target provided in an embodiment of the present application;

[0026] Figure 3A A flow chart of a load statistics method provided in an embodiment of the present application;

[0027] Figure 3B A schematic diagram of a load statistics hardware and system memory storage provided in an embodiment of the present application;

[0028] Figure 4A A schematic diagram of the structure of an electronic device is provided for an embodiment of the present application;

[0029] Figure 4B A schematic diagram of the implementation flow of the frequency modulation method of the processor provided in the embodiment of the present application;

[0030] Figure 5 A schematic diagram of the composition structure of a load statistics device provided in an embodiment of the present application;

[0031] Figure 6 A hardware entity schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the embodiments of the present application will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application.

[0033] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0034] In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0036] The present application embodiment provides a structural diagram of an electronic device, such as Figure 1 As shown, the electronic device at least includes: a processor 10, load statistics hardware 11 and system memory 12, wherein:

[0037] The processor 10 is connected to the load statistics hardware 11;

[0038] The processor 10 and the load statistics hardware 11 are respectively connected to the system memory 12;

[0039] The load statistics hardware 11 is used to respond to the first trigger information, count the first load corresponding to each processor and the second load corresponding to each task within a statistics window period, and update each of the first load and the second load to the system memory 12.

[0040] In some embodiments, an existing hardware timer (timer) 13 in the electronic device may be reused to trigger the first trigger information, that is, the first load and the second load within the time window period may be periodically counted using the timer.

[0041] Here, you can set the window period according to the statistical requirements. Compared with software statistics, hardware implementation can achieve a very small statistical window. For example, when the number of CPU cores is 8, the window size can be set to 4 milliseconds (ms). In this way, the statistical window can be set very small, improving the accuracy of load statistics.

[0042] Here, the first load is the load corresponding to the processor. For example, if the electronic device has an 8-core processor, the load of each processor is counted separately.

[0043] Here, the electronic device executes the program during operation, that is, performs a series of operations according to the instructions and data of the program to complete a specific task. The second load is the load corresponding to the task.

[0044] During implementation, the second load of each task may be counted first, and then based on the mapping relationship between the task and the processor running the task, the second loads of all tasks on a processor may be added up to obtain the first load of the processor.

[0045] During implementation, after the load statistics hardware performs load statistics in the window period, each of the first load and the second load is updated to the system memory, so that the electronic device can obtain the load statistics data in a timely manner.

[0046] During the implementation process, the logic of the load statistics algorithm can be downloaded to the load statistics hardware for processing in cooperation with other hardware units in the electronic device, so as to eliminate the delay caused by other software logic, improve the accuracy of the update time, and further reduce the CPU overhead and increase the concurrency with task scheduling, DVFS frequency modulation and other processes.

[0047] In the embodiment of the present application, load statistics hardware is added to the electronic device to count the first load corresponding to each processor and the second load corresponding to each task within the window period. In this way, by using the load statistics hardware unit to count the processor load and task load within the window statistics, the overhead of the statistical load on the central processor can be effectively reduced, and the load statistics efficiency can be improved. Since the second load corresponding to the task is counted, the load statistics accuracy can be effectively improved.

[0048] In some embodiments, Figure 2A As shown, the load statistics hardware 11 includes a trigger unit 111, a configuration unit 112, a storage read-write unit 113 and a calculation unit 114, wherein:

[0049] The configuration unit 112 is an interface for interaction between the processor and the load statistics hardware, and is used to obtain the first trigger information from the processor;

[0050] The load statistics hardware 11 is used to respond to the first trigger information and count the first load corresponding to each processor and the second load corresponding to each task within the statistics window period, including:

[0051] The trigger unit 111 is used to receive the first trigger information sent by the configuration unit 112 and generate a corresponding trigger instruction;

[0052] For example, the trigger unit 111 may be a timer control unit (Timer Handle Unit), which is used to receive a timer interrupt (configuration statistics window timing time is reached), read the timer value, and generate a corresponding trigger instruction based on the timer value.

[0053] The configuration unit 112 may include a register Regs(IF). The register may be an interface for the processor to interact with the load statistics hardware. In the implementation process, the base addresses of the first load and the second load in the system memory, the control of triggering start / stop, including the process identifier (Process Id, PID), the processor identifier (CPUID), the update of the load result and other interactive information can all be implemented using the register.

[0054] The load calculation unit 114 is used for counting each of the first load and the second load within a window period in response to the trigger instruction, and storing each of the first load and the second load in the storage read-write unit 113;

[0055] The storage read-write unit 113 is used to update each of the first load and the second load to the system memory with the window period as the update period.

[0056] For example, the memory read / write unit Memory R / W: can be used to store and read and write load data.

[0057] In the embodiment of the present application, by setting a trigger unit, a configuration unit, a storage read-write unit and a calculation unit in the load statistics hardware, statistics of each first load and second load can be realized, and the statistical results can be updated to the system memory in time with the window period as the update cycle.

[0058] In some embodiments, the storage read-write unit is used to update each of the first load and the second load to the system memory, which can be implemented by the following process:

[0059] The storage read-write unit stores each of the first load and the second load in the previous window period into the system memory in response to the first trigger information or the second trigger information, and clears the storage read-write unit, wherein the second trigger information is used to trigger the statistical end of the window period.

[0060] In some embodiments, the second trigger information may be different from the first trigger information, that is, the two trigger information may occur at different time points, the first trigger information is used to trigger the statistics of the start window period, and the second trigger information is used to trigger the end of the statistics of the window period. For example, at the end of the window, the first load and the second load may be stored in the system memory based on the second trigger information, and the storage read-write unit may be cleared.

[0061] In some embodiments, the second trigger information may occur at the same time point as the first trigger information, that is, the start time of the next window period is the end time of the previous window period. For example, at the start time of the next window period, the first load and the second load may be stored in the system memory based on the first trigger information, and the storage read-write unit may be cleared.

[0062] During the implementation process, the load statistics hardware only stores the cached load data (the first load and the second load) during the statistical window period. After each window period arrives, the load data is saved to the corresponding location in the system memory, the internal load data is cleared, and new statistical data is re-recorded.

[0063] In the embodiment of the present application, in response to the first trigger information or the second trigger information, each of the first load and the second load in the previous window period is stored in the system memory, and the storage read-write unit is cleared. In this way, the load data inside the load statistics hardware can be cleared in time to ensure that there is sufficient storage space for storing the load data counted after clearing.

[0064] Figure 2B A flow chart of a load statistics method provided in an embodiment of the present application is shown as follows: Figure 2B As shown, the load statistics method includes the following three update scenarios:

[0065] Update load scenario 1:

[0066] ① Load statistics hardware receives task switching information sent by the processor and triggers ② load statistics;

[0067] ② The load statistics hardware calculates the task load (second load) according to the following formula (3), and adds the task load to the corresponding CPU load (first load), and temporarily stores the result in the internal cache (buffer) of the load statistics hardware. The internal cache can be located in the storage read-write unit 113 in the load statistics hardware (please refer to Figure 2A )Inside.

[0068] Here, an embodiment of the present application provides a task load normalization calculation method:

[0069] Applicable to mobile platforms, normalized Task / CPU load, considering the impact of CPU cores with different computing power and different frequencies. The following formula (1) is the Task load calculation formula:

[0070]

[0071] Among them, (Freqavg / Freqmax) is the frequency factor. Considering the impact of different CPU frequencies, the load generated by running at different frequencies for the same time is different, and it is normalized to the highest frequency Freqmax of the largest core. (Capacitycur_cpu / Capacitymax) is the computing power factor. Considering the impact of computing power, the load generated by running at the same time under different CPU computing power cores is different, and it is normalized to the CPU core with the highest computing power. Window is the statistical window time (unit ms). 1024 is the full load of 1024 when the largest core runs at the highest frequency for the entire statistical window time.

[0072] Since hardware is used for complex statistics in the embodiments provided in the present application, the statistical window can be very small compared to software. Compared with the prior art, the factors to be considered can be reduced. The load statistical results obtained by considering only computing power and frequency are more accurate and the calculation process is simplified. In addition, a very small statistical window can be set to effectively improve the accuracy of load statistics.

[0073] During the implementation, in order to simplify the hardware computing unit, a power factor table is introduced and generated according to the CPU information during initialization. The window size is 2 to the power of n. In this way, the above formula (1) can be converted into one multiplication calculation, one addition operation and one shift operation. The following formula (2) is the calculation formula for the power factor, and formula (3) is the calculation formula for the task load after simplifying formula (1):

[0074] Computing power factor = (Freqavg / Freqmax)*(Capacitycur_cpu / Capactitymax) (2);

[0075] Taskload = computing power factor * (Stop_time - Start_time) * 1024 / window (3);

[0076] Table 1 below shows examples of the corresponding computing power and maximum frequency of processors with different cores (super core, large core, small core):

[0077] Table 1

[0078] core Hashrate Maximum frequency Small core 280 2016000 big core 855 2803200 Super core 1024 2956800

[0079] Table 2 below is an example of computing power factor (1 super core + 3 large cores + 4 small cores):

[0080] Table 2

[0081]

[0082] From Table 2 above, we can obtain the computing power factors corresponding to CPUs of different frequencies, where CPU Index is the identifier corresponding to processors of different computing powers, and the corresponding computing power factors are obtained for processors of different computing powers and frequencies. For example, the processor identified as 0 is the small-core processor in Table 1, the processor identified as 3 is the large-core processor in Table 1, and the processor identified as 7 is the super-large-core processor in Table 1.

[0083] Update load scenario 2:

[0084] ① The load statistics hardware receives a timer interrupt (indicating that the statistics window time has expired), triggering ② load statistics, and ③ updating the load;

[0085] ② The load statistics hardware calculates the task load according to the formula, adds the task load to the corresponding CPU load, and temporarily stores the result in the internal buffer of the load statistics hardware;

[0086] ③ The load statistics hardware updates the internal buffer content to the corresponding system memory and restarts a new round of load statistics;

[0087] Reading load scenario:

[0088] ①The CPU reads the load data in the system memory and obtains the first load and the second load within the window period.

[0089] In some embodiments, the calculation unit is used to count each of the first load and the second load within the window period, which can be implemented by the following process:

[0090] Step A: During the window period, the computing unit triggers task load statistics in response to task switching information to respectively count the second loads corresponding to each task that has been switched;

[0091] Here, if Figure 2B The second load update scenario shown in : During the window period, when task switching information is received, task load statistics are triggered to count the second loads corresponding to each task that has been switched. For example, during the window period, the first-stage task A that is being executed switches to task B and then switches back to task A in the second stage. Then, the load of task A in the first stage, the load of task B, and the load of task A in the second stage can be counted, that is, the second load of each task in the window period is counted.

[0092] Step B: In response to the second trigger information, the load calculation unit accumulates all the second loads corresponding to each of the processors to obtain each of the first loads.

[0093] Here, the second trigger information may be information about the end of a window or information about the start of a next window.

[0094] During implementation, the task corresponding to each processor may be determined according to the mapping relationship between the processor and the task executed by the processor, and each second load of the processor may be accumulated to obtain the first load of the processor.

[0095] In an embodiment of the present application, during the window period, the computing unit triggers task load statistics in response to task switching information to separately count the second loads corresponding to each task that has been switched; in response to the second trigger information, the load computing unit accumulates all the second loads corresponding to each of the processors to obtain each of the first loads. In this way, the first loads corresponding to all tasks running during the window period can be counted, and then at the end of the window period, all the second loads corresponding to each processor are accumulated to obtain each first load. In addition to being used to accumulate the first load, the statistical results of the second load can also be used for task scheduling. According to the size of the second load corresponding to different tasks, during task scheduling, the tasks are reasonably allocated to the matching CPU cores for processing to obtain a higher task processing efficiency.

[0096] In some embodiments, Figure 2C As shown, the target second load within the statistical window period, where the target second load is the load corresponding to the target task, can be achieved by the following steps:

[0097] Step S210: The computing unit obtains a computing power factor of a processor that executes the target task, wherein the computing power factor is related to the frequency and computing power of the processor;

[0098] During implementation, the computing power factor can be calculated using the following formula (2):

[0099] Computing power factor = (Freqavg / Freqmax)*(Capacitycur_cpu / Capactitymax)(2);

[0100] Among them, (Freqavg / Freqmax) is the frequency factor. Considering the impact of different CPU frequencies, the load generated by running at different frequencies for the same time is different, and it is normalized to the highest frequency Freqmax of the largest core; (Capacitycur_cpu / Capacitymax) is the computing power factor. Considering the impact of computing power, the load generated by running at different CPU computing power cores for the same time is different, and it is normalized to the CPU core with the highest computing power.

[0101] Table 2 above is an example of a computing power factor. During implementation, the computing power factors of different processors at different frequencies can be pre-calculated and stored. When calculating the second load, it can be directly retrieved from the stored computing power factor table.

[0102] For example, you can use Figure 2A The configuration unit 112 reads the pre-calculated computing power factors of different processors at different frequencies from the system memory, and then sends the computing power factors to the computing unit 114, so that the computing unit 114 calculates the second load using the computing power factors.

[0103] Step S220, the calculation unit is used to count the target second load based on at least the computing power factor, the length of the window period, and the start time and end time of the target task within the window period.

[0104] During implementation, the target second load can be calculated using the following formula (3):

[0105] Taskload = computing power factor * (Stop_time - Start_time) * 1024 / window (3);

[0106] Wherein, window is the statistical window time (unit: ms). 1024 is the full load when the maximum core runs the entire statistical window time at the highest frequency.

[0107] In an embodiment of the present application, the computing unit obtains the computing power factor of the processor executing the target task, and calculates the target second load based on at least the computing power factor, the duration of the window period, and the start time and end time of the target task within the window period. In this way, the computing power factor is pre-calculated, and then the computing power factor is used to calculate the second load, so that the second load can be effectively obtained and the efficiency of calculating the second load can be improved.

[0108] Figure 3A A flow chart of a load statistics method provided in an embodiment of the present application is applied to an electronic device, wherein the electronic device at least includes a processor, load statistics hardware and system memory, such as Figure 3A As shown, the load statistics method is executed by using the load statistics hardware, and the load statistics method includes the following steps:

[0109] Step S310, responding to the first trigger information, counting the first load corresponding to each processor and the second load corresponding to each task within the window period;

[0110] Step S320: Update each of the first load and the second load to the system memory.

[0111] In the embodiment of the present application, the newly added load statistics hardware is used to respond to the first trigger information, and the first load corresponding to each processor and the second load corresponding to each task within the statistics window period are counted; each of the first load and the second load is updated to the system memory. In this way, the overhead of the load statistics on the central processor can be effectively reduced, and the load statistics efficiency can be improved. Since the second load corresponding to the task is counted, the load statistics accuracy can be effectively improved.

[0112] Figure 3B A schematic diagram of a load statistics hardware and system memory storage provided in an embodiment of the present application, such as Figure 3B As shown, the storage diagram includes storage information 31 of the load statistics hardware and storage information 32 in the system memory, wherein:

[0113] The storage information 31 of the load statistics hardware includes the first load corresponding to the storage processor stored in the processor information storage area 311, and the task identifier and the second load corresponding to each task identifier stored in the task information storage area 312. Here, the storage in the processor information storage area 311 and the task information storage area 312 are both located in Figure 2A In the storage read-write unit 113 shown.

[0114] For example, when the number of CPU cores is 8 and the window size is 4 ms, 384 B of storage can be added inside the load statistics hardware.

[0115] a) The load statistics hardware only stores cache load data in the statistics window period. After each window period arrives, the load information is saved as storage information 32 to the corresponding position in the system memory, that is, the first load is stored in the processor information storage area 321, and the second load is stored in the task information storage area 322. The internal load (storage information 31 of the load statistics hardware) is cleared and new statistical data is recorded again;

[0116] b) The number of CPU load information is consistent with the number of CPUs, which is specified during initialization. The data format is u64, and the size is 64B when there are 8 CPUs;

[0117] c) The data size of the task load (second load) information is related to the number of CPUs and the statistical window size, and is specified during initialization. For example, if the number of CPUs is 8 and the window period is 4ms. Here, it can be determined that only loads greater than 1ms are statistically significant. In this case, a single CPU needs to count a maximum of 4 tasks in a window period, and the number of data for the task load information is 4*8=32B. Each data includes a u32 task identifier and a u64 load, so the size of a task data is u32+u64=12B, and the overall storage size requirement is 32*12B=384B. Here, the task identifier is used to confirm the location in the task information storage area 312, such as Figure 3B As shown, the task identifier is A, and the load ua is stored in the corresponding column and managed in the CPU software. The mapping relationship between the storage information and the address can be established based on the physical address allocation, or the corresponding relationship can be established through the logical address corresponding to the physical address.

[0118] The storage information 32 in the system memory includes a first load stored in a processor information storage area 321 and a second load stored in a task information storage area 322 .

[0119] a) The CPU software initializes the number and base address and passes them to the load statistics hardware. When the window is updated, the load statistics hardware updates the first load information stored in the processor information storage area 311 to the corresponding position of the processor information storage area 321 in the system memory;

[0120] b) The CPU software initializes the number and base address and passes them to the load statistics hardware. When the task starts running, the software assigns a task ID and passes the task ID to the load statistics hardware (such as Figure 3B When the window is updated, the load statistics hardware updates the second load information corresponding to the task to the corresponding task unit column, that is, Figure 3B The field ua corresponding to the identifier A and the field ub corresponding to the identifier B in the task information storage area 312 shown in FIG.

[0121] In some embodiments, system memory can save about 1MB, that is, the load statistics method does not increase system memory.

[0122] In some embodiments, the above step S320 "updating each of the first load and the second load to the system memory" can be implemented by the following process:

[0123] In response to the first trigger information or the second trigger information, each of the first load and the second load in the previous window period is stored in the system memory, and the storage read-write unit is cleared, wherein the second trigger information is used to trigger the statistical end of the window period.

[0124] In the embodiment of the present application, the load statistics hardware only stores the cached load data (the first load and the second load) in the statistical window period. Each time the window period ends or a new window period arrives, the load data is saved to the corresponding position in the system memory, the internal load is cleared, and new statistical data is re-recorded. In this way, the load data inside the load statistics hardware can be cleared in time to ensure that there is enough storage space for storing the load data counted after clearing.

[0125] In some embodiments, the above step S320 "updating each of the first load and the second load to the system memory" can be implemented by the following steps:

[0126] Step 321: In response to the task switching information, trigger task load statistics to respectively count the second loads corresponding to each task that has been switched;

[0127] Step 322: In response to the second trigger information, all second loads corresponding to each of the processors are accumulated to obtain each of the first loads.

[0128] In the embodiment of the present application, in the window period, in response to the task switching information, the task load statistics are triggered to respectively count the second loads corresponding to each task that has been switched; in response to the second trigger information, the load calculation unit accumulates all the second loads corresponding to each processor to obtain each first load. In this way, the first loads corresponding to all tasks running in the window period can be counted, and then at the end of the window period, all the second loads corresponding to each processor are accumulated to obtain each first load.

[0129] In some embodiments, counting the target second load within the window period, where the target second load is the load corresponding to the target task, includes the following steps:

[0130] Step S210: Obtain a computing power factor of a processor that executes the target task, wherein the computing power factor is related to the frequency and computing power of the processor;

[0131] In the implementation process, the above formula (2) can be used to calculate the computing power factor. The computing power factor of the processor of the target task can be calculated in real time; or the computing power factors of different processors at different frequencies can be pre-calculated and stored, and then the computing power factor of the processor executing the target task can be obtained from the pre-stored operator factors.

[0132] Step S220: Count the target second load based at least on the computing power factor, the duration of the window period, and the start time and end time of the target task within the window period.

[0133] During implementation, the target second load may be calculated using the above formula (3).

[0134] In the embodiment of the present application, the computing power factor of the processor executing the target task is first obtained, and then the target second load is counted based on at least the computing power factor, the duration of the window period, and the start time and end time of the target task within the window period. In this way, the computing power factor is pre-calculated, and then the computing power factor is used to calculate the second load, so that the second load can be effectively obtained and the efficiency of calculating the second load can be improved.

[0135] Figure 4A A schematic diagram of the structure of an electronic device is provided in an embodiment of the present application, such as Figure 4A As shown, the electronic device at least includes a processor 10 , a load statistics hardware 11 , a system memory 12 , and a dynamic voltage and frequency controller 14 , wherein the dynamic voltage and frequency controller 14 is connected to the load statistics hardware 11 .

[0136] The present invention provides a method for frequency modulation of a processor, which is applied to Figure 4B The electronic equipment shown, such as Figure 4B As shown, the method comprises the following steps:

[0137] Step S410, performing load statistics through the load statistics hardware, including: responding to the first trigger information, counting the first load corresponding to each processor and the second load corresponding to each task within the window period;

[0138] Step S420: When it is determined that the first load of the target processor is greater than the load threshold, the load statistics hardware sends a trigger signal to the dynamic voltage frequency controller to trigger the dynamic voltage frequency modulation hardware to read the first load of the target processor to adjust the frequency of the target processor.

[0139] Here, the dynamic Vcc and frequency scaling (DVFS) controller can perform dynamic voltage and frequency adjustment, dynamically adjusting the processor's operating frequency and voltage according to the different computing power requirements of the tasks running the processor. For example, for the same processor, the higher the frequency, the higher the required voltage. By adjusting the frequency and voltage, the purpose of energy saving can be achieved.

[0140] During implementation, the load statistics hardware may notify the dynamic voltage and frequency controller when the first load suddenly increases and exceeds the load threshold. The dynamic voltage and frequency controller may read the corresponding first load information from the system memory and adjust the corresponding target processor based on the first load.

[0141] In an embodiment of the present application, when the load statistics hardware determines that the first load of the target processor is greater than the load threshold, a trigger signal can be directly sent to the dynamic voltage and frequency controller to timely adjust the frequency of the target processor, thereby effectively eliminating the task running problem caused by the inability of the processor to process the excessive load in a timely manner.

[0142] Based on the foregoing embodiments, an embodiment of the present application provides a load statistics device, which includes the modules included, each module includes each sub-module, each sub-module includes a unit, which can be implemented by a processor in an electronic device; of course, it can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA), etc.

[0143] Figure 5 A schematic diagram of the composition structure of the load statistics device provided in the embodiment of the present application is shown in FIG. Figure 5 As shown, the device 500 includes:

[0144] A statistics module 510, configured to respond to the first trigger information and calculate a first load corresponding to each processor and a second load corresponding to each task within a statistics window period;

[0145] The updating module 520 is used to update each of the first load and the second load to the system memory.

[0146] In some embodiments, the update module 520 is also used to store each of the first load and the second load in the previous window period into the system memory and clear the storage read-write unit in response to the first trigger information or the second trigger information, wherein the second trigger information is used to trigger the statistical end of the window period.

[0147] In some embodiments, the update module includes a statistical submodule and an accumulation submodule, wherein the statistical submodule is used to trigger task load statistics in response to task switching information, so as to separately count the second loads corresponding to each task that has been switched; and the accumulation submodule is used to accumulate all the second loads corresponding to each of the processors in response to the second trigger information to obtain each of the first loads.

[0148] In some embodiments, the statistical submodule includes an acquisition unit and a statistical unit, wherein the acquisition unit is used to acquire the computing power factor of the processor executing the target task, wherein the computing power factor is related to the frequency and computing power of the processor; and the statistical unit is used to count the target second load based at least on the computing power factor, the length of the window period, and the start time and end time of the target task within the window period.

[0149] The description of the above device embodiment is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the device embodiment of the present application, please refer to the description of the method embodiment of the present application for understanding.

[0150] It should be noted that in the embodiment of the present application, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable an electronic device (which can be a mobile phone, a tablet computer, a laptop computer, a desktop computer, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.

[0151] Correspondingly, an embodiment of the present application provides a storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the load statistics method provided in the above embodiment are implemented.

[0152] Correspondingly, an embodiment of the present application provides an electronic device, Figure 6 A hardware entity diagram of an electronic device provided in an embodiment of the present application, such as Figure 6As shown, the hardware entity of the device 600 includes: a memory 601 and a processor 602, wherein the memory 601 stores a computer program that can be run on the processor 602, and the processor 602 implements the steps in the load statistics method provided in the above embodiment when executing the program.

[0153] The memory 601 is configured to store instructions and applications executable by the processor 602, and can also cache data to be processed or processed by the processor 602 and various modules in the electronic device 600 (for example, image data, audio data, voice communication data, and video communication data), which can be implemented through flash memory (FLASH) or random access memory (Random Access Memory, RAM).

[0154] It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0155] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned sequence numbers of the embodiments of the present application are only for description and do not represent the advantages and disadvantages of the embodiments.

[0156] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0157] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0158] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0159] In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0160] A person skilled in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, etc., various media that can store program codes.

[0161] Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application can be essentially or partly reflected in the form of a software product that contributes to the relevant technology. The computer software product is stored in a storage medium, including several instructions to enable an electronic device (which can be a mobile phone, a tablet computer, a laptop computer, a desktop computer, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0162] The methods disclosed in several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0163] The features disclosed in several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0164] The features disclosed in several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0165] The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An electronic device comprising at least a processor, load statistics hardware and system memory, The processor is connected to the load statistics hardware; The processor and the load statistics hardware are respectively connected to the system memory; The load statistics hardware is used to respond to the first trigger information, count the first load corresponding to each processor and the second load corresponding to each task within a statistics window period, and update each of the first load and the second load to the system memory.

2. The electronic device according to claim 1, wherein the load statistics hardware comprises a trigger unit, a configuration unit, a storage read-write unit and a calculation unit; The configuration unit is an interface for interaction between the processor and the load statistics hardware, and is used to obtain the first trigger information from the processor; The load statistics hardware is used to respond to the first trigger information and count the first load corresponding to each processor and the second load corresponding to each task within the statistics window period, including: The trigger unit is used to receive the first trigger information sent by the configuration unit and generate a corresponding trigger instruction; The load calculation unit is used for counting each of the first load and the second load within a window period in response to the trigger instruction, and storing each of the first load and the second load in the storage read-write unit; The storage read-write unit is used to update each of the first load and the second load to the system memory with the window period as the update period.

3. The method according to claim 2, wherein the storage read-write unit is used to update each of the first load and the second load to the system memory, comprising: The storage read-write unit stores each of the first load and the second load in the previous window period into the system memory in response to the first trigger information or the second trigger information, and clears the storage read-write unit, wherein the second trigger information is used to trigger the statistical end of the window period.

4. The electronic device according to claim 3, wherein the calculation unit is used to count each of the first load and the second load within a window period, comprising: During the window period, the computing unit triggers task load statistics in response to task switching information to respectively count the second loads corresponding to each task that has been switched; In response to the second trigger information, the load calculation unit accumulates all the second loads corresponding to each of the processors to obtain each of the first loads.

5. The electronic device according to claim 4, wherein the target second load within the statistical window period, the target second load being the load corresponding to the target task, comprises: The computing unit obtains a computing power factor of a processor that executes the target task, wherein the computing power factor is related to a frequency and computing power of the processor; The calculation unit is used to count the target second load based on at least the computing power factor, the length of the window period, and the start time and end time of the target task within the window period.

6. A load statistics method, applied to an electronic device, the electronic device comprising at least a processor, load statistics hardware and system memory, The load statistics hardware is used to execute a load statistics method, the load statistics method comprising: In response to the first trigger information, counting a first load corresponding to each of the processors and a second load corresponding to each task within a window period; Each of the first load and the second load is updated to the system memory.

7. The method of claim 6, wherein updating each of the first load and the second load to the system memory comprises: In response to the first trigger information or the second trigger information, each of the first load and the second load in the previous window period is stored in the system memory, and the storage read-write unit is cleared, wherein the second trigger information is used to trigger the statistical end of the window period.

8. The method according to claim 7, wherein each of the first load and the second load within the statistical window period comprises: In response to the task switching information, triggering task load statistics to respectively count the second loads corresponding to the respective switched tasks; In response to the second trigger information, all second loads corresponding to each of the processors are accumulated to obtain each of the first loads.

9. The method according to claim 8, wherein the target second load within the statistical window period is the load corresponding to the target task, comprising: Obtaining a computing power factor of a processor that executes the target task, wherein the computing power factor is related to the frequency and computing power of the processor; The target second load is counted based on at least the computing power factor, the duration of the window period, and the start time and end time of the target task within the window period.

10. A frequency modulation method for a processor, applied to an electronic device, wherein the electronic device at least comprises a processor, load statistics hardware, a system memory and a dynamic voltage frequency controller, wherein: The dynamic voltage frequency controller is connected to the load statistics hardware, Performing load statistics through the load statistics hardware includes: responding to the first trigger information, counting the first load corresponding to each processor and the second load corresponding to each task within the statistics window period; When it is determined that the first load of the target processor is greater than the load threshold, the load statistics hardware sends a trigger signal to the dynamic voltage frequency controller to trigger the dynamic voltage frequency modulation hardware to read the first load of the target processor to adjust the frequency of the target processor.

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