SOC chip debugging method, system, device and medium
By determining the debug library file on the host computer and generating debug messages, remote debugging of the SOC chip is realized, and the problems of high and difficult occupation of SOC chip debugging resources in the existing technology are solved, which improves debugging efficiency and simplifies technical requirements.
Patent Information
- Application Number
- CN202411817571.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2025-03-21
AI Technical Summary
When debugging SOC chips, the existing technology requires loading system programs into the RAM of the SOC chip, resulting in increased resource usage, high debugging difficulty, and high requirements for the professional quality of technicians.
By determining the debug library files on the upper computer, using these library files to generate debug messages, and sending them to the SOC chip through the UART protocol, remote debugging and configuration of the SOC chip is realized, and the use of chip resources is reduced.
It reduces the difficulty and resource utilization of SOC chip debugging, improves debugging efficiency, and reduces the requirements for the professional quality of technicians.
Smart Images
Figure CN119669045A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip debugging technology, and in particular to a debugging method, system, device and medium for a SOC chip. Background Art
[0002] At present, embedded systems and mobile device SOC (System on Chip, system-level chip) usually use JTAG (Joint Test Action Group, international standard test protocol) debugging mode to debug system programs. In this debugging mode, a JTAG emulator is used to load a higher-level system program from a server into the RAM (Random Access Memory) inside the SOC chip for direct debugging and operation. The size of the system program is limited by the size of the RAM resources inside the SOC chip. When debugging large and complex system programs, it is necessary to directly integrate larger RAM resources or integrate DDR (Double Data Rate, double-rate synchronous dynamic random access memory) controllers on the SOC chip, which will increase the area, power consumption and cost of the SOC chip. In addition, JTAG emulator debugging requires professional SOC underlying technology programming, which has high requirements on the professional quality of operators, and also requires the unified assembly of JATG connectors on the motherboard of the SOC, which will increase the cost and difficulty of production debugging and equipment maintenance.
[0003] Therefore, how to reduce the difficulty of debugging and reduce the occupation of chip resources when debugging the SOC chip is a problem that technical personnel in this field need to solve. Summary of the invention
[0004] The present application provides a debugging method, system, device and medium for a SOC chip, so as to reduce the debugging difficulty and the occupation of chip resources when debugging the SOC chip.
[0005] In a first aspect, the present application provides a debugging method for a SOC chip, the debugging method being applied to a host computer, and the debugging method comprising:
[0006] Determine a debug library file; wherein the debug library file is a library file encapsulated by various message interfaces; the message interface is an interface for generating various debug messages;
[0007] Generate a debug message using the debug library file, and send the debug message to the SOC chip, so as to remotely debug the SOC chip through the debug message;
[0008] A configuration file is generated according to the chip debugging result and sent to the SOC chip.
[0009] Optionally, determining the debugging library file includes:
[0010] Determine predefined debugging operation definition information; wherein the debugging operation definition information includes: debugging agent instructions, and configuration data processing instructions and parameters;
[0011] Each message interface is encapsulated as a library file according to the debugging operation definition information.
[0012] Optionally, the generating a debugging message by using the debugging library file includes:
[0013] Calling a first message interface to generate a debugging proxy message; the debugging proxy message is generated by a debugging proxy instruction corresponding to the first message interface;
[0014] The second message interface is called to generate a service configuration message; the service configuration message is generated by the configuration data processing instructions and parameters corresponding to the second message interface; wherein the first message interface and the second message interface are message interfaces in the library file.
[0015] Optionally, sending the debugging message to a SOC chip includes:
[0016] The debugging message is sent to the UART interface of the SOC chip through the UART protocol.
[0017] In a second aspect, the present application provides a debugging method for a SOC chip, the debugging method being applied to the SOC chip, the debugging method comprising:
[0018] Receiving a debugging message sent by a host computer; the debugging message is generated by the debugging method described in any one of claims 1 to 4;
[0019] Debugging the SOC chip using the debugging message;
[0020] Receive a configuration file sent by the host computer; the configuration file is a configuration file generated according to the chip debugging result.
[0021] Optionally, debugging the SOC chip by using the debugging message includes:
[0022] If the debugging message is a debugging agent message, the remote serial port debugging agent module performs a corresponding debugging processing operation according to the debugging agent message.
[0023] Optionally, debugging the SOC chip by using the debugging message includes:
[0024] If the debugging message is a service configuration message, the corresponding service configuration processing operation is performed according to the service configuration message by configuring the data processing module, and an operation result is generated;
[0025] The operation result is sent to the host computer.
[0026] In a third aspect, the present application provides a debugging system for a SOC chip, including:
[0027] Host computer and SOC chip;
[0028] The host computer is used to: determine a debug library file, which is a library file encapsulated by various message interfaces, and the message interface is an interface for generating various debug messages; generate debug messages using the debug library file, and send the debug messages to the SOC chip, so as to remotely debug the SOC chip through the debug messages; generate a configuration file according to the chip debugging result, and send it to the SOC chip;
[0029] The SOC chip is used for: receiving a debugging message sent by a host computer, and debugging the SOC chip using the debugging message; and receiving a configuration file sent by the host computer.
[0030] In a fourth aspect, the present application further provides an electronic device, including:
[0031] A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor executes the steps of the debugging method applied to the host computer or the debugging method applied to the SOC chip through the computer program.
[0032] In a fifth aspect, the present application also provides a computer storage medium, which stores computer executable instructions, and the computer executable instructions are used to execute the above-mentioned debugging method applied to the host computer, or the steps of the above-mentioned debugging method applied to the SOC chip.
[0033] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art: The present application provides a debugging solution for a SOC chip. In this solution, the host computer first determines the debugging library file; the debugging library file is a library file encapsulated by various message interfaces, and the message interface is an interface for generating various debugging messages; the debugging message is generated by using the debugging library file, and the debugging message is sent to the SOC chip, so as to remotely debug the SOC chip through the debugging message, and generate a configuration file based on the chip debugging result and send it to the SOC chip. It can be seen that when debugging the SOC chip, the present application does not need to load the system program into the SOC chip. The host computer can send the debugging message to the SOC chip through the debugging library file, realize remote control of the SOC chip, and improve debugging efficiency; and when debugging the SOC chip, the present solution does not have high professional requirements for technicians, thereby reducing the difficulty of debugging the SOC chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.
[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0036] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0037] Figure 1 A schematic diagram of a SOC chip debugging method provided in an embodiment of the present application;
[0038] Figure 2 A flowchart of another SOC chip debugging method provided in an embodiment of the present application;
[0039] Figure 3 A flowchart of another SOC chip debugging method provided in an embodiment of the present application;
[0040] Figure 4 A flowchart of another SOC chip debugging method provided in an embodiment of the present application;
[0041] Figure 5 A schematic diagram of the structure of a debugging system for a SOC chip provided in an embodiment of the present application;
[0042] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0043] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0044] The disclosure below provides many different embodiments or examples to implement different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0045] This application belongs to the field of embedded system and integrated circuit design. The startup process of the automotive-grade SOC switching chip requires millisecond-level fast flow characteristics, so it is necessary to implement an efficient and safe configuration file startup process. In the embodiment of this application, a debugging method, system, device and medium of a SOC chip are disclosed. This solution can realize remote control of the SOC chip and automatically generate and distribute configuration files, which reduces the difficulty of debugging and reduces the occupation of chip resources.
[0046] See also Figure 1 , Figure 1 A flow chart of a debugging method for a SOC chip provided in an embodiment of the present application is provided. The debugging method is applied to a host computer and includes:
[0047] S101, determining a debugging library file; wherein the debugging library file is a library file encapsulated by various message interfaces; the message interface is an interface for generating various debugging messages;
[0048] In this application, it is necessary to generate a debug library file in advance before debugging the SOC chip. The debug library file is used to communicate with the SOC chip, and remote debugging of the SOC chip is realized by sending a debug message to the SOC chip. The debug library file includes multiple message interfaces, and different message interfaces are used to generate different debug messages. For example: the message interface in the debug library file is: the configuration port mode message interface, and the debug message of the configuration port mode can be generated through the configuration port mode message interface.
[0049] S102, generating a debugging message using the debugging library file, and sending the debugging message to the SOC chip, so as to remotely debug the SOC chip through the debugging message;
[0050] When debugging the SOC chip, the present application uses the debug library file to generate a debug message corresponding to the debug operation, and the debug operation is the debug operation performed by the host computer to control the SOC chip; after the host computer generates the debug message, it is necessary to send the debug message to the SOC chip so as to remotely debug the SOC chip through the debug message. In the present application, the host computer software can realize the configuration, diagnosis and debugging functions of the core switching business logic of the SOC chip with the support of the debug library file, including L2 / L3 forwarding (data link layer / network layer data forwarding mechanism), port, MAC (Media Access Control Address, media access control address), VLAN (Virtual Local Area Network, virtual local area network), mirroring, QOS (Quality of Service, quality of service), ACL (Access Control List, access control list), TSN (Time-Sensitive Networking, time-sensitive network) business feature module, etc.
[0051] In the present application, the number of the debugging message is not specifically limited, and multiple corresponding debugging messages can be generated according to the different debugging operations to be performed. For example, the debugging operation performed by the host computer on the SOC chip is: configuring the port mode. At this time, it is necessary to set the configuration port mode message interface in the debugging library file. The host computer generates the corresponding configuration port mode debugging message through the configuration port mode message interface. After sending the configuration port mode debugging message to the SOC chip, the port mode of the SOC chip can be configured through the debugging message.
[0052] S103: Generate a configuration file according to the chip debugging result and send it to the SOC chip.
[0053] In this application, after the host computer completes the remote debugging of the SOC chip, it will generate a chip debugging result, which is the debugging result value after executing each debugging operation. After this application generates a configuration file based on the chip debugging result, the configuration file can be sent to the SOC chip. After the SOC chip restarts, the configuration file is loaded, and the startup of the configuration file is completed by parsing and executing the relevant configuration.
[0054] From the above, it can be seen that when debugging the SOC chip, the present application does not need to load the system program into the SOC chip. The host computer can send the debugging message to the SOC chip through the debugging library file, thereby realizing remote control of the SOC chip and improving the debugging efficiency. Moreover, when debugging the SOC chip, the present solution does not have high professional requirements for the technicians, thereby reducing the difficulty of debugging the SOC chip.
[0055] See also Figure 2 , Figure 2 A flow chart of another SOC chip debugging method provided in an embodiment of the present application, wherein the debugging method is applied to a host computer and comprises:
[0056] S201, determining predefined debugging operation definition information; wherein the debugging operation definition information includes: debugging agent instructions, and configuration data processing instructions and parameters;
[0057] In this application, when generating a debug library file, it is first necessary to determine the predefined debug operation definition information; the debug operation definition information includes: debug proxy instructions, and configuration data processing instructions and parameters. Among them, the debug proxy instructions include: instructions for turning on the debug proxy function, instructions for turning off the debug proxy function, etc.; the configuration data processing instructions include instructions for writing register values, and the parameters of the instructions are register addresses and register values.
[0058] See Table 1, which is a debugging agent instruction definition table disclosed in an embodiment of the present application; see Table 2, which is a configuration data processing instruction and parameter definition table disclosed in an embodiment of the present application.
[0059] Table 1
[0060] Instruction Definition Instruction Description debugon Turn on the debug agent debugoff Turn off debug proxy debugshow Debugging instructions and execution result statistics query debugls Link scan result query debugsave Configuration file saving debugreboot Remotely restart SOC
[0061] Table 2
[0062]
[0063]
[0064] S202, encapsulating each message interface into a library file according to the debugging operation definition information; wherein the debugging library file is a library file encapsulated by each message interface; and the message interface is an interface for generating each debugging message;
[0065] In this application, it is necessary to implement the corresponding message interface based on the above-mentioned debugging agent instruction definition, configuration data processing instructions and parameter definition, and encapsulate it into a debugging library file so that the host computer software can integrate the debugging library file to communicate with the SOC chip.
[0066] S203, calling the first message interface to generate a debugging proxy message; the debugging proxy message is generated by a debugging proxy instruction corresponding to the first message interface;
[0067] S204, calling the second message interface to generate a service configuration message; the service configuration message is generated by the configuration data processing instructions and parameters corresponding to the second message interface; wherein the first message interface and the second message interface are message interfaces in the library file.
[0068] In this application, the message interface in the library file can be divided into two categories: the first message interface and the second message interface. The first message interface is used to generate a debug agent message according to the debug agent instruction, and the debug agent message may include a message to turn on the debug agent function, a message to turn off the debug agent function, etc.; the second message interface is used to generate a business configuration message according to the configuration data processing instruction and parameters, and the business configuration message may include a message to write a register value, a message to read a register value, etc.
[0069] For example: See Table 1. If the debug proxy function needs to be turned on, the first message interface for turning on the debug proxy function needs to be called. The debug proxy message for turning on the debug proxy function is generated by turning on the debug proxy instruction (debugon). After the debug proxy message is sent to the SOC chip, the SOC chip parses the debug proxy message as debugon, and the debug proxy function can be turned on. See Table 2. If the port mode needs to be configured, the second message interface for configuring the port mode needs to be called. The corresponding service configuration message is generated by the / w instruction and the two parameters of the register address and register value are set. After the service configuration message is sent to the SOC chip, the SOC chip parses the / w instruction, register address and register value in the service configuration message, and the register value can be written into the register corresponding to the register address to implement the configuration of the port mode.
[0070] S205, sending the debugging message to the UART interface of the SOC chip through the UART protocol, so as to remotely debug the SOC chip through the debugging message;
[0071] In the present application, the communication between the host computer and the SOC chip can be realized through the UART protocol (Universal Asynchronous Receiver / Transmitter, asynchronous full-duplex serial communication protocol). Among them, the present application can directly integrate the UART interface module in the SOC chip, and the UART interface module can be directly connected to the serial port of the host computer through the RS232 (serial communication interface standard) serial port extension cable, and can also be connected to the USB port of the host computer through the USB (Universal Serial Bus, Universal Serial Bus) to UART interface module.
[0072] S206: Generate a configuration file according to the chip debugging result and send it to the SOC chip.
[0073] In the present application, after the upper computer debugs the SOC chip, the upper computer can generate a configuration file with one click. In order to avoid transmission failure caused by excessive configuration file, the present application can send the image of the configuration file in segments to the SOC chip for storage. After saving, a restart message is sent to the SOC chip remotely. After the SOC chip restarts, the configuration file image is loaded in segments, and the configuration file is parsed and executed to complete the startup of the configuration file; if there are other SOC chips that need to update the configuration, the configuration file can also be sent to other S0C chips so that other S0C chips can load the configuration file.
[0074] In summary, it can be seen that the present application can remotely debug the SOC chip through the serial port based on the UART bus and generate a configuration file. Through this solution, the dependence of the size of the debugged system program on the size of the RAM resources inside the SOC chip and the dependence of the debugged system program on the JTAG emulator can be decoupled. In addition, on the industrial automation production line, this solution can be used to remotely debug and configure various devices on the production line, thereby improving production efficiency and the convenience of equipment maintenance.
[0075] See also Figure 3 , Figure 3 A flowchart of another SOC chip debugging method provided in an embodiment of the present application is provided. The debugging method is applied to the SOC chip. The debugging method includes:
[0076] S301, receiving a debugging message sent by a host computer;
[0077] Among them, the debugging message is generated by the host computer through the debugging method described in the above method embodiment; such as: the host computer determines the debugging library file, generates the debugging message using the debugging library file, and sends the debugging message to the SOC chip; the debugging library file is a library file encapsulated by various message interfaces; the message interface is an interface for generating various debugging messages.
[0078] S302, debugging the SOC chip using the debugging message;
[0079] S303, receiving a configuration file sent by a host computer; the configuration file is a configuration file generated according to the chip debugging result.
[0080] The debugging method described in the embodiment of the present application is the same as the debugging method described in the above embodiment. It is just the same technical solution described from a different angle. Therefore, the relevant description of this embodiment can be found in the above embodiment, and is not specifically limited here.
[0081] From the above, it can be seen that when debugging the SOC chip, the present application does not need to load the system program into the SOC chip. The host computer can send the debugging message to the SOC chip through the debugging library file, thereby realizing remote control of the SOC chip and improving the debugging efficiency. Moreover, when debugging the SOC chip, the present solution does not have high professional requirements for the technicians, thereby reducing the difficulty of debugging the SOC chip.
[0082] See also Figure 4 , Figure 4 A flowchart of another SOC chip debugging method provided in an embodiment of the present application is provided. The debugging method is applied to the SOC chip. The debugging method includes:
[0083] S401, receiving a debugging message sent by a host computer;
[0084] Among them, the debugging message is generated by the host computer through the debugging method described in the above method embodiment; such as: the host computer determines the debugging library file, generates the debugging message using the debugging library file, and sends the debugging message to the SOC chip; the debugging library file is a library file encapsulated by various message interfaces; the message interface is an interface for generating various debugging messages.
[0085] S402: If the debugging message is a debugging agent message, the remote serial port debugging agent module performs a corresponding debugging processing operation according to the debugging agent message;
[0086] S403: If the debugging message is a service configuration message, the data processing module is configured to perform a corresponding service configuration processing operation according to the service configuration message, and an operation result is generated and sent to the host computer;
[0087] S404, receiving a configuration file sent by the host computer; the configuration file is a configuration file generated according to the chip debugging result.
[0088] In the present application, the SOC chip includes a UART interface module, a remote serial port debugging agent module and a configuration data processing module. When the host computer sends a debugging message to the SOC chip, the debugging message can be sent to the UART interface of the SOC chip through the UART protocol, and the remote serial port debugging agent module of the SOC chip receives the debugging message through the UART interface module. The remote serial port debugging agent module is responsible for the operation logic of the entire debugging device with the support of the configuration data processing module.
[0089] Among them, when the remote serial port debugging agent module parses the debugging message as a debugging agent message, it processes the debugging agent message, including starting, stopping, parameter configuration, remote configuration file reception verification storage and other functions; if the remote serial port debugging agent module parses the debugging message as a business configuration message, the business configuration message is sent to the configuration data processing module, and the configuration data processing module performs corresponding processing operations according to the business configuration message, including data instruction parsing, verification checking, and instruction execution operations. At the same time, the configuration data processing module is also responsible for encapsulating the execution results according to the protocol and sending them to the host computer through the remote serial port debugging agent module.
[0090] For example: if the debug message is a debug agent message generated by turning on the debug agent instruction (debugon), the remote serial port debug agent module can turn on the debug agent function after parsing that the message contains debugon; if the debug message is a business configuration message generated by the two parameters of the / w instruction, register address and register value, the remote serial port debug agent module parses that the message contains the / w instruction, register address and register value. At this time, the business configuration message needs to be sent to the configuration data processing module. The configuration data processing module writes the register value into the register corresponding to the register address according to the / w instruction, register address and register value.
[0091] In summary, this solution can be used to remotely debug SOC chips and generate configuration files based on the UART bus. Through this solution, the dependence of the size of the debugged system program on the size of the RAM resources inside the SOC chip can be decoupled, and the dependence of the debugged system program on the JTAG emulator can be decoupled. In addition, on industrial automation production lines, this solution can be used to remotely debug and configure various devices on the production line, thereby improving production efficiency and the convenience of equipment maintenance.
[0092] Based on the above embodiment, in another embodiment of the present application, a debugging system for a SOC chip is disclosed, the system comprising: a host computer and a SOC chip;
[0093] The host computer is used to: determine a debug library file, which is a library file encapsulated by various message interfaces, and the message interface is an interface for generating various debug messages; generate debug messages using the debug library file, and send the debug messages to the SOC chip, so as to remotely debug the SOC chip through the debug messages; generate a configuration file according to the chip debugging result, and send it to the SOC chip;
[0094] The SOC chip is used for: receiving a debugging message sent by a host computer, debugging the SOC chip using the debugging message, and receiving a configuration file sent by the host computer.
[0095] See also Figure 5 , Figure 5 A schematic diagram of the debugging system structure of a SOC chip provided in an embodiment of the present application, wherein a PC is a host computer, the host computer includes host computer application software and a UART serial port protocol message encapsulation library, the KD6610 chip in the figure is a SOC chip, and the SOC chip includes a remote serial port debugging agent module and a configuration data processing module.
[0096] Among them, the user uses the UART serial port protocol message encapsulation library on the host computer application software of the PC to send UART protocol debugging messages to the SOC chip. The UART serial port protocol message encapsulation library is a debugging library file, and the PC and the SOC chip communicate through the UART protocol.
[0097] Moreover, in the SOC chip, the CPU (Central Processing Unit) of the SOC chip is powered on, and after the initialization of the CPU core (CPU core), the serial port, and the clock is completed, the boot mode register is queried to enter the configuration file startup, and the configuration file image stored in the SPI (Serial Peripheral Interface) / XIP FLASH (eXecute-In-PlaceFlash) or EEPROM (Electrically Erasable Programmableread only memory) is segmented and loaded for configuration and parsed and executed, and the SOC remote serial port debugging agent application is started.
[0098] When debugging the SOC chip, after the SOC chip is powered on and enters the UART protocol remote agent transceiver mode, the remote serial port debugging agent module takes over all serial port input and output. The remote serial port debugging agent module can directly process the message data received by the UART interface module, such as opening the debugging mode, closing the debugging mode, checking the debugging instruction status statistics, debugging and burning configuration files, and remote restart command global commands. Other business configuration messages are handed over to the configuration data processing module for unified processing, including data instruction parsing, verification checking, and configuration execution. After the configuration data processing module completes the processing, it returns the processing result to the remote serial port debugging agent module, and the remote serial port debugging agent module then encapsulates the processing result into message data and sends it to the remote host computer through the UART protocol.
[0099] In summary, in the debugging system provided by this application, the host computer and the SOC chip can communicate through the UART protocol, the host computer remotely debugs the SOC chip through the UART protocol, and generates a configuration file and sends it to the SOC chip. Through this solution, the dependency of the debugged system program size on the size of the RAM resources inside the SOC chip is decoupled, and the dependency of the debugged system program on the JTAG emulator is decoupled. In addition, on the industrial automation production line, this solution can be used to remotely debug and configure various devices on the production line, thereby improving production efficiency and the convenience of equipment maintenance.
[0100] See also Figure 6 , Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, the electronic device specifically includes:
[0101] The processor 21, the memory 22 and the computer program stored in the memory 22 and executable on the processor 21, the processor 21 executes the above-mentioned debugging method applied to the host computer, or the steps of the above-mentioned debugging method applied to the SOC chip through the computer program. When the electronic device executes the above-mentioned debugging method applied to the host computer, it can be a PC, and when the electronic device executes the above-mentioned debugging method applied to the SOC chip, it can be a SOC chip.
[0102] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.
[0103] The memory 22 may include one or more computer-readable storage media, which may be non-transitory. The memory 22 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 22 is at least used to store the following computer program 221, wherein, after the computer program is loaded and executed by the processor 21, it can implement the relevant steps in the debugging method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 22 may also include an operating system 222 and data 223, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 222 may include Windows, Unix, Linux, etc.
[0104] In some embodiments, the electronic device may further include a display screen 23 , an input / output interface 24 , a communication interface 25 , a sensor 26 , a power source 27 , and a communication bus 28 .
[0105] certainly, Figure 6 The structure of the electronic device shown does not constitute a limitation on the electronic device in the embodiments of the present application. In actual applications, the electronic device may include Figure 6 More or fewer components than shown, or combinations of certain components.
[0106] In another exemplary embodiment, a computer storage medium is also provided, and when the program instructions are executed by a processor, the steps of the debugging method described in any of the above method embodiments are implemented. The storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.
[0107] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment will not be described in detail here.
[0108] It should be understood that the terms used in the text are only for the purpose of describing specific example embodiments, and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used in the text may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.
[0109] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.
Claims
1. A method for debugging a SOC chip, characterized in that: The debugging method is applied to a host computer, and the debugging method comprises: Determine a debug library file; wherein the debug library file is a library file encapsulated by various message interfaces; the message interface is an interface for generating various debug messages; Generate a debug message using the debug library file, and send the debug message to the SOC chip, so as to remotely debug the SOC chip through the debug message; A configuration file is generated according to the chip debugging result and sent to the SOC chip.
2. The debugging method according to claim 1, characterized in that: The step of determining the debugging library file comprises: Determine predefined debugging operation definition information; wherein the debugging operation definition information includes: debugging agent instructions, and configuration data processing instructions and parameters; Each message interface is encapsulated as a library file according to the debugging operation definition information.
3. The debugging method according to claim 2, characterized in that: The step of generating a debugging message by using the debugging library file comprises: Calling a first message interface to generate a debugging proxy message; the debugging proxy message is generated by a debugging proxy instruction corresponding to the first message interface; The second message interface is called to generate a service configuration message; the service configuration message is generated by the configuration data processing instructions and parameters corresponding to the second message interface; wherein the first message interface and the second message interface are message interfaces in the library file.
4. The debugging method according to any one of claims 1 to 3, characterized in that: Sending the debugging message to the SOC chip includes: The debugging message is sent to the UART interface of the SOC chip through the UART protocol.
5. A method for debugging a SOC chip, characterized in that: The debugging method is applied to a SOC chip, and the debugging method comprises: Receiving a debugging message sent by a host computer; the debugging message is generated by the debugging method described in any one of claims 1 to 4; Debugging the SOC chip using the debugging message; Receive a configuration file sent by the host computer; the configuration file is a configuration file generated according to the chip debugging result.
6. The debugging method according to claim 5, characterized in that: The step of debugging the SOC chip by using the debugging message includes: If the debugging message is a debugging agent message, the remote serial port debugging agent module performs a corresponding debugging processing operation according to the debugging agent message.
7. The debugging method according to claim 5, characterized in that: The step of debugging the SOC chip by using the debugging message includes: If the debugging message is a service configuration message, the corresponding service configuration processing operation is performed according to the service configuration message by configuring the data processing module, and an operation result is generated; The operation result is sent to the host computer.
8. A debugging system for a SOC chip, characterized in that: include: Host computer and SOC chip; The host computer is used to: determine a debug library file, wherein the debug library file is a library file encapsulated by various message interfaces, and the message interface is an interface for generating various debug messages; Generate a debug message using the debug library file, and send the debug message to the SOC chip, so as to remotely debug the SOC chip through the debug message; Generate a configuration file according to the chip debugging result and send it to the SOC chip; The SOC chip is used for: receiving a debugging message sent by a host computer, and debugging the SOC chip using the debugging message; and receiving a configuration file sent by the host computer.
9. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor executes the debugging method described in any one of claims 1 to 4 of the present application, or the steps of the debugging method described in any one of claims 5 to 7 through the computer program.
10. A computer storage medium, characterized in that: The computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the debugging method described in any one of claims 1 to 4 of the present application, or the steps of the debugging method described in any one of claims 5 to 7.