An efficient preparation process for the glass passivation layer of GPP chips
By etching the double trench on the GPP chip and coating the glass slurry, the problem of insufficient protection of sharp angles of PN junctions and damage to cutting is solved, simplifying equipment requirements and costs, and improving production efficiency and electrical performance.
Patent Information
- Application Number
- CN202411660820.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-20
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2044-11-20
AI Technical Summary
In the existing GPP chip glass passivation layer preparation process, the scraping method is difficult to effectively protect the sharp corners of the PN junction and is prone to damage the passivation glass during cutting. The lithography equipment is high and the cost is high, the electrophoresis process is complex and the environmental pressure is high.
The double-trench substrate design is adopted, and the metal film table is formed through photoresist exposure and development, and the double-trench is etched. The printed film is used to coat the glass slurry, dry and sintered, and the etching process is simplified, the sharp angle of the PN junction is protected and the equipment requirements are reduced.
It realizes effective protection of sharp angles of PN junctions, simplifies the cutting process, reduces equipment costs and environmental pressure, and improves production efficiency and electrical performance.
Smart Images

Figure CN119673784B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of GPP production, and in particular to an efficient preparation process of a GPP chip glass passivation layer. Background Art
[0002] GPP is the abbreviation of Glassivation, passivation and parts, which is a general term for glass passivation devices. GPP chip glass passivation is a process in which glass slurry is applied to the surface of silicon devices and heated and sintered to form a glass dielectric film. The dielectric film formed by glass passivation can effectively resist the penetration of external impurity gases, the free ion mobility in the film is low, and it has good thermal matching performance and viscosity with silicon.
[0003] After glass passivation, it is also necessary to make a welding electrode window on the top of the chip. Therefore, it is often hoped that there will be no residual glass on the top of the table after glass passivation or as little residual glass on the top as possible. There are three main processes for preparing the glass passivation layer of existing GPP chips, namely traditional scraping, electrophoresis and photolithography. Regardless of the method, it is necessary to first etch the grooves through photolithography to form grooves and table tops. In the subsequent passivation process, electrophoresis and photolithography consume a lot of glass powder. The production of welding windows is prone to many table top glass points and small effective area, resulting in insufficient height of the solder joint boss, and contact between the metal and the glass passivation layer during welding. In addition, the electrophoresis process is complicated, and the wastewater generated by electrophoresis needs to be treated and discharged. Photolithography is the mainstream of high-end GPP chip preparation because of its good performance. The passivation glass used is a mixture of photoresist and glass powder. Because its passivation glass can cover the sharp corners of the PN junction of the table, and the glass in the groove is removed by photolithography for easy removal. Subsequent cutting, but the photolithography method requires more equipment support, and the cost and requirements for the photolithography machine are relatively high. Therefore, the existing process mostly adopts the scraping method with low process cost. The scraping method is easy to make the welding electrode window, but the scraping method has two main disadvantages. First, the scraping method fills the groove with glass, and it is necessary to etch a laser cutting path on the back. The process is complicated and the back cutting cracks will cause damage to the glass. If the cutting is not done properly, the glass will crack under the action of stress, affecting the reliability of the product. Secondly, in the scraping method, the glass cannot cover the table and cannot protect the sharp corners of the PN junction. The sharp corners are where the electric field is most concentrated, and leakage is prone to occur, causing application failure.
[0004] Therefore, a scraping coating process is needed that can solve the problem of protecting the sharp corners of the PN junction and can be easily cut without damaging the passivation glass. Summary of the invention
[0005] In order to solve the problems of PN junction sharp corner protection and cutting without damaging the passivation glass by using a low-cost scraping method, the present invention provides an efficient GPP chip glass passivation layer preparation process.
[0006] An efficient preparation process for the glass passivation layer of a GPP chip provided by the present invention adopts the following technical solutions:
[0007] Fabricate a double-groove substrate. Use a silicon wafer providing a PN junction as the substrate. The silicon wafer includes double grooves and a metal film mesa around the double grooves;
[0008] Prepare glass paste and a printing film. The printing film includes a transparent part with a printed pattern. The transparent part includes an area corresponding to the periphery of the metal film mesa;
[0009] Align and coat the glass paste. Place the silicon wafer on the carrier stage by a wafer sucking device, align the printing film with the silicon wafer, pour the glass paste onto the printing film, and use a squeegee to evenly scrape the glass paste into the grooves of the silicon wafer along the diagonal direction of the mesa to obtain a silicon wafer coated with the glass paste;
[0010] Dry, cure and sinter. Place the silicon wafer coated with the glass paste into a high-temperature chain furnace for drying, and then raise the temperature for sintering after drying.
[0011] Further, the fabrication of the double-groove substrate includes:
[0012] Coat the etching surface of the silicon wafer with a lower-layer photoresist and an upper-layer photoresist in sequence. Place the mask plate in the photolithography machine and expose the lower-layer photoresist and the upper-layer photoresist simultaneously through photolithography;
[0013] Use a positive developer to remove the patterned part, form openings with equal widths on the lower-layer photoresist and the upper-layer photoresist respectively, cure the upper-layer photoresist, then use a negative developer to negatively develop the lower-layer photoresist, widen the opening of the lower-layer photoresist horizontally, and use a fixing solution to remove the developer containing photoresist impurities;
[0014] Form a metal film on the silicon wafer by physical sputtering;
[0015] Etch the developed silicon wafer to form double grooves between two adjacent metal films and form a mesa in the area covered by the metal film. After etching, use a stripping solution to remove the photoresist.
[0016] Further, the thickness of the upper-layer photoresist and the lower-layer photoresist is 1 - 1.5 μm.
[0017] Further, the lower-layer photoresist and the upper-layer photoresist are positive photoresists. The positive developer is n-propanol. The upper-layer photoresist contains a photoinitiator and an epoxy resin. The curing of the upper-layer photoresist includes using triethylenetetramine.
[0018] Further, the negative developer contains tetramethylammonium hydroxide, the concentration of tetramethylammonium hydroxide in the negative developer is 2.38 - 2.42%, and the temperature of the negative development is 23 - 25°C.
[0019] Further, etching the developed silicon wafer includes wet etching, and the wet etching includes etching the silicon wafer with a tetramethylammonium hydroxide etching solution. The concentration of tetramethylammonium hydroxide in the etching solution is 20 - 25%, and the temperature of the etching is 70 - 90°C.
[0020] Further, the depth of the etching is 80 - 160 μm, the width of the etching is 200 - 350 μm, and the line width between the double grooves is 80 - 130 μm.
[0021] Further, the metal film is made of one of copper, gold, titanium, nickel, silver, platinum, and chromium.
[0022] Further, the stripping solution includes one or more of N-methylpyrrolidone, γ-butyrolactone, ethyl lactate, and dimethyl sulfoxide.
[0023] Further, preparing the glass paste includes mixing butyl carbitol acetate and cellulose acetate to form a paste solvent, and mixing the paste solvent with glass powder to form the glass paste.
[0024] Further, making the printing film includes selecting a screen and coating a photosensitive resin on the printing surface of the screen, placing the screen in an oven for drying, closely attaching a patterned film to the screen coated with the photosensitive resin, and exposing, developing, and rinsing the screen. The pattern in the patterned film corresponds to the transparent part of the printing pattern.
[0025] Further, when placing the screen in the oven for drying, the drying temperature is 30 - 40°C, the drying time is 10 - 20 minutes, the temperature of the development is 20 - 30°C, and the time is 1 - 5 minutes.
[0026] Further, the screen is a polyester screen with 300 - 500 meshes.
[0027] Further, aligning the printing film with the silicon wafer includes adjusting the position of the silicon wafer 0.5 mm - 1 mm below the printing film.
[0028] Further, the squeegee evenly scrapes the glass paste into the grooves of the silicon wafer along the diagonal direction of the tabletop, including applying a downward pressure to the printing film, the pressure value not exceeding 80 N, the speed of the squeegee not exceeding 300 mm / s, the angle between the squeegee and the plane of the printing film being 40 - 90 degrees, and the number of one-way scraping of the squeegee not exceeding 5 times.
[0029] Further, the drying temperature for drying and curing is 150 - 200°C, the drying time is 60 - 90 s, the sintering temperature is 650 - 850°C, the sintering time is 6 - 7 h, and 99.99% oxygen is introduced during the sintering process.
[0030] In summary, the present invention has the following beneficial technical effects:
[0031] 1. For an efficient GPP chip glass passivation layer preparation process proposed by the present invention, the product has PN - junction corner protection. By using a printing film to coat the glass paste around the metal film, effective protection of the PN - junction corners is achieved, reducing leakage due to electric - field concentration at the PN - junction corners, and improving the electrical performance and service life of the chip.
[0032] 2. For an efficient GPP chip glass passivation layer preparation process proposed by the present invention, the product is easy to cut and the passivation glass is undamaged. By etching double grooves, complex back - etching laser cutting - track processes are not required in subsequent cutting processes, avoiding damage to the glass and glass hidden cracks caused by back - cutting and chipping in traditional processes, and reducing the cost increase caused by cutting damage.
[0033] 3. The present invention saves processes and reduces costs. The present invention omits the expensive back - side photolithography mask. Since back - side photolithography operations are not required, the corresponding process flow is simplified. The equipment required is simpler than that of the photolithography method, and a high - precision photolithography machine is not needed. Double - groove etching is completed while making the mesa. The produced printing film can be reused, and the production efficiency and stability are good.
[0034] 4. The mesa of the present invention has no glass dots and is easy to weld leads. The preparation of the metal electrode is completed before etching the double grooves. The metal film is made through two layers of photoresist and using the front - and - back steps of positive and negative development. At the same time, using the characteristic that the etching solution only etches the silicon wafer without damaging the metal film, double grooves are etched. The formation of the metal film not only omits the production of mesa electrodes in subsequent processes but also protects the silicon - wafer electrodes, and then a special structure of double grooves is made. By using the alignment and coating of the printing film, the metal - film mesa without glass dots is completely exposed. It has prominent environmental protection advantages compared with the electrophoresis method and greatly reduces the equipment requirements compared with the photolithography method. The present invention has high production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Figure 1 is a flow chart of an efficient GPP chip glass passivation layer preparation process according to Embodiment 1 of the present invention.
[0036] Figure 2 is a flow chart of making a double - groove substrate according to Embodiment 1 of the present invention.
[0037] Figure 3It is a schematic structural diagram of the device prepared by the doctor blade method in the prior art of Embodiment 1 of the present invention.
[0038] Figure 4 It is a schematic structural diagram of the device prepared by the photolithography method in the prior art of Embodiment 1 of the present invention.
[0039] Figure 5 It is a schematic structural diagram of a silicon wafer coated with photoresist in Embodiment 1 of the present invention.
[0040] Figure 6 It is a schematic structural diagram of the silicon wafer after photolithography in Embodiment 1 of the present invention.
[0041] Figure 7 It is a schematic structural diagram of curing the upper layer of photoresist in Embodiment 1 of the present invention.
[0042] Figure 8 It is a schematic structural diagram of widening the opening of the lower layer of photoresist laterally in Embodiment 1 of the present invention.
[0043] Figure 9 It is a schematic structural diagram of sputtering a metal film in Embodiment 1 of the present invention.
[0044] Figure 10 It is a schematic structural diagram of etching double grooves in Embodiment 1 of the present invention.
[0045] Figure 11 It is a schematic structural diagram of stripping photoresist in Embodiment 1 of the present invention.
[0046] Figure 12 It is a schematic diagram of coating glass paste in Embodiment 1 of the present invention.
[0047] Figure 13 It is a schematic structural diagram of the device after sintering in Embodiment 1 of the present invention.
[0048] Among them, 1, silicon wafer; 2, metal film; 3, tabletop; 4, glass paste; 5, lower layer of photoresist; 6, upper layer of photoresist; 7, cured layer; 8, double grooves; 9, printing film; 10, doctor blade; 11, sharp corner. Detailed implementation manners
[0049] The present invention will be further described in detail below with reference to the accompanying drawings.
[0050] Embodiment 1
[0051] In the prior art, refer to Figure 3, in the prior art, for the GPP chip prepared by the doctor blade method, there is continuous glass between the mesa 3 and the mesa 3. It is necessary to etch a laser cutting channel on the back. The process is complex and the back cutting and chipping will damage the glass. When the cutting is improper, the glass will have a hidden crack under the stress effect, affecting the product reliability. Secondly, in the doctor blade method, the glass cannot cover the mesa 3, and the place where the PN junction corner 11 cannot be protected. The corner 11 is where the electric field is most concentrated, and it is easy to have leakage and cause application failure.
[0052] Refer to Figure 4 , in the prior art, for the GPP chip prepared by the photolithography method, the glass in the trench is removed by photolithography for subsequent cutting, and the PN junction corner 11 is protected and applied to scenarios with higher equipment requirements. However, the glass paste 4 in the photolithography method is mixed with the photoresist to form a photoresist glass. It is necessary to etch a cutting channel with a lithography machine. At the same time, an exposed mesa 3 also needs to be etched above the mesa 3. When making a welding window, there are problems such as too many glass points on the mesa 3 and a small effective area, resulting in insufficient height of the solder bump, and contact between the metal and the glass passivation layer during welding. At the same time, there are high requirements for the lithography equipment. It is necessary to first etch the trench, then etch the glass paste, prepare the cutting channel and remove the glass paste on the mesa. Two photolithographies are required. The second photolithography has high requirements for photolithography accuracy, and the process is complex and the preparation cost is high.
[0053] Refer to Figure 1 , a high-efficiency preparation process for the glass passivation layer of the GPP chip in this embodiment includes:
[0054] S1. Fabricate a double-groove 8 substrate, use the silicon wafer 1 providing the PN junction as the substrate. The silicon wafer 1 includes a double-groove 8 and a metal film 2 mesa 3 around the double-groove 8.
[0055] Refer to Figure 2 , the fabrication of the double-groove 8 substrate includes:
[0056] Refer to Figure 5 , S11. Coating the lower photoresist 5 and the upper photoresist 6 on the etching surface of the silicon wafer 1 in sequence, placing the mask plate in the lithography machine, and simultaneously exposing the lower photoresist 5 and the upper photoresist 6 through photolithography. Among them, the thickness of the upper photoresist 6 and the lower photoresist 5 layer is 1 - 1.5 μm.
[0057] Fabricating a silicon wafer 1 with a PN junction is prior art. By methods such as diffusion or ion implantation, donor impurities (such as phosphorus) are doped on one side of the silicon wafer 1 to form an N-type region; acceptor impurities (such as boron) are doped on the other side to form a P-type region. The doped silicon wafer 1 is subjected to appropriate heat treatment to promote the diffusion and activation of impurities, forming a stable PN junction. Before coating the lower photoresist 5, ensure that the etched surface of the silicon wafer 1 is clean. Use the RCA cleaning method to remove the organic matter and oxide layer on the surface. When coating the photoresist, ensure a uniform coating thickness by adjusting the rotation speed of the spin coater. The present invention uses a silicon wafer with a PN junction for preparation, and the PN layer is not shown in the figure.
[0058] Refer to Figure 6 and Figure 7 , S12. Use a positive developer to remove the pattern part, forming openings with equal widths on the lower photoresist 5 and the upper photoresist 6 respectively. Cure the upper photoresist 6 to form a cured layer 7. Refer to Figure 8 , and then use a negative developer to negatively develop the lower photoresist 5, widen the opening of the lower photoresist 5 horizontally, and use a fixing solution to remove the developer containing photoresist impurities.
[0059] Among them, the lower photoresist 5 and the upper photoresist 6 are positive photoresists. The positive developer is n-propanol. The upper photoresist 6 contains a photoinitiator and an epoxy resin. The curing of the upper photoresist 6 includes using triethylenetetramine, and the curing temperature is 150 - 170 °C. The epoxy resin in the upper photoresist 6 layer can react with triethylenetetramine to form a cured layer 7.
[0060] The negative developer contains tetramethylammonium hydroxide. The concentration of tetramethylammonium hydroxide in the negative developer is 2.38 - 2.42%, and the temperature of the negative development is 23 - 25 °C. The time of negative development is controlled within 60 - 120 seconds. The fixing time is controlled within 30 - 60 seconds.
[0061] Refer to Figure 9 , S13. Use physical sputtering to form a metal film 2 on the silicon wafer 1. Among them, the metal film 2 is one of copper, gold, titanium, nickel, silver, platinum, and chromium.
[0062] Physical sputtering requires the use of a physical sputtering device. The sputtering gas (usually argon) is ionized under the action of a high electric field to form a plasma. The ions in the plasma bombard the target material, causing the target material atoms to be sputtered out and deposited on the surface of the silicon wafer 1 to form a metal film 2. At the same time, a metal film 2 is also sputtered on the upper photoresist 6, and the metal film 2 on the upper photoresist 6 is removed along with the removal of the photoresist in subsequent processes.
[0063] Refer to Figure 10, S14. Etch the developed silicon wafer 1 to form double grooves 8 between two adjacent metal films 2, and form a mesa 3 in the area covered by the metal film 2. After etching, use a stripping solution to remove the photoresist.
[0064] The etching of the developed silicon wafer 1 includes wet etching. The wet etching includes etching the silicon wafer 1 with a tetramethylammonium hydroxide etching solution. The concentration of tetramethylammonium hydroxide in the etching solution is 20 - 25%, and the etching temperature is 70 - 90°C.
[0065] Tetramethylammonium hydroxide does not react with the metal film 2 and has no dissolving effect. The metal film 2 plays a role in protecting the silicon in the covered area from etching.
[0066] The depth of the etching is 80 - 160 μm, the width of the etching is 200 - 350 μm, and the line width between the double grooves 8 is 80 - 130 μm.
[0067] Refer to Figure 11 , the stripping solution includes one or more of N-methylpyrrolidone, γ-butyrolactone or ethyl lactate and dimethyl sulfoxide.
[0068] After etching, evenly spray or immerse the silicon wafer 1 with a solution containing the stripping solution to make the stripping solution fully contact with the photoresist. After the photoresist is dissolved, rinse the silicon wafer 1 with deionized water to remove the residual stripping solution and photoresist impurities.
[0069] S2. Prepare the glass paste 4 and the printing film 9. The printing film 9 includes a transparent part with a printed pattern. The transparent part includes an area corresponding to the periphery of the mesa 3 of the metal film 2;
[0070] S21. Prepare the glass paste 4, including mixing butyl carbitol acetate and cellulose acetate to form a paste solvent, and mixing the paste solvent with glass powder to form the glass paste 4.
[0071] Mixing butyl carbitol acetate and cellulose acetate as the paste solvent serves to provide a uniform medium environment. The mixing ratio of butyl carbitol acetate and cellulose acetate is 2:3, enabling the glass powder to be fully dispersed and form a stable paste system. Butyl carbitol acetate has good solubility and volatility and can gradually volatilize during the subsequent drying and curing process, while cellulose acetate can increase the viscosity and stability of the paste and prevent the glass powder from precipitating and agglomerating during the mixing process.
[0072] The mass ratio of the glass powder to the paste solvent is between 1:1.5 and 1:2. During the stirring process, attention should be paid to preventing the glass powder from caking. Increase the stirring speed, and the stirring time is 60 - 90 minutes until the glass powder is evenly dispersed in the paste solvent to form a stable glass paste 4.
[0073] S22. Fabricate the printing film 9, including selecting a screen and coating a photosensitive glue on the printing surface of the screen, with the coating thickness controlled at 5 - 10 μm. After coating, place the screen in a drying oven for drying. Then, closely attach the patterned film to the screen coated with the photosensitive glue, and perform exposure, development, and rinsing on the screen, where the pattern in the patterned film corresponds to the transparent part of the printing pattern.
[0074] S23. Place the screen in a drying oven for drying, with the drying temperature at 30 - 40 °C and the drying time at 10 - 20 minutes. The temperature for development is 20 - 30 °C and the time is 1 - 5 minutes. The screen is a polyester screen with 300 - 500 meshes. The polyester screen has good strength and wear resistance and can withstand multiple printing and scraping operations without being easily damaged.
[0075] Refer to Figure 12 , S3. Align and coat the glass paste 4. Use the wafer suction device to place the silicon wafer 1 on the carrier stage, align the printing film 9 with the silicon wafer 1, pour the glass paste 4 onto the printing film 9, and use the squeegee 10 to evenly scrape the glass paste 4 into the grooves of the silicon wafer 1 along the diagonal direction of the table 3 to obtain the silicon wafer 1 coated with the glass paste 4;
[0076] The alignment of the printing film 9 with the silicon wafer 1 includes adjusting the position of the silicon wafer 1 to be 0.5 mm - 1 mm below the printing film 9. When scraping the glass paste 4, maintain an appropriate distance between the printing film 9 and the silicon wafer 1 to facilitate the flow and filling of the glass paste 4, and at the same time enable the glass paste 4 to better cover the four sides of the table 3 to protect the sharp corners 11 of the table 3.
[0077] The material of the squeegee 10 is selected from stainless steel or polytetrafluoroethylene. The squeegee 10 evenly scrapes the glass paste 4 into the grooves of the silicon wafer 1 along the diagonal direction of the table 3, including applying a downward pressure on the printing film 9, with the pressure value not greater than 80 N, the speed of the squeegee 10 not greater than 300 mm / s, the angle between the squeegee 10 and the plane of the printing film 9 being 40 - 90 degrees, and the number of single - direction scraping of the squeegee 10 not greater than 5 times.
[0078] A small amount of the glass paste 4 will remain on the silicon wafer between the double grooves, which will not cause damage to the main body of the passivated glass during cutting.
[0079] Refer to Figure 13 , S4. Drying, curing, and sintering. Place the silicon wafer 1 coated with the glass paste 4 into a high - temperature chain furnace for drying, and then perform heating and sintering after drying.
[0080] The drying temperature for drying and curing is 150 - 200 °C, and the drying time is 60 - 90 s. The sintering temperature is 650 - 850 °C, and the sintering time is 6 - 7 h. 99.99% oxygen is introduced during the sintering process. After sintering is completed, the high-temperature chain furnace is turned off, and the silicon wafer 1 is taken out after natural cooling in the furnace.
[0081] Finally, the silicon wafer 1 is laser cut by a laser cutting device along the columns that are not etched between the double grooves 8, without manual chipping.
[0082] The above are all preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby. Therefore, all equivalent changes made according to the structure, shape, and principle of the present invention should be covered within the protection scope of the present invention.
Claims
1. An efficient preparation process for the glass passivation layer of a GPP chip, characterized in that, Comprising: Fabricating a double-groove substrate, using a silicon wafer providing a PN junction as the substrate, the silicon wafer including double grooves and a metal film mesa around the double grooves; Preparing glass paste and a printing film, the printing film including a transparent part with a printed pattern, the transparent part including an area corresponding to the periphery of the metal film mesa; Aligning and coating the glass paste. Place the silicon wafer on the wafer stage by a wafer suction device, align the printing film with the silicon wafer, pour the glass paste onto the printing film, and evenly scrape the glass paste into the grooves of the silicon wafer along the diagonal direction of the mesa with a squeegee to obtain a silicon wafer coated with the glass paste; Drying, curing and sintering. Place the silicon wafer coated with the glass paste into a high-temperature chain furnace for drying, and then raise the temperature for sintering after drying; The fabricating of the double-groove substrate includes: Coating a lower-layer photoresist and an upper-layer photoresist on the etching surface of the silicon wafer in sequence, placing a mask plate in a lithography machine, and simultaneously exposing the lower-layer photoresist and the upper-layer photoresist through lithography; Removing the patterned part with a positive developer, forming openings with equal width on the lower-layer photoresist and the upper-layer photoresist respectively, curing the upper-layer photoresist, then performing negative development on the lower-layer photoresist with a negative developer, horizontally widening the opening of the lower-layer photoresist, and removing the developer containing photoresist impurities with a fixing solution; Forming a metal film on the silicon wafer by physical sputtering; Etching the developed silicon wafer to form double grooves between two adjacent metal films and form a mesa in the area covered by the metal film, and removing the photoresist with a stripping solution after etching.
2. The preparation process of an efficient GPP chip glass passivation layer according to claim 1, characterized in that The thickness of the upper-layer photoresist and the lower-layer photoresist layer is 1 - 1.5 μm.
3. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The lower-layer photoresist and the upper-layer photoresist are positive photoresists, the positive developer is n-propanol, the upper-layer photoresist contains a photoinitiator and an epoxy resin, and the curing of the upper-layer photoresist includes using triethylenetetramine.
4. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The negative developer contains tetramethylammonium hydroxide, the concentration of tetramethylammonium hydroxide in the negative developer is 2.38 - 2.42%, and the temperature of the negative development is 23 - 25 °C.
5. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The etching of the developed silicon wafer includes wet etching, the wet etching includes etching the silicon wafer with a tetramethylammonium hydroxide etching solution, the concentration of tetramethylammonium hydroxide in the etching solution is 20 - 25%, and the temperature of the etching is 70 - 90 °C.
6. The high-efficiency preparation process of the glass passivation layer of the GPP chip according to claim 1, characterized in that The depth of the etching is 80 - 160 μm, the width of the etching is 200 - 350 μm, and the line width between the double grooves is 80 - 130 μm.
7. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The metal film is made of one of copper, gold, titanium, nickel, silver, platinum and chromium.
8. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The fabricating of the printing film includes selecting a screen and coating a photosensitive resin on the printing surface of the screen, placing the screen in a drying oven for drying, closely attaching a patterned film to the screen coated with the photosensitive resin, and performing exposure, development and rinsing on the screen, wherein the pattern in the patterned film corresponds to the transparent part of the printed pattern.
9. An efficient preparation process for the glass passivation layer of a GPP chip according to claim 1, characterized in that, The aligning of the printing film with the silicon wafer includes adjusting the position of the silicon wafer 0.5 mm - 1 mm below the printing film.
Citation Information
Patent Citations
Twice silk-screen printing method of semiconductor device
CN111319369A
Method for manufacturing mesa semiconductor device
CN1658374A
Production of semiconductor element
JP1978033050A