Method for testing surface stress of piezoelectric film of acoustic device

Abstract

The invention discloses a method for testing the surface stress of a piezoelectric film of an acoustic device, and the method comprises the steps: sequentially depositing a lower electrode, a piezoelectric film and an upper electrode on a wafer, forming two groups of interdigital structures on the surface of the upper electrode through photoetching development, and then measuring the reference frequency of the interdigital structures. After the test wafer is processed, the test frequency of the interdigital structure is measured again, and the stress type and the stress value of the piezoelectric film are judged according to the difference between the reference frequency and the test frequency, so that the problem that whether the stress is generated in the wafer or not is judged by observing whether the microstructure changes or not is solved. However, the method is difficult to accurately obtain the type and the size of the stress. According to the difference value between the reference frequency and the test frequency, the property of the piezoelectric film material and the thickness of the piezoelectric film material, the specific stress can be calculated, a specific reference direction can be provided for the adjustment of the subsequent production process, and the process parameters can be more accurately controlled and adjusted in the production and manufacturing process of the MEMS device.

Description

Technical Field

[0001] The invention belongs to the technical field of piezoelectric film testing, and in particular is a method for testing the surface stress of a piezoelectric film of an acoustic device. Background Art

[0002] In the production and manufacturing of MEMS (micro-electromechanical systems) devices, multilayer piezoelectric films play a vital role. Piezoelectric films are usually deposited on the substrate surface through physical vapor deposition (PVD), chemical vapor deposition (CVD) and other process technologies, followed by photolithography and etching, and finally form various precision device products.

[0003] During the deposition process of piezoelectric thin films, residual stress has a significant impact on device performance. Residual stress can be divided into external stress and internal stress, which are caused by the external environment and internal structure respectively. The stress of piezoelectric thin films can be divided into tensile stress and compressive stress, and its generation mechanism is complex, involving multiple aspects such as material properties, deposition conditions and environmental factors.

[0004] The presence of stress will cause changes in the mechanical and electrical properties of thin film materials, affecting the sensitivity, reliability and life of the device. Excessive tensile stress will cause cracking of the film, while excessive compressive stress will cause wrinkling or delamination of the film. Therefore, in the MEMS process, controlling and optimizing the stress of the film is a major goal to ensure that the device has good performance and stability during use.

[0005] However, the mechanism of stress generation in piezoelectric films is relatively complex, including external stress and internal stress, tensile force and compressive force, etc. Therefore, stress characterization is particularly important. At present, traditional stress characterization mainly involves making microstructures on the surface of wafers and judging whether stress is generated inside the wafer by observing whether the microstructures change. However, this method is difficult to accurately obtain the type and size of stress. In the subsequent production process, it can only provide whether the production process needs to be adjusted, but cannot provide specific reference directions. Summary of the invention

[0006] The present invention aims to solve at least one of the technical problems existing in the prior art; to this end, the present invention proposes a method for testing the surface stress of a piezoelectric film of an acoustic device, which is used to solve the technical problem of judging whether stress is generated in a wafer by observing whether the microstructure changes, but this method is difficult to accurately obtain the type and size of stress. The present invention solves the above problem.

[0007] To achieve the above object, a first aspect of the present invention provides a method for testing the surface stress of a piezoelectric film of an acoustic device, comprising the following steps:

[0008] S1: depositing a lower electrode, a piezoelectric film and an upper electrode on the surface of a wafer at one time to obtain a test wafer;

[0009] S2: planning an effective area on the upper electrode surface of the test wafer; forming two sets of interdigitated finger structures on the effective area on the surface of the test wafer by photolithography;

[0010] S3: Connect one end of the two groups of interdigital finger structures on the test wafer to the vector network analyzer respectively, measure the reference frequency F0 of the two groups of interdigital finger structures through the vector network analyzer, and disconnect the interdigital finger structures from the vector network analyzer;

[0011] S4: After processing the test wafer, one end of the two groups of finger structures on the test wafer is connected to a vector network analyzer, and the test frequency F1 of the two groups of finger structures is measured by the vector network analyzer;

[0012] S5: Determine the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1.

[0013] By comparing the reference frequency and the test frequency, the tensile stress and compressive stress of the piezoelectric film can be clearly distinguished, providing a clear direction for process adjustment and device optimization. At the same time, this method can provide quantitative stress data, which helps to accurately control the stress state of the film and improve device performance and reliability. Its high sensitivity makes it easy to detect subtle stress changes at an early stage, and the operation is simple and efficient.

[0014] Preferably, judging the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1 includes:

[0015] Compare the reference frequency F0 with the test frequency F1;

[0016] When the reference frequency F0 is greater than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as tensile stress;

[0017] When the reference frequency F0 is less than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as compressive stress;

[0018] The stress value is calculated according to the reference frequency F0 and the test frequency F1; wherein the stress value includes the tensile stress value and the compressive stress value.

[0019] Preferably, the calculation formula for calculating the stress value based on the reference frequency F0 and the test frequency F1 is: σ=K(F0-F1); wherein σ is the stress value and K is the influence coefficient.

[0020] It should be noted that the influence coefficient K needs to be determined according to the characteristics of the material and device structure.

[0021] Preferably, the calculation formula of the influence coefficient is:

[0022] Wherein, E is the Young's modulus of the piezoelectric film, t is the thickness of the piezoelectric film, ρ is the density of the piezoelectric film, and v is the Poisson's ratio of the piezoelectric film.

[0023] The specific stress magnitude can be calculated based on the difference between the reference frequency and the test frequency, the properties of the piezoelectric film material itself and its thickness. The stress type and magnitude data can provide a specific reference direction when adjusting the subsequent production process.

[0024] Preferably, the finger insertion structure comprises a connecting end and a finger insertion end, the two groups of finger insertion structures are arranged in a mirror image, and the finger insertion ends on the two groups of finger insertion structures are arranged in a staggered manner.

[0025] The symmetrical mirror structure can effectively reduce the influence of parasitic capacitance and parasitic inductance, making the measurement results more reliable. The staggered setting can increase the effective area of ​​the finger structure, improve sensitivity, and detect smaller frequency changes.

[0026] It should be noted that there is a certain gap between two adjacent finger ends.

[0027] Preferably, planning the effective area on the upper electrode surface of the test wafer comprises the following steps:

[0028] Take the center line of the test wafer as the dividing line, take the length of the center line n, obtain the segmentation line segment, make the center point of the segmentation line segment coincide with the center point of the test wafer, and make the segmentation line segment coincide with the center line; make dividing lines perpendicular to the segmentation line segment at both ends of the segmentation line segment, so as to obtain the insertion area at the center and the connection areas at both sides; wherein n≤1 / 2;

[0029] Extend the center line of the test wafer located in the connection area to both sides to the connection width L1 to obtain the connection area;

[0030] The interpolation length is calculated by the formula D=2m×L1+(2m+1)×L0, and the area enclosed by the interpolation length as the length and the dividing line segment as the width is marked as the interpolation area; wherein L0 is the interval between two adjacent interpolation finger ends (2).

[0031] It should be noted that the connection width is set based on the connection requirements.

[0032] Preferably, the material of the lower electrode and the upper electrode is aluminum Al, platinum Pt, gold Au or molybdenum Mo.

[0033] Preferably, the piezoelectric film material is piezoelectric ceramic PZT or aluminum nitride AlN.

[0034] Preferably, the method further includes S31: forming a cavity structure on the effective area of ​​the test wafer by deep silicon etching;

[0035] Deep silicon etching includes: cleaning the test wafer, depositing a hard mask material on the effective area of ​​the wafer to be tested, and then etching the test wafer through a DRIE device; wherein the hard mask material is silicon dioxide or silicon nitride.

[0036] The cavity structure formed by deep silicon etching can accurately form a cavity structure with a high aspect ratio, and its application in MEMS device manufacturing is relatively low-cost due to rich process experience and equipment support.

[0037] Preferably, S1: a cavity structure is formed on the wafer through a front release process to obtain a sacrificial material and an adjustment wafer, and the cavity structure is filled with the sacrificial material; a lower electrode, a piezoelectric film and an upper electrode are deposited on the surface of the adjustment wafer at one time to obtain a test wafer, and the sacrificial layer material is released through a release hole etched on the piezoelectric film.

[0038] The release process is to use gas phase hydrofluoric acid dry etching to form a cavity on the surface of the wafer to be tested.

[0039] It should be noted that the etching position is the surface of the test area of ​​the wafer to be tested. The front release process can more accurately control the position and size of the cavity, improve the consistency and performance of the device, and first form the cavity structure and then deposit the electrode and thin film. This can reduce the stress and deformation introduced during the deposition process. Moreover, the release process is performed directly on the front side without flipping the wafer, which helps to simplify the process flow and improve production efficiency. For complex MEMS devices that need to form cavities in multiple areas, the front release process can more flexibly achieve design requirements.

[0040] Compared with the prior art, the beneficial effects of the present invention are as follows: by forming two groups of finger structures on the upper electrode surface of the test wafer, and using a vector network analyzer to measure the frequency between the finger structures at both ends respectively, a reference frequency and a test frequency are obtained, and by comparing the two frequencies, it can be concluded whether the stress on the surface of the piezoelectric film is internal stress or tensile stress, and the specific stress magnitude can be calculated according to the difference between the reference frequency and the test frequency, the properties of the piezoelectric film material itself and its thickness, and a specific reference direction can be provided when adjusting the subsequent production process according to the stress type and magnitude data, and the adjustment effect can be more clearly understood by using this method for adjusting the production process for multiple times, and since the need for microstructure observation and other indirect stress measurement methods is reduced, the material and time costs in the production process are reduced, thereby reducing the overall manufacturing cost, so that in the production and manufacturing process of MEMS devices, the process parameters can be more accurately controlled and adjusted, the negative impact of residual stress on device performance can be reduced, and product quality and reliability can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 It is a schematic diagram of a flow chart of an embodiment of the first aspect of the present invention;

[0043] Figure 2 It is a schematic diagram of the finger insertion structure in the embodiment of the first aspect of the present invention;

[0044] Figure 3 It is a schematic diagram of the finger insertion structure in the embodiment of the second aspect of the present invention;

[0045] In the figure: 1, connection end; 2, finger insertion end. DETAILED DESCRIPTION

[0046] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] See also Figure 1 The first aspect of the present invention provides a method for testing the surface stress of a piezoelectric film of an acoustic device, comprising the following steps:

[0048] S1: depositing a lower electrode, a piezoelectric film and an upper electrode on the surface of a wafer at one time to obtain a test wafer;

[0049] S2: planning an effective area on the upper electrode surface of the test wafer; forming two sets of interdigitated finger structures on the effective area on the surface of the test wafer by photolithography;

[0050] S3: Connect one end of the two groups of interdigital finger structures on the test wafer to the vector network analyzer respectively, measure the reference frequency F0 of the two groups of interdigital finger structures through the vector network analyzer, and disconnect the interdigital finger structures from the vector network analyzer;

[0051] S31: forming a cavity structure on an effective area of ​​the test wafer by deep silicon etching;

[0052] S4: After processing the test wafer, one end of the two groups of finger structures on the test wafer is connected to a vector network analyzer, and the test frequency F1 of the two groups of finger structures is measured by the vector network analyzer;

[0053] S5: Determine the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1.

[0054] The deep silicon etching mentioned in the above content includes: cleaning the test wafer, removing impurities and oxide layers on the surface of the test wafer to ensure surface uniformity and cleanliness during the etching process, and after depositing a hard mask material in the effective area of ​​the wafer to be tested, etching the test wafer through a DRIE device; wherein the hard mask material is silicon dioxide or silicon nitride.

[0055] The cavity structure formed by deep silicon etching can accurately form a cavity structure with a high aspect ratio, and its application in MEMS device manufacturing is relatively low-cost due to rich process experience and equipment support.

[0056] In this embodiment, the stress type and stress value of the piezoelectric film are determined according to the reference frequency F0 and the test frequency F1, which specifically includes the following steps:

[0057] Compare the reference frequency F0 with the test frequency F1;

[0058] When the reference frequency F0 is greater than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as tensile stress;

[0059] When the reference frequency F0 is less than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as compressive stress;

[0060] The stress value is calculated according to the reference frequency F0 and the test frequency F1; wherein the stress value includes the tensile stress value and the compressive stress value.

[0061] The calculation formula for calculating the stress value according to the reference frequency F0 and the test frequency F1 is: σ=K(F0-F1); wherein σ is the stress value and K is the influence coefficient.

[0062] The calculation formula of the influence coefficient is: Wherein, E is the Young's modulus of the piezoelectric film, t is the thickness of the piezoelectric film, ρ is the density of the piezoelectric film, and v is the Poisson's ratio of the piezoelectric film.

[0063] Right now,

[0064] For example, the material of the piezoelectric film is aluminum nitride AlN, which has a Young's modulus E of 330 GPa and a density ρ of 3260 kg / m 3 , thickness t is 2μm, Poisson's ratio is 0.28, reference frequency is 1MHz, test frequency is 0.95MHz; then the influence coefficient Then the stress value σ=5.4936MPa, so the stress at this time is tensile stress, and the stress value is 5.4936MPa.

[0065] By comparing the reference frequency F0 and the test frequency F1, it is possible to determine whether the stress type on the surface of the piezoelectric film is tensile stress or compressive stress, and to directly distinguish the stress type, providing a clear direction for subsequent process adjustments and device optimization. At the same time, it can provide quantitative stress data, which helps to accurately control the stress state of the film and improve the performance and reliability of the device. This method is highly sensitive and can detect subtle stress change problems at an early stage. This method is relatively simple and efficient, and is also more convenient for continuous testing.

[0066] See also Figure 2 As shown, the finger insertion structure in this embodiment includes a connection end 1 and a finger insertion end 2, the two groups of finger insertion structures are arranged in a mirror image, and the finger insertion ends 2 on the two groups of finger insertion structures are arranged in a staggered manner.

[0067] The design of the interdigitated finger structure can enhance the frequency response characteristics of the piezoelectric film, ensure that the reference frequency and the test frequency reflect the actual stress changes, and provide more accurate stress measurement data. The uniformly distributed staggered setting helps to optimize the electric field distribution and reduce the local concentrated electric field strength, thereby improving the linearity and accuracy of the measurement.

[0068] In order to form an interdigitated finger structure on the surface of the test wafer in this embodiment, an effective area is planned on the upper electrode surface of the test wafer, including the following steps:

[0069] Take the center line of the test wafer as the dividing line, take the length of the center line n, obtain the segmentation line segment, make the center point of the segmentation line segment coincide with the center point of the test wafer, and make the segmentation line segment coincide with the center line; make dividing lines perpendicular to the segmentation line segment at both ends of the segmentation line segment, so as to obtain the insertion area at the center and the connection areas at both sides; wherein n≤1 / 2;

[0070] Extend the center line of the test wafer located in the connection area to both sides to the connection width L1 to obtain the connection area;

[0071] The interpolation length is calculated by the formula D=2m×L1+(2m+1)×L0, and the area enclosed by the interpolation length as the length and the dividing line segment as the width is marked as the interpolation area; wherein L0 is the interval between two adjacent interpolation finger ends 2.

[0072] Exemplarily, the centerline length of the test wafer is 10 mm, n=1 / 2, the length of the dividing line segment is 5 mm, and the center point of the dividing line segment is overlapped with the center point of the test wafer, so that the dividing line segment and the centerline overlap.

[0073] A dividing line perpendicular to the dividing line segment is made at both ends of the dividing line segment to obtain a finger insertion area at the center and connection areas at both sides.

[0074] Extend the center line of the test wafer located in the connection area to both sides to the connection width L1, and set the connection width L1 to 0.5mm; then the connection area width is: 2×L1=1×0.5mm=0.5mm

[0075] When the connection width L1 = 0.5 mm, the gap between two adjacent finger ends L0 = 0.05, and the number of fingers m = 8, the finger length is calculated by the formula D = 2m × L1 + (2m + 1) × L0;

[0076] The finger length D is calculated as follows:

[0077] D=2×8×0.5mm+(2×8+1)×0.05mm=8.85mm. The size of the finger area is a rectangle with a length of 8.85 and a width of 5mm, and a point centered on the test wafer. An interpolation structure is formed inside so that it is located in the center to ensure the accuracy of the test.

[0078] The materials of the lower electrode and the upper electrode can be aluminum Al, platinum Pt, gold Au or molybdenum Mo;

[0079] Specifically, aluminum Al is used as the material of the lower electrode and the upper electrode. Since aluminum has a relatively low cost, it is suitable for large-scale production and application. In addition, aluminum has excellent electrical conductivity, which can ensure the current transmission efficiency of the electrode. In addition, aluminum is easy to deposit and process by sputtering, evaporation, and the like.

[0080] Platinum Pt is used as the material for the lower electrode and the upper electrode. In some MEMS and sensor applications, the catalytic properties of platinum can improve the sensitivity of the device. In addition, platinum has high chemical stability under high temperature and corrosive environments. In addition, platinum also has high conductivity, making it suitable as an electrode material.

[0081] Gold Au is used as the material for the lower and upper electrodes. Due to its very high conductivity, it can effectively reduce resistance and energy loss. In addition, gold is inert to most chemicals and is not easily oxidized or corroded, making it suitable for use in harsh environments. Due to its stability and conductivity, gold electrodes perform well in high-reliability applications.

[0082] Molybdenum Mo is used as the material for the lower electrode and the upper electrode. Due to its high melting point, it is suitable for use in high temperature environments. Molybdenum has high mechanical strength and hardness, which can improve the structural strength and durability of the electrode. At the same time, molybdenum has good electrical conductivity and can provide stable electrical performance in high temperature and high voltage applications.

[0083] Since each material has its own advantages, in this embodiment, gold Au is preferably used as the material for the lower electrode and the upper electrode.

[0084] In this embodiment, the piezoelectric film material is piezoelectric ceramic PZT or aluminum nitride AlN.

[0085] Specifically, aluminum nitride AlN is used as the piezoelectric film material. Since aluminum nitride material has good stability in high temperature and chemical corrosion environment, it is suitable for use in harsh environment, while piezoelectric ceramic PZT material maintains stable piezoelectric properties in a wide temperature range and is suitable for use in various extreme environments. Therefore, both can be used. In this embodiment, the piezoelectric film material is aluminum nitride AlN.

[0086] Second, please participate Figure 3 As shown, as another embodiment of the present invention, different from the above embodiment, S1: forming a cavity structure on a wafer through a front release process to obtain a sacrificial material and an adjustment wafer, and filling the cavity structure with the sacrificial material; depositing a lower electrode, a piezoelectric film and an upper electrode on the surface of the adjustment wafer at one time to obtain a test wafer, and releasing the sacrificial layer material through a release hole etched on the piezoelectric film;

[0087] S2: planning an effective area on the upper electrode surface of the test wafer; forming two sets of interdigitated finger structures on the effective area on the surface of the test wafer by photolithography;

[0088] S3: Connect one end of the two groups of interdigital finger structures on the test wafer to the vector network analyzer respectively, measure the reference frequency F0 of the two groups of interdigital finger structures through the vector network analyzer, and disconnect the interdigital finger structures from the vector network analyzer;

[0089] S4: After processing the test wafer, one end of the two groups of finger structures on the test wafer is connected to a vector network analyzer, and the test frequency F1 of the two groups of finger structures is measured by the vector network analyzer;

[0090] S5: Determine the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1.

[0091] The release process is to use gas phase hydrofluoric acid dry etching to form a cavity on the surface of the wafer to be tested.

[0092] The front release process can more accurately control the position and size of the cavity, improve the consistency and performance of the device, and form the cavity structure first, and then deposit the electrode and thin film, which can reduce the stress and deformation introduced during the deposition process. Moreover, the release process can be performed directly on the front side without flipping the wafer, which helps to simplify the process flow and improve production efficiency. For complex MEMS devices that need to form cavities in multiple areas, the front release process can more flexibly meet the design requirements.

[0093] Part of the data in the above formula is calculated by removing the dimension and taking its numerical value. The formula is a formula closest to the actual situation obtained by software simulation of a large amount of collected data; the preset parameters and preset thresholds in the formula are set by technical personnel in this field according to actual conditions or obtained through simulation of a large amount of data.

[0094] The above embodiments are only used to illustrate the technical method of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical method of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical method of the present invention.

Claims

1. A method for testing surface stress of a piezoelectric film of an acoustic device, characterized in that: The following steps are involved: S1: depositing a lower electrode, a piezoelectric film and an upper electrode on the surface of a wafer at one time to obtain a test wafer; S2: planning an effective area on the upper electrode surface of the test wafer; forming two sets of interdigitated finger structures on the effective area on the surface of the test wafer by photolithography; S3: Connect one end of the two groups of interdigital finger structures on the test wafer to the vector network analyzer respectively, measure the reference frequency F0 of the two groups of interdigital finger structures through the vector network analyzer, and disconnect the interdigital finger structures from the vector network analyzer; S4: After processing the test wafer, one end of the two groups of finger structures on the test wafer is connected to a vector network analyzer, and the test frequency F1 of the two groups of finger structures is measured by the vector network analyzer; S5: Determine the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1.

2. The method for testing the surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The step of judging the stress type and stress value of the piezoelectric film according to the reference frequency F0 and the test frequency F1 includes: Compare the reference frequency F0 with the test frequency F1; When the reference frequency F0 is greater than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as tensile stress; When the reference frequency F0 is less than the test frequency F1, the stress type on the surface of the piezoelectric film is marked as compressive stress; The stress value is calculated according to the reference frequency F0 and the test frequency F1; wherein the stress value includes the tensile stress value and the compressive stress value.

3. The method for testing the surface stress of a piezoelectric film of an acoustic device according to claim 2, characterized in that: The calculation formula for calculating the stress value according to the reference frequency F0 and the test frequency F1 is: σ=K(F0-F1); wherein σ is the stress value and K is the influence coefficient.

4. The method for testing the surface stress of a piezoelectric film of an acoustic device according to claim 3, characterized in that: The calculation formula of the influence coefficient is: Wherein, E is the Young's modulus of the piezoelectric film, t is the thickness of the piezoelectric film, ρ is the density of the piezoelectric film, and v is the Poisson's ratio of the piezoelectric film.

5. The method for testing the surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The finger insertion structure comprises a connection end (1) and a finger insertion end (2); the two groups of finger insertion structures are arranged in a mirror image, and the finger insertion ends (2) on the two groups of finger insertion structures are arranged in a staggered manner.

6. A method for testing surface stress of a piezoelectric film of an acoustic device according to claim 1 or 5, characterized in that: The planning of the effective area on the upper electrode surface of the test wafer comprises the following steps: Take the center line of the test wafer as the dividing line, take the length of the center line n, obtain the segmentation line segment, make the center point of the segmentation line segment coincide with the center point of the test wafer, and make the segmentation line segment coincide with the center line; make dividing lines perpendicular to the segmentation line segment at both ends of the segmentation line segment, so as to obtain the insertion area at the center and the connection areas at both sides; wherein n≤1 / 2; Extend the center line of the test wafer located in the connection area to both sides to the connection width L1 to obtain the connection area; The interpolation length is calculated by the formula D=2m×L1+(2m+1)×L0, and the area enclosed by the interpolation length as the length and the dividing line segment as the width is marked as the interpolation area; wherein L0 is the interval between two adjacent interpolation finger ends (2).

7. The method for testing surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The material of the lower electrode and the upper electrode is aluminum Al, platinum Pt, gold Au or molybdenum Mo.

8. The method for testing surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The piezoelectric film material is piezoelectric ceramic PZT or aluminum nitride AlN.

9. The method for testing surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The method further includes the step S31: forming a cavity structure on the effective area of ​​the test wafer by deep silicon etching; Deep silicon etching includes: cleaning the test wafer, depositing a hard mask material on the effective area of ​​the wafer to be tested, and then etching the test wafer through a DRIE device; wherein the hard mask material is silicon dioxide or silicon nitride.

10. The method for testing surface stress of a piezoelectric film of an acoustic device according to claim 1, characterized in that: The S1: forming a cavity structure on the wafer through a front release process to obtain a sacrificial material and an adjustment wafer, and filling the cavity structure with the sacrificial material; depositing a lower electrode, a piezoelectric film and an upper electrode on the surface of the adjustment wafer at one time to obtain a test wafer, and releasing the sacrificial layer material through a release hole etched on the piezoelectric film. The release process is to use gas phase hydrofluoric acid dry etching to form a cavity on the surface of the wafer to be tested.

Images