Dual-Controller Communication System, Method, Computer Product, Device, and Storage Medium

Abstract

The present application relates to a dual-controller communication system, method, computer product, device, and storage medium, including a first controller and a second controller: The first controller includes a first processor and a first non-transparent bridge; the second controller includes a second processor and a signal relay device; the input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor. Using this system can reduce the communication cost between the first controller and the second controller and improve the reliability of the system.

Description

Technical Field

[0001] This application relates to the field of computer technology, and particularly to a dual - controller communication system, method, computer product, device, and storage medium. Background Art

[0002] In today's world, data growth is exploding at an unprecedented rate. Fast data transmission within a data center is crucial for the efficient use of information. As data reliability is getting higher and higher, dual - control redundant storage is required to improve reliability. Currently, it is a dual - controller communication system based on dual NTB (Non - Transparent Bridge), which realizes that when one controller has a problem, there is a memory mirror redundancy in another controller, the service will not stop, and data will not be lost. However, applying two non - transparent bridges will lead to problems such as increased communication latency and system performance degradation. Summary of the Invention

[0003] Based on this, in view of the above - mentioned technical problems, it is necessary to provide a dual - controller communication system, method, computer product, device, and storage medium that can reduce the communication cost between the first controller and the second controller and improve the reliability of the system.

[0004] To solve the above - mentioned technical problems, in a first aspect, a dual - controller communication system is provided. The system includes:

[0005] A first controller and a second controller:

[0006] The first controller includes a first processor and a first non - transparent bridge;

[0007] The second controller includes a second processor and a signal relay device;

[0008] The input end of the first non - transparent bridge is connected to the output end of the first processor, the output end of the first non - transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0009] In one embodiment, the first non - transparent bridge includes a first sub - non - transparent bridge and a second sub - non - transparent bridge. The input end of the first sub - non - transparent bridge is connected to the output end of the first processor, the output end of the first sub - non - transparent bridge is connected to the input end of the second sub - non - transparent bridge, the output end of the second sub - non - transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0010] In one embodiment, the first controller further includes a first memory, and the second controller further includes a second memory. The first memory is communicatively connected to the first processor and the first non - transparent bridge respectively, and the second memory is communicatively connected to the second processor and the signal relay device respectively.

[0011] In one embodiment, the first controller further includes a first driving module, and the second controller further includes a second driving module. The first driving module is communicatively connected to the first processor, and the second driving module is communicatively connected to the second processor. The first driving module and the second driving module are used to establish a mapping relationship between the first memory and the second memory.

[0012] In one embodiment, the first controller further includes a first communication module and a first cache module, and the second controller further includes a second communication module and a second cache module. The input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first driving module;

[0013] The input end of the second communication module is connected to the output end of the second cache module, and the output end of the second communication module is connected to the input end of the second driving module.

[0014] In one embodiment, the second controller further includes a card slot, and the card slot is used for detachably installing a second non-transparent bridge to implement replacing the signal relay device with the second non-transparent bridge.

[0015] To solve the above technical problems, in a second aspect, a dual-controller communication method is provided, which is applied to the dual-controller communication system as in the first aspect. The method includes:

[0016] In response to the first controller receiving a data transmission instruction, where the data transmission instruction includes transmission data, it is determined whether a signal relay device is set on the second controller;

[0017] If a signal relay device is set on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device;

[0018] If a signal relay device is not set on the second controller, it is determined whether a second non-transparent bridge is set on the second controller;

[0019] If a second non-transparent bridge is set on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge;

[0020] If a second non-transparent bridge is not set on the second controller, a fault warning is issued;

[0021] The first controller transmits the transmission data to the second controller based on the first target transmission path / or the second transmission path.

[0022] In one embodiment, determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, and the first controller transmitting the transmission data to the second controller based on the first target transmission path includes:

[0023] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module;

[0024] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module;

[0025] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue;

[0026] In response to the target data queue meeting a preset condition, the first drive module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0027] The first drive module sends a notification to the first non-transparent bridge. At the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge;

[0028] The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device.

[0029] In one embodiment, determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, and the first controller transmitting the transmission data to the second controller based on the second target transmission path includes:

[0030] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module;

[0031] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module;

[0032] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue;

[0033] In response to the target data queue meeting a preset condition, the first drive module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0034] The first drive module sends a notification to the first non-transparent bridge. Meanwhile, the target transfer data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge.

[0035] The first non-transparent bridge sends the target transfer data to the second non-transparent bridge, and the target transfer data is transmitted to the second memory through the second non-transparent bridge.

[0036] In one embodiment, the method further includes:

[0037] In response to the second memory receiving the target transfer data, the second drive module sends a message to the first controller to notify that cache update starts based on the target transfer data.

[0038] The second controller polls the target transfer data in the second memory and synchronizes the target transfer data to the second communication module, and the second communication module synchronizes the target transfer data to the second cache module.

[0039] After the second controller confirms receiving the target transfer data, it sends feedback information to the first controller.

[0040] In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0041] In one embodiment, the first non-transparent bridge sending the target transfer data to the signal relay device and the target transfer data being transmitted to the second memory through the signal relay device includes:

[0042] In response to the first sub-non-transparent bridge receiving the data read request protocol sent from the first node corresponding to the first controller, it obtains the data read request protocol and sends the data read request protocol to the address translation register.

[0043] In response to the address translation register receiving the data read request protocol, it parses the data read request protocol to obtain the protocol request address and the first node ID.

[0044] The address translation register converts the protocol request address into the target port address and converts the first node ID into the proxy device ID.

[0045] Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID.

[0046] Based on the target port address, the data read request protocol is forwarded to the target port.

[0047] In one embodiment, the first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the second non-transparent bridge transmits the target transmission data to the second memory, including:

[0048] In response to the first non-transparent bridge receiving the data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address translation register;

[0049] In response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0050] The address translation register converts the protocol request address into the target port address and converts the first node ID into the proxy device ID;

[0051] Based on the proxy device ID, send the data read request protocol and the target port address to the proxy device in the second non-transparent bridge. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0052] Forward the data read request protocol to the target port based on the target port address.

[0053] In one embodiment, after forwarding the data read request protocol to the target port based on the target port address, it further includes:

[0054] Obtain the matching ID and the completed data protocol ID. The completed data protocol ID is the ID of the completed data protocol sent to the first node when the target port receives the data request protocol;

[0055] Convert the matching ID and the completed data protocol ID into the first node ID;

[0056] In response to the conversion of the matching ID and the completed data protocol ID into the first node ID being completed, forward the completed data protocol to the first node.

[0057] To solve the above technical problems, in a third aspect, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, it implements the steps of the method in the first aspect above.

[0058] To solve the above technical problems, in a fourth aspect, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements the following steps: When the processor executes the computer program, it implements the steps of the method in the first aspect above.

[0059] To solve the above technical problems, in a fifth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method in the above first aspect are implemented.

[0060] Different from the prior art, the dual-controller communication system in the present application includes a first controller and a second controller: the first controller includes a first processor and a first non-transparent bridge; the second controller includes a second processor and a signal relay device; the input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor. In this way, using a physically non-transparent bridge and a signal relay device to implement communication between the first control system and the second control system can avoid multiple address conversions during the communication process, reduce the communication cost of the first controller and the second controller, and improve the reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 is a schematic structural diagram of a dual-controller communication system in the prior art;

[0062] Figure 2 is a schematic structural diagram of another dual-controller communication system in the prior art;

[0063] Figure 3 is a schematic structural diagram of a dual-controller communication system in an embodiment;

[0064] Figure 4 is a schematic structural diagram of a dual-controller communication system in another embodiment;

[0065] Figure 5 is a schematic structural diagram of a dual-controller communication system in yet another embodiment;

[0066] Figure 6 is a schematic structural diagram of a dual-controller communication system in yet another embodiment;

[0067] Figure 7 is a schematic flowchart of a dual-controller communication method in an embodiment;

[0068] Figure 8 is a schematic flowchart of a dual-controller communication method in another embodiment;

[0069] Figure 9 is a schematic flowchart of a dual-controller communication method in yet another embodiment;

[0070] Figure 10 is a block diagram of the structure of a dual-controller communication device in an embodiment;

[0071] Figure 11 It is the internal structure diagram of a computer device in an embodiment. Specific implementation manners

[0072] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0073] Please refer to Figure 1 , in related art one, a dual - controller communication system based on dual NTB (Non - Transparent Bridge) includes a first cache module (Cache), a first driver module (NTB driver), a first processor (CPU), and a first non - transparent bridge (NTB) on controller 1, and a second cache module (Cache), a second driver module (NTB driver), a second processor (CPU), and a second non - transparent bridge (NTB) on controller 2.

[0074] By respectively on - board the first non - transparent bridge and the second non - transparent bridge on the board corresponding to the first controller and the board corresponding to the second controller, the first non - transparent bridge and the second non - transparent bridge can directly address the remote memory address (the memory of the second controller) through the address translation mechanism, and copy the local memory data (the data in the memory of the first controller) to the remote memory (the memory of the second controller) in one of the ways of CPU and DMA (Direct Memory Access), so as to realize data communication.

[0075] Please refer to Figure 2 , in related art two, a dual - controller communication system based on dual NTB (Non - Transparent Bridge) includes a first cache module (Cache), a first communication module (communication layer), a first driver module (NTB driver), a first processor (CPU), and a first non - transparent bridge (NTB) on controller 1, and a second cache module (Cache), a second communication module (communication layer), a second driver module (NTB driver), a second processor (CPU), and a second non - transparent bridge (NTB) on controller 2.

[0076] In the second related technology, a first communication module and a second communication module are respectively provided on the controller 1 and the controller 2 to be responsible for the maintenance of the communication link, the assembly of the Nvme protocol, and the management of the heartbeat. By respectively on-board the first non-transparent bridge and the second non-transparent bridge on the board corresponding to the first controller and the board corresponding to the second controller, the first non-transparent bridge and the second non-transparent bridge can directly address the remote memory address (the memory of the second controller) through the address translation mechanism, and copy the local memory data (the data in the memory of the first controller) to the remote memory (the memory of the second controller) through one of the CPU and DMA (Direct Memory Access), so as to realize data communication.

[0077] As can be seen from the above, in the related technology, two non-transparent bridges are mainly used to realize the communication between the dual controllers. However, every time an additional non-transparent bridge is applied, an address conversion will be performed, resulting in problems such as increased communication delay and system performance degradation.

[0078] In order to solve the above technical problems, in one embodiment, the present application provides a dual-controller communication system, which includes a first controller and a second controller.

[0079] The first controller includes a first processor and a first non-transparent bridge; the second controller includes a second processor and a signal relay device; the input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0080] As Figure 3 shown, the first non-transparent bridge is the NTB card on the controller 1, and the signal relay device is the Retimer card on the controller 2.

[0081] A controller refers to a master device that changes the wiring of the main circuit or the control circuit and changes the resistance value in the circuit in a predetermined order to control the starting, speed regulation, braking, and reverse of the motor. It consists of a program counter, an instruction register, an instruction decoder, a timing generator, and an operation controller. It is the "decision-making body" that issues commands, that is, it completes the coordination and command of the entire computer system operation.

[0082] Both the first processor and the second processor are central processing units (abbreviated as CPU), which are the operation and control cores of the computer system and the final execution units for information processing and program operation. Since the emergence of the CPU, great developments have been made in its logical structure, operating efficiency, and functional extension.

[0083] The communication between the two controllers here can be implemented by using a non-transparent bridge of PCIE to connect the controllers. Specifically, it can be a non-transparent bridge NTB, which is a type of PCIE bridging chip that connects the independent memory systems of two or more computers to the same PCIE structure and supports the functions of registers and memory translation windows.

[0084] In one embodiment, the first non-transparent bridge includes a first sub-non-transparent bridge and a second sub-non-transparent bridge. The input end of the first sub-non-transparent bridge is connected to the output end of the first processor, the output end of the first sub-non-transparent bridge is connected to the input end of the second sub-non-transparent bridge, the output end of the second sub-non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0085] This application is designed to implement 2 NTBs in the first non-transparent bridge through the Patition method. This is because a single non-transparent bridge cannot achieve a direct connection between the first processor and the second processor. Therefore, two virtual non-transparent bridges (the first sub-non-transparent bridge and the second sub-non-transparent bridge) are set in the first non-transparent bridge by using the Patition method.

[0086] Specifically, as Figure 4 shown, two regions (Partition 0 and Partition 1 in the figure) are divided by using the Patition method. The first sub-non-transparent bridge is correspondingly set in Partition 0, and the second sub-non-transparent bridge is correspondingly set in Partition 1. Node 0 can be the first processor, and Node 1 is the second processor. US P2P refers to a PCI-to-PCI bridge, which is used to connect the PCI main bus and the PCI secondary bus. The PCI bus where the PCI bridge is located is called the "main bus" (i.e., the parent bus of the secondary bus), and the PCI bus connected by the bridge device is called the "secondary bus" (i.e., the child bus of the main bus).

[0087] By setting two virtual sub-transparent bridges on a physical non-transparent bridge, each sub-transparent bridge corresponds to a partition. Partition 0 corresponds to the first sub-non-transparent bridge, and Partition 1 corresponds to the second sub-non-transparent bridge. In this way, a physical non-transparent bridge is used to connect the first processor and the second processor, and a physical non-transparent bridge is used to achieve the connection between the two controllers.

[0088] The signal relay device is a Retimer card. The Retimer card belongs to a Signal Conditioning chip and functions to equalize and enhance signals. It is similar to a PHY chip. When the signal passes through the Retimer card, the signal is reconstructed by the internal clock of the Retimer card, which can increase the signal transmission energy and then continue to be transmitted, improving the reliability of the server chassis system.

[0089] In this embodiment, the data transmission link is: Controller 1 CPU data (the first processor) -> NTB1 partition1 DMA (the link between the first processor and the first sub-non-transparent bridge) -> NTB1 (NTB1 partition1 -> NTB1 partiton2, the link between the first sub-non-transparent bridge and the second sub-non-transparent bridge) -> NTB1 partition2 DMA (the link between the second sub-non-transparent bridge and the signal relay device, from the signal relay device to the second processor) -> Controller 2 CPU data (the second processor).

[0090] In another embodiment, as Figure 5 shown, in this embodiment, the first non-transparent bridge is the NTB card on Controller 1, and the second non-transparent bridge is the NTB card on Controller 2.

[0091] The input end of the first non-transparent bridge is connected to the output end of the first processor (the CPU on Controller 1), the output end of the first non-transparent bridge is connected to the input end of the second non-transparent bridge, and the output end of the second non-transparent bridge is connected to the input end of the second processor (the CPU on Controller 2).

[0092] In this embodiment, address conversion is achieved through the first non-transparent bridge and the second non-transparent bridge, and then data transmission between the first controller and the second controller is realized. In this embodiment, the data transmission link is: Controller 1 CPU data (the first processor) -> NTB1 DMA (the link between the first processor and the first non-transparent bridge) -> NTB1 (the first non-transparent bridge) -> NTB2 (the second non-transparent bridge) -> NTB2 DMA (the link between the second processor and the second non-transparent bridge) -> Controller 2 CPU data (the second processor).

[0093] In the prior art, both the first non-transparent bridge and the signal relay device are onboard the controller. In this application, a card slot is provided on the main board where the second controller is located. This card slot can be used for the installation of a non-transparent bridge (NTB card) and a signal relay device (Retimer card), that is, the positions of the illustrated NTB card and Retimer card. In this way, different combinations of the first non-transparent bridge and the signal relay device can be flexibly applied according to different requirements to achieve communication between the first controller and the second controller.

[0094] This application can replace the signal relay device with the second non-transparent bridge by setting the card slot, and can flexibly meet the needs of users.

[0095] In one embodiment, please refer to Figure 6, the first controller further includes a first memory (the memory on controller 1), and the second controller further includes a second memory (the memory on controller 2). The first memory is communicatively connected to the first processor and the first non-transparent bridge respectively, and the second memory is communicatively connected to the second processor and the signal relay device respectively.

[0096] Memory has multiple functions in a computer, mainly including storing and quickly accessing data, improving data processing efficiency, supporting multitasking, and accelerating the operation of specific applications. Memory is an important component in a computer, used to temporarily store the operation data in the CPU and the data exchanged with external memories such as hard disks. It is a bridge for communication between the external memory and the CPU, and the operation of all programs in the computer is carried out in memory.

[0097] In this application, the first memory located on the first controller and the second memory located on the second controller are provided to support the operation of the software modules in this application.

[0098] The first controller further includes a first drive module, and the second controller further includes a second drive module. The first drive module is communicatively connected to the first processor, and the second drive module is communicatively connected to the second processor. The first drive module and the second drive module are used to establish a mapping relationship between the first memory and the second memory.

[0099] The first drive module and the second drive module can be NTB drivers. The NTB driver defines an API that encapsulates a general function set and allows clients interested in NTB functions to discover the NTB devices supported by the hardware driver. Here, the client refers to the upper-layer component that calls the NTB API, and the "driver" or "hardware driver" refers to the NTB hardware driver program for a specific manufacturer and model. The first drive module and the second drive module are provided to support the management of data link sending and receiving. The drive module is specifically responsible for establishing the NTB channel, establishing the memory mapping, and establishing a mapping relationship between the memory of controller 1 and the memory of controller 2. It is responsible for establishing multiple DMA queues (circular queues) in memory, establishing the command buffer queue, and device management, etc.

[0100] The first controller further includes a first communication module and a first cache module, and the second controller further includes a second communication module and a second cache module. The input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first drive module; the input end of the second communication module is connected to the output end of the second cache module, and the output end of the second communication module is connected to the input end of the second drive module.

[0101] The first cache module is the Cache on Controller 1, and the second cache module is the Cache on Controller 2. The cache module (Cache) is a memory hierarchy located between the processor CPU and the memory, used to store the data and instructions most recently accessed by the CPU. It improves the system performance and response speed by reducing the number of memory accesses. The cache module is set to be responsible for maintaining data management in the software, and can use consecutive pages of 4K size as the data management area.

[0102] The first communication module is the communication layer on Controller 1, and the second communication module is the communication layer on Controller 2. The first communication module and the second communication module are set to be responsible for the maintenance of the communication link, the assembly of the Nvme protocol, and the management of the heartbeat. Specifically, it includes establishing a login connection, recording the login handle. Establishing a heartbeat for each physical port communication, being responsible for data sending, channel priority establishment, data object serialization, etc.

[0103] Compared with the prior art solution of on-board two non-transparent bridges on the motherboard corresponding to the controller as a connection device to realize the communication between the first controller and the second controller, in this application, a card slot is set on the motherboard corresponding to the second controller to flexibly realize two non-transparent bridges as a connection device, or a non-transparent bridge and a signal relay device as a connection device, which can flexibly meet different requirements.

[0104] In one embodiment, as Figure 7 shown, this application provides a dual-controller communication method, which is applied to the above-mentioned dual-controller communication system. The method specifically includes the following steps:

[0105] Step 101, in response to the first controller receiving a data transmission instruction, where the data transmission instruction includes transmission data, determine whether a signal relay device is set on the second controller.

[0106] Step 102, if a signal relay device is set on the second controller, determine the first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device.

[0107] Step 103, if a signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0108] Step 104, if a second non-transparent bridge is set on the second controller, determine the second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge.

[0109] Step 105, if a second non-transparent bridge is not set on the second controller, issue a fault warning.

[0110] Step 106, the first controller transmits the transmission data to the second controller based on the first target transmission path / or the second transmission path.

[0111] Specifically, when configuring the dual-controller communication system in this application, it will determine whether a signal relay device is set on the second controller. If a signal relay device is set, communication between the first controller and the second controller is performed according to the first target transmission path determined by the signal relay device and the first non-transparent bridge. If no signal relay device is set on the second controller, it will determine whether a second non-transparent bridge is set on the second controller. If a second non-transparent bridge is set, communication between the first controller and the second controller is performed according to the second target transmission path determined by the second non-transparent bridge and the first non-transparent bridge. If no second non-transparent bridge is set on the second controller either, it is considered that communication between the first controller and the second controller is not possible, and a fault warning is issued to contact the operator for timely maintenance. In this application, communication between the first controller and the second controller can be flexibly implemented by determining whether to use the dual non-transparent bridge method or the method of the first non-transparent bridge and the signal relay device.

[0112] Please refer to Figure 8 , in an embodiment, the first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device, and the first controller transmits the transmission data to the second controller based on the first target transmission path:

[0113] Step 201, in response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module.

[0114] Step 202, in response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module.

[0115] Step 203, in response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue.

[0116] Step 204, in response to the target data queue meeting the preset conditions, the first drive module sends the target transmission data in the target data queue that meets the preset conditions to the memory access queue in the first memory.

[0117] Specifically, the data transfer instruction here can be a data synchronization instruction. After the first controller finds the data to be transferred (changed data) from the first cache module, it calls the communication interface to send it to the second cache module of the second controller. And in the first communication module (the communication layer on controller 1), the data is converted into a data sequence, and the data sequence is protocol encapsulated to obtain the encapsulated data. The encapsulated data is sent to the first driver module. The first driver module (the NTB driver on controller 1) caches the encapsulated data into the buf queue of 2000, and is responsible for aggregating the encapsulated data in consecutive memory in sequence to improve the transmission efficiency, and uniformly sends the data in the buf space to the DMA queue space (target data queue) of the first memory (the memory data shown in the figure).

[0118] Here, a circular cache area is formed through the buf queue on the first driver module to aggregate the received encapsulated data, and then uniformly send it out. By increasing the block size of the encapsulated data, the data transmission efficiency is improved.

[0119] Among them, the specific steps of converting the data into a data sequence and protocol encapsulating the data sequence to obtain the encapsulated data can be shown as the following code:

[0120] Struct data{

[0121] Char *data

[0122] Int len

[0123] }

[0124] The target data queue here is the DMA queue in the memory data shown in the figure. In this application, the DMA queue is set as a circular queue. A circular queue is a special queue. It adds some restrictive conditions on the basis of the queue, so that the queue can be recycled under a fixed-size storage space. The circular queue can be implemented with an array. The elements in the array are arranged in a certain order, and when the queue head or queue tail pointer reaches the end of the array, it will automatically start recycling from the head of the array. One advantage of the circular queue is that when the queue is full, new elements can be stored by overwriting the elements at the head of the queue, so that the queue can have the ability to be recycled to a certain extent and save storage space.

[0125] Among them, the steps for the first driver module to store the encapsulated data into the target data queue after receiving the encapsulated data can be shown as the following code:

[0126] Struct msg header{

[0127] int seqnumber

[0128] Struct *data

[0129] }

[0130] In a feasible implementation manner, the target data queue may include a first circular sub-queue and a second circular sub-queue. The first circular sub-queue is used to store data indexes. The second circular sub-queue is used to store the data corresponding to the data indexes. An index value is set for the second circular sub-queue, and a corresponding relationship is established between the index value corresponding to the second circular sub-queue and the stored data indexes in the first circular sub-queue. When obtaining data from the target data queue, the data to be obtained can be matched with the stored data indexes in the first circular sub-queue, the stored data index that matches the data to be obtained is used as the target stored data index, and the data corresponding to the target stored data index is obtained according to the corresponding relationship and sent to the peer end. In this way, it is beneficial to quickly obtain the required data from the target data queue, and the reliability of the system can be improved.

[0131] Step 205: The first drive module sends a notification to the first non-transparent bridge. At the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge.

[0132] Step 206: The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device.

[0133] After all the encapsulated data is stored in the target data queue in the first memory, the first drive module will send a notification to the first non-transparent bridge, informing that the target transmission data in the target data queue will be sent to the first non-transparent bridge soon, and then through the first non-transparent bridge for address conversion, the target transmission data in the target data queue is sent to the second memory on the second controller.

[0134] Specifically, in this implementation manner, sending the target transmission data in the target data queue to the second memory on the second controller includes:

[0135] Step 301: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address conversion register.

[0136] Please refer to Figure 9 , step 301 corresponds to Figure 9The ① process on it. The host corresponding to partition 0, that is, the host where node 0 is located. The first controller sends a data read request protocol to the corresponding host and gives it to the NT EP (terminal of NT) in partition 0. After the NT EP terminal receives the data read request protocol, it parses the data read request protocol and compares the address carried in the data read request protocol header with the addresses of the address translation registers (address translation register 0, address translation register 2) in the computer configuration. If the address corresponding to the data read request protocol falls on a certain address translation memory, the data read and write request will be sent to that address translation register. Here, it is set to match the address carried in the data read request protocol header with the address of the address translation register address.

[0137] The address of the data read request protocol here is 0xE000_0000, click on address translation memory 2. Since address translation memory 2 is the direct conversion window of port 3, the address of the data read request protocol is converted to the address of the target port through address translation memory 2. In this case, the address changes from 0xE000_0000 to 0x1000_0000.

[0138] This operation will also hit the part in the rule search table that starts ID conversion and determines the destination partition number. The target port is determined using the converted address and the destination partition number. In this embodiment, the target port is determined to be port 3 in downstream partition 1.

[0139] Step 302, in response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID.

[0140] Step 303, convert the protocol request address to the target port address through the address translation register, and convert the first node ID to the proxy device ID.

[0141] Steps 302 and 303 correspond to Figure 9 The ② process on it. After the data read request protocol arrives at address translation register address translation memory 2, it will parse the data read request protocol through address translation register 2 to obtain the protocol request address and the first node ID (node 0). Here, the protocol request address is the address of the data read request protocol. Convert the protocol request address to the target port address. Here, the target port address refers to the address of the target port of the target partition. Here it is port 3 shown in the figure. Convert the first node ID to the target ID through the address translation memory. Here, the target ID refers to the ID of the proxy device corresponding to the data read request protocol.

[0142] The ID routing method is adopted here. The ID = Bus Number + Device Number + Function Number can uniquely find a certain function of a certain device.

[0143] In this application, the conversion of the first node ID to the target ID specifically refers to the conversion of the BDF of the data read request protocol jump partition to the BDF of the NT proxy function. This proxy function allows the data read request protocol to appear as if it comes from the target partition. It also allows the completion of the data read request protocol return, converting the BDF corresponding to the completion of the data read request protocol back to the original BDF, and finding a way to return to the original partition, that is, the original partition where the data read request protocol is sent.

[0144] When processing TLP (Transaction Layer Protocol) packets, it is usually necessary to convert the BDF (Bus, Device, Function) of the TLP back to the original BDF value. A decode_tlp_bdf function can be defined. This function takes an encoded TLP BDF value as a parameter, and then extracts each part of the BDF through shift and AND operations. Finally, it returns the original BDF value.

[0145] As can be seen from the figure, the original TLP shows that the requester (the first node) ID is 0.1.0. The ID conversion converts the device and function numbers of the BDF to match the device (NT Proxy Fun) and function of the proxy function. The bus number remains unchanged because the ID conversion does not know the bus number of the proxy function at this time. The value of the target ID is finally 0.31.7. Among them, 31 is the proxy device number.

[0146] Step 304: Send the data read request protocol and the target port address to the proxy device in the second sub-non-transparent bridge based on the proxy device ID. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID.

[0147] Step 305: Forward the data read request protocol to the target port based on the target port address.

[0148] The steps of Step 304 and Step 305 correspond Figure 9For the ③ process above, after the data read request protocol comes out of the egress port of the proxy device, the egress editor of the proxy device will perform ID conversion on the ID of the proxy device, specifically the bus number of the proxy function. Exemplarily, the target ID is changed from 0.31.7 to 1.31.7. This is to match the ID corresponding to the data read request protocol with the proxy device ID. After the target ID conversion, the matching ID is obtained, and the data read request protocol is forwarded to the target port (EP3 shown in the figure) based on the target port address.

[0149] Step 207, in response to the second memory receiving the target transfer data, the second drive module sends a message to the first controller to inform that cache update starts based on the target transfer data.

[0150] Step 208, the second controller polls the target transfer data in the second memory and synchronizes the target transfer data to the second communication module, and the second communication module synchronizes the target transfer data to the second cache module.

[0151] Step 209, after the second controller confirms receiving the target transfer data, it sends feedback information to the first controller.

[0152] Step 210, in response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0153] Specifically, the second drive module sends a message to the peer to inform cache data update. The second controller polls the message. When the message is received, it is synchronized to the second communication module, and the second communication module then synchronizes the message to the second cache module on the second controller.

[0154] In this application, the first controller and the second controller establish a space cache mapping area of 1M * N queues, which is responsible for the transfer of messages of multiple queues and multiple channels between the first controller and the second controller. Each queue has a 1M space and is responsible for sending messages. The messages are mainly divided into two types: read and write. Among them, the read type is responsible for reading messages from the peer, and the write type is responsible for writing to the peer and synchronizing to the peer controller.

[0155] After the second controller confirms receiving the message, it sends a feedback message to the first controller. The first controller confirms that the second controller has received successfully and synchronizes the message to the second communication module. The second communication module is responsible for deleting this process transaction layer.

[0156] In an embodiment, determining the second target transfer path corresponding to the transfer data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transfer data to the second controller based on the second target transfer path includes:

[0157] Step 401: In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module.

[0158] Step 402: In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module.

[0159] Step 403: In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue.

[0160] Step 404: In response to the target data queue meeting the preset conditions, the first drive module sends the target transmission data in the target data queue that meets the preset conditions to the memory access queue in the first memory.

[0161] Step 405: The first drive module sends a notification to the first non-transparent bridge. Meanwhile, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge.

[0162] For the specific implementation manners of Steps 401 - 405, refer to the descriptions of Steps 201 - 205 in the specification, which will not be elaborated here.

[0163] Step 406: The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

[0164] After all the encapsulated data is stored in the target data queue in the first memory, the first drive module will send notifications to the first non-transparent bridge and the second non-transparent bridge, informing that the target transmission data in the target data queue will be sent. Then, through address conversion by the first non-transparent bridge and the second non-transparent bridge, the target transmission data in the target data queue is sent to the second memory on the second controller.

[0165] Among them, the first non-transparent bridge sending the target transmission data to the second non-transparent bridge and transmitting the target transmission data to the second memory through the second non-transparent bridge includes:

[0166] Step 501: In response to the first non-transparent bridge receiving the data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address conversion register;

[0167] Step 502: In response to the address conversion register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0168] Step 503: Convert the protocol request address to a target port address through the address translation register, and convert the first node ID to a proxy device ID;

[0169] Step 504: Send the data read request protocol and the target port address to the proxy device in the second non-transparent bridge based on the proxy device ID. The proxy device converts the proxy device ID to obtain a target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0170] Step 505: Forward the data read request protocol to the target port based on the target port address.

[0171] It can be understood that the specific implementation principles of steps 501 - 505 are the same as those of steps 301 - 305. The only difference is whether the first non-transparent bridge or the signal relay device is set on the second controller in steps 301 - 305 and steps 501 - 505. Therefore, it will not be elaborated here.

[0172] Step 407, in response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to inform that the cache update starts based on the target transmission data.

[0173] Step 408, the second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module.

[0174] Step 409, after the second controller confirms receiving the target transmission data, send a feedback message to the first controller.

[0175] Step 410, in response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0176] For the specific implementation manners of steps 407 - 410, refer to the descriptions of steps 207 - 210 in the specification, and it will not be elaborated here.

[0177] In an implementation manner, after forwarding the data read request protocol to the target port based on the target port address, that is, after step 305 or step 505, it further includes:

[0178] Step 306: Obtain the matching ID and the completed data protocol ID. The completed data protocol ID is the ID of the completed data protocol sent to the first node when the target port receives the data request protocol completion.

[0179] Step 307: Convert the matching ID and the completion data protocol ID into the first node ID.

[0180] Steps 306 and 307 correspond to Figure 9 the ④ process above. In this application, the target device actively sends data to the first node using the completion message. Different from the data read request protocol, the completion data protocol corresponding to the completion data is transmitted using ID routing. Using the request ID (matching ID) of the proxy function, the request ID (matching ID) and the completion ID (ID of the completion data protocol) can be converted back to the BDF of the original partition (partition 0).

[0181] The completion ID here refers to the ID corresponding to the request for sending the completion data protocol. Here, the matching ID and the completion ID are converted to match the node 0 (the first node) that initially sent the data read request protocol, and the completion ID is translated to match the NT EP initially accessed by the host. The proxy function ID is also used to determine the target port to return to the original source partition (partition 0 where the first node is located).

[0182] Step 308: In response to the completion of converting the matching ID and the completion data protocol ID into the first node ID, forward the completion data protocol to the first node.

[0183] Step 308 corresponds to Figure 9 the ⑤ process above. Since the requester ID (matching ID) and the completion ID have been modified, there is no need to perform egress editing on the completion data protocol. The only operation here is to forward the completion data protocol to node 0.

[0184] It should be understood that although Figures 7 - 9 the steps in the flowchart are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, Figures 6 - 8 at least a part of the steps in

[0185] In one embodiment, as Figure 10 shown, a dual - controller communication device is provided, including: a judgment module 20, a determination module 21, and a transmission module 22, where:

[0186] A judgment module, configured to, in response to the first controller receiving a data transmission instruction, where the data transmission instruction includes transmission data, judge whether a signal relay device is set on the second controller.

[0187] A determination module, configured to, if a signal relay device is set on the second controller, determine a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device; if a signal relay device is not set on the second controller, judge whether a second non-transparent bridge is set on the second controller; if a second non-transparent bridge is set on the second controller, determine a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge; if a second non-transparent bridge is not set on the second controller, issue a fault warning;

[0188] A transmission module, configured to the first controller transmit the transmission data to the second controller based on the first target transmission path / or the second transmission path.

[0189] In one embodiment, the above device can implement another implementation manner of the dual-controller communication method, and the specific steps are as follows:

[0190] Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, and the first controller transmitting the transmission data to the second controller based on the first target transmission path includes:

[0191] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first buffer module, and send the transmission data to the first communication module;

[0192] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first driver module;

[0193] In response to the first driver module receiving the encapsulated data, the first driver module stores the encapsulated data in the target data queue;

[0194] In response to the target data queue meeting a preset condition, the first driver module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0195] The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge;

[0196] The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device.

[0197] In one embodiment, the above device can implement another implementation manner of the dual - controller communication method, and the specific steps are as follows:

[0198] Determine the second target transmission path corresponding to the transmission data according to the first non - transparent bridge and the second non - transparent bridge. The first controller transmits the transmission data to the second controller based on the second target transmission path, including:

[0199] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module;

[0200] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module;

[0201] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue;

[0202] In response to the target data queue meeting a preset condition, the first drive module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0203] The first drive module sends a notification to the first non - transparent bridge. At the same time, the target transmission data in the memory access queue is sent to the first non - transparent bridge, and the management data in the first drive module is synchronized to the first non - transparent bridge;

[0204] The first non - transparent bridge sends the target transmission data to the second non - transparent bridge, and transmits the target transmission data to the second memory through the second non - transparent bridge.

[0205] In one embodiment, the above device can implement another implementation manner of the dual - controller communication method, and the specific steps are as follows:

[0206] The method further includes:

[0207] In response to the second memory receiving the target transmission data, the second drive module sends a message to the first controller to inform that cache update starts based on the target transmission data;

[0208] The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module;

[0209] After the second controller confirms receiving the target transmission data, send feedback information to the first controller;

[0210] In response to the first controller receiving a feedback message, the first controller synchronizes the feedback information to the first communication module.

[0211] In one embodiment, the above device can implement another implementation manner of the dual-controller communication method, and the specific steps are as follows:

[0212] The first non-transparent bridge sends the target transmission data to the signal relay device, and the signal relay device transmits the target transmission data to the second memory, including:

[0213] In response to the first sub-non-transparent bridge receiving a data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address translation register;

[0214] In response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0215] The address translation register converts the protocol request address into a target port address and converts the first node ID into a proxy device ID;

[0216] Based on the proxy device ID, send the data read request protocol and the target port address to the proxy device in the second sub-non-transparent bridge. The proxy device converts the proxy device ID to obtain a target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0217] Forward the data read request protocol to the target port based on the target port address.

[0218] In one embodiment, the above device can implement another implementation manner of the dual-controller communication method, and the specific steps are as follows:

[0219] The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the second non-transparent bridge transmits the target transmission data to the second memory, including:

[0220] In response to the first non-transparent bridge receiving a data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address translation register;

[0221] In response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0222] The address translation register converts the protocol request address into a target port address and converts the first node ID into a proxy device ID;

[0223] Send the data read request protocol and the target port address to the proxy device in the second non-transparent bridge based on the proxy device ID. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, which matches the first node ID.

[0224] Forward the data read request protocol to the target port based on the target port address.

[0225] In one embodiment, the above device can implement another implementation manner of the dual-controller communication method. The specific steps are as follows:

[0226] After forwarding the data read request protocol to the target port based on the target port address, it further includes:

[0227] Obtain the matching ID and the completed data protocol ID. The completed data protocol ID is the ID of the completed data protocol sent to the first node when the target port receives the data request protocol and completes it;

[0228] Convert the matching ID and the completed data protocol ID to the first node ID;

[0229] In response to the completion of converting the matching ID and the completed data protocol ID to the first node ID, forward the completed data protocol to the first node.

[0230] For the specific limitations of the dual-controller communication device, reference can be made to the limitations on the dual-controller communication method in the above text, which will not be elaborated here. Each module in the above dual-controller communication device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor of the computer device in hardware form or be independent of it, or can be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above modules.

[0231] In one implementation manner, the present application also provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the dual-controller communication method provided by the above methods.

[0232] In one embodiment, a computer device is provided. The computer device can be a terminal, and its internal structure diagram can be as Figure 11As shown in the figure. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a dual-controller communication method. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer covered on the display screen, or a button, a trackball, or a touchpad set on the shell of the computer device, or an external keyboard, touchpad, or mouse, etc.

[0233] Those skilled in the art can understand that Figure 11 the structure shown in the figure is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0234] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

[0235] Step 101, in response to the first controller receiving a data transmission instruction, the data transmission instruction includes transmission data, and determine whether a signal relay device is set on the second controller.

[0236] Step 102, if a signal relay device is set on the second controller, determine a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device.

[0237] Step 103, if a signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0238] Step 104, if a second non-transparent bridge is set on the second controller, determine a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge.

[0239] Step 105, if a second non-transparent bridge is not set on the second controller, issue a fault warning.

[0240] Step 106, the first controller transmits the transmission data to the second controller based on the first target transmission path / or the second transmission path.

[0241] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0242] Determine a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device. The first controller transmits the transmission data to the second controller based on the first target transmission path, including:

[0243] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module;

[0244] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first driver module;

[0245] In response to the first driver module receiving the encapsulated data, the first driver module stores the encapsulated data in the target data queue;

[0246] In response to the target data queue meeting a preset condition, the first driver module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0247] The first driver module sends a notification to the first non-transparent bridge. At the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge;

[0248] The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device.

[0249] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0250] Determine a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge. The first controller transmits the transmission data to the second controller based on the second target transmission path, including:

[0251] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module and send the transmission data to the first communication module;

[0252] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first driver module;

[0253] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data into the target data queue;

[0254] In response to the target data queue meeting a preset condition, the first drive module sends the target transfer data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0255] The first drive module sends a notification to the first non-transparent bridge. Meanwhile, the target transfer data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge;

[0256] The first non-transparent bridge sends the target transfer data to the second non-transparent bridge, and the target transfer data is transmitted to the second memory through the second non-transparent bridge.

[0257] In one embodiment, when the processor executes a computer program, the following steps are further implemented:

[0258] The method further includes:

[0259] In response to the second memory receiving the target transfer data, the second drive module sends a message to the first controller to inform that cache update starts based on the target transfer data;

[0260] The second controller polls the target transfer data in the second memory and synchronizes the target transfer data to the second communication module, and the second communication module synchronizes the target transfer data to the second cache module;

[0261] After the second controller confirms receiving the target transfer data, it sends feedback information to the first controller;

[0262] In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0263] In one embodiment, when the processor executes a computer program, the following steps are further implemented:

[0264] The first non-transparent bridge sending the target transfer data to the signal relay device and the target transfer data being transmitted to the second memory through the signal relay device includes:

[0265] In response to the first sub-non-transparent bridge receiving the data read request protocol sent from the first node corresponding to the first controller, obtaining the data read request protocol, and sending the data read request protocol to the address translation register;

[0266] In response to the address translation register receiving the data read request protocol, parsing the data read request protocol to obtain the protocol request address and the first node ID;

[0267] Convert the protocol request address to the target port address through the address translation register, and convert the first node ID to the proxy device ID;

[0268] Send the data read request protocol and the target port address to the proxy device in the second sub-non-transparent bridge based on the proxy device ID. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0269] Forward the data read request protocol to the target port based on the target port address.

[0270] In one embodiment, when the processor executes the computer program, the following steps are also implemented:

[0271] The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge, including:

[0272] In response to the first non-transparent bridge receiving the data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address translation register;

[0273] In response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0274] Convert the protocol request address to the target port address through the address translation register, and convert the first node ID to the proxy device ID;

[0275] Send the data read request protocol and the target port address to the proxy device in the second non-transparent bridge based on the proxy device ID. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0276] Forward the data read request protocol to the target port based on the target port address.

[0277] In one embodiment, when the processor executes the computer program, the following steps are also implemented:

[0278] After forwarding the data read request protocol to the target port based on the target port address, the following steps are also included:

[0279] Obtain the matching ID and the completed data protocol ID. The completed data protocol ID is the ID of the completed data protocol sent to the first node when the target port receives the data request protocol;

[0280] Convert the matching ID and the completed data protocol ID to the first node ID;

[0281] In response to the completion of converting the matching ID and the completed data protocol ID into the first node ID, forward the completed data protocol to the first node.

[0282] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0283] Step 101, in response to the first controller receiving a data transmission instruction, the data transmission instruction includes transmission data, and determine whether a signal relay device is set on the second controller.

[0284] Step 102, if a signal relay device is set on the second controller, determine a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device.

[0285] Step 103, if a signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0286] Step 104, if a second non-transparent bridge is set on the second controller, determine a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge.

[0287] Step 105, if a second non-transparent bridge is not set on the second controller, issue a fault warning.

[0288] Step 106, the first controller transmits the transmission data to the second controller based on the first target transmission path / or the second transmission path.

[0289] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0290] Determine a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device. The first controller transmitting the transmission data to the second controller based on the first target transmission path includes:

[0291] In response to the first controller receiving a data transmission instruction, obtain the transmission data from the first cache module, and send the transmission data to the first communication module;

[0292] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first drive module;

[0293] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue;

[0294] In response to the target data queue meeting a preset condition, the first drive module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0295] The first drive module sends a notification to the first non-transparent bridge. Meanwhile, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge;

[0296] The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device.

[0297] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0298] Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, and the first controller transmitting the transmission data to the second controller based on the second target transmission path includes:

[0299] In response to the first controller receiving a data transmission instruction, obtaining the transmission data from the first cache module and sending the transmission data to the first communication module;

[0300] In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain the encapsulated data, and sends the encapsulated data to the first drive module;

[0301] In response to the first drive module receiving the encapsulated data, the first drive module stores the encapsulated data in the target data queue;

[0302] In response to the target data queue meeting a preset condition, the first drive module sends the target transmission data in the target data queue that meets the preset condition to the memory access queue in the first memory;

[0303] The first drive module sends a notification to the first non-transparent bridge. Meanwhile, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first drive module is synchronized to the first non-transparent bridge;

[0304] The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge.

[0305] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0306] The method further includes:

[0307] In response to the second memory receiving the target transmission data, the second drive module sends a message to the first controller to inform that cache update starts based on the target transmission data;

[0308] The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module;

[0309] After the second controller confirms receiving the target transmission data, it sends feedback information to the first controller;

[0310] In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0311] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0312] The first non-transparent bridge sends the target transmission data to the signal relay device, and the signal relay device transmits the target transmission data to the second memory, including:

[0313] In response to the first sub-non-transparent bridge receiving the data read request protocol sent by the first node corresponding to the first controller, it obtains the data read request protocol and sends the data read request protocol to the address conversion register;

[0314] In response to the address conversion register receiving the data read request protocol, it parses the data read request protocol to obtain the protocol request address and the first node ID;

[0315] The address conversion register converts the protocol request address into the target port address and converts the first node ID into the proxy device ID;

[0316] Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0317] The data read request protocol is forwarded to the target port based on the target port address.

[0318] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0319] The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the second non-transparent bridge transmits the target transmission data to the second memory, including:

[0320] In response to the first non-transparent bridge receiving a data read request protocol sent by the first node corresponding to the first controller, obtain the data read request protocol and send the data read request protocol to the address translation register;

[0321] In response to the address translation register receiving the data read request protocol, parse the data read request protocol to obtain the protocol request address and the first node ID;

[0322] Convert the protocol request address to the target port address through the address translation register, and convert the first node ID to the proxy device ID;

[0323] Based on the proxy device ID, send the data read request protocol and the target port address to the proxy device in the second non-transparent bridge. The proxy device converts the proxy device ID to obtain the target ID, and the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID;

[0324] Forward the data read request protocol to the target port based on the target port address.

[0325] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0326] After forwarding the data read request protocol to the target port based on the target port address, it further includes:

[0327] Obtain the matching ID and the completed data protocol ID. The completed data protocol ID is the ID of the completed data protocol sent to the first node when the target port receives the data request protocol and completes it;

[0328] Convert the matching ID and the completed data protocol ID to the first node ID;

[0329] In response to the conversion of the matching ID and the completed data protocol ID to the first node ID being completed, forward the completed data protocol to the first node.

[0330] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the embodiments provided in the present application can include non-volatile and / or volatile memories. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0331] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0332] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application.

Claims

1. A dual-controller communication system, characterized in that: The system comprises a first controller and a second controller: The first controller includes a first processor and a first non-transparent bridge; The second controller includes a second processor and a signal relay device; The input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor; In response to the first non-transparent bridge acquisition notification, acquiring target transmission data from the memory access queue on the first controller, and sending the target transmission data to the signal relay device, so as to transmit the target transmission data to the second controller through the signal relay device; The first non-transparent bridge includes a first sub-non-transparent bridge and a second sub-non-transparent bridge, and the first sub-non-transparent bridge and the second sub-non-transparent bridge are two virtual sub-non-transparent bridges in a physical non-transparent bridge.

2. The system according to claim 1, characterized in that The input end of the first sub-non-transparent bridge is connected to the output end of the first processor, the output end of the first sub-non-transparent bridge is connected to the input end of the second sub-non-transparent bridge, the output end of the second sub-non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

3. The system according to claim 1, characterized in that The first controller further includes a first memory, and the second controller further includes a second memory. The first memory is respectively connected to the first processor and the first non-transparent bridge for communication, and the second memory is respectively connected to the second processor and the signal relay device for communication.

4. The system according to claim 1, characterized in that The first controller also includes a first driving module, and the second controller also includes a second driving module. The first driving module is communicatively connected to the first processor, and the second driving module is communicatively connected to the second processor. The first driving module and the second driving module are used to establish a mapping relationship between the first memory and the second memory.

5. The system according to claim 1, characterized in that The first controller further includes a first communication module and a first cache module, and the second controller further includes a second communication module and a second cache module, the input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first driving module; The input end of the second communication module is connected to the output end of the second buffer module, and the output end of the second communication module is connected to the input end of the second driving module.

6. The system according to claim 1, characterized in that The second controller also includes a card slot, which is used to detachably install the second non-transparent bridge to achieve the use of the second non-transparent bridge to replace the signal relay device.

7. A dual controller communication method, characterized in that: The dual-controller communication method is applied to the dual-controller communication system according to any one of claims 1 to 6, and the method comprises: In response to the first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on the second controller; If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device; If the signal relay device is not provided on the second controller, determining whether a second non-transparent bridge is provided on the second controller; If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge; If the second non-transparent bridge is not provided on the second controller, a fault warning is issued; The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

8. The method according to claim 7, characterized in that Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, the first controller transmitting the transmission data to the second controller based on the first target transmission path comprises: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to a signal relay device, and transmits the target transmission data to a second memory through the signal relay device.

9. The method according to claim 7, characterized in that: Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transmission data to the second controller based on the second target transmission path comprises: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; the first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

10. The method according to claim 8 or 9, characterized in that: The method further comprises: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

11. The method according to claim 8, characterized in that The first non-transparent bridge sends the target transmission data to a signal relay device, and the target transmission data is transmitted to a second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address conversion register receiving a data read request protocol, parsing the data read request protocol to obtain a protocol request address and a first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; The data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge based on the proxy device ID, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; the data read request protocol is forwarded to the target port based on the target port address.

12. The method according to claim 9, characterized in that The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, comprising: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address conversion register receiving a data read request protocol, parsing the data read request protocol to obtain a protocol request address and a first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; The data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge based on the proxy device ID, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; the data read request protocol is forwarded to the target port based on the target port address.

13. The method according to claim 11 or 12, characterized in that: The method further comprises: forwarding the data read request protocol to the target port based on the target port address; Acquire a matching ID and a completion data protocol ID, where the completion data protocol ID is an ID of the completion data protocol sent to the first node when the target port completes receiving the data request protocol; Convert the matching ID and the completion data protocol ID into a first node ID; In response to the conversion of the matching ID and the completion data protocol ID to the first node ID being completed, the completion data protocol is forwarded to the first node.

14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 7 to 13 are implemented.

15. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 7 to 13 are implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 7 to 13 are implemented.

Images