Electrostatic protection structure, forming method thereof and electrostatic protection circuit

Abstract

The invention discloses an electrostatic protection structure, a forming method thereof and an electrostatic protection circuit. The electrostatic protection structure comprises a substrate; a gate structure on the substrate; the cathode doped region is located in the substrate on one side of the gate structure, and the cathode doped region is provided with first type doped ions; the anode doped region is located in the substrate on the other side of the gate structure, the anode doped region is provided with second type doped ions, and the first type doped ions and the second type doped ions are different in conductive type; and the interconnection structure is electrically connected with the gate structure, and the interconnection structure electrically connected with the gate structure is used for applying potential to the gate structure. According to the embodiment of the invention, the potential is applied to the gate structure, so that the bias voltage at the position of the gate structure is stabilized, the uniformity of gate voltage division is improved, trapped charges are not easy to accumulate at the bottom of the gate structure, the probability of forming a breakdown point at the bottom of the gate structure is reduced, and the reliability of the device is improved. And the secondary breakdown current of the electrostatic protection structure is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of electrostatic protection manufacturing, and in particular to an electrostatic protection structure and a forming method thereof, and an electrostatic protection circuit. Background Art

[0002] Integrated circuits are easily damaged by static electricity. Generally, protection circuits are designed at the input and output ends of the circuit or the power protection device to prevent the internal circuit from being damaged by static electricity. In existing integrated circuit designs, diode devices are often used as electrostatic discharge (ESD) devices to reduce static electricity damage.

[0003] However, with the rapid growth of the ESD protection integrated circuit (IC) industry, ESD protection technology continues to move toward smaller process nodes driven by Moore's Law, making integrated circuits develop in the direction of smaller size, higher circuit precision, and higher circuit complexity.

[0004] Therefore, the performance of the electrostatic protection structure in the prior art needs to be improved. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide an electrostatic protection structure and a method for forming the same, so as to improve the performance of the electrostatic protection structure.

[0006] To solve the above problems, an embodiment of the present invention provides an electrostatic protection structure, comprising: a substrate; a gate structure located on the substrate; a cathode doping region located in the substrate on one side of the gate structure, the cathode doping region having a first type of doped ions; an anode doping region located in the substrate on the other side of the gate structure, the anode doping region having a second type of doped ions, the first type of doped ions and the second type of doped ions having different conductivity types; an interconnection structure electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure.

[0007] Optionally, the interconnection structure is electrically connected to the gate structure, the cathode doped region, and the anode doped region, respectively; the interconnection structure electrically connected to the cathode doped region is used to apply a potential to the cathode doped region, and the interconnection structure electrically connected to the anode doped region is used to apply a potential to the anode doped region; the interconnection structure electrically connected to the gate structure is interconnected with the interconnection structure electrically connected to the cathode doped region.

[0008] Optionally, the interconnection structure electrically connected to the gate structure and the interconnection structure electrically connected to the cathode doping region are an integrated structure.

[0009] Optionally, the electrostatic protection structure further includes: a first plug, located between the interconnect structure and the cathode doping region, and between the interconnect structure and the anode doping region; and a second plug, located between the interconnect structure and the gate structure.

[0010] Optionally, along a direction perpendicular to an extending direction of the gate structure, a distance between the first plug and an adjacent gate structure is 0.1 micrometer to 2 micrometers.

[0011] Optionally, the material of the interconnect structure includes one or more of copper, tantalum and tantalum nitride.

[0012] Optionally, the substrate includes, from bottom to top, a bottom semiconductor layer, an insulating material layer and a top semiconductor layer; the electrostatic protection structure also includes: a well region, located in the substrate, the well region has first-type doped ions or second-type doped ions, and the bottom of the well region touches the top of the insulating material layer, or is located in the insulating material layer; wherein the gate structure is located on the substrate of the well region, and the cathode doped region and the anode doped region are both located in the well region.

[0013] Optionally, the electrostatic protection structure also includes: a well region located in the substrate, the well region having first-type doped ions or second-type doped ions; the gate structure is located on the substrate of the well region, and along the extension direction of the gate structure, the length of the overlapping portion of the gate structure and the well region ranges from 2 microns to 20 microns.

[0014] Optionally, along a direction perpendicular to an extension direction of the gate structure, a width of the gate structure ranges from 0.2 microns to 2 microns.

[0015] Optionally, along the normal direction of the top surface of the substrate, the depth of the cathode doping region is 50 nanometers to 200 nanometers.

[0016] Optionally, along the normal direction of the top surface of the substrate, the depth of the anode doping region is 50 nanometers to 200 nanometers.

[0017] Correspondingly, an embodiment of the present invention also provides a method for forming an electrostatic protection structure, comprising: providing a substrate; forming a gate structure on the substrate; forming a cathode doping region in the substrate on one side of the gate structure, the cathode doping region having a first type of doping ions; forming an anode doping region in the substrate on the other side of the gate structure, the anode doping region having a second type of doping ions; forming an interconnection structure, the interconnection structure being electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure.

[0018] Optionally, after forming the cathode doping region and the anode doping region, the interconnection structure is formed. In the step of forming the interconnection structure, the interconnection structure is electrically connected to the gate structure, the cathode doping region, and the anode doping region, respectively. The interconnection structure electrically connected to the cathode doping region is used to apply a potential to the cathode doping region, and the interconnection structure electrically connected to the anode doping region is used to apply a potential to the anode doping region; the interconnection structure electrically connected to the gate structure is interconnected with the interconnection structure electrically connected to the cathode doping region.

[0019] Optionally, in the step of forming the interconnection structure, the interconnection structure electrically connected to the gate structure and the interconnection structure electrically connected to the cathode doping region are an integrated structure.

[0020] Optionally, after forming the cathode doping region and the anode doping region and before forming the interconnection structure, the formation method further includes: forming a first plug on the cathode doping region and the anode doping region, respectively, the first plug being electrically connected to the cathode doping region and the anode doping region, respectively; forming a second plug on the gate structure, the second plug being electrically connected to the gate structure; in the step of forming the interconnection structure, forming the interconnection structure on the first plug and the second plug, the interconnection structure being electrically connected to the first plug and the second plug, respectively.

[0021] Optionally, in the step of providing the substrate, the substrate includes, from bottom to top, a bottom semiconductor layer, an insulating material layer and a top semiconductor layer; after providing the substrate and before forming the gate structure, the formation method further includes: forming a well region in the substrate, the well region having first-type doped ions or second-type doped ions, and the bottom of the well region touches the top of the insulating material layer, or is located in the insulating material layer; in the step of forming the gate structure, the gate structure is located on the substrate of the well region; in the step of forming the cathode doped region and the anode doped region, the cathode doped region and the anode doped region are both located in the well region.

[0022] Optionally, the process of forming the anode doping region includes an ion implantation process, and the process parameters of the ion implantation process include: the implanted ions are P-type ions, the implantation energy ranges from 5KeV to 40KeV, and the implantation dose ranges from 2E13atom / cm 2 To 8E15atom / cm 2 .

[0023] Optionally, the process of forming the cathode doping region includes an ion implantation process, and the process parameters of the ion implantation process include: the implanted ions are N-type ions, the implantation energy ranges from 5KeV to 50KeV, and the implantation dose ranges from 1E13atom / cm 2To 9E15atom / cm 2 .

[0024] Correspondingly, an embodiment of the present invention further provides an electrostatic protection circuit, comprising: a transistor, wherein the transistor comprises a gate, a cathode and an anode, and the gate is used to connect a potential.

[0025] Optionally, the gate is short-circuited with the cathode.

[0026] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0027] The electrostatic protection structure provided in the embodiment of the present invention includes an interconnection structure electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure. Compared with the scheme of floating the gate structure, since the potential is applied to the gate structure, it is beneficial to stabilize the bias voltage at the position of the gate structure, improve the uniformity of the gate voltage division, and also make it difficult to accumulate trap charges at the bottom position of the gate structure, that is, the interface state at the bottom position of the gate structure is relatively stable, which is beneficial to reduce the probability of forming a breakdown point at the bottom position of the gate structure, thereby improving the secondary breakdown current (It2) of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure.

[0028] In the method for forming an electrostatic protection structure provided by an embodiment of the present invention, an interconnection structure is formed, the interconnection structure is electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure. Compared with the scheme in which the gate structure is floating, since a potential is applied to the gate structure, it is beneficial to stabilize the bias voltage at the position of the gate structure, improve the uniformity of the gate voltage division, and also make it difficult for trapped charges to accumulate at the bottom position of the gate structure, that is, the interface state at the bottom position of the gate structure is relatively stable, which is beneficial to reduce the probability of forming a breakdown point at the bottom position of the gate structure, thereby increasing the secondary breakdown current of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a structural schematic diagram of an electrostatic protection structure;

[0030] Figures 2 to 3 It is a structural schematic diagram of an embodiment of an electrostatic protection structure of the present invention;

[0031] Figures 4 to 9 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming an electrostatic protection structure of the present invention. DETAILED DESCRIPTION

[0032] At present, the performance of the electrostatic protection structure still needs to be improved. Now, combined with an electrostatic protection structure, the reasons why the performance of the electrostatic protection structure needs to be improved are analyzed. Figure 1 A schematic structural diagram of an electrostatic protection structure.

[0033] refer to Figure 1 The electrostatic protection structure includes: a substrate 10; a gate structure 11, located on the substrate 10; a cathode doping region 12, located in the substrate 10 on one side of the gate structure 11, and the cathode doping region 12 has a first type of doping ions; an anode doping region 13, located in the substrate 10 on the other side of the gate structure 11, and the anode doping region 13 has a second type of doping ions, and the first type of doping ions and the second type of doping ions have different conductivity types.

[0034] Research has found that the bias voltage at the gate structure 11 is unstable, which makes it easier for charge to accumulate at the bottom of the gate structure 11, and correspondingly makes the interface state at the bottom of the gate structure 11 unstable, thereby easily forming a breakdown point at the bottom of the gate structure 11, thereby affecting the secondary breakdown current of the electrostatic protection structure.

[0035] In order to solve the above technical problems, an embodiment of the present invention provides an electrostatic protection structure, including: a substrate; a gate structure located on the substrate; a cathode doping region located in the substrate on one side of the gate structure, the cathode doping region having a first type of doped ions; an anode doping region located in the substrate on the other side of the gate structure, the anode doping region having a second type of doped ions, the first type of doped ions and the second type of doped ions having different conductivity types; an interconnection structure electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure.

[0036] The electrostatic protection structure provided by the embodiment of the present invention includes an interconnection structure electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure. Compared with the scheme of floating the gate structure, since the potential is applied to the gate structure, it is beneficial to stabilize the bias voltage at the position of the gate structure, improve the uniformity of the gate voltage division, and also make it difficult to accumulate trapped charges at the bottom position of the gate structure, that is, the interface state at the bottom position of the gate structure is more stable, which is beneficial to reduce the probability of forming a breakdown point at the bottom position of the gate structure, thereby increasing the secondary breakdown current of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure.

[0037] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0038] Figures 2 to 3It is a structural schematic diagram of an embodiment of an electrostatic protection structure of the present invention.

[0039] refer to Figures 2 to 3 In this embodiment, the electrostatic protection structure includes: a substrate 100; a gate structure 130, located on the substrate 100; a cathode doping region 141, located in the substrate 100 on one side of the gate structure 130, and the cathode doping region 141 has a first type of doping ion; an anode doping region 142, located in the substrate 100 on the other side of the gate structure 130, and the anode doping region 142 has a second type of doping ion, and the first type of doping ion and the second type of doping ion have different conductivity types; an interconnection structure 170, which is electrically connected to the gate structure 130, and the interconnection structure 170 electrically connected to the gate structure 130 is used to apply a potential to the gate structure 130.

[0040] in, Figure 2 is a top view, Figure 3 for Figure 8 Cross-sectional view at AA1.

[0041] The substrate 100 is used to provide a process platform for the electrostatic protection structure.

[0042] The base 100 includes a substrate (not shown), the material of the substrate may be silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, indium gallium or other materials, and the substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0043] In this embodiment, the substrate 100 includes, from bottom to top, a bottom semiconductor layer 101 , an insulating material layer 102 , and a top semiconductor layer 103 .

[0044] Specifically, the insulating material layer 102 is a buried oxide layer (buried oxide, BOX), the material of the buried oxide layer can be silicon dioxide, the material of the bottom semiconductor layer 101 can be silicon, germanium or a mixture of germanium and silicon, and the material of the top semiconductor layer 103 can be undoped silicon, doped silicon, undoped germanium or doped germanium. When the material of the top semiconductor layer 103 is undoped silicon or doped silicon, the substrate on the insulator is a silicon-on-insulator (SOI) structure, and when the material of the top semiconductor layer is undoped germanium or doped germanium, the substrate on the insulator is a germanium-on-insulator (GOI) structure. In this embodiment, the substrate on the insulator is a silicon-on-insulator.

[0045] In this embodiment, the electrostatic protection structure further includes: a well region 110 located in the substrate 100 , and the well region 110 has first-type doping ions or second-type doping ions.

[0046] It should be noted that the first type doping ions are N type ions, and the second type doping ions are P type ions. As an example, the N type ions include B, Ga or In, and the P type ions include P, As or Sb.

[0047] In a specific embodiment, the well region 110 has N-type ions.

[0048] Specifically, the bottom of the well region 110 contacts the top of the insulating material layer 102 , or is located in the insulating material layer 102 .

[0049] The bottom of the well region 110 touches the top of the insulating material layer 102, or is located in the insulating material layer 102, which makes it easy for the electrostatic protection device to have a larger longitudinal cross-sectional area of ​​the PN junction, thereby making it easy for the electrostatic protection device to have lower parasitic noise and current leakage, and has a wide range of applications. It can be used in the field of radio frequency (RF) devices, and is also beneficial to improving the stability of the electrostatic protection device.

[0050] In this embodiment, the electrostatic protection structure further includes: an isolation structure 120, which is located in the substrate 100. The isolation structure 120 is a shallow trench isolation structure (STI), and the area between adjacent isolation structures 120 is an active area (not marked). As an example, the active area overlaps with the well area 110.

[0051] The isolation structure 120 is used to isolate each semiconductor device to prevent leakage current from occurring between the devices.

[0052] Specifically, the bottom of the isolation structure 120 contacts the top of the insulating material layer 102 , or the bottom of the isolation structure 120 is located in the insulating material layer 102 , so as to improve the isolation performance of the isolation structure 120 .

[0053] It should be noted that the material of the isolation structure 120 is an insulating material. As an example, the material of the isolation structure 120 is silicon oxide.

[0054] The gate structure 130 is used to define the positions of the cathode doping region 141 and the anode doping region 142 .

[0055] In this embodiment, the gate structure 130 includes a gate dielectric layer (not shown) and a gate electrode layer (not shown) located on the gate dielectric layer.

[0056] Specifically, the material of the gate dielectric layer includes silicon oxide or silicon oxynitride, and the material of the gate electrode layer includes polysilicon, amorphous silicon or amorphous carbon. In other embodiments, the gate structure can also be a metal gate structure, and accordingly, the material of the gate dielectric layer includes HfO2, ZrO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, Al2O3, SiO2 or La2O3, and the material of the gate electrode layer includes TiN, TaN, Ta, Ti, TiAl, W, Al, TiSiN or TiAlC. In this embodiment, the gate structure 130 is a polysilicon gate structure. In other embodiments, the gate structure can also be a metal gate structure.

[0057] When the device is working, applying a potential to the gate structure 130 is beneficial to stabilizing the bias voltage at the gate structure 130 and improving the uniformity of the gate voltage division, so that it is not easy to accumulate trapped charges at the bottom of the gate structure 130 (for example, the gate dielectric layer at the bottom of the gate electrode layer), that is, the interface state at the bottom of the gate structure 130 is relatively stable, which is beneficial to reducing the probability of forming a breakdown point at the bottom of the gate structure 130, thereby increasing the secondary breakdown current of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure.

[0058] It should be noted that applying a potential to the gate structure 130 refers to: applying a positive potential, a negative potential or a zero potential to the gate structure 130 .

[0059] Accordingly, in this embodiment, the gate structure 130 is located on the substrate 100 in the well region 110 .

[0060] It should be noted that the gate structure 130 is located on the substrate 100 of the well region 110, and along the extension direction of the gate structure 130, the length d1 of the portion where the gate structure 130 overlaps with the well region 110 should not be too small or too large. If the length d1 of the portion where the gate structure 130 overlaps with the well region 110 is too small, it is easy to cause the PN junction width to be too small, which is easy to cause the local discharge current to be too large when the electrostatic protection device is working, which is easy to cause the thermal effect of the electrostatic protection device to be serious, thereby affecting the performance of the electrostatic protection device; if the length d1 of the portion where the gate structure 130 overlaps with the well region 110 is too large, it is easy to cause the area of ​​the electrostatic protection structure to be too large, and it is also easy to increase the probability of causing the floating body effect, which is easy to cause the effect of improving the control ability of the gate structure 130 over the channel to be poor. Therefore, in this embodiment, the gate structure 130 is located on the substrate 500 of the well region 110 , and along the extension direction of the gate structure 130 , the length d1 of the overlapping portion of the gate structure 130 and the well region 110 ranges from 2 microns to 20 microns.

[0061] Among them, the length d1 of the overlapping portion of the gate structure 130 and the well region 110, multiplied by the number of overlapping portions of the gate structure 130 and the well region 110, is the perimeter (Perimeter, P) of the electrostatic protection structure. Correspondingly, the secondary breakdown current (It2) of the electrostatic protection structure is divided by the perimeter of the electrostatic protection structure, that is, the secondary breakdown current per unit perimeter (It2 / P).

[0062] As an example, the length d1 of the portion where the gate structure 130 overlaps the well region 110 is reduced from 10 micrometers to 5 micrometers, and the secondary breakdown current per unit perimeter is increased by 3 mA / micrometer.

[0063] It should also be noted that, along the direction perpendicular to the extension direction of the gate structure 130, the width d2 of the gate structure 130 should not be too small or too large. If the width d2 of the gate structure 130 is too small, it is easy to increase the difficulty of forming the gate structure 130; if the width d2 of the gate structure 130 is too large, when the length d1 of the overlapping portion of the gate structure 130 and the well region 110 is constant, the resistance of the channel is easy to be too large, so that when the working current of the electrostatic protection device is the same, the working voltage of the electrostatic protection structure is easy to be too large, and accordingly, the power borne by the electrostatic protection device is also easy to be too large, which is easy to increase the degree of thermal effect of the electrostatic protection device. Therefore, in this embodiment, along the direction perpendicular to the extension direction of the gate structure 130, the width d2 of the gate structure 130 ranges from 0.2 microns to 2 microns.

[0064] As an example, the width d2 of the gate structure 130 is reduced by 0.1 micrometers, the secondary breakdown voltage is reduced by 0.4 volts, and the thermal effect of the electrostatic protection device is reduced, thereby increasing the design and use window of the electrostatic protection device.

[0065] In this embodiment, the electrostatic protection structure further includes: a gate sidewall 131 located on the sidewall of the gate structure 130 .

[0066] The sidewall spacer 131 is used to protect the sidewall of the gate structure 130. The sidewall spacer 131 may be a single-layer structure or a stacked structure, and the material of the sidewall spacer 131 includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon nitride oxide, boron nitride, and boron carbonitride. As an example, the sidewall spacer 131 is a single-layer structure, and the material of the sidewall spacer 131 is silicon nitride.

[0067] The cathode doping region 141 is electrically connected to the cathode and serves as the cathode of the electrostatic protection device.

[0068] In this embodiment, the cathode doping region 141 is disposed adjacent to the isolation structure 120 , and the sidewall of the cathode doping region 141 touches the sidewall of the isolation structure 120 , or the sidewall of the cathode doping region 541 is located in the isolation structure 120 .

[0069] The side wall of the cathode doping region 141 touches the side wall of the isolation structure 120, or the side wall of the cathode doping region 141 is located in the isolation structure 120, which can reduce the probability of excessive local resistance of the electrostatic protection structure and reduce the probability of various parasitic problems caused by excessive local resistance.

[0070] In other embodiments, the sidewall of the anode doping region touches the sidewall of the isolation structure, or the sidewall of the anode doping region is located in the isolation structure.

[0071] It should be noted that the depth of the cathode doping region 141 should not be too small or too large along the normal direction of the top surface of the substrate 100. If the depth of the cathode doping region 141 is too small, it is easy to increase the contact resistance of the cathode doping region 141, resulting in poor conductivity, and it is also easy to make the depth of the PN junction too small, which is easy to make the effect of improving the secondary breakdown current of the electrostatic protection structure poor; if the depth of the cathode doping region 141 is too large, it is easy to increase the degree of ion diffusion, and correspondingly increase the probability of the well region 110 being affected by ion diffusion, so that the depth of the well region 110 becomes smaller, thereby affecting the stability of the electrostatic protection device, and if the depth of the cathode doping region 141 is too large, correspondingly, the energy or dose during ion injection is also easy to be too large, thereby easily increasing the degree of reflection during the ion injection process, thereby increasing the probability of the gate dielectric layer being damaged. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 100, the depth of the cathode doping region 141 is 50 nanometers to 200 nanometers.

[0072] The cathode doping region 141 is usually formed by an ion implantation process. Accordingly, the gate structure 530 near the cathode doping region 541 has N-type ions.

[0073] The anode doping region 142 is electrically connected to the anode and serves as the anode of the electrostatic protection device.

[0074] In this embodiment, the anode doping region 142 is located between adjacent gate structures 130. In other embodiments, the cathode doping region may be located between adjacent gate structures 130, and correspondingly, the anode doping region is disposed adjacent to the isolation structure.

[0075] It should be noted that the depth of the anode doping region 142 should not be too small or too large along the normal direction of the top surface of the substrate 100. The reason why the depth of the anode doping region 142 should not be too small or too large is similar to the reason why the depth of the cathode doping region 141 should not be too small or too large, so it will not be repeated here. Therefore, in this embodiment, the depth of the anode doping region 142 along the normal direction of the top surface of the substrate 100 is 50 nanometers to 200 nanometers.

[0076] The anode doping region 142 is usually formed by an ion implantation process, and accordingly, the gate structure 530 near the anode doping region has P-type ions.

[0077] In this embodiment, the electrostatic protection structure further includes: a well region 110 located in the substrate 100 ; correspondingly, the cathode doping region 141 and the anode doping region 142 are both located in the well region 110 .

[0078] In this embodiment, the electrostatic protection structure further includes: a first plug 161 located between the interconnect structure 170 and the cathode doping region 141 and between the interconnect structure 170 and the anode doping region 142 ; and a second plug 162 located between the interconnect structure 170 and the gate structure 130 .

[0079] The first plug 161 located between the interconnect structure 170 and the cathode doped region 141 and between the interconnect structure 170 and the anode doped region 142, and the second plug 162 located between the interconnect structure 170 and the gate structure 130, respectively, can easily reduce the difficulty of forming the interconnect structure 170 electrically connected to the cathode doped region 141, the interconnect structure 170 electrically connected to the anode doped region 142, and the interconnect structure 170 electrically connected to the gate structure 130.

[0080] Specifically, the material of the first plug 161 and the second plug 162 includes one or more of tungsten, cobalt and ruthenium.

[0081] Tungsten, cobalt and ruthenium have good conductivity, which is beneficial to improving the electrical connection performance between the cathode doped region 141 and the interconnection structure 170 , the anode doped region 142 and the interconnection structure 170 , and the gate structure 130 and the interconnection structure 170 .

[0082] It should be noted that, along the direction perpendicular to the extension direction of the gate structure 130, the distance d3 between the first plug 161 and the adjacent gate structure 130 should not be too small or too large. If the distance d3 between the first plug 161 and the adjacent gate structure 130 is too small, it is easy to make the parasitic capacitance between the first plug 161 and the adjacent gate structure 130 too large, and it is also easy to increase the process difficulty of forming the first plug 161; if the distance d3 between the first plug 161 and the adjacent gate structure 130 is too large, it is easy to make the area of ​​the electrostatic protection structure too large. Therefore, in this embodiment, along the direction perpendicular to the extension direction of the gate structure 130, the distance d3 between the first plug 161 and the adjacent gate structure 130 is 0.1 micrometers to 2 micrometers.

[0083] As an example, when the distance d3 between the first plug 161 and the adjacent gate structure 130 increases by 0.1 micrometers, the secondary breakdown current increases by 500 mA.

[0084] In this embodiment, the electrostatic protection structure further includes: a metal silicide layer 150 covering the top of the cathode doping region 141 and the anode doping region 142 .

[0085] The metal silicide layer 150 can reduce the contact resistance between the cathode doped region 141 and the external electrical connection structure, and between the anode doped region 142 and the external electrical connection structure.

[0086] Specifically, the material of the metal silicide layer 150 includes one or more of titanium silicon compounds, cobalt silicon compounds or nickel silicon compounds.

[0087] As an example, the metal silicide layer 150 is also formed on the top of the gate structure 130 .

[0088] The interconnection structure 170 is electrically connected to the gate structure 130 , and a potential is applied to the gate structure 130 via the interconnection structure 170 , which helps to reduce the difficulty of applying a potential to the gate structure 130 .

[0089] The interconnect structure 170 is an interconnect structure of a certain layer in the back-end process (eg, the first metal interconnect layer M1 ).

[0090] In this embodiment, the interconnection structure 170 electrically connected to the gate structure 130 can be used to apply a ground potential (ie, zero potential), a positive potential, or a negative potential to the gate structure 130 .

[0091] In this embodiment, the interconnection structure 170 is electrically connected to the gate structure 130, the cathode doping region 141, and the anode doping region 142, respectively. The interconnection structure 170 electrically connected to the cathode doping region 141 is used to apply a potential to the cathode doping region 141, and the interconnection structure 170 electrically connected to the anode doping region 142 is used to apply a potential to the anode doping region 142. The interconnection structure 170 electrically connected to the gate structure 130 is connected to the interconnection structure electrically connected to the cathode doping region 141.

[0092] The interconnection structure electrically connected to the cathode doping region 141 is used to apply a potential to the cathode doping region 141, thereby reducing the difficulty of electrically connecting the cathode doping region 141 to the cathode. The interconnection structure electrically connected to the anode doping region 142 is used to apply a potential to the anode doping region 142, thereby reducing the difficulty of electrically connecting the anode doping region 142 to the anode.

[0093] Specifically, the interconnection structure 170 electrically connected to the gate structure 130 and the interconnection structure 170 electrically connected to the cathode doping region 141 are an integrated structure.

[0094] The interconnection structure 170 electrically connected to the gate structure 130 and the interconnection structure 170 electrically connected to the cathode doped region 141 are an integrated structure, which can easily increase the process window of the interconnection structure 170 electrically connected to the gate structure 130 and the interconnection structure 170 electrically connected to the cathode doped region 141, thereby reducing the process difficulty.

[0095] In this embodiment, the material of the interconnect structure 170 includes one or more of copper, tantalum and tantalum nitride.

[0096] Copper, tantalum and tantalum nitride have high conductivity and low resistivity, which is beneficial to reducing the resistance of the electrostatic protection device, thereby improving the heat dissipation effect of the electrostatic protection device. In other embodiments, the material of the interconnection structure can also be other conductive materials.

[0097] Specifically, the interconnect structure 170 includes a bonding layer (not shown) and a conductive layer (not shown) located on the bonding layer. The bonding layer is made of tantalum or tantalum nitride, and the conductive layer is made of copper.

[0098] Correspondingly, the present invention also provides a method for forming an electrostatic protection structure. Figures 4 to 9 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming an electrostatic protection structure of the present invention.

[0099] refer to Figure 4 , providing a substrate 500.

[0100] The substrate 500 is used to provide a process platform for subsequent process steps.

[0101] The base 500 includes a substrate (not shown), the material of the substrate may be silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, indium gallium or other materials, and the substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0102] In this embodiment, in the step of providing the substrate 500 , the substrate 500 includes, from bottom to top, a bottom semiconductor layer 501 , an insulating material layer 502 , and a top semiconductor layer 503 .

[0103] Specifically, the insulating material layer 502 is an oxide buried layer, the material of the oxide buried layer may be silicon dioxide, the material of the bottom semiconductor layer 501 may be silicon, germanium or a mixture of germanium and silicon, and the material of the top semiconductor layer 503 may be undoped silicon, doped silicon, undoped germanium or doped germanium. When the material of the top semiconductor layer 503 is undoped silicon or doped silicon, the substrate on the insulator is a silicon-on-insulator structure, and when the material of the top semiconductor layer is undoped germanium or doped germanium, the substrate on the insulator is a germanium-on-insulator structure. In this embodiment, the substrate on the insulator is a silicon-on-insulator.

[0104] In this embodiment, after providing the substrate 500 and before forming the gate structure, the forming method further includes: forming a well region 510 in the substrate 500, wherein the well region 510 has first-type doping ions or second-type doping ions.

[0105] It should be noted that the first type doping ions are N type ions, and the second type doping ions are P type ions. As an example, the N type ions include B, Ga or In, and the P type ions include P, As or Sb.

[0106] In a specific embodiment, the well region 510 has N-type ions.

[0107] Specifically, the bottom of the well region 510 contacts the top of the insulating material layer 502 , or is located in the insulating material layer 502 .

[0108] The bottom of the well region 510 touches the top of the insulating material layer 502, or is located in the insulating material layer 502, which makes it easy for the subsequently formed electrostatic protection device PN junction to have a larger longitudinal cross-sectional area, thereby making it easy for the electrostatic protection device to have lower parasitic noise and current leakage, and has a wide range of applications, such as in the field of radio frequency devices, and is also beneficial to improving the stability of the electrostatic protection device.

[0109] In this embodiment, the process of forming the well region 510 includes an ion implantation process, and the process parameters of the ion implantation process include: the implanted ions are N-type ions or P-type ions; when the implanted ions are N-type ions, the implantation energy ranges from 50KeV to 50KeV, and the implantation dose ranges from 1E12atom / cm 2 To 9E12atom / cm 2 When the implanted ions are P-type ions, the implantation energy ranges from 20KeV to 20KeV, and the implantation dose ranges from 2E12atom / cm 2 to 1E13atom / cm 2 .

[0110] The energy and dosage of the implanted ions are within the above ranges, so that the bottom of the well region 510 touches the top of the insulating material layer 502 , or is located in the insulating material layer 502 .

[0111] In this embodiment, after providing the substrate 500 and before forming the gate structure, the formation method further includes: forming an isolation structure 520 in the substrate 500. The isolation structure 520 is a shallow trench isolation structure, and the area between adjacent isolation structures 520 is an active area (not marked). As an example, the active area overlaps with the well area 510.

[0112] The isolation structure 520 is used to isolate each semiconductor device to prevent leakage current from occurring between the devices.

[0113] Specifically, the bottom of the isolation structure 520 contacts the top of the insulating material layer 502 , or the bottom of the isolation structure 520 is located in the insulating material layer 502 , so as to improve the isolation performance of the isolation structure 520 .

[0114] It should be noted that the material of the isolation structure 520 is an insulating material. As an example, the material of the isolation structure 520 is silicon oxide.

[0115] It should also be noted that the isolation structure 520 may be formed after the well region 510 is formed, or the isolation structure 520 may be formed before the well region 510 is formed.

[0116] refer to Figure 5 , a gate structure 530 is formed on the substrate 500 .

[0117] The gate structure 530 is used to define the positions of the cathode doping region and the anode doping region to be formed subsequently.

[0118] In this embodiment, the gate structure 530 includes a gate dielectric layer (not shown) and a gate electrode layer (not shown) located on the gate dielectric layer.

[0119] Specifically, the material of the gate dielectric layer includes silicon oxide or silicon oxynitride, and the material of the gate electrode layer includes polysilicon, amorphous silicon or amorphous carbon. In other embodiments, the gate structure can also be a metal gate structure, and accordingly, the material of the gate dielectric layer includes HfO2, ZrO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, Al2O3, SiO2 or La2O3, and the material of the gate electrode layer includes TiN, TaN, Ta, Ti, TiAl, W, Al, TiSiN or TiAlC. In this embodiment, the gate structure 130 is a polysilicon gate structure. In other embodiments, the gate structure can also be a metal gate structure.

[0120] When the device is working, applying a potential to the gate structure 530 is beneficial to stabilizing the bias voltage at the gate structure 530 and improving the uniformity of the gate voltage division, so that it is not easy to accumulate charge at the bottom of the gate structure 530 (for example, the gate dielectric layer at the bottom of the gate electrode layer), that is, the interface state at the bottom of the gate structure 530 is relatively stable, which is beneficial to reducing the probability of forming a breakdown point at the bottom of the gate structure 530, thereby increasing the secondary breakdown current of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure.

[0121] It should be noted that applying a potential to the gate structure 530 refers to: applying a positive potential, a negative potential or a zero potential to the gate structure 530 .

[0122] Accordingly, in this embodiment, in the step of forming the gate structure 530 , the gate structure 530 is located on the substrate 500 in the well region 510 .

[0123] It should be noted that the gate structure 530 is located on the substrate 500 of the well region 510, and along the extension direction of the gate structure 530, the length D1 of the portion where the gate structure 530 overlaps with the well region 510 should not be too small or too large. If the length D1 of the portion where the gate structure 530 overlaps with the well region 510 is too small, it is easy to cause the PN junction width to be too small, which is easy to cause the local discharge current to be too large when the electrostatic protection device is working, which is easy to cause the thermal effect of the electrostatic protection device to be serious, thereby affecting the performance of the electrostatic protection device; if the length D1 of the portion where the gate structure 530 overlaps with the well region 510 is too large, it is easy to cause the area of ​​the electrostatic protection structure to be too large, and it is also easy to increase the probability of causing the floating body effect, which is easy to cause poor effect in improving the control ability of the gate structure 130 over the channel. Therefore, in this embodiment, the gate structure 530 is located on the substrate 500 of the well region 510 , and along the extension direction of the gate structure 530 , the length D1 of the overlapping portion of the gate structure 530 and the well region 510 ranges from 2 microns to 20 microns.

[0124] Among them, the length D1 of the overlapping portion of the gate structure 530 and the well region 510, multiplied by the number of overlapping portions of the gate structure 530 and the well region 510, is the perimeter (Perimeter, P) of the electrostatic protection structure. Correspondingly, the secondary breakdown current (It2) of the electrostatic protection structure is divided by the perimeter of the electrostatic protection structure, that is, the secondary breakdown current per unit perimeter (It2 / P).

[0125] As an example, the length D1 of the portion where the gate structure 530 overlaps the well region 510 is reduced from 10 micrometers to 5 micrometers, and the secondary breakdown current per unit perimeter is increased by 3 mA / micrometer.

[0126] It should also be noted that, along the direction perpendicular to the extension direction of the gate structure 530, the width D2 of the gate structure 530 should not be too small or too large. If the width D2 of the gate structure 530 is too small, it is easy to increase the difficulty of forming the gate structure 530; if the width D2 of the gate structure 530 is too large, when the length D1 of the overlapping portion of the gate structure 530 and the well region 510 is constant, the resistance of the channel is easy to be too large, so that when the working current of the electrostatic protection device is the same, the working voltage of the electrostatic protection structure is easy to be too large, and accordingly, the power borne by the electrostatic protection device is also easy to be too large, which is easy to increase the degree of thermal effect of the electrostatic protection device. Therefore, in this embodiment, along the direction perpendicular to the extension direction of the gate structure 530, the width D2 of the gate structure 530 ranges from 0.2 microns to 2 microns.

[0127] As an example, the width D2 of the gate structure 530 is reduced by 0.1 micrometers, the secondary breakdown voltage is reduced by 0.4 volts, and the thermal effect of the electrostatic protection device is reduced, thereby increasing the design and use window of the electrostatic protection device.

[0128] In this embodiment, after forming the gate structure 530 and before forming the cathode doping region and the anode doping region, the forming method further includes: forming a gate spacer 531 on the sidewall of the gate structure 530 .

[0129] The sidewall spacer 531 is used to protect the sidewall of the gate structure 530. The sidewall spacer 531 may be a single-layer structure or a stacked structure, and the material of the sidewall spacer 531 includes one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon nitride oxide, boron nitride, and boron carbonitride. As an example, the sidewall spacer 531 is a single-layer structure, and the material of the sidewall spacer 531 is silicon nitride.

[0130] refer to Figure 6, a cathode doping region 541 is formed in the substrate 500 on one side of the gate structure 530 , and the cathode doping region 541 has first type doping ions.

[0131] The cathode doping region 541 is electrically connected to the cathode and serves as the cathode of the electrostatic protection device.

[0132] Specifically, the cathode doping region 541 is disposed adjacent to the isolation structure 520 , and the sidewall of the cathode doping region 541 touches the sidewall of the isolation structure 520 , or the sidewall of the cathode doping region 541 is located in the isolation structure 520 .

[0133] The side wall of the cathode doping region 541 touches the side wall of the isolation structure 520, or the side wall of the cathode doping region 541 is located in the isolation structure 520, which can reduce the probability of excessive local resistance of the electrostatic protection structure and reduce the probability of various parasitic problems caused by excessive local resistance.

[0134] In other embodiments, the sidewall of the anode doping region touches the sidewall of the isolation structure, or the sidewall of the anode doping region is located in the isolation structure.

[0135] It should be noted that the depth of the cathode doping region 541 should not be too small or too small along the normal direction of the top surface of the substrate 500. If the depth of the cathode doping region 541 is too small, it is easy to increase the contact resistance of the cathode doping region 541, resulting in poor conductivity, and it is also easy to make the depth of the PN junction too small, which is easy to make the effect of improving the secondary breakdown current of the electrostatic protection structure poor; if the depth of the cathode doping region 541 is too large, it is easy to increase the degree of ion diffusion, and correspondingly increase the probability of the well region 510 being affected by ion diffusion, so that the depth of the well region 510 becomes smaller, thereby affecting the stability of the electrostatic protection device, and if the depth of the cathode doping region 541 is too large, correspondingly, the energy or dose during ion injection is also easy to be too large, thereby easily increasing the degree of reflection during the ion injection process, thereby increasing the probability of the gate dielectric layer being damaged. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 500, the depth of the cathode doping region 541 is 50 nanometers to 200 nanometers.

[0136] It should also be noted that, in this embodiment, the process for forming the cathode doping region 541 includes an ion implantation process, and the process parameters of the ion implantation process include: the implanted ions include N-type ions, the implantation energy ranges from 5KeV to 50KeV, and the implantation dose ranges from 1E13atom / cm 2 To 9E15atom / cm 2 .

[0137] When the implantation energy ranges from 5KeV to 50KeV, the implantation dose ranges from 1E13atom / cm 2 To 9E15atom / cm 2 When the cathode doping region 541 is formed, it is easy to make the depth of the cathode doping region 541 within the above range.

[0138] Accordingly, in the step of forming the cathode doping region 541 by adopting the ion implantation process, N-type ions are present in the gate structure 530 close to the cathode doping region 541 .

[0139] Continue to refer Figure 6 , an anode doping region 542 is formed in the substrate 500 on the other side of the gate structure 530 , and the anode doping region 542 has second type doping ions.

[0140] The anode doping region 542 is electrically connected to the anode and serves as the anode of the electrostatic protection device.

[0141] Specifically, the anode doping region 542 is located between adjacent gate structures 530. In other embodiments, the cathode doping region may also be located between adjacent gate structures 530, and correspondingly, the anode doping region is disposed adjacent to the isolation structure.

[0142] It should be noted that the depth of the anode doping region 542 should not be too small or too large along the normal direction of the top surface of the substrate 500. The reason why the depth of the anode doping region 542 should not be too small or too large is similar to the reason why the depth of the cathode doping region 541 should not be too small or too large, so it will not be repeated here. Therefore, in this embodiment, the depth of the anode doping region 542 along the normal direction of the top surface of the substrate 500 is 50 nanometers to 200 nanometers.

[0143] It should also be noted that, in this embodiment, the process for forming the anode doping region 542 includes an ion implantation process, and the process parameters of the ion implantation process include: the implanted ions include P-type ions, the implantation energy ranges from 5KeV to 40KeV, and the implantation dose ranges from 2E13atom / cm 2 To 8E15atom / cm 2 .

[0144] When the implantation energy ranges from 5KeV to 40KeV, the implantation dose ranges from 2E13atom / cm 2 To 8E15atom / cm 2 When the anode doping region 542 is formed, it is easy to make the depth of the anode doping region 542 within the above range.

[0145] Accordingly, in the step of forming the anode doping region 542 by adopting the ion implantation process, the gate structure 530 close to the anode doping region has P-type ions.

[0146] In this embodiment, a well region 510 is formed in the substrate 500 ; accordingly, in the step of forming the cathode doping region 541 and the anode doping region 542 , the cathode doping region 541 and the anode doping region 542 are both located in the well region 510 .

[0147] refer to Figures 7 to 9 In this embodiment, after forming the cathode doping region 541 and the anode doping region 542 and before forming the interconnection structure, the formation method further includes: forming a first plug 561 on the cathode doping region 541 and the anode doping region 542, respectively, and the first plug 561 is electrically connected to the cathode doping region 541 and the anode doping region 542, respectively; and forming a second plug 562 on the gate structure 530, and the second plug 562 is electrically connected to the gate structure 530.

[0148] in, Figure 8 is a top view, Fig. 9 for Figure 8 Cross-sectional view at AA1.

[0149] Forming a first plug 561 electrically connected to the cathode doping region 541 and the anode doping region 542 respectively, and forming a second plug 562 electrically connected to the gate structure 530, can easily reduce the difficulty of subsequently forming an interconnection structure electrically connected to the cathode doping region 541, an interconnection structure electrically connected to the anode doping region 542, and an interconnection structure electrically connected to the gate structure 530.

[0150] Specifically, the material of the first plug 561 and the second plug 562 includes one or more of tungsten, cobalt and ruthenium.

[0151] Tungsten, cobalt and ruthenium have good electrical conductivity, which is beneficial to improving the electrical connection performance between the cathode doped region 541 and the interconnection structure, the anode doped region 542 and the interconnection structure, and the gate structure 530 and the interconnection structure.

[0152] It should be noted that, along the direction perpendicular to the extension direction of the gate structure 530, the distance D3 between the first plug 561 and the adjacent gate structure 530 should not be too small or too large. If the distance D3 between the first plug 561 and the adjacent gate structure 530 is too small, it is easy to make the parasitic capacitance between the first plug 561 and the adjacent gate structure 530 too large, and it is also easy to increase the process difficulty of forming the first plug 561; if the distance D3 between the first plug 561 and the adjacent gate structure 530 is too large, it is easy to make the area of ​​the electrostatic protection structure too large. Therefore, in this embodiment, along the direction perpendicular to the extension direction of the gate structure 530, the distance D3 between the first plug 561 and the adjacent gate structure 530 is 0.1 micrometers to 2 micrometers.

[0153] As an example, when the distance D3 between the first plug 561 and the adjacent gate structure 530 increases by 0.1 micrometers, the secondary breakdown current increases by 500 mA.

[0154] In this embodiment, after forming the cathode doping region 541 and the anode doping region 542, and before forming the first plug 561 and the second plug 562, the forming method further includes: forming a metal silicide layer 550, wherein the metal silicide layer 550 covers the top of the cathode doping region 541 and the anode doping region 542 (e.g. Figure 7 shown).

[0155] The metal silicide layer 550 can reduce the contact resistance between the cathode doped region 541 and the external electrical connection structure, and between the anode doped region 542 and the external electrical connection structure.

[0156] Specifically, the material of the metal silicide layer 550 includes one or more of titanium silicon compounds, cobalt silicon compounds, or nickel silicon compounds.

[0157] As an example, the metal silicide layer 550 is also formed on the top of the gate structure 530 .

[0158] Continue to refer Figures 8 to 9 , forming an interconnection structure 570 , wherein the interconnection structure 570 is electrically connected to the gate structure 530 , and the interconnection structure 570 electrically connected to the gate structure 530 is used to apply a potential to the gate structure 530 .

[0159] The interconnection structure 570 is electrically connected to the gate structure 530 , and a potential is applied to the gate structure 530 via the interconnection structure 570 , which helps to reduce the difficulty of applying a potential to the gate structure 530 .

[0160] In this embodiment, the interconnection structure 570 electrically connected to the gate structure 530 can be used to apply a ground potential (ie, zero potential), a positive potential, or a negative potential to the gate structure 530 .

[0161] In this embodiment, after the cathode doping region 541 and the anode doping region 542 are formed, the interconnection structure is formed. In the step of forming the interconnection structure 570, the interconnection structure 570 is electrically connected to the gate structure 530, the cathode doping region 541, and the anode doping region 542, respectively. The interconnection structure 570 electrically connected to the cathode doping region 541 is used to apply a potential to the cathode doping region 541, and the interconnection structure 570 electrically connected to the anode doping region 542 is used to apply a potential to the anode doping region 542; the interconnection structure 570 electrically connected to the gate structure 530 is interconnected with the interconnection structure 570 electrically connected to the cathode doping region 541.

[0162] The interconnection structure electrically connected to the cathode doping region 541 is used to apply a potential to the cathode doping region 541, thereby reducing the difficulty of electrically connecting the cathode doping region 541 to the cathode. The interconnection structure electrically connected to the anode doping region 542 is used to apply a potential to the anode doping region 542, thereby reducing the difficulty of electrically connecting the anode doping region 542 to the anode.

[0163] Specifically, in the step of forming the interconnection structure 570 , the interconnection structure 570 electrically connected to the gate structure 530 and the interconnection structure 570 electrically connected to the cathode doping region 541 are an integrated structure.

[0164] The interconnection structure 570 electrically connected to the gate structure 530 and the interconnection structure 570 electrically connected to the cathode doping region 541 are an integrated structure, which can easily increase the process window of the interconnection structure 570 electrically connected to the gate structure 530 and the interconnection structure 570 electrically connected to the cathode doping region 541, thereby reducing the process difficulty.

[0165] In this embodiment, the material of the interconnect structure 570 includes one or more of copper, tantalum and tantalum nitride.

[0166] Copper, tantalum and tantalum nitride have high conductivity and low resistivity, which is beneficial to reducing the resistance of the electrostatic protection device, thereby improving the heat dissipation effect of the electrostatic protection device. In other embodiments, the material of the interconnection structure can also be other conductive materials.

[0167] Specifically, the interconnect structure 570 includes a bonding layer (not shown) and a conductive layer (not shown) located on the bonding layer. The bonding layer is made of tantalum or tantalum nitride, and the conductive layer is made of copper.

[0168] Accordingly, in this embodiment, in the step of forming the interconnection structure 570 , the interconnection structure 570 is formed on the first plug 561 and the second plug 562 , and the interconnection structure 570 is electrically connected to the first plug 561 and the second plug 562 , respectively.

[0169] Accordingly, reference Figure 2 and Figure 3 The present invention further provides an electrostatic protection circuit, comprising: a transistor (not shown), wherein the transistor comprises a gate structure 130, a cathode and an anode, and the gate structure 130 is used to connect a potential.

[0170] The gate structure 130 is used to connect the potential. Compared with the scheme of floating the gate structure, since the potential is applied to the gate structure 130, it is beneficial to stabilize the bias voltage at the position of the gate structure 130, improve the uniformity of the gate voltage division, and make it difficult for trapped charges to accumulate at the bottom position of the gate structure 130, that is, the interface state at the bottom position of the gate structure 130 is relatively stable, which is beneficial to reduce the probability of forming a breakdown point at the bottom position of the gate structure 130, thereby increasing the secondary breakdown current of the electrostatic protection structure, and correspondingly improving the performance of the electrostatic protection structure.

[0171] For the description of the transistor, please refer to the detailed description of the aforementioned embodiment, which will not be repeated in this embodiment.

[0172] In this embodiment, the gate structure 130 is short-circuited with the cathode.

[0173] The gate structure 130 is short-circuited with the cathode, so as to reduce the difficulty of connecting the gate structure 130 to a potential.

[0174] It should be noted that the electrostatic protection structure can be formed by the formation method described in the above embodiment, or by other formation methods. For the specific description of the electrostatic protection structure described in this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0175] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. An electrostatic protection structure, characterized in that: include: substrate; A gate structure, located on the substrate; a cathode doping region, located in the substrate on one side of the gate structure, the cathode doping region having first type doping ions; an anode doping region, located in the substrate on the other side of the gate structure, the anode doping region having second-type doping ions, the first-type doping ions and the second-type doping ions having different conductivity types; An interconnection structure is electrically connected to the gate structure, and the interconnection structure electrically connected to the gate structure is used to apply a potential to the gate structure.

2. The electrostatic protection structure according to claim 1, characterized in that: The interconnection structure is electrically connected to the gate structure, the cathode doped region, and the anode doped region, respectively; the interconnection structure electrically connected to the cathode doped region is used to apply a potential to the cathode doped region, and the interconnection structure electrically connected to the anode doped region is used to apply a potential to the anode doped region; An interconnection structure electrically connected to the gate structure is connected to an interconnection structure electrically connected to the cathode doping region.

3. The electrostatic protection structure according to claim 2, characterized in that: The interconnection structure electrically connected to the gate structure and the interconnection structure electrically connected to the cathode doping region are an integrated structure.

4. The electrostatic protection structure according to any one of claims 2 to 3, characterized in that: The electrostatic protection structure further includes: first plugs, respectively located between the interconnect structure and the cathode doping region, and between the interconnect structure and the anode doping region; The second plug is located between the interconnection structure and the gate structure.

5. The electrostatic protection structure according to claim 4, characterized in that: Along a direction perpendicular to an extending direction of the gate structure, a distance between the first plug and an adjacent gate structure is 0.1 micrometers to 2 micrometers.

6. The electrostatic protection structure according to claim 1, characterized in that: The material of the interconnect structure includes one or more of copper, tantalum and tantalum nitride.

7. The electrostatic protection structure according to claim 1, characterized in that: The substrate includes, from bottom to top, a bottom semiconductor layer, an insulating material layer and a top semiconductor layer; the electrostatic protection structure also includes a well region located in the substrate, the well region has first-type doping ions or second-type doping ions, and the bottom of the well region touches the top of the insulating material layer, or is located in the insulating material layer; The gate structure is located on the substrate of the well region, and the cathode doping region and the anode doping region are both located in the well region.

8. The electrostatic protection structure according to claim 1, characterized in that: The electrostatic protection structure further includes: a well region located in the substrate, the well region having first-type doping ions or second-type doping ions; The gate structure is located on the substrate of the well region, and along the extension direction of the gate structure, the length of the portion where the gate structure overlaps with the well region ranges from 2 micrometers to 20 micrometers.

9. The electrostatic protection structure according to claim 1, characterized in that: Along a direction perpendicular to an extending direction of the gate structure, a width of the gate structure ranges from 0.2 microns to 2 microns.

10. The electrostatic protection structure according to claim 1, characterized in that: Along the normal direction of the top surface of the substrate, the depth of the cathode doping region is 50 nanometers to 200 nanometers.

11. The electrostatic protection structure according to claim 1, characterized in that: Along the normal direction of the top surface of the substrate, the depth of the anode doping region is 50 nanometers to 200 nanometers.

12. A method for forming an electrostatic protection structure, characterized in that: include: providing a substrate; forming a gate structure on the substrate; forming a cathode doping region in the substrate on one side of the gate structure, wherein the cathode doping region has first type doping ions; forming an anode doping region in the substrate on the other side of the gate structure, the anode doping region having second type doping ions; An interconnect structure is formed, the interconnect structure being electrically connected to the gate structure, and the interconnect structure electrically connected to the gate structure is used to apply a potential to the gate structure.

13. The method for forming an electrostatic protection structure according to claim 12, wherein: After forming the cathode doping region and the anode doping region, the interconnection structure is formed. In the step of forming the interconnection structure, the interconnection structure is electrically connected to the gate structure, the cathode doping region, and the anode doping region, respectively. The interconnection structure electrically connected to the cathode doping region is used to apply a potential to the cathode doping region, and the interconnection structure electrically connected to the anode doping region is used to apply a potential to the anode doping region; the interconnection structure electrically connected to the gate structure is interconnected with the interconnection structure electrically connected to the cathode doping region.

14. The method for forming an electrostatic protection structure according to claim 13, wherein: In the step of forming the interconnection structure, the interconnection structure electrically connected to the gate structure and the interconnection structure electrically connected to the cathode doping region are an integrated structure.

15. The method for forming an electrostatic protection structure according to claim 14, wherein: After forming the cathode doping region and the anode doping region and before forming the interconnect structure, the forming method further includes: forming first plugs on the cathode doping region and the anode doping region respectively, the first plugs being electrically connected to the cathode doping region and the anode doping region respectively; forming a second plug on the gate structure, the second plug being electrically connected to the gate structure; In the step of forming the interconnection structure, the interconnection structure is formed on the first plug and the second plug, and the interconnection structure is electrically connected to the first plug and the second plug, respectively.

16. The method for forming an electrostatic protection structure according to claim 12, wherein: In the step of providing the substrate, the substrate comprises, from bottom to top, a bottom semiconductor layer, an insulating material layer and a top semiconductor layer; After providing the substrate and before forming the gate structure, the forming method further includes: forming a well region in the substrate, the well region having first-type doping ions or second-type doping ions, and the bottom of the well region is in contact with the top of the insulating material layer, or is located in the insulating material layer; In the step of forming the gate structure, the gate structure is located on a substrate of the well region; In the step of forming the cathode doping region and the anode doping region, the cathode doping region and the anode doping region are both located in the well region.

17. The method for forming an electrostatic protection structure according to claim 12, wherein: The process of forming the anode doping region includes an ion implantation process, wherein the process parameters of the ion implantation process include: the implanted ions are P-type ions, the implantation energy ranges from 5KeV to 40KeV, and the implantation dose ranges from 2E13atom / cm 2 To 8E15atom / cm 2 .

18. The method for forming an electrostatic protection structure according to claim 12, wherein: The process of forming the cathode doping region includes an ion implantation process, wherein the process parameters of the ion implantation process include: the implanted ions are N-type ions, the implantation energy ranges from 5KeV to 50KeV, and the implantation dose ranges from 1E13atom / cm 2 To 9E15atom / cm 2 .

19. An electrostatic protection circuit, characterized in that: include: A transistor comprises a gate structure, a cathode and an anode, wherein the gate structure is used to connect a potential.

20. The electrostatic protection circuit according to claim 19, characterized in that: The gate structure is short-circuited with the cathode.

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