Package substrate and manufacturing method thereof
By forming grooves on the installation area and opposite sides of the packaging substrate and filling metal parts, the problem of poor thermal conductivity in traditional packaging technology is solved, and a more efficient heat dissipation effect is achieved, which is suitable for the use of high-power electronic components.
Patent Information
- Application Number
- CN202411559597.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-03-25
AI Technical Summary
Traditional packaging technology has poor thermal conductivity, making it difficult to ensure the heat dissipation performance of high-power chips, resulting in poor heat dissipation effect of the packaging substrate and affecting the working efficiency of the circuit board.
A packaging substrate is designed to expose the metal line layer by forming grooves on the mounting area and opposite sides of the substrate main body, and fill the metal parts in the grooves, and connect the two side surfaces of the substrate main body through the metal parts to improve heat dissipation efficiency.
By increasing the heat dissipation area and improving the heat dissipation efficiency, the packaging substrate can effectively reduce processing costs, withstand the use requirements of high-power electronic components, and meet production needs.
Smart Images

Figure CN119694991A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of packaging substrates, and in particular to a packaging substrate and a method for manufacturing a packaging substrate. Background Art
[0002] With the rapid development of the manufacturing process technology of packaging substrates, it is always developing in the direction of smaller, lighter and cheaper. Therefore, the production method of circuit boards has been continuously improved, and it is developing towards smaller packaging size, smaller spacing and more advanced processes. As the frequency of chip data transmission becomes higher and higher, the current demand of electronic components increases, and the overall heat generation increases. Different packaging technologies vary greatly in manufacturing procedures and processes. The thermal conductivity of traditional packaging technology is poor, and it is difficult to guarantee the heat dissipation performance requirements of high-power chips, resulting in poor heat dissipation of packaging substrates, affecting the working efficiency of circuit boards. Summary of the invention
[0003] The main technical problem solved by the present application is to provide a packaging substrate and a method for manufacturing the packaging substrate, which can increase the heat dissipation area, improve the heat dissipation efficiency, withstand the requirements for the use of high-power electronic components, and meet production needs.
[0004] In order to solve the above technical problems, the technical solution adopted in this application provides a packaging substrate.
[0005] Among them, the packaging substrate includes: a substrate body; the substrate body defines a mounting area, wherein the mounting area is used to mount the chip; the mounting area and the side of the substrate body opposite to the mounting area are both formed with grooves; wherein the bottom of the grooves are the metal circuit layer of the substrate body; the grooves are filled with metal parts, and the two side surfaces of the substrate body are connected through the metal parts to dissipate heat from the chip.
[0006] The edge of the cross section of the groove along the axial direction is wavy.
[0007] Wherein, a plurality of the grooves intersect to form a groove network array.
[0008] In order to solve the above technical problems, the second aspect of the present application provides a method for manufacturing a packaging substrate, wherein the method for manufacturing a packaging substrate is used to prepare any of the above packaging substrates.
[0009] The manufacturing method includes: preparing a substrate body; setting an installation area on the surface of the substrate body; wherein the installation area is used to install a chip; preparing grooves in the installation area and on a side of the substrate body opposite to the installation area to expose the metal circuit layer of the substrate body; filling metal parts in the grooves, and connecting the two side surfaces of the substrate body through the metal parts to dissipate heat from the chip.
[0010] The step of making grooves in the mounting area and on a side of the substrate body opposite to the mounting area comprises respectively using laser to etch the surfaces of both sides of the substrate body to prepare the grooves, exposing the metal circuit layer.
[0011] Among them, a metal layer is arranged outside the substrate body, and an insulating layer is arranged between the metal layers and the circuit layer; grooves are prepared by laser etching on the surfaces of both sides of the substrate body, and the step of exposing the metal circuit layer includes: the groove penetrates the metal layer and the insulating layer, and the metal circuit layer is exposed to prepare the groove.
[0012] The step of preparing grooves by laser etching the surfaces of both sides of the substrate body and exposing the metal circuit layer includes: etching the surface of the substrate body by laser to form a groove with a width equal to the laser diameter.
[0013] Among them, the steps of preparing grooves by laser etching on both sides of the substrate body and exposing the metal circuit layer to prepare the grooves include: using the laser to move a predetermined distance along the processing direction, and superimposing drilling holes on the surface of the substrate body to prepare the grooves, so that the grooves form a wavy groove with a cross-section along the axial direction.
[0014] Before the step of using the laser to move a predetermined distance along the processing direction and drilling holes on the surface of the substrate body to prepare grooves, the method further includes: determining the predetermined distance that the laser moves along the processing direction according to the laser spot size.
[0015] Among them, the steps of filling a metal layer in the groove and connecting the two side surfaces of the substrate body through the metal layer to dissipate heat for the chip include: electroplating the substrate body to fill the groove so that a metal part is formed in the groove, and connecting the metal layer with the metal circuit layer through the metal part to dissipate heat for the chip.
[0016] Wherein, after the step of filling the groove with the metal piece, the following step is included: grinding the metal piece so that the exposed end surface of the metal piece is flush with the surface of the substrate body.
[0017] Different from the prior art, the multi-packaging substrate and manufacturing method provided by the present application can achieve heat dissipation of the packaging substrate while effectively reducing processing costs. The packaging substrate can withstand high-power usage requirements after the chip is installed to meet production needs. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a structural schematic diagram of an implementation method of a packaging substrate of the present application;
[0019] Figure 2 It is a structural schematic diagram of another embodiment of the packaging substrate of the present application;
[0020] Figure 3is a top view of the structure of another embodiment of the packaging substrate of the present application;
[0021] Figure 4 is a top view of the structure of another embodiment of the packaging substrate of the present application;
[0022] Figure 5 It is a flow chart of the processing steps of an implementation method of a packaging substrate manufacturing method of the present application;
[0023] Figure 6a to Figure 6d It is a group of structural schematic diagrams of processing steps of an implementation method of a packaging substrate manufacturing method of the present application;
[0024] Figure 7 It is a schematic flow chart of processing steps of another embodiment of the method for manufacturing a packaging substrate of the present application;
[0025] Figure 8a to Figure 8e It is a group of structural schematic diagrams of processing steps of another embodiment of the method for manufacturing a packaging substrate of the present application; DETAILED DESCRIPTION
[0026] The present application is described in detail below with reference to the accompanying drawings and implementation methods.
[0027] The present application first provides a packaging substrate. Figure 1 , Figure 1 It is a structural schematic diagram of an implementation method of a packaging substrate of the present application.
[0028] like Figure 1 As shown, the packaging substrate provided by the technical solution adopted in the present application is used to install a carrier chip and connect the chip to the circuit board motherboard to make them conductive.
[0029] The packaging substrate 100 includes:
[0030] A substrate body 101; a mounting area is provided on the surface of the substrate body 101; wherein the mounting area is used to mount a chip (not shown);
[0031] The substrate body 101 can be provided with a circuit layer to assist signal transmission, an insulating layer 106 for packaging, or a reinforcement layer to improve reliability and durability. The substrate body 101 can be provided in a single layer or a multi-layer form including an insulating layer 106 and a metal layer 105, and is made of a single metal or one or more alloys such as copper, aluminum, magnesium, titanium, hafnium and zinc. A portion of the substrate body 101 is provided with an installation area. The area of the installation area can be one or more, and the position is not unique. It is set according to the size of the chip to be installed. In a specific embodiment, the installation area is set at the center of a side surface of the substrate body 101.
[0032] A groove 103 is prepared in the mounting area and on a side of the substrate body 101 opposite to the mounting area to expose the metal wiring layer 104 of the substrate body 101;
[0033] The metal circuit layer 104 is the bottom wall of the groove 103. The groove 103 can be made by laser or by using a precision machine tool. The width of the groove 103 can be 0.1mm to 20mm, for example, 0.1mm, 0.2mm, 0.5mm, 1m, 10mm, 15mm, 20mm, etc.
[0034] The groove 103 is filled with a metal piece 102 , and the two side surfaces of the substrate body 101 are connected through the metal piece 102 to dissipate heat from the chip.
[0035] The grooves 103 can be flexibly designed into various shapes according to needs, such as a straight line, a curve, a ring or an interwoven mesh array in the cross section along the axial direction.
[0036] The metal part 102 may be formed by inlaying metal blocks or by electroplating. It may be arranged in a dense array or in a large area to improve heat dissipation efficiency. The shape of the metal part 102 may be unlimited, such as cylindrical, rectangular, truncated cone, hourglass, etc., and may be arranged according to the chip installation method. In a specific embodiment, the metal part 102 is arranged in a long strip shape and arranged in an array to improve heat dissipation efficiency. The metal part 102 may also be arranged as a component for connecting signals.
[0037] See also Figure 2 and Figure 3 , Figure 2 is a structural schematic diagram of another embodiment of the packaging substrate of the present application, Figure 3 It is a top view of the structure of another embodiment of the packaging substrate of the present application.
[0038] like Figure 2 The package substrate 100 shown can be used to install a carrier chip and connect the chip to a circuit board motherboard to achieve a conductive structure.
[0039] The packaging substrate 100 includes:
[0040] Among them, the packaging substrate 100 includes: a substrate body 101; the substrate body 101 defines a mounting area (not shown), wherein the mounting area is used to mount the chip; a groove 103 is formed in the mounting area and on the side of the substrate body 101 opposite to the mounting area; wherein the bottom of the groove 103 is the metal circuit layer 104 of the substrate body 101; the groove 103 is filled with a metal part 102, and the two side surfaces of the substrate body 101 are connected through the metal part 102 to dissipate heat from the chip.
[0041] The substrate body 101 can be provided with a circuit layer to assist signal transmission, an insulating layer 106 for packaging, or a reinforcement layer to improve reliability and durability. The substrate body 101 can be provided in a single layer or a multi-layer form including an insulating layer 106 and a metal layer 105, and is made of a single metal or one or more alloys such as copper, aluminum, magnesium, titanium, hafnium and zinc. Part of the substrate body 101 is provided with an installation area, and the area of the installation area can be one or more, and the position is not unique, and is set according to the size of the chip to be installed.
[0042] The metal part 102 is set on both sides of the surface, and the exposed area of the metal parts 102 on both sides can be the same or different. If the mounting area on the surface of the packaging substrate 100 where the metal part 102 is set is smaller when the chip is installed, the exposed area of the surface on the opposite side of the packaging substrate 100 where the chip is installed can be increased to make the heat conduction effect of the metal part 102 better.
[0043] The metal circuit layer 104 is encapsulated by the insulating layer 106 in the substrate body 101 to ensure signal transmission of the metal circuit layer 104 and to conduct heat. The insulating layer 106 can be one or more insulating materials such as silicon dioxide, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), ceramic base, etc.
[0044] The package substrate 100 may also be provided with a metal layer 105 on the surface of the insulating layer 106 away from the metal circuit layer 104, and the metal layers 105 on both sides are connected through the internal circuit layer. The metal layer 105 may assist the metal part 102 in dissipating heat and improve the heat dissipation efficiency. In the subsequent processing, a graphic circuit may be provided on the metal layer 105 for signal connection of the installed chip.
[0045] like Figure 3 As shown, in an optional embodiment, in an optional embodiment, the edge of the cross section of the groove 103 along the axial direction is wavy.
[0046] The groove 103 can be made by laser etching. The laser is moved along the processing direction at a predetermined distance, and the groove 103 is prepared by overlapping drilling on the surface of the substrate body 101, so that the groove 103 forms a groove 103 with a wavy edge at the cross-section along the axial direction. The width of the groove 103 is determined according to the size of the laser and the diameter of the selected laser, and can be 0.1mm to 20mm, for example 0.1mm, 0.2mm, 0.5mm, 1mm, 10mm, 15mm, 20mm, etc.
[0047] See also Figure 4 , Figure 4 It is a top view of the structure of another embodiment of the packaging substrate of the present application.
[0048] like Figure 4 The package substrate 100 shown can be used to install a carrier chip and connect the chip to a circuit board motherboard to achieve a conductive structure.
[0049] Among them, the packaging substrate 100 includes: a substrate body 101; the substrate body 101 defines a mounting area (not shown), wherein the mounting area is used to mount the chip; a groove 103 is formed in the mounting area and on the side of the substrate body 101 opposite to the mounting area; wherein the bottom of the groove 103 is the metal circuit layer 104 of the substrate body 101; the groove 103 is filled with a metal part 102, and the two side surfaces of the substrate body 101 are connected through the metal part 102 to dissipate heat from the chip.
[0050] Specifically, the package multilayer structure of the substrate body 101 can refer to Figure 2 A schematic diagram and a structural description of another embodiment of the packaging substrate of the present application
[0051] In order to increase the heat dissipation area of the packaging substrate and improve the heat dissipation efficiency, in an optional implementation, a plurality of grooves 103 intersect to form a groove network array.
[0052] Specifically, a single groove 103 can be made by laser etching. The laser is moved along the processing direction at a predetermined distance, and the groove 103 is prepared by overlapping and drilling holes on the surface of the substrate body 101. Multiple grooves 103 intersect to form a groove network array. Multiple intersecting grooves 103 can form multiple identical or different acute angles of 30 degrees, 45 degrees, and 60 degrees. In particular, the intersecting grooves 103 can be perpendicular to each other, forming grooves parallel or perpendicular to the substrate body 101.
[0053] The width of the groove 103 is determined by the size of the laser and the diameter of the selected laser, and can be 0.1 mm to 20 mm, for example, 0.1 mm, 0.2 mm, 0.5 mm, 1 mm, 10 mm, 15 mm, 20 mm, etc.
[0054] The metal parts 102 are arranged in the groove array accordingly and can be arranged from the surfaces of both sides. The exposed areas of the metal parts 102 on both sides can be the same or different. If the chip is installed, the surface mounting area of the packaging substrate 100 can be reserved for setting the metal part 102. When the position is small, the exposed area of the surface of the packaging substrate 100 opposite to the chip installation can be increased to make the heat conduction effect of the metal part 102 better.
[0055] In the above-mentioned implementation manner, the packaging substrate 100 can increase the heat dissipation area, improve the heat dissipation efficiency, assist in signal transmission, withstand the use requirements of high-power electronic components, and meet production needs.
[0056] See also Figure 5 and Figure 6a to Figure 6d , Figure 5 It is a flow chart of the processing steps of an embodiment of a method for manufacturing a packaging substrate of the present application. Figure 6a to Figure 6c It is a group of structural schematic diagrams of processing steps of an implementation method of a packaging substrate manufacturing method of the present application.
[0057] like Figure 5 As shown, the present application provides a method for manufacturing a packaging substrate, and the method for manufacturing a packaging substrate is used to prepare any of the above-mentioned packaging substrates 100 .
[0058] Among them, Figure 6a As shown, the manufacturing method includes: S101: preparing a substrate body 101; setting a mounting area (not shown) on the surface of the substrate body 101; wherein the mounting area is used to mount a chip;
[0059] The substrate body 101 may be a prepreg, a printed circuit board with electrical functions or other epoxy material-like board. A circuit layer may be provided to assist signal transmission, an insulating layer 106 may be provided for packaging, or a reinforcement layer may be provided to improve reliability and durability. The substrate body 101 may be provided in a single layer or in a multi-layer form including an insulating layer 106 and a metal layer 105, and may be made of a single metal or one or more alloys such as copper, aluminum, magnesium, titanium, hafnium and zinc.
[0060] Figure 6b As shown, a groove 103 is prepared in the mounting area and on a side of the substrate body 101 opposite to the mounting area, exposing the metal wiring layer 104 of the substrate body 101 .
[0061] The grooves 103 can be made on the corresponding two side surfaces of the substrate body 101 by using laser or precision machine tools. Specifically, the grooves 103 include:
[0062] In an optional embodiment, S102 : using laser to etch the surfaces of both sides of the substrate body 101 , respectively, to prepare grooves 103 in the mounting area and on the side of the substrate body 101 opposite to the mounting area, exposing the metal circuit layer 104 of the substrate body 101 .
[0063] The width of the groove 103 may be 0.1 mm to 20 mm, for example, 0.1 mm, 0.2 mm, 0.5 mm, 1 mm, 10 mm, 15 mm, 20 mm, etc.
[0064] The position of the groove 103 is set according to the chip mounting method, and can be densely arranged in an array or arranged in a large area. The sidewall of the groove 103 can be perpendicular to the bottom surface, or can have a variable depth, such as having a greater depth at the center and a smaller depth at the edge, forming a stepped or sloped shape of the groove 103.
[0065] like Figure 6c Show, Figure 6c It is a top view of a structural schematic diagram of a processing step of another embodiment of the method for manufacturing a packaging substrate of the present application. In an optional embodiment, laser etching is used to form a groove 103 with a width that is the same as the laser diameter.
[0066] In an optional embodiment, a metal layer 105 is disposed outside the substrate body 101 , and an insulating layer 106 is disposed between the metal layer 105 and the circuit layer; the groove 103 penetrates the metal layer 105 and the insulating layer 106 , exposing the metal circuit layer 104 to prepare the groove 103 .
[0067] Specifically, the metal circuit layer 104 is encapsulated by the insulating layer 106 in the substrate body 101 to ensure signal transmission of the metal circuit layer 104 and to conduct heat. The insulating layer 106 can be one or more insulating materials such as silicon dioxide, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), ceramic base, etc.
[0068] The metal layer 105 is disposed on the surface of the insulating layer 106 away from the metal wiring layer 104 . When preparing the groove 103 , the metal layer 105 and the insulating layer 106 need to be penetrated to expose the metal wiring layer 104 .
[0069] Figure 6d As shown, S103: filling the groove 103 with a metal piece 102, and connecting the two side surfaces of the substrate body 101 through the metal piece 102 to dissipate heat for the chip.
[0070] Correspondingly, the shape of the metal part 102 is set according to the shape of the corresponding groove 103, and can be a pre-made inlaid metal block or formed by electroplating. The material of the metal part 102 can be a conductive metal such as copper, aluminum or an alloy containing one or both of the two. The metal part 102 can also be set as a component for connecting signals. The metal part 102 can be formed by inlaying a metal block in the groove 103, or it can be formed by electroplating in the groove 103. The shape of the metal part 102 is set according to the shape of the corresponding groove 103, and there is no limitation, such as cylindrical, rectangular, truncated cone, hourglass, etc. In a specific embodiment, the metal part 102 is set to a long strip type and arranged in an array to improve heat dissipation efficiency. The metal part 102 can also be set as a component for connecting signals.
[0071] In other embodiments, a through groove or through hole may be made in the installation area. The position of the through groove or through hole is set according to the installation structure of the chip. The metal part 102 is set in the through hole so that the metal part 102 is connected to the surface of the packaging substrate 100.
[0072] Figure 7 is a flow chart of processing steps of another embodiment of the method for manufacturing a packaging substrate of the present application, Figure 8a to Figure 8e This is a group of structural schematic diagrams of processing steps of another implementation method of the packaging substrate manufacturing method of the present application.
[0073] like Figure 7 As shown, the method for manufacturing a packaging substrate is used to prepare any of the above-mentioned packaging substrates 100.
[0074] The preparation method includes:
[0075] like Figure 8a As shown, S201: prepare a substrate body 101; set a mounting area (not shown) on the surface of the substrate body 101; wherein the mounting area is used to mount a chip;
[0076] The substrate body 101 may be a prepreg, a printed circuit board with electrical functions or other epoxy material-like board. A circuit layer may be provided to assist signal transmission, an insulating layer 106 may be provided for packaging, or a reinforcement layer may be provided to improve reliability and durability. The substrate body 101 may be provided in a single layer or in a multi-layer form including an insulating layer 106 and a metal layer 105, and may be made of a single metal or one or more alloys such as copper, aluminum, magnesium, titanium, hafnium and zinc.
[0077] like Figure 8b As shown, in an optional embodiment, laser etching is used to prepare grooves 103 on both sides of the substrate body 101 in the mounting area and on the side of the substrate body 101 opposite to the mounting area to expose the metal circuit layer 104 of the substrate body 101.
[0078] The positions of the grooves 103 are set according to the chip mounting method, and can be arranged in a dense array or in a large area.
[0079] The sidewall of the groove 103 may be perpendicular to the bottom surface, or may have a varying depth, such as having a greater depth at the center and a smaller depth at the edge, thereby forming a stepped or sloped shape of the groove 103 .
[0080] In an optional implementation, the surface of the substrate body 101 is etched by laser, so that the groove 103 is formed with a width equal to the diameter of the laser.
[0081] The width of the groove 103 may be 0.1 mm to 20 mm, for example, 0.1 mm, 0.2 mm, 0.5 mm, 1 mm, 10 mm, 15 mm, 20 mm, etc.
[0082] Specifically, in an optional embodiment, S202: using a laser to move a predetermined distance along a processing direction, respectively prepare grooves 103 in the installation area on the surface of the substrate body 101 and on the side of the substrate body 101 opposite to the installation area, and superimpose drilling to prepare the grooves 103, so that the grooves 103 form a groove 103 with a wavy edge in the cross section along the axial direction.
[0083] Laser circular hole spots with fixed diameters are sequentially overlapped at a certain distance according to the processing direction to perform laser drilling and stacking, so as to burn a plurality of parallel grooves 103 on the substrate body 101 .
[0084] Specifically, in an optional embodiment, before the step of using the laser to move a predetermined distance along the processing direction to overlap and drill holes on the surface of the substrate body 101 to prepare the grooves 103, it also includes: determining the predetermined distance that the laser moves along the processing direction according to the laser spot size.
[0085] The predetermined moving distance is the spot center distance of the laser drilling overlapped hole. For example, the radius of the laser spot can be set as the spot center distance of the laser drilling overlapped hole, and the groove 103 with a wavy edge of the cross section along the axial direction can be formed by moving according to the center distance.
[0086] like Figure 8c As shown, Figure 8c FIG. 1 is a schematic diagram of the position of laser drilling of another embodiment of the method for manufacturing a package substrate of the present application. Figure 8d A top view of a structural schematic diagram of a processing step of another embodiment of a method for manufacturing a package substrate of the present application. The surface of the package substrate 100 is provided by a stacking process, and the laser array holes in the processing direction are connected to form a groove 103.
[0087] In an optional embodiment, a metal layer 105 is disposed outside the substrate body 101 , and an insulating layer 106 is disposed between the metal layer 105 and the circuit layer; the groove 103 penetrates the metal layer 105 and the insulating layer 106 , exposing the metal circuit layer 104 to prepare the groove 103 .
[0088] Specifically, the metal circuit layer 104 is encapsulated by the insulating layer 106 in the substrate body 101 to ensure signal transmission of the metal circuit layer 104 and to conduct heat. The insulating layer 106 can be one or more insulating materials such as silicon dioxide, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), ceramic base, etc.
[0089] The metal layer 105 is disposed on the surface of the insulating layer 106 away from the metal wiring layer 104 . When preparing the groove 103 , the metal layer 105 and the insulating layer 106 need to be penetrated to expose the metal wiring layer 104 .
[0090] like Figure 8e As shown, a metal piece 102 is filled in the groove 103, and the two side surfaces of the substrate body 101 are connected through the metal piece 102 to dissipate heat for the chip.
[0091] Correspondingly, the shape of the metal piece 102 is set according to the shape of the corresponding groove 103, and can be a pre-made embedded metal block or formed by electroplating. The material of the metal piece 102 can be a conductive metal such as copper, aluminum, or an alloy containing one or both of the two. The metal piece 102 can also be set as a component for connecting signals. The metal piece 102 can be formed by embedding a metal block in the groove 103, or it can be formed by electroplating in the groove 103.
[0092] Specifically, in an optional implementation, S203: electroplating the substrate body 101 to fill the groove 103, so that a metal part 102 is formed in the groove 103, and the metal layer 105 is connected to the metal circuit layer 104 through the metal part 102 to dissipate heat from the chip.
[0093] The metal layer 105 is connected to the metal circuit layer 104 through the metal member 102 . The metal member 102 penetrates the insulating layer 106 , so that the heat on the two surfaces of the package substrate 100 is conducted through the metal circuit layer 104 .
[0094] The metal pieces 102 are arranged in a long strip shape and in an array, which can increase the heat dissipation area and improve the heat dissipation efficiency.
[0095] In other embodiments, the metal member 102 may also be provided as a component for connecting signals and may also transmit signals for the installed chip.
[0096] In other embodiments, a through groove or through hole may be made in the mounting area. The position of the through groove or through hole is set according to the mounting structure of the chip. The metal part is set in the through hole so that the metal part 102 is connected to the surface of the packaging substrate 100.
[0097] In an optional implementation, after the step of filling the groove 103 with the metal member 102 , the following steps are included: S204 : grinding the metal member so that the exposed end surface of the metal member is flush with the surface of the substrate body 101 .
[0098] The electroplated metal part 102 may be polished to be flush with the board surface, so as to further improve the surface flatness of the package substrate 100 and enhance the reliability of chip installation.
[0099] In other implementations, the metal layer 105 may be developed and etched to produce a patterned circuit to achieve signal connection after chip installation.
[0100] Through the above-mentioned method, a packaging substrate and a method for manufacturing a packaging substrate are provided. The technology of laser drilling and grooving can effectively reduce the processing cost. The fine connection set by electroplating can realize the heat dissipation of the substrate and provide a higher integration for chip installation, supporting the design of high-frequency data transmission chip products. There is no need to design new processing equipment investment, which reduces the transformation cost, so that the packaging substrate 100 can withstand high-power usage requirements and meet production needs.
[0101] In the several embodiments provided in the present application, it should be understood that the disclosed systems and devices can be implemented in other ways. For the technical solutions in the embodiments of the present application, it is obvious that the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application. For example, the device implementation described above is only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.
[0102] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0103] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "coupled", "connected", "connected", "set", and "installed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0104] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.
[0105] In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.
[0106] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A packaging substrate, characterized in that: The packaging substrate comprises: A substrate body; the substrate body defines a mounting area, wherein the mounting area is used to mount a chip; The installation area and the side of the substrate body opposite to the installation area are both formed with grooves; wherein the bottom of the grooves is the metal circuit layer of the substrate body; The groove is filled with a metal piece, and the two side surfaces of the substrate body are connected through the metal piece to dissipate heat for the chip.
2. The packaging substrate according to claim 1, characterized in that: The edge of the cross section of the groove along the axial direction is wavy.
3. The packaging substrate according to claim 1, characterized in that: The plurality of grooves intersect to form a groove network array.
4. A method for manufacturing a packaging substrate, characterized in that: The method for manufacturing the packaging substrate is used to prepare the packaging substrate according to any one of claims 1 to 3, and the method comprises: preparing a substrate body; A mounting area is provided on the surface of the substrate body; wherein the mounting area is used for mounting a chip; A groove is prepared in the mounting area and on a side of the substrate body opposite to the mounting area to expose the metal circuit layer of the substrate body; A metal piece is filled in the groove, and the two side surfaces of the substrate body are connected through the metal piece to dissipate heat for the chip.
5. The method for manufacturing a packaging substrate according to claim 4, characterized in that: The step of making a groove in the mounting area and on a side of the substrate body opposite to the mounting area to expose the metal circuit layer of the substrate body comprises: The grooves are prepared by laser etching on both side surfaces of the substrate body to expose the metal circuit layer.
6. The method for manufacturing a packaging substrate according to claim 5, characterized in that: A metal layer is arranged outside the substrate body, and an insulating layer is arranged between the metal layer and the circuit layer; The step of respectively using laser to etch the surfaces of both sides of the substrate body to prepare the grooves and expose the metal circuit layer comprises: The groove penetrates through the metal layer and the insulating layer, exposing the metal circuit layer to prepare the groove.
7. The method for manufacturing a packaging substrate according to claim 5, characterized in that: The step of preparing the groove by laser etching the two side surfaces of the substrate body and exposing the metal circuit layer comprises: etching the surface of the substrate body by laser to form the groove with a width equal to the laser diameter.
8. The method for manufacturing a packaging substrate according to claim 5, characterized in that: The steps of using laser to etch the two side surfaces of the substrate body to expose the metal circuit layer and prepare the groove include: using the laser to move a predetermined distance along the processing direction, and superimposing drilling holes on the surface of the substrate body to prepare the groove, so that the groove forms a groove with a wavy edge at the cross-section along the axial direction.
9. The method for manufacturing a packaging substrate according to claim 8, characterized in that: Before the step of using the laser to move a predetermined distance along the processing direction and drilling holes on the surface of the substrate body to prepare the grooves, the method further includes: determining the predetermined distance that the laser moves along the processing direction according to the laser spot radius.
10. The method for manufacturing a packaging substrate according to claim 4, characterized in that: The step of filling a metal layer in the groove and connecting two side surfaces of the substrate body through the metal layer to dissipate heat for the chip comprises: The substrate body is electroplated to fill the groove, so that the metal part is formed in the groove, and the metal layer is connected to the metal circuit layer through the metal part to dissipate heat for the chip.
11. The method for manufacturing a packaging substrate according to claim 4, characterized in that: After the step of filling the groove with a metal piece, the method further comprises: grinding the metal piece so that an exposed end surface of the metal piece is flush with the surface of the substrate body.