An active phase shifter with temperature compensation

Abstract

The present invention discloses an active phase shifter with temperature compensation, comprising an input transformer balun, a polyphase filter, a vector modulation module based on a Gilbert cell, an output transformer balun, and a positive temperature coefficient current source. The input transformer balun is used to convert a single-ended input signal into a differential signal; the polyphase filter is used to convert the differential signal into a quadrature signal; the vector modulation module based on the Gilbert cell is used to select polarity and perform vector synthesis on the quadrature signal; the output transformer balun is used to convert the differential signal at the output into a single-ended signal; and the positive temperature coefficient current source is used to control the gain of the Gilbert cell. By designing a temperature-dependent positive temperature coefficient current source, the present invention mitigates the temperature-dependent gain change of the vector modulation module, thereby improving the stability of the key performance of the active phase shifter within a temperature range of 55 to 85°C.

Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency integrated circuit design, and in particular relates to an active phase shifter with temperature compensation. Background Art

[0002] The phase shifter is one of the most critical circuit modules in a phased array transceiver. It controls the phase shift and relative delay of the signal in the channel, enabling the phased array to receive or transmit electromagnetic beams at specific directional angles. Key phased array radar specifications, such as beamwidth and beam scanning resolution, are directly related to parameters such as the phase shift number and phase shift accuracy of the phase shifter.

[0003] Phase shifters can be categorized as active or passive, depending on whether they utilize a variable-gain amplifier for vector modulation. Passive phase shifters exhibit wider bandwidth and higher linearity, while active phase shifters offer higher precision, a smaller footprint, and higher gain. Currently, the temperature range for common industrial-grade chips is -40°C to 85°C, while that for military-grade chips is -55°C to 125°C. Phased array radar applications place stringent demands on the reliability of phase shifters at varying temperatures. The variable-gain amplifier in active phase shifters is significantly affected by temperature fluctuations, severely impacting their stable operation in both high and low temperature environments.

[0004] Therefore, in the engineering application of active phase shifters, it is imperative to design a temperature compensation scheme for active phase shifters and improve the temperature robustness of active phase shifters. Summary of the Invention

[0005] The object of the present invention is to provide an active phase shifter with temperature compensation, which can improve the stability of key performance of the active phase shifter in the temperature range of -55 to 85°C.

[0006] To achieve the above-mentioned object of the invention, one aspect of the present invention provides an active phase shifter with temperature compensation, comprising an input transformer balun, a polyphase filter, a vector modulation module based on a Gilbert cell, an output transformer balun, and a positive temperature coefficient current source;

[0007] The input transformer balun is used to convert the single-ended signal at the input end into a differential signal; the polyphase filter is used to convert the differential signal into an orthogonal signal; the vector modulation module based on the Gilbert cell is used to select the polarity of the orthogonal signal and perform vector synthesis; the output transformer balun is used to convert the differential signal at the output end into a single-ended signal; and the positive temperature coefficient current source is used to control the gain of the Gilbert cell.

[0008] Preferably, the input transformer balun has the same structure as the output transformer balun, including first to fourth inductors; the first inductor and the third inductor are coupled to each other, and the second inductor and the fourth inductor are coupled to each other; one end of the first inductor is a single-ended input port, and the other end is connected to one end of the second inductor; the other end of the second inductor is grounded; one end of the third inductor is a first differential output port, and the other end is grounded; one end of the fourth inductor is a second differential output port, and the other end is grounded.

[0009] Preferably, the polyphase filter includes four first resistors, four second resistors, four first capacitors and four second capacitors; the first resistors and the first capacitors are cross-connected in series to form a first-order polyphase filter, and the second resistors and the second capacitors are cross-connected in series to form a second-order polyphase filter; the first-order polyphase filter and the second-order polyphase filter are cascaded to form a second-order polyphase filter.

[0010] Preferably, the vector modulation module based on the Gilbert unit includes an I-way Gilbert unit, a Q-way Gilbert unit, a first load inductor, and a second load inductor;

[0011] The I-way Gilbert unit has the same structure as the Q-way Gilbert unit, and includes first to fourth bipolar transistors, a first field-effect transistor, a second field-effect transistor, and a digital-to-analog converter; the bases of the first bipolar transistor and the fourth bipolar transistor are connected to the first orthogonal signal, and the bases of the second bipolar transistor and the third bipolar transistor are connected to the second orthogonal signal; the emitters of the first bipolar transistor and the second bipolar transistor are connected and connected to the source of the first field-effect transistor, and the emitters of the third bipolar transistor and the fourth bipolar transistor are connected and connected to the source of the second field-effect transistor; the first bipolar transistor and the third bipolar transistor are connected. The collector of the transistor is connected to one end of the first load inductor and is connected to the first output signal, and the other end of the first load inductor is connected to the power supply; the collectors of the second bipolar transistor and the fourth bipolar transistor are connected to one end of the second load inductor and are connected to the second output signal, and the other end of the second load inductor is connected to the power supply; the gate of the first field-effect transistor is connected to the first control signal, the gate of the second field-effect transistor is connected to the second control signal, and the first control signal and the second control signal are in antiphase; the sources of the first field-effect transistor and the second field-effect transistor are connected and are connected to the digital-to-analog converter, and the output current of the positive temperature coefficient current source is input to the digital-to-analog converter.

[0012] Preferably, the positive temperature coefficient current source includes third to eleventh field effect transistors and a third resistor; the gates of the third to fifth field effect transistors are connected and connected to ground; the source of the third field effect transistor is connected to the power supply, the drain of the third field effect transistor is connected to the source of the fourth field effect transistor, and the drain of the fourth field effect transistor is connected to the source of the fifth field effect transistor; the drain of the fifth field effect transistor is connected to the drain of the eighth field effect transistor and connected to the gate of the ninth field effect transistor, and the source of the ninth field effect transistor is connected to ground; the sources of the sixth and seventh field effect transistors are connected and connected to the power supply, the gates of the sixth and seventh field effect transistors are connected and connected to the drain of the seventh field effect transistor, the drain of the ninth field effect transistor and the drain of the eleventh field effect transistor; the gates of the eighth, tenth and eleventh field effect transistors are connected and connected to the drain of the tenth field effect transistor and the drain of the sixth field effect transistor, the source of the tenth field effect transistor is connected to ground, the source of the eleventh field effect transistor is connected to one end of the third resistor, and the other end of the third resistor is connected to ground.

[0013] According to the above aspects of the present invention, the active phase shifter with temperature compensation is designed to mitigate the change in the gain of the vector modulation module with temperature by designing a positive temperature coefficient current source that changes with temperature, thereby improving the stability of the key performance of the active phase shifter within the temperature range of -55 to 85°C. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the present invention, the following briefly introduces the drawings used in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive efforts.

[0015] Figure 1 FIG1 is an overall structural diagram of an active phase shifter with temperature compensation according to an embodiment of the present invention;

[0016] Figure 2 A circuit diagram of an input and output transformer balun according to an embodiment of the present invention;

[0017] Figure 3 A circuit diagram of a polyphase filter according to an embodiment of the present invention;

[0018] Figure 4 A circuit diagram of a vector modulation module based on a Gilbert unit according to an embodiment of the present invention;

[0019] Figure 5 FIG. 4 is a circuit diagram of a positive temperature coefficient current source according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0021] One embodiment of the present invention provides an active phase shifter with temperature compensation, such as Figure 1 As shown, an active phase shifter with temperature compensation according to an embodiment of the present invention includes an input transformer balun, a polyphase filter, a vector modulation module based on a Gilbert cell, an output transformer balun, and a positive temperature coefficient current source. The input transformer balun converts a single-ended input signal into a differential signal; the polyphase filter converts the differential signal into a quadrature signal; the vector modulation module based on the Gilbert cell selects the polarity of the quadrature signal and performs vector synthesis; the output transformer balun converts the differential signal into a single-ended signal; and the positive temperature coefficient current source controls the gain of the Gilbert cell.

[0022] The input transformer balun has the same structure as the output transformer balun. Figure 2 As shown, the input and output transformer baluns include first to fourth inductors L1, L2, L3, and L4; the first inductor L1 and the third inductor L3 are coupled to each other, and the second inductor L2 and the fourth inductor L4 are coupled to each other; one end of the first inductor L1 is a single-ended input port V1, and the other end is connected to one end of the second inductor L2; the other end of the second inductor L2 is grounded; one end of the third inductor L3 is a first differential output port V2+, and the other end is grounded; one end of the fourth inductor L4 is a second differential output port V2-, and the other end is grounded.

[0023] like Figure 3 As shown, the polyphase filter includes four first resistors R1, four second resistors R2, four first capacitors C1 and four second capacitors C2; the first resistors R1 and the first capacitors C1 are cross-connected in series to form a first-order polyphase filter, and the second resistors R2 and the second capacitors C2 are cross-connected in series to form a second-order polyphase filter; the first-order polyphase filter and the second-order polyphase filter are cascaded to form a second-order polyphase filter; the input port of the polyphase filter is connected to the first and second differential output ports V2+ and V2- of the input transformer balun, and the first and second orthogonal signals VI+, VQ+, VI-, and VQ- output by the polyphase filter are connected to a vector modulation module based on a Gilbert unit.

[0024] like Figure 4As shown, the vector modulation module based on the Gilbert unit includes an I-way Gilbert unit, a Q-way Gilbert unit, and a first load inductor ZL1 and a second load inductor ZL2. The I-way Gilbert unit includes first to fourth bipolar transistors Q1, Q2, Q3, Q4, a first field effect transistor M1, a second field effect transistor M2, and a digital-to-analog converter DAC1; the bases of the first bipolar transistor Q1 and the fourth bipolar transistor Q4 are connected to the first orthogonal signal VI+, and the bases of the second bipolar transistor Q2 and the third bipolar transistor Q3 are connected to the second orthogonal signal VI-; the emitters of the first bipolar transistor Q1 and the second bipolar transistor Q2 are connected and connected to the source of the first field effect transistor M1, and the emitters of the third bipolar transistor Q3 and the fourth bipolar transistor Q4 are connected and connected to the source of the second field effect transistor M2; the collectors of the first bipolar transistor Q1 and the third bipolar transistor Q3 are connected and connected to the source of the second field effect transistor M2. The electrode is connected to one end of the first load inductor ZL1 and is connected to the first output signal OUT+. The other end of the first load inductor ZL1 is connected to a power supply. The collectors of the second bipolar transistor Q2 and the fourth bipolar transistor Q4 are connected to one end of the second load inductor ZL2 and are connected to the second output signal OUT-. The other end of the second load inductor ZL2 is connected to the power supply. The gate of the first field-effect transistor M1 is connected to the first control signal VI1, and the gate of the second field-effect transistor M2 is connected to the second control signal VI2. The first control signal VI1 and the second control signal VI2 are in opposite phases and are used to control the polarity of the first output signal OUT+. The sources of the first field-effect transistor M1 and the second field-effect transistor M2 are connected and are connected to the digital-to-analog converter DAC1. The control signal S1 and the output current IP of the positive temperature coefficient current source are input to the digital-to-analog converter DAC1. By inputting different control signals S1 to the digital-to-analog converter DAC1, the digital-to-analog converter DAC1 can output 1, 2, 3, ..., or 64 times the IP. The gain of the I-channel Gilbert cell is proportional to the tail current I1 and inversely proportional to the temperature. The tail current I1 of the I-channel Gilbert cell is provided by the digital-to-analog converter DAC1. The structure and operating principle of the Q-channel Gilbert cell are the same as those of the I-channel Gilbert cell.

[0025] like Figure 5As shown, the positive temperature coefficient current source includes third to eleventh field effect transistors MP1, MP2, MP3, MP4, MP5, MN1, MN2, MN3, MN4 and a third resistor R3; the gates of the third to fifth field effect transistors MP1, MP2, MP3 are connected and connected to the ground; the source of the third field effect transistor MP1 is connected to the power supply, the drain of the third field effect transistor MP1 is connected to the source of the fourth field effect transistor MP2, the drain of the fourth field effect transistor MP2 is connected to the source of the fifth field effect transistor MP3; the drain of the fifth field effect transistor MP3 is connected to the drain of the eighth field effect transistor MN1 and is connected to the gate of the ninth field effect transistor MN2, and the ninth field effect transistor The source of the sixth field effect transistor MN2 is connected to ground; the sources of the sixth and seventh field effect transistors MP4 and MP5 are connected and to the power supply, the gates of the sixth and seventh field effect transistors MP4 and MP5 are connected and to the drain of the seventh field effect transistor MP5, the drain of the ninth field effect transistor MN2, and the drain of the eleventh field effect transistor MN4; the gates of the eighth, tenth, and eleventh field effect transistors MN1, MN3, and MN4 are connected and to the drain of the tenth field effect transistor MN3 and the drain of the sixth field effect transistor MP4, the source of the tenth field effect transistor MN3 is connected to ground, the source of the eleventh field effect transistor MN4 is connected to one end of the third resistor R3, and the other end of the third resistor R3 is connected to ground.

[0026] The third to fifth field-effect transistors MP1 to MP3 and the eighth to eleventh field-effect transistors MN1 to MN3 form a startup circuit for the current source; the sixth, seventh, tenth, and eleventh field-effect transistors MP4, MP5, MN3, MN4 and the third resistor R3 generate a current with a positive temperature coefficient; the sixth and seventh field-effect transistors MP4 and MP5 are of the same size and operate in the saturation region; the size of the eleventh field-effect transistor MN4 is K times that of the tenth field-effect transistor MN3, and the tenth and eleventh field-effect transistors MN3 and MN4 operate in the subthreshold region; the output current IP of the positive temperature coefficient current source is proportional to the temperature; the slope of the output current can be adjusted by changing the multiple K of the sizes of the eleventh field-effect transistor MN4 and the tenth field-effect transistor MN3 and the third resistor R3; in addition to the normal operating state, the positive temperature coefficient current source circuit also has a zero-degenerate operating state; when the circuit is first supplied with the power supply voltage, the sixth and seventh field-effect transistors MP4 and MP5 are not turned on, and their gate voltages are always maintained at a high level. , which is also a stable working state of the circuit; in order to enable the temperature compensation circuit to enter a normal working state, a startup circuit is added outside the circuit; the third to fifth field-effect transistors MP1 to MP3 are inverse ratio transistors with a channel length greater than a channel width, acting as resistors; when the circuit is in a zero-degenerate working state, the tenth and eleventh field-effect transistors MN3 and MN4 are turned off, and their gate voltages are 0; the eighth field-effect transistor MN1 in the startup circuit is turned off, so the source-drain voltage of the eighth field-effect transistor MN1 is high, causing the eleventh field-effect transistor MN4 to turn on; after the eleventh field-effect transistor MN4 is turned on, it pulls down the gate voltages of the sixth and seventh field-effect transistors MP4 and MP5, causing the circuit to enter a normal working state; then the eighth field-effect transistor MN1 is turned on accordingly; compared with the resistance of the third to fifth field-effect transistors MP1 to MP3, the source-drain voltage of the eighth field-effect transistor MN1 is very small at this time, and cannot turn on the ninth field-effect transistor MN2, so the startup circuit is closed, which does not affect the normal operation of the circuit.

[0027] Testing of the temperature-compensated active phase shifter according to the above embodiment of the present invention revealed that, over the temperature range of -55°C to 85°C, the gain variation was less than 0.34 dB, the RMS phase error variation was less than 0.73°, and the RMS amplitude error variation was less than 0.15 dB. This indicates that the temperature-compensated active phase shifter according to the embodiment of the present invention, by designing a temperature-dependent positive temperature coefficient current source, mitigates the temperature-dependent gain variation of the vector modulation module, effectively improving the stability of the key performance of the active phase shifter within the temperature range of -55°C to 85°C.

[0028] The above description is merely illustrative of certain exemplary embodiments of the present invention. It goes without saying that those skilled in the art will be able to modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and description are illustrative in nature and should not be construed as limiting the scope of protection of the claims.

Claims

1. An active phase shifter with temperature compensation, characterized in that: Includes input transformer balun, polyphase filter, vector modulation module based on Gilbert cell, output transformer balun and positive temperature coefficient current source; The input transformer balun is used to convert the single-ended input signal into a differential signal; the polyphase filter is used to convert the differential signal into an orthogonal signal; the vector modulation module based on the Gilbert cell is used to select the polarity of the orthogonal signal and perform vector synthesis; the output transformer balun is used to convert the differential signal at the output into a single-ended signal; the positive temperature coefficient current source is used to control the gain of the Gilbert cell; The vector modulation module based on the Gilbert unit includes an I-way Gilbert unit, a Q-way Gilbert unit, a first load inductor, and a second load inductor; The I-way Gilbert unit has the same structure as the Q-way Gilbert unit, and includes first to fourth bipolar transistors, a first field-effect transistor, a second field-effect transistor, and a digital-to-analog converter; the bases of the first bipolar transistor and the fourth bipolar transistor are connected to the first orthogonal signal, and the bases of the second bipolar transistor and the third bipolar transistor are connected to the second orthogonal signal; the emitters of the first bipolar transistor and the second bipolar transistor are connected and connected to the source of the first field-effect transistor, and the emitters of the third bipolar transistor and the fourth bipolar transistor are connected and connected to the source of the second field-effect transistor; the first bipolar transistor and the third bipolar transistor are connected. The collector of the transistor is connected to one end of the first load inductor and is connected to the first output signal, and the other end of the first load inductor is connected to a power supply; the collectors of the second bipolar transistor and the fourth bipolar transistor are connected to one end of the second load inductor and are connected to the second output signal, and the other end of the second load inductor is connected to the power supply; the gate of the first field-effect transistor is connected to the first control signal, and the gate of the second field-effect transistor is connected to the second control signal, and the first control signal and the second control signal are in opposite phases; the sources of the first field-effect transistor and the second field-effect transistor are connected and are connected to a digital-to-analog converter, and the output current of the positive temperature coefficient current source is input to the digital-to-analog converter; The positive temperature coefficient current source includes third to eleventh field effect transistors and a third resistor; The gates of the third to fifth field effect transistors are connected and connected to ground; the source of the third field effect transistor is connected to a power supply, the drain of the third field effect transistor is connected to the source of the fourth field effect transistor, and the drain of the fourth field effect transistor is connected to the source of the fifth field effect transistor; The drain of the fifth field effect transistor is connected to the drain of the eighth field effect transistor and is connected to the gate of the ninth field effect transistor, and the source of the ninth field effect transistor is connected to the ground; The sources of the sixth and seventh field effect transistors are connected to each other and to a power supply, and the gates of the sixth and seventh field effect transistors are connected to each other and to the drain of the seventh field effect transistor, the drain of the ninth field effect transistor, and the drain of the eleventh field effect transistor; The gates of the eighth, tenth, and eleventh field-effect transistors are connected to each other and to the drain of the tenth field-effect transistor and the drain of the sixth field-effect transistor. The source of the tenth field-effect transistor is connected to ground. The source of the eleventh field-effect transistor is connected to one end of the third resistor, and the other end of the third resistor is connected to ground.

2. The active phase shifter with temperature compensation according to claim 1, wherein: The input transformer balun has the same structure as the output transformer balun, including first to fourth inductors; the first inductor and the third inductor are coupled to each other, and the second inductor and the fourth inductor are coupled to each other; one end of the first inductor is a single-ended input port, and the other end is connected to one end of the second inductor; the other end of the second inductor is grounded; one end of the third inductor is a first differential output port, and the other end is grounded; one end of the fourth inductor is a second differential output port, and the other end is grounded.

3. The active phase shifter with temperature compensation according to claim 1 or 2, characterized in that: The polyphase filter includes four first resistors, four second resistors, four first capacitors and four second capacitors; the first resistors and the first capacitors are cross-connected in series to form a first-order polyphase filter, and the second resistors and the second capacitors are cross-connected in series to form a second-order polyphase filter; the first-order polyphase filter and the second-order polyphase filter are cascaded to form a second-order polyphase filter; the input port of the polyphase filter is connected to the first and second differential output ports of the input transformer balun, and the polyphase filter outputs the first and second orthogonal signals, which are connected to the vector modulation module based on the Gilbert unit.

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