Gallium oxide power diode with low threshold voltage and manufacturing method thereof

Abstract

The invention discloses a low-threshold-voltage gallium oxide power diode which mainly solves the problems that an existing gallium oxide power diode is high in threshold voltage and low in breakdown voltage. The invention relates to a high-power PZT (ferroelectric material), which comprises a cathode (4), a substrate (1), a beta-Ga2O3 drift layer (2) and an anode (5) from bottom to top, and is characterized in that a ferroelectric material PZT dielectric layer (3) formed by sleeving an outer circular ring and an inner circular ring is arranged between the beta-Ga2O3 drift layer and the anode, so that positive charges can be generated at the interface of the anode when positive voltage is applied above the PZT, electrons are attracted to be accumulated, and the turn-on voltage is reduced; when a negative voltage is applied above the PZT, a negative charge is generated at an anode interface to form a high-resistance region, and the breakdown voltage of the device is improved. The ferroelectric material PZT dielectric layer (3) is a ferroelectric material PZT field ring formed through pulse laser deposition, photoetching and dry etching. The turn-on voltage of the device can be effectively reduced, the breakdown voltage of the device is improved, and the device can be used for a rectifier and a direct-current converter of a power electronic system.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics technology, and in particular relates to a gallium oxide power diode and a manufacturing method thereof, which can be used as a power device for a rectifier and a DC converter of a power electronic system. Background Art

[0002] As an important semiconductor power component, power diodes are widely used in rectifiers and DC converters in power electronic systems. Wide bandgap semiconductor material gallium oxide (Ga2O3) has the potential to produce high-voltage, high-power, and low-loss power diodes due to its ultra-large bandgap width, high breakdown field strength, adjustable n-type doping concentration, and low-cost single crystal growth technology. In recent years, many scholars have begun to study β-Ga2O3 crystal materials and power devices. However, their main research focus is still on how to increase the breakdown voltage and reduce the on-resistance, and there is less research on the turn-on voltage, an important indicator of diodes. However, due to the low affinity of gallium oxide, gallium oxide diodes have a higher turn-on voltage, usually higher than 0.8V, which will result in higher conduction losses. Therefore, it is very necessary to achieve a gallium oxide power diode with a low forward turn-on voltage by optimizing the device design.

[0003] The patent document with publication number CN113964182A discloses a heterogeneous PN low turn-on voltage gallium oxide power diode and its preparation method. It controls the shutdown of the device by forming a heterogeneous PN junction structure with a P-type NiO dielectric layer and a Ga2O3 drift layer, and uses Ti / Au metal to form an ohmic contact with the Ga2O3 drift layer to reduce the turn-on voltage of the device when it is turned on, so as to realize a power diode with a low turn-on voltage. However, the contact resistance between the NiO dielectric layer and the Ti / Au metal and Ga2O3 may cause energy loss and affect the conduction efficiency of the device. Summary of the invention

[0004] The purpose of the present invention is to provide a low turn-on voltage gallium oxide power diode and a manufacturing method thereof in view of the above-mentioned deficiencies in the prior art, so as to reduce the turn-on voltage, reduce the conduction loss and improve the conduction efficiency.

[0005] The present invention is achieved in that:

[0006] 1. A low turn-on voltage gallium oxide power diode, comprising a substrate 1, a β-Ga2O3 drift layer 2, a cathode 4, and an anode 5, characterized in that:

[0007] A ferroelectric material PZT dielectric layer 3 consisting of an outer ring and an inner circle is provided between the β-Ga2O3 drift layer 2 and the anode 5. When a positive voltage is applied to the PZT, positive charges are generated at the anode interface, attracting electrons to accumulate and reduce the turn-on voltage. When a negative voltage is applied to the PZT, negative charges are generated at the anode interface to form a high resistance region, thereby increasing the breakdown voltage of the device.

[0008] Preferably, the inner circular radius of the ferroelectric material PZT dielectric layer 3 is 5 μm to 15 μm, the inner diameter of the ring is 30 to 50 μm, the outer diameter is 55 to 65 μm, and the thickness is 50 to 150 nm.

[0009] Preferably, the substrate 1 is a heavily Sn-doped (001) β-Ga2O3 substrate.

[0010] Preferably, the β-Ga2O3 drift layer 2 is located above the substrate, has a thickness of 2 to 20 μm, and a doping concentration of 1×10 15 cm -3 ~1×10 17 cm -3 .

[0011] Preferably, the material of the cathode 4 is Ti / Au; the material of the anode 5 is Ni / Au.

[0012] 2. A method for manufacturing a low turn-on voltage gallium oxide power diode, characterized in that it comprises the following steps:

[0013] 1) On a heavily Sn-doped (001) β-Ga2O3 substrate 1, a layer with a thickness of 2 to 20 μm and a doping concentration of 1×10 15 cm -3 ~1×10 17 cm -3 Lightly doped β-Ga2O3 drift layer 2;

[0014] 2) Making the ferroelectric material PZT dielectric layer 3:

[0015] 2a) using pulsed laser deposition (PLD) technology, a layer of ferroelectric material PZT with a thickness of 50 to 150 nm is deposited on the front surface of the sample in a chamber with an oxygen atmosphere;

[0016] 2b) selectively removing the PZT layer by photolithography and dry etching to leave an inner circle with a radius of 5 to 15 μm and a ring with an inner diameter of 30 to 50 μm and an outer diameter of 55 to 65 μm above the lightly doped β-Ga2O3 drift layer 2, forming a ferroelectric material PZT dielectric layer 3;

[0017] 3) A Ti / Au metal stack is deposited on the bottom of the Sn heavily doped (001) β-Ga2O3 substrate 1 using an E-beam evaporation process, and a cathode is formed by annealing. Then, a Ni / Au stack is deposited on the top of the β-Ga2O3 drift layer 2 and the top of the ferroelectric material PZT dielectric layer 3 using an E-beam evaporation process as an anode to complete the device manufacturing.

[0018] Compared with the prior art, the present invention has the following advantages:

[0019] The present invention adopts the ferroelectric material PZT as the medium and utilizes the polarization property of the PZT material to transfer the positive and negative charge centers in the PZT lattice structure, thereby producing the following beneficial effects:

[0020] First, when a positive voltage is applied to the PZT, a positive charge is generated at the anode interface, attracting electrons to accumulate, which can effectively reduce the turn-on voltage of the device.

[0021] Second, when a negative voltage is applied to the PZT, negative charges are generated at the anode interface, forming a high resistance region, thereby increasing the breakdown voltage of the device.

[0022] Thirdly, the present invention reduces the turn-on voltage without causing degradation of the breakdown voltage, that is, the original breakdown voltage can be maintained or even increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the overall device structure of the present invention;

[0024] Figure 2 yes Figure 1 A top view of

[0025] Figure 3 It is a schematic diagram of the preparation process of the device of the present invention. DETAILED DESCRIPTION

[0026] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0027] Reference Figure 1 and Figure 2 The device of the present invention comprises a Sn heavily doped (001) β-Ga2O3 substrate 1, a lightly doped β-Ga2O3 drift layer 2, a ferroelectric material PZT dielectric layer 3, a Ti / Au cathode 4, and a Ni / Au anode 5. Wherein:

[0028] The substrate 1 is a β-Ga2O3 substrate with a heavy Sn doping and a (001) crystal orientation;

[0029] The β-Ga2O3 drift layer 2 is located above the substrate 1 and has a thickness of 2 to 20 μm and a doping concentration of 1×10 15cm -3 ~1×10 17 cm -3 ;

[0030] The ferroelectric material PZT dielectric layer 3 is located on the upper part of the β-Ga2O3 drift layer 2 and is composed of an outer ring and an inner circle, the radius of the inner circle is 5μm to 15μm, the inner diameter of the outer ring is 30 to 50μm, and the outer diameter is 55 to 65μm;

[0031] The Ti / Au cathode 4 is located below the substrate 1;

[0032] The Ni / Au anode 5 is located above the β-Ga2O3 drift layer 2 and above the ferroelectric material PZT dielectric layer 3 and between the inner circle and the outer circle of the ferroelectric material PZT dielectric layer 3 .

[0033] Reference Figure 3 The following three embodiments are given for the fabrication of the device of the present invention.

[0034] Example 1: Preparation of a ferroelectric material PZT dielectric layer with a thickness of 50 nm, an inner circle radius of 5 μm, an inner ring diameter of 30 μm, an outer diameter of 55 μm, and a drift layer with a thickness of 2 μm and a doping concentration of 1×10 15 cm -3 Gallium oxide power diode.

[0035] Step 1. Growing gallium oxide epitaxial material.

[0036] Using the HVPE process on a heavily Sn-doped (001) β-Ga2O3 substrate, using GaCl and O2 as source gases and high-purity nitrogen as carrier gas, high-purity Ga metal and chlorine are reacted at 800°C to generate GaCl, and GaCl and O2 are introduced separately onto the gallium oxide substrate of the reactor;

[0037] The growth area on the gallium oxide substrate was heated to 800 °C, and the 2O2 / GaCl gas was fixed at an input ratio of 8. The total gas flow rate was 1400 sccm for 1 h to obtain a layer with a thickness of 2 μm and a doping concentration of 1×10 15 cm -3 Lightly doped β-Ga2O3 drift layer.

[0038] Step 2. Fabricate ferroelectric material PZT field ring.

[0039] Using pulsed laser deposition (PLD) technology, a layer of ferroelectric material PZT with a thickness of 50 nm is deposited on the drift layer in a chamber with an oxygen atmosphere, and then cleaned;

[0040] Using a mask, inner and outer circular ring areas are determined on the cleaned sample, and the two areas are masked using a photoresist;

[0041] The masked sample was placed in an ICP etcher, and the etching process conditions were set to 200W upper power, 50W lower power, and 10mTorr pressure. The PZT material outside the inner and outer circular areas was etched away by 50nm through the ICP etching process.

[0042] The etched samples were immersed in acetone solution and ethanol solution in turn until the photoresist was completely removed, then rinsed with deionized water for 3 minutes, and finally blown dry with a nitrogen gun, leaving an inner circle with a radius of 5 μm and a circular ring with an inner diameter of 30 μm and an outer diameter of 55 μm, which constituted the PZT field ring of the ferroelectric material, namely the PZT dielectric layer.

[0043] Step 3. Make metal electrodes.

[0044] Set vacuum level to 10 -6 torr, the evaporated metal is Ti / Au, the temperature is 25℃, and the plating rate is 1 angstrom / second. Under the Sn heavily doped (001) β-Ga2O3 substrate, Ti / Au is sequentially evaporated with a thickness of 20nm / 400nm by an electron beam evaporation station. Then, the sample with the evaporated Ti / Au metal stack is placed in an annealing furnace and subjected to rapid thermal annealing for 1min in a N2 atmosphere at 470℃ to obtain a cathode electrode.

[0045] Set vacuum level to 10 -6 torr, the evaporated metal is Ni / Au, the temperature is 25°C, and the plating rate is 1 angstrom / second. Ni / Au metal stacks with thickness of 20nm / 400nm are evaporated on the drift layer and PZT material by electron beam evaporation table, and the metal stacks are stripped to form anode to complete the device manufacturing.

[0046] Example 2: Preparation of a ferroelectric material PZT dielectric layer with a thickness of 100 nm, an inner circle radius of 10 μm, an inner ring diameter of 40 μm, an outer diameter of 60 μm, and a drift layer with a thickness of 10 μm and a doping concentration of 1×10 16 cm -3 Gallium oxide power diode.

[0047] Step 1. Growing a β-Ga2O3 drift layer on a substrate.

[0048] A heavily Sn-doped (001) β-Ga2O3 gallium oxide substrate was placed in an MOCVD chamber and the chamber was pumped with a mechanical pump to reduce environmental pollution.

[0049] The reaction chamber temperature was set to 850 °C, the pressure was set to 100 mba, high-purity oxygen was used as the oxygen source, TEGa was used as the gallium source, silane was used as the doping source, argon was used as the carrier gas, and the MOCVD process conditions with a molar flow ratio of TEGa to O2 of 1:1000 were used. The thickness of the grown substrate was 10 μm and the doping concentration was 1×10 16 cm -3 β-Ga2O3 drift layer.

[0050] Step 2. Make a ferroelectric material PZT field ring on the top of the drift layer.

[0051] 2.1) Place the sample with the drift layer epitaxially grown in a chamber with an oxygen atmosphere, deposit a layer of ferroelectric material PZT with a thickness of 100 nm on the drift layer using pulsed laser deposition (PLD) technology, and clean it;

[0052] 2.2) using a mask to determine the inner circular and outer circular areas on the cleaned sample, and using a photoresist to mask the two areas;

[0053] 2.3) Place the masked sample in an ICP etcher, and etch away 100 nm of the PZT material outside the inner and outer circular areas by ICP etching under the etching process conditions of 350 W upper power, 100 W lower power, and 15 mTorr pressure;

[0054] 2.4) The etched sample was immersed in acetone solution and ethanol solution in turn until the photoresist was completely removed, then rinsed with deionized water for 4 minutes, and finally dried with a nitrogen gun, leaving an inner circle with a radius of 10 μm and a circular ring with an inner diameter of 40 μm and an outer diameter of 60 μm, which constituted the PZT field ring of the ferroelectric material, i.e., the PZT dielectric layer.

[0055] Step 3. Make metal electrodes.

[0056] 3.1) At vacuum degree 10 -6 torr, the metal to be evaporated is Ti / Au, the temperature is 55℃, and the plating rate is 2 angstroms / second. Under the heavily Sn-doped (001) β-Ga2O3 substrate, Ti / Au is sequentially evaporated with a thickness of 30nm / 500nm by an electron beam evaporation station. The sample after the Ti / Au metal stack is evaporated is then placed in an annealing furnace and subjected to rapid thermal annealing in a N2 atmosphere at 500℃ for 30s to obtain a cathode electrode.

[0057] 3.2) At vacuum degree 10 -6torr, the evaporated metal is Ni / Au, the temperature is 55°C, and the plating rate is 2 angstroms / second. Under the process conditions, Ni / Au metal stacks with thicknesses of 30nm / 500nm are evaporated on the drift layer and PZT material by electron beam evaporation, and the metal stacks are stripped to form an anode to complete the device manufacturing.

[0058] Example 3: Preparation of a ferroelectric material PZT dielectric layer with a thickness of 150 nm, an inner circle radius of 15 μm, an inner ring diameter of 50 μm, an outer diameter of 65 μm, and a drift layer with a thickness of 20 μm and a doping concentration of 1×10 17 cm -3 Gallium oxide power diode.

[0059] Step A. Growing gallium oxide epitaxial material.

[0060] The epitaxial growth thickness was 20 μm and the doping concentration was 1×10 17 cm -3 Lightly doped β-Ga2O3 drift layer. The process conditions are as follows:

[0061] Using GaCl and O2 as source gases and high-purity nitrogen as carrier gas, high-purity Ga metal and chlorine are reacted at 1000°C to generate GaCl, and GaCl and O2 are introduced into the gallium oxide substrate of the reactor respectively;

[0062] The growth area on the gallium oxide substrate was heated to 1050°C, and the 2O2 / GaCl gas was input at a fixed ratio of 12, and grown for 5 hours at a total gas flow rate of 1800 sccm.

[0063] Step B. Fabricate a ferroelectric material PZT field ring.

[0064] B1) in a chamber with an oxygen atmosphere, a layer of ferroelectric material PZT with a thickness of 150 nm is deposited on the drift layer by pulsed laser deposition (PLD) technology, and then the layer is cleaned;

[0065] B2) using a mask to determine the inner circular area and the outer circular area on the cleaned sample, and using a photoresist to mask the two areas;

[0066] B3) placing the masked sample in an ICP etcher, and etching 150 nm of the PZT material outside the inner circular and outer circular areas by ICP etching process, wherein the etching process conditions are: upper power of 500 W, lower power of 150 W, and pressure of 20 mTorr;

[0067] B4) The etched sample is sequentially immersed in acetone solution and ethanol solution until the photoresist is completely removed, then rinsed with deionized water for 5 minutes, and finally blown dry with a nitrogen gun, leaving an inner circle with a radius of 15 μm and a circular ring with an inner diameter of 50 μm and an outer diameter of 65 μm, forming a PZT field ring of ferroelectric material as the ferroelectric material PZT dielectric layer of the device.

[0068] Step C. Making metal electrodes.

[0069] C1) Preparation of cathode electrode:

[0070] Under the heavily Sn-doped (001) β-Ga2O3 substrate, Ti / Au metal stacks with thicknesses of 40nm / 600nm were deposited in sequence by electron beam evaporation. The evaporation process conditions were: vacuum degree 10 -7 torr, the evaporated metal is Ti / Au, the temperature is 90°C, and the plating rate is 2 Å / s;

[0071] Then, the sample after evaporation of Ti / Au metal stack was placed in an annealing furnace and subjected to rapid thermal annealing for 40 seconds in a N2 atmosphere at 600°C to obtain a cathode electrode;

[0072] C2) Making anode electrode:

[0073] Ni / Au metal stacks with thickness of 40nm / 600nm were deposited on the drift layer and PZT material by electron beam evaporation. The process conditions of the evaporation were: vacuum degree 10 -7 torr, the evaporated metal is Ni / Au, the temperature is 90°C, and the plating rate is 2 Å / s;

[0074] The evaporated Ni / Au metal stack is subjected to metal stripping to form an anode, thereby completing the device fabrication.

[0075] The above descriptions are only three specific examples of the present invention and do not constitute any limitation to the present invention. Obviously, after understanding the content and principle of the present invention, professionals in the field may make various modifications and changes in form and details without departing from the principle and structure of the present invention. For example, the cathode electrode may be a Ti / Al / Ni / Au metal stack in addition to the Ti / Au metal stack; the anode electrode may be a Pt / Au metal stack in addition to the Ni / Au metal stack. However, these modifications and changes based on the concept of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A low turn-on voltage gallium oxide power diode, comprising a substrate (1), a β-Ga2O3 drift layer (2), a cathode (4), and an anode (5), characterized in that: A ferroelectric material PZT dielectric layer (3) consisting of an outer ring and an inner circle nested together is provided between the β-Ga2O3 drift layer (2) and the anode (5), so that when a positive voltage is applied to the PZT, positive charges are generated at the anode interface, attracting electrons to accumulate and lowering the turn-on voltage; and when a negative voltage is applied to the PZT, negative charges are generated at the anode interface to form a high resistance region, thereby increasing the breakdown voltage of the device.

2. The structure according to claim 1, characterized in that: The ferroelectric material PZT dielectric layer (3) has an inner circular radius of 5 μm to 15 μm, an annular inner diameter of 30 μm to 50 μm, an outer diameter of 55 μm to 65 μm, and a thickness of 50 nm to 150 nm.

3. The structure according to claim 1, characterized in that: The substrate (1) is a heavily Sn-doped (001) β-Ga2O3 substrate; The β-Ga2O3 drift layer (2) is located above the substrate and has a thickness of 2 μm to 20 μm and a doping concentration of 1×10 15 cm -3 ~1×10 17 cm -3 .

4. The structure according to claim 1, characterized in that: The material of the cathode (4) is Ti / Au. The material of the anode (5) is Ni / Au.

5. A method for manufacturing a low turn-on voltage gallium oxide power diode, characterized in that: The steps include: 1) On a heavily Sn-doped (001) β-Ga2O3 substrate (1), a layer with a thickness of 2 μm to 20 μm and a doping concentration of 1×10 15 cm -3 ~1×10 17 cm -3 A lightly doped β-Ga2O3 drift layer (2); 2) Making a ferroelectric material PZT dielectric layer (3): 2a) using pulsed laser deposition (PLD) technology, a layer of ferroelectric material PZT with a thickness of 50 nm to 150 nm is deposited on the front surface of the sample in a chamber with an oxygen atmosphere; 2b) selectively removing the PZT layer by photolithography and dry etching to leave an inner circle with a radius of 5 to 15 μm and a ring with an inner diameter of 30 to 50 μm and an outer diameter of 55 to 65 μm above the lightly doped β-Ga2O3 drift layer (2), thereby forming a ferroelectric material PZT dielectric layer (3); 3) A Ti / Au metal stack is deposited on the bottom of a heavily Sn-doped (001) β-Ga2O3 substrate (1) by an E-beam evaporation process, and a cathode is formed by annealing. A Ni / Au stack is then deposited on the top of the β-Ga2O3 drift layer (2) and the top of the ferroelectric material PZT dielectric layer (3) by an E-beam evaporation process as an anode to complete device manufacturing.

6. The method according to claim 5, characterized in that The MOCVD process parameters in step 1) are as follows: The temperature of the reaction chamber is 700-900°C; The pressure is 40mba~200mba; Use high-purity oxygen as oxygen source, TEGa as gallium source, silane as doping source, argon as carrier gas, The molar flow ratio of TEGa to O2 is 1:5000 to 1:

200.

7. The method according to claim 5, characterized in that The HVPE process in step 1) is as follows: Using GaCl and O2 as source gases and high-purity nitrogen as carrier gas, high-purity Ga metal and chlorine are reacted at 800-1000°C to generate GaCl, and GaCl and O2 are introduced into the gallium oxide substrate of the reactor respectively; The growth area on the gallium oxide substrate is heated to 800-1050° C., a 2O2 / GaCl gas with a fixed input ratio of 8-12 is input, and the growth time is 1-5 hours at a total gas flow rate of 1400-1800 sccm.

8. The method according to claim 5, characterized in that In step 2), the PZT layer is selectively removed by photolithography and dry etching, and the implementation steps include the following: Using a mask, inner and outer circular ring areas are determined on the cleaned sample, and the two areas are masked using a photoresist; The masked sample is placed in an ICP etcher, and the etching process conditions are set to 200-500W of upper power, 50-150W of lower power, and 10-20mTorr of pressure. The PZT material outside the inner circular and outer ring areas is etched away by 50-150nm through the ICP etching process. The etched sample was immersed in acetone solution and ethanol solution in turn until the photoresist was completely removed, then rinsed with deionized water for 3 to 5 minutes, and finally dried with a nitrogen gun.

9. The method according to claim 5, characterized in that In step 3), a Ti / Au metal stack is deposited on the bottom of the substrate using an E-beam evaporation process, and the implementation steps include the following: Set vacuum level to 10 -6 ~10 -7 torr, the evaporated metal is Ti / Au, the temperature is 25-90°C, the plating rate is 1-2 angstroms / second, and the Ti / Au metal stack with a thickness of 20-40nm / 400-600nm is evaporated in the cathode area; The Ti / Au metal stacked sample after vapor deposition is placed in an annealing furnace, and annealing is performed under the annealing conditions of setting the atmosphere to N2, the temperature to 400-600°C, and the time to 20-40s to form a cathode electrode.

10. The method according to claim 5, characterized in that The process conditions for making the anode in step 3) are as follows: Set vacuum level to 10 -6 ~10 -7 torr, the evaporated metal is Ni / Au, the temperature is 25-90°C, and the plating rate is 1-2 angstroms / second; a Ni / Au metal stack with a thickness of 20-40nm / 400-600nm is evaporated on the drift layer and the PZT material to form an anode electrode.

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