Substrate processing method for improving problem of anisotropic special shape of edge contour after epitaxy
By performing multi-step edge treatment on the silicon wafer, including chamfering, corrosion, fixed crystal direction treatment and polishing, the problem of edge profile anisotropy during the growth of the epitaxial layer is solved, and the uniform growth of the epitaxial layer and the flatness of the edge are achieved.
Patent Information
- Application Number
- CN202411790240.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-03-28
AI Technical Summary
During the growth process of the epitaxial layer, due to the rapid growth rate of the edge, the formation and extrusion stress of the epitaxial crown, which in turn causes the edge defect to extend inward, causing the problem of anisotropy of the edge profile after the epitaxial layer.
By performing rough chamfering and fine chamfering on the silicon wafer, the edge mechanical damage layer is removed, the crystal-oriented edge treatment is fixed, and local etching and polishing is performed on the chamfering surface (110) to form a flat edge.
When the epitaxial layer grows on the substrate surface, the uniformity of the edge profile is achieved, the formation of epitaxial crowns and the expansion of edge defects is avoided, and the anisotropy of the edge profile after epitaxial is improved.
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Figure CN119710915A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a substrate processing method for improving the problem of anisotropic edge profile after epitaxy, and belongs to the field of semiconductor material processing. Background Art
[0002] The epitaxial layer uses the substrate as a seed crystal and grows a new single crystal thin layer on the substrate, which is like the substrate crystal structure extending outward.
[0003] Epitaxial growth is one of the important basic technologies for semiconductor wafers and devices, and has many applications. For example, bipolar and BiCMOS integrated circuits must use epitaxial structures to obtain good device isolation and transistor performance; high-power devices require epitaxial layers to reduce device resistance and power consumption; CMOS devices need to use relatively high-resistance epitaxy on low-resistance substrates to avoid parasitic latch-up effects; strained channel PMOS transistors need to select epitaxial growth of SiGe heterojunctions in the source and drain regions to improve hole mobility.
[0004] Epitaxial substrates have better silicon wafer surface quality than polished wafers. During the growth of single crystals, vacancy defects gather to form tiny octahedrons, which form etch pits called COPs during the polishing and cleaning process. Since the epitaxial layer has low oxygen content and will not produce SiOx deposition, such small etch pits can be covered by appropriate epitaxial processes, thereby preparing gate oxide layers with excellent performance. Since the mid-1990s, epitaxial wafers have increasingly replaced traditional polished wafers.
[0005] During epitaxial growth of a wafer, the edge has a higher growth rate due to the crystal orientation. When growing epitaxy using the CVD method, the growth rate along the (100) crystal orientation is greater than the growth rate along the (111) crystal orientation, and the growth rate along the (110) crystal orientation is greater than the growth rate along the (100) crystal orientation. This often causes the thickness of the wafer edge to be higher than the center, forming an epitaxial crown. This phenomenon is more prominent in thick epitaxy, and because the edge growth rate is too fast, extrusion stress can be formed, causing edge defects to extend rapidly inward. Summary of the invention
[0006] The object of the present invention is to provide a substrate processing method for improving the problem of anisotropic edge profile after epitaxy. The method can be used to prepare an epitaxial substrate without an epitaxial crown.
[0007] To achieve the above object, the present invention adopts the following technical solutions: A substrate processing method for improving the problem of anisotropic edge profile after epitaxy comprises the following steps: S1: Perform rough chamfering and fine chamfering on the silicon wafer in sequence to complete the forming process of the edge chamfer surface; S2: chemically corrode the chamfered silicon wafer to remove the edge mechanical damage layer; S3: performing crystal orientation edge processing on the etched silicon wafer, and performing local shaping on the (110) crystal orientation of the chamfered edges of the silicon wafers with (100) and (111) crystal orientations; S4: polishing the edge of the silicon wafer after the crystal stabilization process.
[0008] Optionally, in step S1, the rough chamfering is performed twice using a chamfering wheel of No. 800-1000 to achieve rapid forming of the edge chamfered surface; the fine chamfering is performed twice using a chamfering wheel of No. 1500-4000 to achieve fine finishing of the chamfered surface.
[0009] Optionally, in step S2, chemical etching is performed using a ternary mixed acid consisting of nitric acid, hydrofluoric acid, and acetic acid, and the etching removal amount is preferably controlled within 30 μm.
[0010] Optionally, in step S3, laser, mechanical polishing or mask etching is used to perform subtractive processing on the edge of the (100) and (111) crystal orientation chamfered surfaces of the silicon wafer. Specific subtractive processing techniques may include laser ablation subtractive technology, mask etching subtractive technology, local fine grinding subtractive technology, etc.
[0011] Preferably, in step S3, the edge of the (110) crystal direction on the positioning chamfered surface of the (100) and (111) crystal orientation silicon wafer is subjected to subtractive processing, so that the surface roughness Ra at that location is reduced to less than 0.2 μm, and / or the etching depth relative to the chamfered surface at that location is between 1 and 50 μm. The etching depth relative to the chamfered surface refers to the etching depth relative to the chamfered surface after the fine chamfering forming process.
[0012] Preferably, in step S3, the positioning processing range for the (100) and (111) crystal orientation silicon wafers is the (110) crystal orientation direction of the chamfered surface of the substrate, from the edge of the chamfered surface to an extrapolated 20°.
[0013] Optionally, in step S4, polyurethane is used to polish the edge of the silicon wafer after the crystal orientation edge treatment.
[0014] The advantages of the present invention are: The present invention firstly performs two-step chamfering on the edge of the silicon wafer, so that the chamfered surface of the substrate edge is quickly formed, and after the edge damage layer is removed by etching, the chamfered surface is processed to fix the crystal orientation of the edge of the silicon wafer, and then the edge of the entire chamfered surface is polished. In the crystal orientation of the chamfered surface (110), on the one hand, the mechanical damage of the chamfered surface disappears, and secondly, the area here is etched to a certain depth, so that during the growth of the epitaxial layer on the substrate surface, the accumulated thickness of the (110) position where the chamfered surface grows fastest is consistent with the accumulated thickness of the polishing plane, so that the center and edge thickness of the epitaxial layer are consistent, and the anisotropic edge profile problem after epitaxy is improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 The present invention is a flow chart of the substrate processing method.
[0016] Figure 2 Schematic cross-sectional view of a silicon wafer substrate with a (100) crystal orientation in an embodiment.
[0017] Figure 3 Comparison of electron microscope images of chamfered surfaces with and without edge treatment for crystal orientation. DETAILED DESCRIPTION
[0018] The present invention will be further described below in conjunction with the accompanying drawings and embodiments, but this does not limit the protection scope of the present invention.
[0019] The present invention provides a substrate processing method for improving the problem of anisotropic edge profile after epitaxy, comprising the following steps: S1: The silicon wafer is subjected to rough chamfering and fine chamfering in sequence. The rough chamfering is performed twice using a chamfering wheel of No. 800-1000 to achieve rapid forming of the edge chamfered surface; the fine chamfering is performed twice using a chamfering wheel of No. 1500-4000 to achieve fine finishing of the chamfered surface and complete the forming process of the edge chamfered surface.
[0020] S2: Use a ternary mixed acid consisting of nitric acid, hydrofluoric acid, and acetic acid to chemically etch the chamfered silicon wafer to remove the edge mechanical damage layer.
[0021] S3: performing crystal orientation edge processing on the etched silicon wafer, and performing local shaping on the (110) crystal orientation of the chamfered edges of the silicon wafers with (100) and (111) crystal orientations; S4: using polyurethane to polish the edge of the silicon wafer after the crystal orientation edge treatment.
[0022] In step S3, the edge of the (100) and (111) crystal orientation silicon wafer positioning chamfer surface in the (110) crystal orientation is subjected to subtractive processing by laser, mechanical polishing or mask etching. The surface roughness Ra at this location is reduced to less than 0.2 μm, and / or the etching depth at this location relative to the chamfer surface after fine chamfering is between 1 and 50 μm. The positioning processing range of the (100) and (111) crystal orientation silicon wafer is the (110) crystal orientation direction of the substrate chamfer surface, from the edge of the chamfer surface to an extrapolated 20°.
[0023] The present invention uses two steps of rough chamfering and fine chamfering in the chamfering process; in the fixed crystal orientation chamfering surface processing process, the (110) crystal orientation of the chamfered edges of the silicon wafers with (100) and (111) crystal orientations are locally shaped; in the chemical etching process, the edge mechanical damage layer is removed by mixed acid etching, and the chamfered surface is polished by the edge polishing process, so that the problem of anisotropic edge profile of the substrate during epitaxial growth is improved. Example
[0024] The (100) crystal orientation substrate obtained after slicing the silicon single crystal is chamfered using a W-GM-4200E chamfering machine. The No. 1000 chamfering wheel is used twice, and then the No. 4000 chamfering wheel is used twice to achieve the forming processing of the chamfered surface of the substrate edge. The chamfered substrate is then placed in a ternary mixed acid composed of nitric acid, hydrofluoric acid, and acetic acid for etching. The removal amount is controlled within 30μm, and the crystal orientation of the substrate is fixed after etching.
[0025] like Figure 2 As shown, the (110) crystal direction of the chamfered surface of the substrate is etched from the edge of the chamfered surface to an extrapolated 20° using a laser, and the edge of the substrate after the chamfered surface is polished using polyurethane to make the edge appear mirror-like. The surface roughness Ra is between 0.1-0.3nm, and the etching depth is about 30μm.
[0026] Figure 3 The electron microscope images of the chamfered surface with and without the crystal orientation edge treatment are compared. It can be clearly seen from the image that compared with the unetched non-(110) crystal orientation chamfered surface, the surface of the chamfered surface with the crystal orientation edge treatment is smooth and the chamfering wheel marks disappear.
[0027] After being processed by the processing method of the present invention, in the crystal direction of the chamfered surface (110), the mechanical damage of the chamfered surface disappears and the area here is etched to a certain depth, so that during the growth of the epitaxial layer on the substrate surface, the growth rate of the epitaxial layer on the etched surface will be significantly slower than that of the chamfered surface that has not been etched, and the accumulated thickness at the (110) position where the growth rate of the chamfered surface is the fastest is consistent with the accumulated thickness of the polished plane, so that the thickness of the center and edge of the epitaxial layer is consistent, thereby improving the problem of anisotropic edge profile after epitaxy.
Claims
1. A substrate processing method for improving the problem of anisotropic edge profile after epitaxy, characterized in that: The following steps are involved: S1: Perform rough chamfering and fine chamfering on the silicon wafer in sequence to complete the forming process of the edge chamfering surface; S2: chemically corrode the chamfered silicon wafer to remove the edge mechanical damage layer; S3: performing crystal orientation edge processing on the etched silicon wafer, and performing local shaping on the (110) crystal orientation of the chamfered edges of the silicon wafers with (100) and (111) crystal orientations; S4: polishing the edge of the silicon wafer after the crystal stabilization process.
2. The substrate processing method according to claim 1, characterized in that: In step S1, the rough chamfering is performed twice using a chamfering wheel of No. 800-1000 to achieve rapid forming of the edge chamfered surface; the fine chamfering is performed twice using a chamfering wheel of No. 1500-4000 to achieve fine finishing of the chamfered surface.
3. The substrate processing method according to claim 1, characterized in that: In step S2, chemical etching is performed using a ternary mixed acid consisting of nitric acid, hydrofluoric acid, and acetic acid, and the etching removal amount is controlled within 30 μm.
4. The substrate processing method according to claim 1, characterized in that: In step S3, laser, mechanical polishing or mask etching is used to perform subtractive processing on the edges of the (100) and (111) crystal orientation chamfered surfaces of the silicon wafer.
5. The substrate processing method according to claim 4, characterized in that: The subtractive processing is laser burning, mask etching or local fine grinding.
6. The substrate processing method according to claim 4, characterized in that: After subtractive processing, the surface roughness Ra of the edge in the (110) crystal direction is reduced to below 0.2 μm.
7. The substrate processing method according to claim 4 or 6, characterized in that: After subtractive machining, the etching depth of the edge in the (110) crystal direction relative to the chamfered surface is between 1 and 50 μm.
8. The substrate processing method according to claim 1, characterized in that: In step S3, the positioning processing range of the (100) and (111) crystal orientation silicon wafers is the (110) crystal orientation direction of the chamfered surface of the substrate, from the edge of the chamfered surface to an angle of 20°.
9. The substrate processing method for improving the anisotropic edge profile problem after epitaxy according to claim 1, characterized in that: In step S4, polyurethane is used to polish the edge of the silicon wafer after the crystal orientation edge treatment.