Quantitative characterization method of residual stress and bonding stress amplification structure thereof

Abstract

The application discloses a kind of quantitative characterization method of residual stress and its bonding stress amplification structure, it is related to packaging technical field, comprising the following steps: S1, stripping the blue film on the surface of bare silicon wafer;S2, the bare silicon wafer treated in S1 is characterized by the selected area measurement of Raman spectrum;S3, the bare silicon wafer treated in S1 is adsorbed on the point glue table by air pressure, and the adhesive is used according to the compact hui character pattern to glue, and the glue layer thickness is improved;S4, after gluing, the adhesive layer is formed on the bare silicon wafer, and the adhesive layer and the bonding substrate are solidified to obtain the bonding stress amplification structure;S5, the bare silicon wafer of bonding stress amplification structure is characterized by the selected area measurement of Raman spectrum;S6, the Raman spectrum frequency shift value is obtained Δw , and then the residual stress value suffered by the bare silicon wafer is calculated 。 The application effectively solves the problem that conventional chip is difficult to be accurately characterized by Raman spectrum due to size and stress level limitation.

Description

TECHNICAL FIELD

[0001] The present application relates to the packaging technology field of military ceramic packaging and metal packaging, and particularly relates to a residual stress quantitative characterization method and a bonding stress amplification structure thereof. BACKGROUND

[0002] The digital reference voltage source is an extremely important component of contemporary analog integrated circuits, which provides reference voltage for series type voltage stabilizing circuit, A / D and D / A converter, and is also the voltage stabilizing power supply or excitation source of most sensors. With the high resolution demand of new generation strategic weapons, radars, electronic warfare and other equipment, the high-precision A / D and D / A are widely used in the next generation of equipment, and the demand for such devices will be larger and larger.

[0003] As the initial reference point of the precision of high-precision analog signal processing system, the reference voltage source needs to keep stable voltage when the load current, temperature and time change. However, in the development process of such integrated circuit products, it is found that the selection of different adhesives in the die bonding process will lead to large differences in the measured output voltage variation of the device. It is analyzed and speculated that the main reason is that the different properties of the adhesives cause different stresses at the bonding interface after curing, thereby causing differences in the deformation of the silicon chip, which is finally reflected in the differences in the measured output voltage variation of the device. Such stress generated at the bonding interface after curing is usually called bonding residual stress, which is the result of thermal mismatch between the chip, the adhesive and the substrate. It is essentially the volume shrinkage when the adhesive changes from a small molecule state to a cross-linked macromolecule during curing and cooling from the curing temperature to room temperature, and it usually causes the inward warping of the chip from the four corners. Therefore, it is very important to quantitatively characterize the residual stress of different adhesives under different interface environments for the development of packaging technology of reference voltage source and other types of products. However, at present, the industry has not involved the quantitative information of residual stress in the performance consideration of the adhesive for die bonding in the field of semiconductor integrated circuits, and it is impossible to quantitatively compare the differences in residual stress of different adhesive systems, different adhesive materials and different curing processes.

[0004] Raman spectroscopy is a characterization method with high resolution, non-destructive measurement and fast measurement speed, and is often used in material stress measurement. This method is based on the principle that Raman spectrum can be affected by the internal residual stress of the material, which is manifested as the frequency shift of the spectrum of the light incident into the measured sample. Then the quantitative data of the residual stress at the specific position of the material can be obtained through theoretical calculation. When this method is applied to the microelectronic field, due to the small size of the chip, it is difficult for the internal residual stress to cause obvious material deformation, which leads to the problem that it is difficult to capture the deformation through the frequency shift of Raman spectrum.

[0005] Therefore, a residual stress quantification method and a bonding stress amplification structure thereof are provided. SUMMARY

[0006] The present application aims to provide a residual stress quantification method and a bonding stress amplification structure thereof, which avoids the influence of factors such as the small size of the chip, the non-single surface material, and the small amount of chip deformation caused by residual stress in the conventional integrated circuit on the residual stress characterization, so as to overcome the deficiency of the prior art that the residual stress of the chip bonding is difficult to accurately characterize.

[0007] In order to achieve the above-mentioned purpose, the present application provides a residual stress quantification method, comprising the following steps:

[0008] S1, stripping the blue film on the surface of the bare silicon wafer;

[0009] S2, the characteristic Raman spectrum of the material can be affected by the internal residual stress of the material, which is manifested as the shift of the spectrum of the light incident into the measured sample in terms of frequency, so that the residual stress value at a specific position can be obtained through the selected area measurement of the material; the bare silicon wafer treated by S1 is characterized through the selected area measurement of the Raman spectrum;

[0010] S3, taking the bare silicon wafer treated by S1 as a substrate, adsorbing it on the point glue table through air pressure, using adhesive to point glue according to the compact Hui character-shaped pattern, and increasing the thickness of the glue layer;

[0011] S4, after the point glue is completed, the adhesive layer is formed on the bare silicon wafer, and the adhesive substrate is pressed on the adhesive layer and then solidified to obtain the bonding stress amplification structure;

[0012] S5, the bare silicon wafer of the bonding stress amplification structure is characterized through the selected area measurement of the Raman spectrum, and the peak value of the Raman spectrum curve obtained by testing the bare silicon wafer after bonding is recorded;

[0013] S6, the peak value of the Raman spectrum curve obtained in S5 is subtracted from the peak value of the Raman spectrum curve obtained in S2 to obtain the Raman spectrum frequency shift value Δw According to the obtained Raman spectrum frequency shift value Δw , the residual stress value of the bare silicon wafer is calculated.

[0014] Further, the residual stress value calculation formula is:

[0015] σ =-435 Δw ;

[0016] Wherein σ is the residual stress value, Δw is the Raman spectrum frequency shift value; according to the formula, three Raman spectrum frequency shift values of the points can be obtained in S6 ΔwFurther, the residual stress values of the three points are obtained σ .

[0017] Further, the specific steps of S3 are as follows: placing four steel balls with a diameter of 0.5 mm at four corners of the dispensing area; increasing the dispensing height and reducing the scribing speed.

[0018] Further, in S3, the dispensing area is set to be 500 mu m away from the edge of the bare silicon wafer, and the dispensing area is set to be 500 mu m away from the edge of the bare silicon wafer to prevent the overflow of the adhesive on the side of the chip and affect the stress distribution of the bare silicon wafer.

[0019] Further, the adhesive needs to be taken out from an environment of-40 DEG C before use, and is placed at room temperature for 30 minutes.

[0020] Further, the thickness of the bare silicon wafer is 50 mu m, so that the toughness of the bare silicon wafer is increased as much as possible, and the bare silicon wafer is more conducive to deformation when subjected to the residual stress of the adhesive.

[0021] Further, in S3, the adhesive substrate is a glass with sapphire material; the main purposes are as follows: one is to ensure the flatness of the adhesive layer and the consistency of the adhesive layer thickness, to avoid abnormal deformation of the surface of the bare silicon wafer due to the uneven interface of the adhesive layer, thereby affecting the test result; and the other is to make the adhesive effect of the structure have visibility, that is, after the adhesion is completed, the adhesive cavity rate can be directly observed through the bottom side of the adhesive substrate. The adhesive is consistent with the mature epoxy adhesive product commonly used in single-chip integrated circuit packaging, so as to ensure that the test result has effective guiding significance for actual production.

[0022] In another aspect, the present application also provides an adhesive stress amplification structure, comprising an adhesive substrate, wherein an adhesive layer is arranged on the adhesive substrate, and a material to be adhered is arranged on the adhesive layer, and the material to be adhered is a bare silicon wafer.

[0023] Further, the thickness of the bare silicon wafer is 1 / 4 of the conventional chip thickness, and the size of the bare silicon wafer is 2-3 times of the conventional chip size.

[0024] Further, the adhesive is an epoxy adhesive.

[0025] Compared with the prior art, the present application has the following beneficial technical effects:

[0026] The application provides a quantitative characterization method of residual stress, in order to overcome the limitation of traditional characterization means in chip-level residual stress measurement, especially for those microchips which are difficult to be effectively characterized by conventional methods (such as Raman spectrum) due to the complex surface material composition, small size and relatively weak adhesive residual stress, the application ingeniously uses a large-size thinned bare silicon wafer as a substitute for the material to be bonded, realizes the proportional magnification effect of the chip-level adhesive residual stress by bonding the large-size thinned bare silicon wafer with the adhesive commonly used in online products, and realizes the proportional magnification effect of the chip-level adhesive residual stress by using the large-size characteristics of the bare silicon wafer. This strategy not only significantly improves the detection sensitivity of residual stress, but also makes the weak stress signal originally difficult to capture clearly appear, thereby effectively solving the problem that the conventional chip is difficult to be accurately characterized by Raman spectrum due to the size and stress level limitation.

[0027] The method also fully considers various variables in the bonding process, accurately controls the selection of the adhesive and the thickness of the bonding layer, ensures the uniformity of the bonding quality and the residual stress distribution, and further improves the accuracy and reliability of the characterization results.

[0028] The quantitative characterization method of residual stress provided by the application can be applied to the consideration and evaluation of various adhesives in terms of residual stress, and is helpful to guide the optimization of the curing temperature curve of various adhesives, effectively guide the selection of adhesives in the packaging process of related products, and has guiding significance for the development of packaging process of residual stress sensitive integrated circuit products (such as reference voltage source devices, high-precision MEMS devices, etc.). It is also helpful to evaluate and optimize the process technology capability of electronic packaging process, provides meaningful theoretical basis support for the quantitative characterization of electronic packaging reliability, and can also provide important theoretical support for in-depth understanding of the bonding mechanism and the circuit failure mechanism.

[0029] The application provides a bonding stress amplification structure, restores the assembly structure related to the die bonding process in the microelectronic field, and effectively amplifies the residual stress value generated by the bonding in a proportional manner, and improves the measurability of the residual stress. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 It is a flowchart of the quantitative characterization method of residual stress in the embodiment of the application.

[0031] Figure 2 It is a comparison diagram of the die bonding process optimization effect of the quantitative characterization method of residual stress in the embodiment of the application.

[0032] Figure 3 It is a schematic diagram of the adhesive layer thickness consistency processing of the quantitative characterization method of residual stress in the embodiment of the application.

[0033] Figure 4A schematic diagram of test site information of a bare silicon wafer before bonding for a residual stress quantitative characterization method in an embodiment of the present application.

[0034] Figure 5 A schematic diagram of test site information of a bare silicon wafer after bonding for a residual stress quantitative characterization method in an embodiment of the present application.

[0035] Figure 6 A schematic diagram of a bonding stress amplification structure in an embodiment of the present application.

[0036] In the figure, 1 is a bonding substrate; 2 is an adhesive layer; 3 is a bare silicon wafer; and 4 is a steel ball. DETAILED DESCRIPTION

[0037] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme in the embodiment of the present application will be described clearly and completely in combination with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, not all. Based on the embodiment in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present application.

[0038] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0039] Embodiment 1

[0040] Referring to Figure 1 A residual stress quantitative characterization method, based on the fact that the bonding residual stress is affected by the size, thickness of the material to be bonded, and the inherent properties of the adhesive, the thickness of the bonding layer and the curing curve and other factors, therefore, a pre-processed large-size sapphire glass is used as a bonding substrate 1, a large-size thinned bare silicon wafer 3 is used as a material to be bonded, and an adhesive commonly used in online products is used to bond it to realize the proportional amplification of the chip-level bonding residual stress. The specific steps are as follows:

[0041] S1, stripping the blue film on the surface of the bare silicon wafer 3, and the size of the bare silicon wafer 3 is 2-3 times the size of the conventional chip, and the thickness of the bare silicon wafer 3 is 1 / 4 of the thickness of the conventional chip, and the thickness of the bare silicon wafer 3 is 50 μm, so as to increase the toughness of the bare silicon wafer as much as possible, and to facilitate the deformation of the bare silicon wafer under the residual stress of the adhesive, because according to the mathematical relationship of the adhesive residual stress, the size of the adhesive layer is proportional to the size of the chip (the bonding area). Therefore, the size of the bare silicon wafer is expanded to 2-3 times the size of the conventional chip.

[0042] S2, the bare silicon wafer 3 treated in S1 is characterized by selected area measurement of Raman spectrum, and the peak values of the Raman spectrum curves of the three test points obtained by testing the bare silicon wafer 3 are consistent, and the peak values of the Raman spectrum curves obtained are recorded as w j0 ;

[0043] S3, the bare silicon wafer 3 treated in S1 is used as a substrate, and is adsorbed on the dispensing table by air pressure, and the adhesive is dispensed according to a compact Hanzhong pattern, and the thickness of the adhesive layer is increased.

[0044] S4, after dispensing, the adhesive layer 2 is formed on the bare silicon wafer 3, and the adhesive substrate 1 is pressed on the adhesive layer 2 to obtain the adhesive stress amplification structure. In order to ensure the flatness of the adhesive layer 2 and the consistency of the thickness of the adhesive layer, and to avoid abnormal deformation of the surface of the bare silicon wafer 3 caused by the unevenness of the adhesive layer 2, thereby affecting the test results, the adhesive substrate 1 is made of sapphire glass; and the sapphire glass can make the bonding effect have visibility, that is, after the bonding is completed, the bonding void rate of the adhesive can be directly observed through the bottom side of the adhesive substrate 1.

[0045] S5, the bare silicon wafer 3 of the adhesive stress amplification structure is characterized by selected area measurement of Raman spectrum, and the peak values of the Raman spectrum of the three test points obtained by testing the bare silicon wafer 3 after bonding are recorded as w jA 、 w jB 、 w jC ;

[0046] S6, the Raman spectrum frequency shift values of the three test points are obtained by w j(A,B,C) - w j0 Δw , according to formula (1):

[0047] σ =-435 Δw ; (1)

[0048] ​The residual stress value of the S3 processed bare silicon wafer 3 is calculated σ

[0049] The residual stress value of the S3 processed bare silicon wafer 3 is calculated

[0050] Δw = -0.0022σ The residual stress value of the S3 processed bare silicon wafer 3 is calculated

[0051] The residual stress value of the S3 processed bare silicon wafer 3 is calculated σ .

[0052] Based on the testing mechanism and conditions of the Raman spectrum, there are mainly two testing methods of point scanning and area scanning on the market, wherein the point scanning is used for detecting the Raman spectrum curve of a certain area of the material. Based on the finite element simulation of the chip bonding residual stress, it is known that the bonding residual stress transmitted to the chip is usually the largest at the four corners, and the stress is the smallest at the position closer to the center of the bare silicon wafer. Therefore, for the characterization of the residual stress with uneven distribution on the surface of the bare silicon wafer, the point scanning is more suitable. The experimental result of the Raman spectrum method is a series of spectrum graphs, and the frequency shift of the Raman wave peak can be obtained by analysis. If the Raman wave number is wj0 (j=l, 2, 3) without strain, and the Raman wave number is wj with strain, then the frequency shift Δwj of the Raman wave peak can be calculated by the following formula:

[0053] ;

[0054] For the mechanical analysis of the silicon chip material in the microelectronic field, it is necessary to establish the relationship between the frequency shift data of the Raman wave and the stress / strain in the silicon material in the Raman spectrum test, so it is necessary to solve the characteristic value λj of the Secular equation through dynamics. Through reference, silicon is a diamond-like material, and it is assumed that the sample is in a uniaxial stress state along a single direction. According to Hooke's law σ ε 11 S 11 σ , ε 22 ε 33 S 12 σ S ij represents the elastic compliance tensor of silicon), and the following formula is obtained:

[0055] ;

[0056] For the silicon chip material, through reference, the phonon deformation voltage of silicon is p =-1.85w0 2 ,​​​​​q = -2.31 w0 2 , the elastic compliance tensor of silicon S 11 =7.68×10 -12 Pa -1 , S 12 =2.14×10 -12 Pa -1 , we can get the following formula by substituting it into the above formula:

[0057] σ =-435 Δw (1) or Δw = -0.0022σ ; (2);

[0058] The direction of the force acting on the silicon chip can also be obtained through test and calculation results: when the Raman frequency shift is positive, it corresponds to compressive stress, and vice versa, it corresponds to tensile stress.

[0059] The adhesive used was consistent with established epoxy adhesives commonly used in monolithic integrated circuit packaging to ensure that the test results provide effective guidance for actual production. Bare silicon wafer 3 was chosen as the bonding material primarily to ensure it meets Raman spectroscopy testing requirements while remaining consistent with the actual chip's primary material.

[0060] In a preferred embodiment of the present invention, the purchased bare wafer is first thinned to 50μm thickness using a thinning dicing machine. The dicing size needs to take into account the size of the purchased glass substrate (29×29mm) and the glue dispensing and glue overflow width around the chip after bonding (1-2mm) of the automatic die bonding machine. Therefore, the dicing size of the bare silicon wafer is selected to be 25×25mm.

[0061] Because the bare silicon wafer 3 is thin and large, it cannot be removed by an automatic wafer picker. It is necessary to use pointed tweezers to slowly lift the corner from the blue film and then slowly peel off the blue film with tweezers; the bare silicon wafer before bonding is characterized by selected area measurement of Raman spectroscopy. Three test points need to be selected for the test. The specific locations are as follows Figure 4 As shown in the figure, the peak values ​​of the Raman spectrum curves of the three test points (A, B, C) of the bare silicon wafer 3 are as follows: w j0 The peak value of the obtained Raman spectrum curve is recorded as w j0 ;

[0062] The adhesive is taken out from the environment of -40℃, and is placed at room temperature for 30 min, and then is installed on the dispensing machine to start the die bonding work. Because the bare silicon wafer is large in size and good in toughness, if the conventional die bonding sequence is used, i.e. dispensing glue on the substrate, and then sucking and pressing the chip on the glue layer, a significant depression will be generated at the contact position between the bare silicon wafer 3 and the suction nozzle after the glue is cured (see Figure 2 ). Therefore, the dispensing sequence is changed, the bare silicon wafer is used as the substrate, the treated bare silicon wafer 3 is adsorbed on the dispensing table by air pressure, and then dispensing is performed according to the compact Hui-zi-shaped pattern. Moreover, because the thickness of the bare silicon wafer 3 is only 50 μm, in order to prevent the glue overflow on the side of the chip and affect the stress distribution of the bare silicon wafer 3, the dispensing area is set to be 500 μm away from the edge of the bare silicon wafer 3. In order to improve the glue layer thickness as much as possible under the premise of ensuring the consistency of the glue layer thickness, four steel balls 4 with a diameter of 0.3 mm are placed at the four corners of the dispensing area (see Figure 3 ), the dispensing height is appropriately increased, and the scribe speed is appropriately reduced. After dispensing is completed, the glass substrate is picked up and pressed on the glue layer by the mechanical arm, and the suction nozzle needs to be appropriately increased in the pressing dwell time to make the glue fully flow. The bonded sample is placed in a high-temperature oven for curing process, and the stress amplification structure is completed.

[0063] The bonded bare silicon wafer is characterized by selected area measurement of Raman spectrum. Three test points need to be selected, and the specific positions are shown in Figure 5 . The Raman spectrum peak value of the bonded bare silicon wafer is recorded as w jA , w jB , w jC . The Raman spectrum frequency shift value of the three test points can be obtained by w j(A,B,C) w j0 . According to the above formula (1), the corresponding residual stress value and direction can be obtained by calculation.

[0064] The principle of Raman spectrum method is that the characteristic Raman spectrum of a material can be affected by the internal residual stress of the material, which is manifested as the frequency shift of the spectrum of the light incident on the measured sample, so that the residual stress value at a specific position can be obtained by selected area measurement of the material.

[0065] Example 2

[0066] Referring to Figure 6 ​The application also provides a bonding stress amplification structure, comprising a bonding substrate 1, an adhesive layer 2 arranged on the bonding substrate 1, and a material to be bonded arranged on the adhesive layer 2, wherein the material to be bonded is a bare silicon wafer 3. The thickness of the bare silicon wafer 3 is 1 / 4 of the thickness of a conventional chip, the size of the bare silicon wafer 3 is 2-3 times of the size of a conventional chip, and the adhesive is an epoxy adhesive. The bonding residual stress is affected by the size and thickness of the material to be bonded, the inherent properties of the adhesive, the thickness of the adhesive layer and the curing curve and other factors. Therefore, a pre-processed large-size sapphire glass light window is used as the bonding substrate 1, a large-size thinned bare silicon wafer 3 is used as the material to be bonded, and an adhesive commonly used in online products is used for bonding, so that the chip-level bonding residual stress is amplified in proportion, and the problem that the conventional chip is difficult to perform Raman spectrum characterization due to the complex surface material composition, small size and small bonding residual stress is effectively solved. The chip-level bonding residual stress amplification structure simulates the bonding structure of a chip, the structure is detected by Raman spectrum method, and then the accurate value of the bonding residual stress is calculated by using the mathematical relationship between the Raman spectrum frequency shift value before and after the material is bonded and the stress / strain in the material. The problem that the chip bonding residual stress is difficult to accurately characterize is effectively solved.

[0067] The key to the bonding stress amplification structure to achieve the residual stress amplification effect lies in the following three points: 1. Compared with the ceramic and metal material substrates commonly used in the microelectronic field, the wettability of the glass substrate and the glue is poorer, so that the horizontal shrinkage of the glue during curing is more favorable, and the bonding residual stress generated is also larger; 2. The thickness of the bare silicon wafer is thinned to about 1 / 4 of the thickness of a conventional chip, i.e. 50 μm, so as to increase the toughness of the bare silicon wafer as much as possible, which is more favorable to the deformation of the bare silicon wafer when it is subjected to the residual stress of the adhesive; 3. According to the mathematical relationship of the bonding residual stress, the bonding residual stress is proportional to the size of the glue layer and the size of the chip (bonding area). Therefore, the size of the bare silicon wafer 3 is expanded to 2-3 times of the size of a conventional chip, i.e. 25 mm x 25 mm, and the thickness of the glue layer is increased as much as possible under the premise of ensuring the consistency of the thickness of the glue layer and the manufacturability by optimizing the gluing process technology.

[0068] The specific embodiments of the application are described above. It should be understood that the application is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essential content of the application. The embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other without conflict.

Claims

1. A quantitative characterization method for residual stress, characterized in that: The following steps are involved: S1, peeling off the blue film on the surface of the bare silicon wafer (3); S2, characterizes the bare silicon wafer (3) processed by S1 through selected area measurement of Raman spectroscopy, and records the peak value of the obtained Raman spectrum curve; S3, adsorbing the bare silicon wafer (3) processed by S1 onto the dispensing table by air pressure, dispensing the adhesive in a compact zigzag pattern, and increasing the thickness of the adhesive layer; S4, after the dispensing is completed, an adhesive layer (2) is formed on the bare silicon wafer (3), and the adhesive substrate (1) is pressed on the adhesive layer (2) and then cured to obtain an adhesive stress amplification structure; S5, characterizing the bare silicon wafer (3) of the bonding stress amplification structure by selectively measuring the Raman spectrum, and recording the peak value of the Raman spectrum curve obtained by testing the bare silicon wafer (3) after bonding; S6, the peak value of the Raman spectrum curve obtained in S5 minus the peak value of the Raman spectrum curve obtained in S2 to obtain the Raman spectrum frequency shift value Δwj , according to the obtained Raman spectrum frequency shift value Δwj The residual stress value of the bare silicon wafer (3) is calculated.

2. The method for quantitative characterization of residual stress according to claim 1, characterized in that: The residual stress value calculation formula is: σ =-435 Δwj ； in σ is the residual stress value, Δwj is the Raman spectrum frequency shift value.

3. The method for quantitative characterization of residual stress according to claim 1, characterized in that: The specific steps of increasing the thickness of the glue layer in S3 are: placing four steel balls (4) with a diameter of 0.5 mm at the four corners of the glue spotting area and then performing glue spotting, and increasing the glue spotting height and reducing the marking speed during the glue spotting process.

4. The method for quantitative characterization of residual stress according to claim 2, wherein: In S3, the dispensing area is set to be 500 μm away from the edge of the bare silicon wafer (3).

5. The method for quantitative characterization of residual stress according to claim 1, characterized in that: The adhesive must be taken out of a -40°C environment and allowed to stand at room temperature for 30 minutes before use.

6. The method for quantitative characterization of residual stress according to claim 1, characterized in that: The size of the bonding substrate (1) is larger than the size of the bare silicon wafer (3).

7. The method for quantitative characterization of residual stress according to claim 1, characterized in that: The bonding substrate (1) in S3 is made of sapphire glass.

8. The bonding stress amplification structure according to any one of claims 1 to 7, characterized in that: It comprises a bonding substrate (1), an adhesive layer (2) is provided on the bonding substrate (1), a material to be bonded is provided on the adhesive layer (2), and the material to be bonded is a bare silicon wafer (3).

9. The bonding stress amplification structure according to claim 8, characterized in that: The thickness of the bare silicon wafer (3) is 1 / 4 of the thickness of a conventional chip, and the size of the bare silicon wafer (3) is 2 to 3 times the size of a conventional chip.

10. The bonding stress amplification structure according to claim 8, characterized in that: The adhesive is an epoxy adhesive.

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