Hybrid photoelectric integrated chip, manufacturing method and laser chip

Abstract

The invention discloses a hybrid photoelectric integrated chip, a manufacturing method and a laser chip, and belongs to the technical field of semiconductors. The hybrid photoelectric integrated chip comprises a laser chip and an optical transmission module, two grooves are formed in the upper surface of an epitaxial structure of the laser chip, a ridge waveguide is formed between the two grooves, a first alignment mark is further arranged on the upper surface of the epitaxial structure, and the first alignment mark is of a groove structure; the optical transmission module comprises a substrate and a waveguide arranged on the substrate, and the substrate is further provided with a second alignment mark; the laser chip enables the light emitting end face to be aligned and coupled with the input end face of the waveguide through the alignment of the first alignment mark and the second alignment mark, thereby improving the alignment coupling precision and coupling efficiency of an automatic equipment operation laser and the waveguide, and reducing the optical loss from the laser to the waveguide.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductors, and in particular relates to a hybrid optoelectronic integrated chip and a manufacturing method thereof, as well as a laser chip. Background Art

[0002] In the integration of lasers, due to the different material properties, the alignment and assembly process of multiple components of hybrid integration is very complicated. For example, silicon-based hybrid optoelectronic integrated chips, which integrate lasers based on III-V materials such as InP and GaAs with silicon-based waveguide devices on one chip, can achieve high performance while reducing device costs. It is one of the most practical technical routes in the silicon photonics industry and is widely used in high-speed silicon photonics modules in data centers and high-performance silicon photonics modulated FMCW (frequency modulated continuous wave) laser radar modules.

[0003] Among them, how to effectively couple the light of a single-mode laser to a silicon-based waveguide is currently a major issue. In the early days, it was often necessary to actively align the light and adjust the silicon waveguide to maximize the light receiving power to achieve alignment coupling. This method is not only complex in process, but also time-consuming. As the application market for silicon-based hybrid integration gradually expands, in order to simplify the process, an automatic placement machine equipped with a high-precision camera is chosen to achieve the purpose of alignment coupling. Alignment through alignment marks is a common method. In the prior art, alignment marks are formed on the surface of the device by metal deposition. Due to the position offset of the metal layer mask exposure evaporation process itself and the wide distribution range of the metal deposition thickness, there is a large risk of deviation in both the horizontal and vertical directions. Therefore, the current relative position uncertainty between the laser mark position and the waveguide position seriously affects the coupling accuracy and coupling efficiency of the automatic placement machine. Summary of the invention

[0004] The object of the present invention is to provide a hybrid optoelectronic integrated chip and a manufacturing method thereof as well as a laser chip to reduce the optical loss from the laser to the waveguide.

[0005] In order to achieve the above purpose, the technical solution of the present invention is:

[0006] A hybrid optoelectronic integrated chip comprises a laser chip and an optical transmission module; the laser chip comprises an epitaxial structure, the upper surface of the epitaxial structure has two grooves, a ridge waveguide is formed between the two grooves, the upper surface of the epitaxial structure also has a first alignment mark, the first alignment mark is a groove structure; the optical transmission module comprises a substrate and a waveguide arranged on the substrate, the substrate is also provided with a second alignment mark; the laser chip aligns and couples a light emitting end face with an input end face of the waveguide by aligning the first alignment mark with the second alignment mark.

[0007] Optionally, the groove structure of the first alignment mark is formed synchronously with the groove.

[0008] Optionally, a passivation layer and a first metal electrode layer are sequentially provided on the upper surface of the epitaxial structure, the passivation layer is provided with an opening on the ridge waveguide, and the first metal electrode layer is in contact with the ridge waveguide through the opening; the first metal electrode layer does not cover the first alignment mark.

[0009] Optionally, the distance between the first alignment mark and the groove exceeds 10 μm.

[0010] Optionally, the epitaxial structure of the laser chip includes a lower cladding layer, an active area and an upper cladding layer sequentially arranged on a substrate, wherein the upper cladding layer includes an etch stop layer and a waveguide layer arranged on the etch stop layer, and the depth of the groove and recess structure reaches the surface of the etch stop layer.

[0011] Optionally, the ridge waveguide is coaxially arranged with a projection of the waveguide on the surface of the substrate.

[0012] Optionally, the epitaxial structure includes an active region, and a center of the active region in the height direction is flush with a center of the waveguide in the height direction.

[0013] Optionally, a height positioning block is further provided on the substrate, and the laser chip is arranged on the height positioning block; the height of the height positioning block is set so that the vertical height difference between the top surface of the height positioning block and the center of the waveguide in the height direction is equal to the vertical height difference between the lower surface of the laser chip and the center of the active area in the height direction.

[0014] Optionally, a laser setting area located on one side of the input end face of the waveguide is planned on the substrate, and a plurality of the height positioning blocks are arranged at intervals on the laser setting area.

[0015] Optionally, a second metal electrode layer is provided on the back side of the laser chip, and the height positioning block is a metal connection block, and the metal connection block is electrically connected to the second metal electrode layer.

[0016] Optionally, the laser setting area and the waveguide setting area on the substrate have a height difference, and the height adjustment is achieved by setting the surface height difference and the height positioning block to adapt to device structures of different sizes.

[0017] Optionally, at least two first alignment marks are disposed on the upper surface of the epitaxial structure, and the two first alignment marks are located on one side of the ridge waveguide, and a connecting line is parallel to the axis of the ridge waveguide.

[0018] Optionally, two second alignment marks are respectively provided on the substrate at both sides of the waveguide, and a connecting line of the two second alignment marks on the same side is parallel to the axis of the waveguide.

[0019] Optionally, the laser chip is a laser based on III-V compound semiconductor materials, the substrate is a silicon-based substrate, and the waveguide is a silicon waveguide.

[0020] A laser chip comprises an epitaxial structure, wherein the upper surface of the epitaxial structure is provided with two grooves, a ridge waveguide is formed between the two grooves, and the upper surface of the epitaxial structure is also provided with a first alignment mark, wherein the first alignment mark is a groove structure.

[0021] Optionally, the first alignment mark is used for alignment in the integration of the laser chip and the waveguide, and the groove structure is formed synchronously with the trench.

[0022] A method for manufacturing the above hybrid optoelectronic integrated chip comprises:

[0023] Step A: manufacturing a laser chip, wherein a groove and a groove structure are formed on the upper surface of the epitaxial structure of the laser chip by synchronous photolithography and etching, wherein the groove includes two grooves separated by a gap, the gap forms a ridge waveguide, and the groove structure forms a first alignment mark;

[0024] Step B: manufacturing an optical transmission module, wherein the optical transmission module comprises a substrate and a waveguide disposed on the substrate, and a second alignment mark is also disposed on the substrate;

[0025] Step C: Adjust the position of the laser chip by identifying the first alignment mark and the second alignment mark so that the first alignment mark and the second alignment mark satisfy a preset relative position relationship, and fix the lower surface of the laser chip to the optical transmission module so that the light emitting end face of the laser is aligned and coupled with the input end face of the waveguide.

[0026] Optionally, step A comprises:

[0027] 1) Depositing a dielectric layer mask on the upper surface of the epitaxial structure;

[0028] 2) using a mask having a ridge waveguide pattern and a first alignment mark pattern, and patterning the dielectric layer mask through a photolithography process and a first etching process;

[0029] 3) forming a groove corresponding to the ridge waveguide pattern and a groove structure corresponding to the first alignment mark pattern on the upper surface of the epitaxial structure through a second etching process, wherein an etching stop layer is provided in the epitaxial structure, and the etching depth reaches the etching stop layer;

[0030] 4) Removing the dielectric layer mask.

[0031] Optionally, the step A further comprises:

[0032] 5) depositing a passivation layer on the upper surface of the epitaxial structure and opening the passivation layer on the ridge waveguide;

[0033] 6) Forming a first metal electrode layer on the passivation layer, wherein the first metal electrode layer does not cover the first alignment mark.

[0034] Optionally, a height positioning block is further provided on the substrate, and the lower surface of the laser chip is combined and fixed to the height positioning block.

[0035] Optionally, the height positioning block is a metal connection block made using a metal process; the step A also includes making a second metal electrode layer on the back side of the epitaxial structure; in the step C, the second metal electrode layer and the metal connection block are fixed and electrically connected by metal bonding.

[0036] The beneficial effects of the present invention are:

[0037] In the integration of laser chips and optical transmission modules, the laser alignment mark is a groove structure, which can be produced in the same process as the groove used to form the ridge waveguide. It not only ensures the accuracy of the relative position of the alignment mark and the ridge waveguide in the horizontal direction, but also can accurately provide the vertical height information of the laser surface from the active area, ensuring the accuracy of the relative position in the vertical direction, improving the alignment coupling accuracy and coupling efficiency of the laser and waveguide in automatic equipment operation, and reducing the optical loss from the laser to the waveguide.

[0038] Other features and advantages of the present invention will be set forth in the following description, and in part will be apparent from the description, or may be learned by practicing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic top view of the structure of a hybrid optoelectronic integrated chip of an embodiment;

[0040] Figure 2 for Figure 1 Schematic diagram of a partial cross section along the AA direction (i.e., the length direction of the laser cavity);

[0041] Figure 3 is a schematic diagram of the three-dimensional structure of a laser chip of an embodiment;

[0042] Figure 4 is a schematic diagram of a cross section (vertical to the laser cavity length direction) of a laser chip of an embodiment;

[0043] Figure 5 is a process flow chart of preparing the laser chip of the embodiment;

[0044] Figure 6 is a schematic diagram of a top view of the structure of an optical transmission module of an embodiment;

[0045] Figure 7 Schematic diagram of the cross section (perpendicular to the laser cavity length) of a comparative example laser chip. DETAILED DESCRIPTION

[0046] The present invention is further explained below in conjunction with the accompanying drawings and specific embodiments. The various drawings of the present invention are only for illustration to make it easier to understand the present invention, and the specific proportions can be adjusted according to design requirements. The upper and lower relationships of the relative elements and the definitions of the front / back in the figures described in the text should be understood by those skilled in the art to refer to the relative positions of the components, so they can all be flipped to present the same components, which should all fall within the scope disclosed in this specification.

[0047] refer to Figure 1 and Figure 2 , a hybrid optoelectronic integrated chip of an embodiment, which includes a laser chip 1 and an optical transmission module 2. The laser chip 1 and the optical transmission module 2 are made of materials with different properties. The laser chip 1 can be an edge-emitting laser made by compound semiconductor epitaxial technology, and the distributed feedback laser (DFB; Distributed Feedback Laser) of III-V semiconductors is used as an example for explanation below. The surface of the epitaxial structure 11 of the laser chip 1 has a ridge waveguide 12, and the ridge waveguide 12 is formed by arranging two grooves 13 at intervals along the cavity length direction. The surface of the epitaxial structure 11 also has a first alignment mark 14, and the first alignment mark 14 is a groove structure formed synchronously with the groove 13. The optical transmission module 2 is a silicon-based optical transmission module, which includes a silicon-based substrate 21 and a silicon waveguide 22 arranged on the substrate 21. The substrate 21 is also provided with a height positioning block 23 and a second alignment mark 24. The laser chip 1 is arranged on the height positioning block 23, and the light emitting end face 1a is opposite to the input end face 2a of the silicon waveguide 22, and the light emitting end face 1a is aligned and coupled with the input end face 2a by aligning the first alignment mark 14 and the second alignment mark 24. The ridge waveguide 12 and the first alignment mark 14 are formed synchronously, which means that the patterns of the ridge waveguide 12 and the first alignment mark 14 are made on the mask plate, and are formed by the same photolithography and etching, so that the groove structure of the first alignment mark 14 and the groove 13 used to form the ridge waveguide 12 have a clear horizontal position relationship and the same vertical depth, which can ensure the accuracy of alignment coupling.

[0048] The epitaxial structure of a conventional III-V semiconductor DFB is applicable to this embodiment, and Figure 3 and Figure 4The epitaxial structure 11 of the laser chip 1 includes a substrate 111, a lower cladding layer 112, an active area 113 and an upper cladding layer 114 in sequence. Two parallel grooves 13 are formed by etching the upper cladding layer 114, and the interval between the two grooves 13 forms a ridge waveguide 12. In one embodiment, the upper cladding layer 114 includes a grating layer, a waveguide layer, a contact layer and other structures in sequence, or the grating can also be made in the lower cladding layer 112. The etching depth of the groove 13 ends within the upper cladding layer 114, preferably etching to a partial depth of the waveguide layer, which can be limited by setting an etching stop layer 1141. For example, the material of the waveguide layer is InP, and the material of the etching stop layer 1141 is InGaAsP. The first alignment mark 14 is etched synchronously with the groove 13, that is, it has the same depth, and its depth range is 1-2 μm. The first alignment mark 14 can accurately provide the vertical height information of the laser surface from the active area, ensuring the alignment position information in the vertical direction, so as to realize the alignment of the active area 113 and the silicon waveguide 22, and achieve the maximum optical transmission efficiency. Figure 1 , the interval d between the first alignment mark 14 and the groove 13 exceeds 10 μm, and it is preferably located at the surface edge of the laser to avoid affecting the performance of the device. To facilitate grasping and alignment, a pair of first alignment marks 14 can be set, which are located at both ends of the cavity length direction on one side of the ridge waveguide, and the center line is parallel to the axis of the ridge waveguide 12, that is, in the horizontal direction, it has a clear distance relationship and direction indication relationship with the ridge waveguide 12. By identifying this pair of first alignment marks 14, the axis position and direction of the ridge waveguide 12 can be clearly identified. The first alignment mark 14 can be in the shape of a cross, T or L, and the size (diameter of the circumscribed circle of the cross section) is about 10 μm~50 μm. A passivation layer 15 and a first metal electrode layer 16 are provided in sequence on the upper surface of the epitaxial structure 11. The passivation layer 15 is, for example, silicon nitride or silicon oxide, with a thickness of 100-500 nm, which covers the surface of the epitaxial structure 11, including being deposited in the groove structure of the first alignment mark 14, and having an opening 15a on the ridge waveguide 12. The first metal electrode layer 16 contacts the epitaxial structure 11 through the opening 15a. The first metal electrode layer 16 is not deposited in the area where the first alignment mark 14 is located. A second metal electrode layer 17 is provided on the back of the substrate 111. Preferably, the first metal electrode layer 16 is a P electrode, and the second metal electrode layer 17 is an N electrode, then the lower cladding layer 112 and the substrate 111 are N-type materials, and the upper cladding layer 114 is a P-type material.

[0049] When manufacturing the laser chip 1, refer to Figure 5After the epitaxial structure 11 is formed by epitaxial growth process and grating manufacturing process, a dielectric layer mask 3 is deposited on the upper surface of the epitaxial structure 11. The dielectric layer mask 3 is, for example, silicon oxide or silicon nitride. A mask with a ridge waveguide pattern (defined by a groove pattern) and a first alignment mark pattern is used. The pattern of the mask is transferred to the dielectric layer mask 3 through a photolithography process and a first etching process to obtain a patterned dielectric layer mask 3. With the patterned dielectric layer mask 3 as a shield, a second etching process such as dry etching or dry wet etching is used to etch the epitaxial structure 11 to form a groove 13 corresponding to the ridge waveguide pattern and a groove structure corresponding to the first alignment mark pattern, and the etching is carried out to the etching stop layer 1141, and then the dielectric layer mask 3 is removed. Subsequently, the passivation layer 15 is deposited, the cutting path and the electrode window opening process (forming the opening 15a) are performed, the first metal electrode layer 16 is evaporated, the substrate 111 is ground and thinned to a chip thickness of 80-100 μm, and the second metal electrode layer 17 is evaporated on one side of the substrate 111. In addition, the conventional process of coating the two end surfaces of the laser chip 1 is also included, including AR (anti-reflection) film and HR (high reflection) film. When making the mask, the ridge waveguide pattern and the first alignment mark pattern have a clear relative position relationship. The position relationship between the ridge waveguide 12 and the first alignment mark 14 can be maintained through the same mask, photolithography and etching process. At the same time, the first alignment mark 14 can provide vertical height information of the laser surface from the active area 113.

[0050] In the optical transmission module 2, the second alignment mark 24 satisfies the predetermined relative position relationship with the silicon waveguide 22, and the second alignment mark 24 can be made by a known alignment mark manufacturing method, including but not limited to patterned deposition or etching, and its shape includes a cross, T-shape or L-shape, and is preferably the same in shape and size as the first alignment mark 14. Figure 6In one embodiment, two pairs of second alignment marks 24 are provided on the substrate 21, which are respectively located on both sides of the axial direction of the silicon waveguide 22, that is, at the four corners of the periphery. The connecting line of the two second alignment marks 24 on the same side is parallel to the axis of the silicon waveguide 22, so that the position and direction of the axis of the silicon waveguide 22 can be obtained by grabbing the second alignment marks. The height positioning block 23 is located on the laser preset area C on the substrate 21, which is a plurality of spaced columnar structures, and the vertical height difference between the upper surface and the center of the silicon waveguide 22 is the same as the vertical height difference between the lower surface of the laser chip 1 and the center of the active area 113. The center of the silicon waveguide 22 and the center of the active area 113 mentioned here refer to the midpoint of the vertical height on the input end face 2a and the light output end face 1a. The arrangement of the height positioning block 23 can be arbitrarily arranged according to the requirements of the stability of the connection and the connection method, for example, it has a relatively dense arrangement in the ridge waveguide extension area and is set at the four corners to provide strong support. The silicon waveguide 22 can be integrated into the silicon photonic chip 25, and the silicon photonic chip 25 is arranged on the substrate 21. When the height difference between the laser chip 1 and the silicon photonic chip 25 is large, the surface on the substrate 21 for setting the laser chip 1 and the surface for setting the silicon photonic chip 25 have a height difference. For example, a mounting groove 21a is provided on the substrate 21, and the silicon photonic chip 25 is arranged in the mounting groove 21a to adjust the matching height relationship. Therefore, the matching of devices of different sizes can be achieved by setting the height positioning block and the mounting groove, which expands the scope of application. At the same time, the height positioning block can provide a certain elastic space for controlling the height. After reading the height information, it is set to achieve height adjustment within a certain range to ensure accurate alignment in the height direction. Further, in one embodiment, at least part of the height positioning block 23 is a metal or alloy solder ball and serves as an interface for an external circuit. The second metal electrode layer 17 of the laser chip 1 is bonded and electrically connected to the height positioning block 23 by metal bonding to achieve line connection.

[0051] During assembly, an automatic chip mounter with a high-precision camera is used to place one side of the second metal electrode layer 17 of the laser chip 1 on the height positioning block 23, and the first alignment mark 14 and the second alignment mark 24 are respectively identified by automatic or manual image recognition, and the position of the laser is adjusted so that the first alignment mark 14 and the second alignment mark 24 meet the preset relative position relationship, so that the laser chip 1 is aligned with the silicon waveguide 22 in the horizontal direction, and the projection of the ridge waveguide 12 and the silicon waveguide 22 on the surface of the substrate 21 is coaxially arranged. The pressure control provided to the laser chip 1 by the high-precision chip mounter is used to make the lower surface of the laser chip 1 completely contact and combine with the upper surface of the height positioning block 23, for example, by eutectic welding and other methods to achieve fixation and electrical connection, so that in the vertical direction, the active area 113 of the laser and the center of the silicon waveguide 22 are aligned, which improves the alignment coupling accuracy and coupling efficiency of the automatic equipment operation laser and the silicon-based waveguide, and reduces the optical loss from the laser to the silicon-based waveguide.

[0052] In a pair of ratios, the metal alignment mark 18 on the laser chip 1' is prepared by the laser metal layer mask exposure evaporation process, that is, it is prepared simultaneously with the first metal electrode layer 16, such as Figure 7 As shown, other structures refer to the above embodiments. Since the light output position of the laser is defined by the ridge waveguide 12 mask exposure and etching process, the ridge waveguide mask and the metal layer mask are different process layers, there will always be a certain degree of deviation in the horizontal position when the mask is aligned, and the alignment deviation of each wafer is inconsistent due to the uncertainty of the process deviation. As a result, the horizontal position between the metal alignment mark 18 and the laser ridge waveguide 12 will always deviate from the designed relative distance, and this deviation value varies depending on the wafer batch. In addition, in the vertical direction, there is also a deviation between the position of the metal alignment mark 18 and the laser ridge waveguide 12, and the metal deposition thickness has a wide distribution range, resulting in a larger alignment coupling deviation in the vertical direction. Compared with the comparative example, the embodiment effectively improves the alignment coupling accuracy and coupling efficiency by accurately determining the positional relationship.

[0053] The above embodiments are only used to further illustrate a hybrid optoelectronic integrated chip and a manufacturing method and a laser chip of the present invention, but the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention fall within the protection scope of the technical solution of the present invention.

Claims

1. A hybrid optoelectronic integrated chip, characterized in that: It comprises a laser chip and an optical transmission module; the laser chip comprises an epitaxial structure, the upper surface of the epitaxial structure has two grooves, a ridge waveguide is formed between the two grooves, the upper surface of the epitaxial structure also has a first alignment mark, and the first alignment mark is a groove structure; the optical transmission module comprises a substrate and a waveguide arranged on the substrate, and the substrate is also provided with a second alignment mark; the laser chip aligns the light emitting end face with the input end face of the waveguide through the alignment of the first alignment mark and the second alignment mark.

2. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The groove structure of the first alignment mark is formed synchronously with the groove.

3. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: A passivation layer and a first metal electrode layer are sequentially arranged on the upper surface of the epitaxial structure. The passivation layer is provided with an opening on the ridge waveguide. The first metal electrode layer contacts the ridge waveguide through the opening. The first metal electrode layer does not cover the first alignment mark.

4. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The distance between the first alignment mark and the groove is greater than 10 μm.

5. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The epitaxial structure of the laser chip includes a lower cladding layer, an active area and an upper cladding layer sequentially arranged on a substrate, wherein the upper cladding layer includes an etch stop layer and a waveguide layer arranged on the etch stop layer, and the depth of the groove and recess structure reaches the surface of the etch stop layer.

6. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The ridge waveguide is disposed coaxially with a projection of the waveguide on the surface of the substrate.

7. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The epitaxial structure includes an active region, and the center of the active region in the height direction is flush with the center of the waveguide in the height direction.

8. The hybrid optoelectronic integrated chip according to claim 7, characterized in that: The substrate is also provided with a height positioning block, and the laser chip is arranged on the height positioning block; the height of the height positioning block is set so that the vertical height difference between the top surface of the height positioning block and the center of the waveguide in the height direction is equal to the vertical height difference between the lower surface of the laser chip and the center of the active area in the height direction.

9. The hybrid optoelectronic integrated chip according to claim 8, characterized in that: A laser setting area located at one side of the input end face of the waveguide is planned on the substrate, and a plurality of height positioning blocks are arranged at intervals on the laser setting area.

10. The hybrid optoelectronic integrated chip according to claim 8, characterized in that: A second metal electrode layer is disposed on the back side of the laser chip, and the height positioning block is a metal connection block, which is electrically connected to the second metal electrode layer.

11. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: At least two first alignment marks are disposed on the upper surface of the epitaxial structure. The two first alignment marks are located on one side of the ridge waveguide, and a connecting line thereof is parallel to an axis of the ridge waveguide.

12. The hybrid optoelectronic integrated chip according to claim 11, characterized in that: Two second alignment marks are respectively disposed on the substrate at both sides of the waveguide, and a connecting line of the two second alignment marks on the same side is parallel to the axis of the waveguide.

13. The hybrid optoelectronic integrated chip according to claim 1, characterized in that: The laser chip is a laser based on III-V compound semiconductor materials, the substrate is a silicon-based substrate, and the waveguide is a silicon waveguide.

14. A method for manufacturing the hybrid optoelectronic integrated chip according to any one of claims 1 to 13, characterized in that: include: Step A: manufacturing a laser chip, wherein a groove and a groove structure are formed on the upper surface of the epitaxial structure of the laser chip by synchronous photolithography and etching, wherein the groove includes two grooves separated by a gap, the gap forms a ridge waveguide, and the groove structure forms a first alignment mark; Step B: manufacturing an optical transmission module, wherein the optical transmission module comprises a substrate and a waveguide disposed on the substrate, and a second alignment mark and a height positioning block are also disposed on the substrate; Step C: Adjust the position of the laser chip by identifying the first alignment mark and the second alignment mark so that the first alignment mark and the second alignment mark satisfy a preset relative position relationship, and fix the lower surface of the laser chip to the height positioning block so that the light emitting end face of the laser is aligned and coupled with the input end face of the waveguide.

15. A laser chip, characterized in that: It comprises an epitaxial structure, the upper surface of the epitaxial structure has two grooves, a ridge waveguide is formed between the two grooves, and the upper surface of the epitaxial structure also has a first alignment mark, which is a groove structure.

16. The laser chip according to claim 15, characterized in that: The first alignment mark is used for alignment in the integration of the laser chip and the waveguide, and the groove structure is formed synchronously with the trench.

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