Bandgap reference circuit, chip and electronic device

Abstract

A bandgap reference circuit, a chip and an electronic device, the bandgap reference circuit comprising: a starting circuit configured to start an entire circuit of the bandgap reference circuit; a first reference voltage generation circuit having a first zero temperature coefficient point in a first temperature range, the first zero temperature coefficient point corresponding to a first voltage value; a compensation circuit comprising at least one second reference voltage generation circuit formed based on the first reference voltage generation circuit, the second reference voltage generation circuit having a second zero temperature coefficient point in a second temperature range, the second temperature range being different from the first temperature range but intersecting, the second zero temperature coefficient point corresponding to the first voltage value; and a control circuit configured to control one of the first reference voltage generation circuit and the second reference voltage generation circuit to be turned on in different temperature ranges, so that an absolute value of a difference between a reference voltage value output in the different temperature ranges and the first voltage value is less than a preset threshold.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and more specifically to a bandgap reference circuit, chip, and electronic device. Background Technology

[0002] A bandgap reference circuit is a circuit used to generate a stable reference voltage (also known as a reference voltage). It can output a highly stable, low-noise voltage and is theoretically unaffected by temperature changes. Therefore, bandgap reference circuits are widely used in many precision electronic devices, such as analog-to-digital converters, digital-to-analog converters, and sensor measurement systems.

[0003] Temperature drift is a crucial parameter in bandgap reference circuits, referring to the characteristic of output voltage changing with temperature. Bandgap reference circuits achieve temperature-independent voltage references by utilizing the sum of voltages with positive and negative temperature coefficients. However, in practical applications, due to various factors, the output voltage of a bandgap reference circuit will still change with temperature; this change is known as temperature drift.

[0004] To enhance the temperature stability of the bandgap reference, higher-order compensation is required for the bandgap reference circuit. Common compensation methods include exponential compensation and curvature compensation. However, these methods rely too heavily on the original bandgap reference circuit, lack versatility, and have significant differences in adaptability to different bandgap reference circuits. Summary of the Invention

[0005] This application is made to address the aforementioned problems. According to one aspect of this application, a bandgap reference circuit is provided, the bandgap reference circuit comprising:

[0006] A startup circuit is used to start the entire circuit of the bandgap reference circuit;

[0007] A first reference voltage generating circuit, the first reference voltage generating circuit having a first zero temperature drift point within a first temperature range, the first zero temperature drift point corresponding to a first voltage value;

[0008] The compensation circuit includes at least one second reference voltage generating circuit formed based on the first reference voltage generating circuit. The second reference voltage generating circuit has a second zero temperature drift point in a second temperature range. The second temperature range is different from but overlaps with the first temperature range. The second zero temperature drift point corresponds to the first voltage value.

[0009] A control circuit is used to control one of the first reference voltage generating circuit and the second reference voltage generating circuit to be turned on within different temperature ranges, so that the absolute value of the difference between the reference voltage value output in the different temperature range and the first voltage value is less than a preset threshold.

[0010] The above technical solution has the following technical effects: it is applicable to various bandgap references with different structures and temperature drift coefficients, and can play a good compensation role, so that it outputs a highly stable reference voltage.

[0011] In one embodiment of this application, the second reference voltage generating circuit includes:

[0012] Third reference voltage generation circuit; and / or

[0013] Fourth reference voltage generation circuit;

[0014] The third reference voltage generating circuit is formed by copying the first reference voltage generating circuit, extracting current from the copied first reference voltage generating circuit and boosting it to obtain the third reference voltage generating circuit.

[0015] The fourth reference voltage generating circuit is formed by replicating the first reference voltage generating circuit, injecting current into the replicated first reference voltage generating circuit and then reducing the voltage to obtain the fourth reference voltage generating circuit.

[0016] The above technical solution has the following technical effects: it facilitates the horizontal migration of the zero temperature drift point, thereby obtaining the same reference voltage value corresponding to different temperature ranges.

[0017] In one embodiment of this application, when the second reference voltage generating circuit includes the third reference voltage generating circuit, the compensation circuit further includes:

[0018] A current generating circuit is used to realize the function of extracting current.

[0019] The above technical solution has the following technical effects: the function of extracting current can be achieved through a simple circuit.

[0020] In one embodiment of this application, the current generated by the current generating circuit is a negative temperature coefficient current.

[0021] The above technical solution has the following technical effects: negative temperature coefficient current can be conveniently used to extract current.

[0022] In one embodiment of this application, the first reference voltage generating circuit outputs a third reference voltage;

[0023] The second reference voltage generating circuit includes:

[0024] The two third reference voltage generating circuits, one of which outputs a first reference voltage and the other outputs a second reference voltage;

[0025] Two fourth reference voltage generating circuits, one of which outputs the fourth reference voltage and the other outputs the fifth reference voltage.

[0026] The above technical solution has the following technical effects: the reference voltage generation circuit obtained through two methods can expand the temperature compensation range to a greater extent.

[0027] In one embodiment of this application, the control circuit includes a digital programming circuit.

[0028] The above technical solution has the following technical effects: it enables programmable temperature compensation.

[0029] In one embodiment of this application, the digital programming circuit includes:

[0030] The first over-temperature protector has its output terminal connected to the second input terminal of the first NAND gate, and connected to the first input terminals of the second, third, fourth and fifth NAND gates respectively via an inverter;

[0031] The output of the second over-temperature protector is connected to the second input of the second NAND gate, and is connected to the second input of the third, fourth and fifth NAND gates via an inverter.

[0032] The third over-temperature protector has its output terminal connected to the third input terminal of the third NAND gate, and connected to the third input terminals of the fourth and fifth NAND gates respectively via an inverter.

[0033] The fourth over-temperature protector has its output connected to the fourth input of the fourth NAND gate and connected to the fourth input of the fifth NAND gate via an inverter.

[0034] The first input terminal of the first NAND gate is connected to a power supply, the output terminal of the first NAND gate is connected to the gate of the first transistor through an inverter, and the drain of the first transistor outputs the fifth reference voltage.

[0035] The output of the second NAND gate is connected to the gate of the second transistor through an inverter, and the drain of the second transistor outputs the fourth reference voltage.

[0036] The output of the third NAND gate is connected to the gate of the third transistor through an inverter, and the drain of the third transistor outputs the third reference voltage.

[0037] The output of the fourth NAND gate is connected to the gate of the fourth transistor via an inverter, and the drain of the fourth transistor outputs the second reference voltage.

[0038] The output of the fifth NAND gate is connected to the gate of the fifth transistor through an inverter, and the drain of the fifth transistor outputs the first reference voltage.

[0039] The sources of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are all connected to the output port.

[0040] The above technical solution has the following technical effects: the selection of bandgap reference is realized through a four-temperature switching circuit.

[0041] In one embodiment of this application, the first over-temperature protector corresponds to a first temperature threshold;

[0042] The second over-temperature protector corresponds to the second temperature threshold;

[0043] The third over-temperature protector corresponds to the third temperature threshold.

[0044] The fourth over-temperature protector corresponds to the fourth temperature threshold.

[0045] Wherein, the first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold.

[0046] The above technical solution has the following technical effects: enabling the selection of bandgap references under different temperature ranges.

[0047] According to another aspect of this application, a chip is also provided, the chip including the above-described bandgap reference circuit.

[0048] According to another aspect of this application, an electronic device is also provided, the electronic device comprising the above-described chip.

[0049] The bandgap reference circuit, chip, and electronic device according to the embodiments of this application are applicable to bandgap references with various structures and temperature drift coefficients, and can achieve good compensation effects, enabling them to output highly stable reference voltages. Attached Figure Description

[0050] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0051] Figure 1 A schematic block diagram of a bandgap reference circuit according to an embodiment of this application is shown.

[0052] Figure 2 A schematic diagram of the temperature drift curve of the first reference voltage generation circuit in the bandgap reference circuit according to an embodiment of this application is shown.

[0053] Figure 3 A schematic diagram of the first step in obtaining the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown.

[0054] Figure 4 A schematic diagram of the negative temperature coefficient current used in the acquisition method of the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown.

[0055] Figure 5 A schematic diagram of the second step in the method of obtaining the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown.

[0056] Figure 6 A simulation diagram of the temperature drift curve of the bandgap reference circuit according to an embodiment of this application is shown.

[0057] Figure 7 An exemplary circuit diagram of a start-up circuit, a first reference voltage generation circuit, and a compensation circuit in a bandgap reference circuit according to an embodiment of this application is shown.

[0058] Figure 8 An exemplary circuit diagram of the control circuit in a bandgap reference circuit according to an embodiment of this application is shown. Detailed Implementation

[0059] To make the objectives, technical solutions, and advantages of this application more apparent, exemplary embodiments according to this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of this application, and not all of the embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein. Based on the embodiments of this application described herein, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of this application.

[0060] Figure 1 A schematic block diagram of a bandgap reference circuit 1 according to an embodiment of this application is shown. Figure 1As shown, the bandgap reference circuit 1 may include a startup circuit 11, a first reference voltage generation circuit 12, a compensation circuit 13, and a control circuit 14. The startup circuit 11 is used to start the entire circuit of the bandgap reference circuit 1. The first reference voltage generation circuit 12 has a first zero-temperature drift point within a first temperature range, corresponding to a first voltage value. The compensation circuit 13 includes at least one second reference voltage generation circuit formed based on the first reference voltage generation circuit 12. The second reference voltage generation circuit has a second zero-temperature drift point within a second temperature range, which is different from but overlaps with the first temperature range, and the second zero-temperature drift point corresponds to the first voltage value. The control circuit 14 is used to control the activation of one of the first and second reference voltage generation circuits within different temperature ranges, such that the absolute value of the difference between the reference voltage value output in different temperature ranges and the first voltage value is less than a preset threshold.

[0061] In the embodiments of this application, the bandgap reference circuit 1 is a circuit formed to perform segmented compensation on the original bandgap reference (i.e., the first reference voltage generation circuit 12). Specifically, the first reference voltage generation circuit 12 has a first zero-temperature drift point within a first temperature range, which corresponds to both the first voltage value and the first temperature value. That is, for the first reference voltage generation circuit 12, at the first temperature value, the circuit has zero temperature drift and is unaffected by temperature. Therefore, within the temperature range (e.g., around 10°C) near the first temperature value (referred to as the stable range), the circuit is minimally affected by temperature, and the circuit can output a stable reference voltage. Then, at temperature values ​​outside the stable range within the first temperature range, the temperature drift of the circuit is difficult to ignore, and correspondingly, the fluctuation of the reference voltage output by the circuit is relatively large.

[0062] Based on this, this application forms a compensation circuit 13 on the basis of the first reference voltage generating circuit 12. The compensation circuit includes at least one second reference voltage generating circuit. The second reference voltage generating circuit has a different temperature range than the first reference voltage generating circuit 12, but they overlap and have a zero temperature drift point corresponding to the same voltage value (referred to as the second zero temperature drift point to distinguish it from the first zero temperature drift point). This means that the temperature range corresponding to the output stable reference voltage is increased.

[0063] This is because the original first reference voltage generating circuit 12 can output a stable reference voltage within a temperature range near the first temperature value corresponding to the first zero temperature drift point. Now, there is another reference voltage generating circuit with the same temperature drift point, which can also output a stable reference voltage within a temperature range near the second temperature value corresponding to the second zero temperature drift point. Therefore, if there is one second reference voltage generating circuit, there are two temperature ranges where a stable reference voltage can be output; if there are two second reference voltage generating circuits, there are three temperature ranges where a stable reference voltage can be output. Therefore, under the control of the control circuit 14, one of the first reference voltage generating circuit 12 and at least one second reference voltage generating circuit can be turned on within different temperature ranges, thereby ensuring that the reference voltage values ​​output in different temperature ranges are stable and have very small fluctuations.

[0064] To more clearly define "stability" here, it can be defined as follows: the absolute value of the difference between the reference voltage value output in different temperature ranges and the first voltage value (i.e., the voltage values ​​corresponding to the first and second zero-temperature drift points) is less than a preset threshold. This preset threshold can be set according to specific needs. If ultra-high stability is required, the preset threshold can be set as small as possible; conversely, it can be appropriately increased.

[0065] As described above, the compensation circuit 13 is generated based on the original bandgap reference (i.e., the first reference voltage generation circuit). Although it depends on the original bandgap reference, its compensation method is relative (because it is based on the original bandgap reference to expand the temperature compensation range) and not absolute. Therefore, it can be applied to any bandgap reference circuit to be compensated and has strong versatility and portability.

[0066] Therefore, the bandgap reference circuit 1 according to the embodiments of this application is applicable to various bandgap references with different structures and different temperature drift coefficients, and can play a good compensation effect, so that it outputs a highly stable reference voltage.

[0067] The bandgap reference circuit 1 according to an embodiment of this application will be described below with reference to specific examples.

[0068] In one example, the first reference voltage generation circuit 12 corresponds to a first temperature range of -55°C to 125°C, with a temperature drift of 11.7 ppm / °C (2.54 mV). Figure 2 As shown. Figure 2 In the graph, the horizontal axis represents temperature, and the vertical axis represents the reference voltage output by the first reference voltage generating circuit 12. The curve on the graph is the temperature drift curve of the first reference voltage generating circuit 12, which is a parabola. The vertex of the parabola is the zero temperature drift point of the first reference voltage generating circuit 12, which corresponds to a temperature value of approximately 32℃ and a voltage value of approximately 1.2057V.

[0069] In embodiments of this application, a compensation circuit 13 can be obtained based on the first reference voltage generating circuit 12. In one example, the first reference voltage generating circuit 12 can be replicated, and current is drawn from the replicated first reference voltage generating circuit and boosted to obtain the second reference voltage generating circuit in the compensation circuit 13. In another example, the first reference voltage generating circuit 12 can be replicated, and current is injected into the replicated first reference voltage generating circuit and depressed to obtain the second reference voltage generating circuit in the compensation circuit 13. In yet another example, it can be a combination of the above two examples. To distinguish them, the second reference voltage generating circuit obtained by drawing current and boosting voltage is called the third reference voltage generating circuit, and the second reference voltage generating circuit obtained by injecting current and depressing voltage is called the fourth reference voltage generating circuit. By obtaining the compensation circuit 13 by drawing voltage from the replicated first reference voltage generating circuit 12 and boosting voltage and / or injecting current and depressing voltage, the horizontal migration of the zero temperature drift point can be conveniently achieved, thereby obtaining the same reference voltage value corresponding to different temperature ranges. The following is in conjunction with Figures 3 to 5 To describe.

[0070] Figure 3 A schematic diagram of the first step in obtaining the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown. Figure 4 A schematic diagram of the negative temperature coefficient current used in the acquisition method of the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown. Figure 5 A schematic diagram of the second step in obtaining the compensation circuit in the bandgap reference circuit according to an embodiment of this application is shown. Figure 3 and Figure 5 In the example shown, the compensation circuit 13 is described with two third reference voltage generation circuits and two fourth reference voltage generation circuits as an example. It should be understood that this is merely exemplary. In other examples, the compensation circuit 13 may include only the third reference voltage generation circuit, only the fourth reference voltage generation circuit, or both. The number of third and / or fourth reference voltage generation circuits that may be included is arbitrary and can be set according to specific requirements. Considering the circuit area, a larger number of circuits will result in a more stable output reference voltage.

[0071] like Figure 3 As shown, the black curve represents the temperature drift curve corresponding to the first reference voltage generation circuit 12. For simplicity, it is not shown here. Figure 2 The curve shown represents the entire curve, but only a segment near the zero-temperature drift point is represented. Figure 5 In the temperature drift curves corresponding to the third and fourth reference voltage generation circuits shown, they do not intersect with the temperature drift curve corresponding to the first reference voltage generation circuit 12, but are approximately adjacent, making... Figure 5 The effect shown is that the entire temperature range of the first reference voltage generating circuit 12 is divided into five parts (the overlapping parts can be understood as being hidden).

[0072] Continue to refer to Figure 3 The first reference voltage generating circuit 12 performs two different levels of current extraction (the extracted current is, for example, a negative temperature coefficient current (CTAT)). Figure 4 As shown in the figure, two third reference voltage generation circuits are obtained, and their respective temperature drift curves are the two red curves to the lower left of the black curve. The zero temperature drift points of these two red curves correspond to temperatures of approximately -40℃ and 5℃, respectively. Next, refer to Figure 5 The circuits corresponding to the two red curves are boosted to two different degrees (e.g., boosted by CTAT current compensation) to shift their zero-temperature drift point to the upper left, achieving the same voltage value corresponding to the zero-temperature drift point of the first reference voltage generation circuit 12, such as... Figure 5 As shown (the red curve rises to the upper left and its peak maintains roughly the same vertical coordinate as the black curve).

[0073] Continue to refer to Figure 3 Two different levels of current injection are performed on the first reference voltage generation circuit 12 (the injected current is, for example, CTAT current, such as...). Figure 4 As shown), two fourth reference voltage generation circuits are obtained, and their respective temperature drift curves are the two green curves above the black curve. The zero temperature drift points of these two green curves correspond to temperatures of approximately 72℃ and 109℃, respectively. Next, refer to... Figure 5 Two different degrees of voltage reduction are applied to the circuits corresponding to the two green curves (for example, voltage reduction using a positive temperature coefficient (PATA) current) to shift their zero-temperature drift point downwards and to the right, achieving the same voltage value corresponding to the zero-temperature drift point of the first reference voltage generation circuit 12. Figure 5 As shown (the green curve descends to the lower right and its peak maintains roughly the same vertical coordinate as the black curve).

[0074] Thus, the entire bandgap reference circuit is realized, which includes five bandgap references, namely reference 1 to reference 5. Reference 3 corresponds to the original first reference voltage generation circuit 12, reference 1 and reference 2 correspond to two third reference voltage generation circuits, and reference 4 and reference 5 correspond to two fourth reference voltage generation circuits. These five bandgap references cover the entire range of -55℃ to 125℃ and have five zero temperature drift points, and the voltage reference values ​​of the five zero temperature drift points are consistent.

[0075] Based on this, control unit 14 can be used to control the following: When the temperature range is -55℃ to -13℃, reference 1 is activated, and the output reference voltage is on the temperature drift curve corresponding to reference 1, with its value necessarily near the zero temperature drift point corresponding to -40℃; when the temperature range is -13℃ to 20℃, reference 2 is activated, and the output reference voltage is on the temperature drift curve corresponding to reference 2, with its value necessarily near the zero temperature drift point corresponding to 5℃; when the temperature range is 20℃ to 54℃, reference 3 is activated, and the output reference voltage is on the temperature drift curve corresponding to reference 3, with its value necessarily near the zero temperature drift point corresponding to 32℃; when the temperature range is 54℃ to 97℃, reference 4 is activated, and the output reference voltage is on the temperature drift curve corresponding to reference 4, with its value necessarily near the zero temperature drift point corresponding to 72℃; when the temperature range is 97℃ to 125℃, reference 5 is activated, and the output reference voltage is on the temperature drift curve corresponding to reference 5, with its value necessarily near the zero temperature drift point corresponding to 109℃. The simulation results are shown in the figure below. Figure 6 As shown. With Figure 1 The temperature drift curves shown show that the new bandgap reference circuit 1 exhibits very small fluctuations in the output reference voltage over the entire temperature range (-55°C to 125°C), with the temperature drift decreasing from 11.7 ppm / °C (2.54 mV) to 0.56 ppm / °C (117 uv).

[0076] The following is combined Figure 7 and Figure 8 Describe the circuit diagram that implements the above example. Wherein, Figure 7 An exemplary circuit diagram of the start-up circuit 11, the first reference voltage generation circuit 12, and the compensation circuit 13 in the bandgap reference circuit 1 according to an embodiment of this application is shown. Figure 8 An exemplary circuit diagram of the control circuit 14 in the bandgap reference circuit 1 according to an embodiment of this application is shown. It should be noted that the compensation circuit 13 is formed based on the first reference voltage generating circuit 12, and the control circuit is configured based on the number of reference voltage generating circuits in the compensation circuit 13. Figure 7 and Figure 8 The examples shown are merely examples; in cases where the first reference voltage generating circuit 12 is a different circuit and the number of reference voltage generating circuits in the compensation circuit 13 is a different number, Figure 7 and Figure 8The circuitry can be adapted to achieve the functionality described in this application.

[0077] like Figure 7 As shown, the startup circuit includes transistors M1, M2, and M3. M1's gate is connected to control signal V4, its source is connected to power supply VDD, and its drain is connected to the drain of M2. M2's source is grounded, and its gate is connected to VDD. M3's gate is connected to the drain of M1, its source is connected to VDD, and its drain is connected to control signal V3.

[0078] The bandgap reference 3 is the first reference voltage generation circuit 12 mentioned above, which includes PMOS transistors M13, M15, M17, and M18, NMOS transistors M14 and M16, transistors Q6, Q7, and Q8, and resistors R11 and R12. The gates of M13 and M15 are connected to the control signal V4, their sources are connected to VDD, and their drains are connected to the drains of M14 and M16, respectively. The gates of M14 and M16 are connected to control signal V3; the source of M14 is connected to the emitter of Q6 through R11, and the base and collector of Q6 are grounded; the source of M16 is connected to the emitter of Q7, and the base and collector of Q7 are grounded; the source of M16 is also connected to the gate of M17; the gate of M17 is connected to control signal V1, with its source connected to VDD and its drain connected to the source of M18; the gate of M18 is connected to control signal V2, with its drain connected to the emitter of Q8 through R12, and the base and collector of Q8 are grounded. The drain of M18 outputs a third reference voltage Vref3.

[0079] Bandgap reference 1 and bandgap reference 2 are the third reference voltage generation circuits corresponding to the two red curves mentioned above. Bandgap reference 1 includes PMOS transistors M4, M5, and M6, transistors Q1 and Q2, and resistors R1, R2, R3, and R4. The gate of M4 is connected to control signal V1, its source is connected to VDD, and its drain is connected to the source of M5. The gate of M5 is connected to control signal V2, and its drain is connected to the emitter of Q1 via R1. The base and collector of Q1 are grounded. The gate of M6 is connected to the gate of M10 in bandgap reference 2, its source is connected to VDD, and its drain is connected to R3 and R4 and then grounded. The collector of Q2 is connected to VDD, its emitter is grounded via R2, and its base is connected between the drain of M5 and R3 and R4. The drain of M6 outputs the first reference voltage Vref1. M5, R3, and R4 form the CTAT current compensation circuit for bandgap reference 1.

[0080] Bandgap reference 2 includes PMOS transistors M10, M11, and M12, transistors Q4 and Q5, and resistors R7, R8, R9, and R10. M11's gate is connected to control signal V1, its source to VDD, and its drain to the source of M12. M12's gate is connected to control signal V2, and its drain is connected to the emitter of Q5 via R10. The base and collector of Q5 are grounded. M10's gate is connected to the gate of M6 in bandgap reference 1, its source to VDD, and its drain connected to R7 and R8 before being grounded. Q4's collector is connected to VDD, its emitter is grounded via R9, and its base is connected between the drain of M12 and R7 and R8. The drain of M10 outputs a second reference voltage, Vref2. M10, R7, and R8 form the CTAT current compensation circuit for bandgap reference 2.

[0081] To achieve current extraction, the circuit also includes a CTAT current generation circuit. For example... Figure 7 As shown, the CTAT current generating circuit includes transistors M7, M8, M9, Q3, and resistors R5 and R6. The gate of M7 is connected to the gate of M8, its source is connected to VDD, and its drain is grounded through R5. The source of M8 is connected to VDD, and its drain is connected to its gate and the drain of M9. The gate of M9 is connected to the drain of M7, and its source is grounded. One end of R6 is connected to VDD, and the other end is connected to the collector of Q3. The emitter of Q3 is grounded, and its base is connected to the ungrounded end of R5.

[0082] Bandgap reference 4 and bandgap reference 5 are the fourth reference voltage generation circuits corresponding to the two green curves mentioned above. Bandgap reference 4 includes PMOS transistors M19 and M20, transistors Q9 and Q10, and resistors R13, R14, R15, and R16. The gate of M19 is connected to control signal V1, its source is connected to VDD, and its drain is connected to the source of M20. The gate of M20 is connected to control signal V2, and its drain is connected to the emitter of Q9 via R13. The base and collector of Q9 are grounded. One end of R14 is connected to VDD, and the other end is connected to the emitter of Q10. The collector of Q10 is grounded, and its base is connected to the drain of M20 and one end of R15. R15 and its other end are grounded via R16. The other end of R15 outputs the fourth reference voltage Vref4.

[0083] The bandgap reference 5 includes PMOS transistors M21 and M22, transistors Q11 and Q12, and resistors R17, R18, R19, and R20. The gate of M21 is connected to control signal V1, its source is connected to VDD, and its drain is connected to the source of M22. The gate of M22 is connected to control signal V2, and its drain is connected to the emitter of Q11 via R20. The base and collector of Q11 are grounded. One end of R19 is connected to VDD, and the other end is connected to the emitter of Q12. The collector of Q12 is grounded, and its base is connected to the drain of M22 and one end of R17. R17 and its other end are grounded via R18. The other end of R17 outputs the fifth reference voltage Vref5.

[0084] like Figure 8 As shown, the control circuit 14 is implemented as a digital programming circuit, making it a programmable circuit. Specifically, the digital programming circuit includes: a first over-temperature protection (OTP), the output of which is connected to the second input of a first NAND gate, and connected via an inverter to the first inputs of the second, third, fourth, and fifth NAND gates respectively; a second over-temperature protection, the output of which is connected to the second input of a second NAND gate, and connected via an inverter to the second inputs of the third, fourth, and fifth NAND gates respectively; a third over-temperature protection, the output of which is connected to the third input of a third NAND gate, and connected via an inverter to the third inputs of the fourth and fifth NAND gates respectively; a fourth over-temperature protection, the output of which is connected to the fourth input of a fourth NAND gate, and connected via an inverter to the fourth input of a fifth NAND gate; the first input of the first NAND gate is connected to the power supply, and the output of the first NAND gate... The gate of the first transistor is connected to the gate of the second transistor via an inverter, and the drain of the first transistor outputs the fifth reference voltage Vref5. The output of the second NAND gate is connected to the gate of the second transistor via an inverter, and the drain of the second transistor outputs the fourth reference voltage Vref4. The output of the third NAND gate is connected to the gate of the third transistor via an inverter, and the drain of the third transistor outputs the third reference voltage Vref3. The output of the fourth NAND gate is connected to the gate of the fourth transistor via an inverter, and the drain of the fourth transistor outputs the second reference voltage Vref2. The output of the fifth NAND gate is connected to the gate of the fifth transistor via an inverter, and the drain of the fifth transistor outputs the first reference voltage Vref1. The sources of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are all connected to the output port VOUT.

[0085] In this configuration, the first over-temperature protector corresponds to a first temperature threshold; the second over-temperature protector corresponds to a second temperature threshold; the third over-temperature protector corresponds to a third temperature threshold; and the fourth over-temperature protector corresponds to a fourth temperature threshold. The first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold. In the example described above, the first temperature threshold corresponding to the first over-temperature protector can be 97℃; the first temperature threshold corresponding to the second over-temperature protector can be 54℃; the first temperature threshold corresponding to the third over-temperature protector can be 20℃; and the first temperature threshold corresponding to the fourth over-temperature protector can be -13℃.

[0086] In this example, Figure 8 The illustrated four-temperature digital converter circuit consists of four over-temperature switching circuits with over-temperature switching points at -13℃, 20℃, 54℃, and 97℃, two two-input NAND gates, one three-input NAND gate, two four-input NAND gates, five NOT gates, and five NOMS transistors. In this embodiment, this four-temperature switching circuit is used to select the bandgap reference. The circuits with four over-temperature switching points at -13℃, 20℃, 54℃, and 97℃, along with several control circuits, implement a priority-based switching mode. When the over-temperature switching point is at 97℃, the high-level output of the over-temperature switching circuit will shut down the other three over-temperature switching circuits and simultaneously select reference 5, and so on, as described above.

[0087] Based on the above description, the bandgap reference circuit according to the embodiments of this application changes the zero temperature drift point by extracting or injecting current, then performs segmented current compensation, and finally uses a temperature switching circuit (control circuit) to select the bandgap reference. The circuit structure is simple, the switching mode is stable and adjustable, and it has strong applicability to different bandgap references, making it very suitable for voltage-sensitive, low-voltage scenarios. Furthermore, the bandgap reference circuit according to the embodiments of this application is portable; it can compensate for bandgap references with different structures and different temperature drift coefficients. The accuracy of the digital programming circuit can be increased or decreased according to the actual application scenario to obtain bandgap reference circuits with different stability, achieving a trade-off between circuit area and temperature stability.

[0088] According to another aspect of this application, a chip is also provided, which includes the bandgap reference circuit described above according to the embodiments of this application.

[0089] According to another aspect of this application, an electronic device is also provided, which includes the aforementioned chip.

[0090] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0091] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0092] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0093] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0094] Similarly, it should be understood that, for the purpose of simplification and aiding understanding of one or more aspects of this application, various features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, the approach of this application should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with fewer features than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0095] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or elements of any method or apparatus so disclosed may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0096] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0097] The various component embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules in the article analysis device according to embodiments of this application. This application can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such an implementation of this application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0098] It should be noted that the above embodiments are illustrative of this application and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0099] The above are merely specific embodiments or descriptions of specific embodiments of this application. The scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. The scope of protection of this application shall be determined by the scope of the claims.

Claims

1. A bandgap reference circuit, characterized in that, The bandgap reference circuit includes: A startup circuit is used to start the entire circuit of the bandgap reference circuit; A first reference voltage generating circuit, the first reference voltage generating circuit having a first zero temperature drift point within a first temperature range, the first zero temperature drift point corresponding to a first voltage value; The compensation circuit includes at least one second reference voltage generating circuit formed based on the first reference voltage generating circuit. The second reference voltage generating circuit has a second zero temperature drift point in a second temperature range. The second temperature range is different from but overlaps with the first temperature range. The second zero temperature drift point corresponds to the first voltage value. A control circuit is used to control one of the first reference voltage generating circuit and the second reference voltage generating circuit to be turned on within different temperature ranges, so that the absolute value of the difference between the reference voltage value output in the different temperature range and the first voltage value is less than a preset threshold. The second reference voltage generating circuit includes: Third reference voltage generation circuit; and / or Fourth reference voltage generation circuit; The third reference voltage generating circuit is formed by copying the first reference voltage generating circuit, extracting current from the copied first reference voltage generating circuit and boosting it to obtain the third reference voltage generating circuit. The fourth reference voltage generating circuit is formed by replicating the first reference voltage generating circuit, injecting current into the replicated first reference voltage generating circuit and then reducing the voltage to obtain the fourth reference voltage generating circuit.

2. The bandgap reference circuit according to claim 1, characterized in that, When the second reference voltage generating circuit includes the third reference voltage generating circuit, the compensation circuit further includes: A current generating circuit is used to realize the function of extracting current.

3. The bandgap reference circuit according to claim 2, characterized in that, The current generated by the current generating circuit is a negative temperature coefficient current.

4. The bandgap reference circuit according to claim 1, characterized in that, The first reference voltage generating circuit outputs a third reference voltage; The second reference voltage generating circuit includes: The two third reference voltage generating circuits, one outputs a first reference voltage and the other outputs a second reference voltage; Two fourth reference voltage generating circuits, one of which outputs the fourth reference voltage and the other outputs the fifth reference voltage.

5. The bandgap reference circuit according to claim 4, characterized in that, The control circuit includes a digital programming circuit.

6. The bandgap reference circuit according to claim 5, characterized in that, The digital programming circuit includes: The first over-temperature protector has its output terminal connected to the second input terminal of the first NAND gate, and connected to the first input terminals of the second, third, fourth and fifth NAND gates respectively via an inverter; The output of the second over-temperature protector is connected to the second input of the second NAND gate, and is connected to the second input of the third, fourth and fifth NAND gates via an inverter. The third over-temperature protector has its output terminal connected to the third input terminal of the third NAND gate, and connected to the third input terminals of the fourth and fifth NAND gates respectively via an inverter. The fourth over-temperature protector has its output connected to the fourth input of the fourth NAND gate and connected to the fourth input of the fifth NAND gate via an inverter. The first input terminal of the first NAND gate is connected to a power supply, the output terminal of the first NAND gate is connected to the gate of the first transistor through an inverter, and the drain of the first transistor outputs the fifth reference voltage. The output of the second NAND gate is connected to the gate of the second transistor through an inverter, and the drain of the second transistor outputs the fourth reference voltage. The output of the third NAND gate is connected to the gate of the third transistor through an inverter, and the drain of the third transistor outputs the third reference voltage. The output of the fourth NAND gate is connected to the gate of the fourth transistor via an inverter, and the drain of the fourth transistor outputs the second reference voltage. The output of the fifth NAND gate is connected to the gate of the fifth transistor through an inverter, and the drain of the fifth transistor outputs the first reference voltage. The sources of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are all connected to the output port.

7. The bandgap reference circuit according to claim 6, characterized in that, The first over-temperature protector corresponds to the first temperature threshold. The second over-temperature protector corresponds to the second temperature threshold; The third over-temperature protector corresponds to the third temperature threshold. The fourth over-temperature protector corresponds to the fourth temperature threshold. Wherein, the first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold.

8. A chip, characterized in that, The chip includes the bandgap reference circuit according to any one of claims 1-7.

9. An electronic device, characterized in that, The electronic device includes the chip as described in claim 8.

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