Memory aging equipment and method

Abstract

According to the memory aging equipment provided by the invention, the aging equipment is divided into the control back plate, the driving plate and the aging plate, the first signal port is formed in the control back plate, the second signal port is formed in the driving plate, and the third signal port is formed in the aging plate, so that the control back plate, the driving plate and the aging plate are detachably connected; therefore, in the process of aging the memories by the memory aging equipment, different types of memories can be adapted by replacing the corresponding aging plates. And the control backboard is used for controlling the driving boards, and the driving boards generate aging signals, so that when a large number of memories need to be aged, the number of the driving boards and the number of the aging boards can be freely increased or decreased according to actual requirements, and the aging efficiency of the memories is improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic component aging, and in particular to a storage aging device and method. Background Art

[0002] Burn-in is a means of testing the reliability of components. It accelerates burn-in to make components quickly pass through the peak failure rate period, expose various potential defects, and eliminate components that fail early. In the burn-in process of electronic components, general burn-in equipment needs to realize burn-in of multiple components. There are problems such as limited test channels, limited signal speed, large size, and difficult programming. Therefore, traditional general burn-in equipment cannot be directly applied to the burn-in of memory devices.

[0003] In existing memories, different types of memory have significant differences in pin definitions. Therefore, dedicated memory burn-in equipment requires completely different burn-in circuits to be designed for different types of memory, which results in poor versatility of such memory burn-in equipment. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a memory aging device.

[0005] Based on the above purpose, the present application provides a memory aging device, including: a control backplane, at least one driver board, at least one aging board and at least one memory. The control backplane includes a processor and at least one first signal port, at least one driver board includes at least one second signal port, and at least one aging board includes at least one third signal port. At least one output pin of the processor is connected to at least one first signal port, at least one first signal port is detachably connected to at least one driver board, at least one second signal port is detachably connected to at least one aging board, and at least one third signal port is detachably connected to at least one memory. The control backplane is configured to input a preset aging requirement to the processor, and the processor outputs a first control signal to at least one driver board through at least one first signal port in response to the aging requirement. At least one driver board is configured to generate a second control signal and aging data according to the first control signal, and output the second control signal and aging data to at least one aging board through at least one second signal port. At least one aging board is configured to transmit the aging data to the pin corresponding to at least one memory through at least one third signal port in response to the second control signal, and read the status information of at least one memory, and transmit the status information to at least one driver board through at least one second signal port.

[0006] In some embodiments, at least one driver board further comprises a microcontroller, a corresponding pin of the microcontroller is connected to at least one second signal port, and the microcontroller is configured to generate aging data in response to the first control signal, and output the aging data to a pin corresponding to the at least one second signal port.

[0007] In some embodiments, at least one driver board further includes a voltage acquisition module and a current acquisition module. The voltage acquisition module and the current acquisition module are connected to the microcontroller. The voltage acquisition module is used to acquire voltage data of at least one memory, and input the voltage data into the microcontroller, and the voltage data is monitored in real time by the microcontroller. The current acquisition module is used to acquire current data of at least one memory, and input the current data into the microcontroller, and the current data is monitored in real time by the microcontroller.

[0008] In some embodiments, at least one driver board further comprises a logic analysis module, the logic analysis module is connected to at least one second signal port, and the logic analysis module is connected to the processor via at least one first signal port. The logic analysis module is configured to generate a test pattern in response to a first test instruction output by the processor, write the test pattern into at least one memory via at least one second signal port, read the test pattern stored in at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result to the processor.

[0009] In some embodiments, the memory aging device further comprises a host computer connected to the control backplane and configured to: output aging requirements to the control backplane in response to user settings, and record voltage data, current data and comparison results.

[0010] In some embodiments, at least one second signal port includes at least two compatible output ports, and the compatible output ports are configured to determine a corresponding wiring mode according to at least one connected memory.

[0011] In some embodiments, at least one burn-in board includes a signal distribution device, and at least one third signal port includes at least two compatible stations. The compatible station is configured to determine a corresponding wiring mode according to at least one connected memory. The signal distribution device is configured to copy the burn-in data according to the second control signal, and transmit the copied burn-in data to the at least two compatible stations respectively.

[0012] In some embodiments, the memory aging device further includes a power module, the power module includes a first power supply interface, the control backplane further includes at least one second power supply interface, and the at least one driver board further includes at least one third power supply interface. The first power supply interface is detachably connected to the control backplane, and the power module supplies power to the control backplane through the first power supply interface. At least one second power supply interface is detachably connected to at least one driver board, and the control backplane supplies power to at least one driver board through the second power supply interface. The third power supply interface is detachably connected to at least one aging board, and at least one driver board supplies power to at least one aging board through the third power supply interface.

[0013] In some embodiments, the storage aging device also includes an aging box, at least one aging plate is arranged inside the aging box, and the aging box is configured to heat the internal space of the aging box in response to a set temperature curve, and detect the temperature of the internal space so that the temperature of the internal space changes according to the temperature curve.

[0014] The present application also provides a memory aging method, comprising: the method uses any of the above-mentioned memory aging devices to perform memory aging. The method comprises: setting an aging temperature curve, and adjusting the ambient temperature of the memory according to the temperature curve. Generate aging data, set aging parameters, and write aging data into at least one memory according to the aging parameters. Generate a test pattern, write the test pattern into at least one memory, read the stored test pattern in at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result. In response to the comparison result that the test pattern in the memory is the same as the written test pattern, then the aging of at least one memory is completed.

[0015] From the above description, it can be seen that the memory aging device provided by the present application is divided into a control backplane, a drive board and an aging board, and a first signal port is set on the control backplane, a second signal port is set on the drive board, and a third signal port is set on the aging board, so that the control backplane, the drive board and the aging board are detachably connected, so that the memory aging device can adapt to different types of memories by replacing the corresponding aging board during the aging process of the memory. And by using the control backplane to control the drive board and the drive board to generate the aging signal, when a large number of memories need to be aged, the number of drive boards and aging boards can be freely increased or decreased according to actual needs, thereby improving the aging efficiency of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 A schematic diagram of the system functional module structure of a memory aging device provided in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of the system functional module structure of a memory aging device provided in another embodiment of the present application;

[0019] Figure 3 A schematic diagram of a parallel compatible output interface template provided in an embodiment of the present application;

[0020] Figure 4 A schematic diagram of a serial compatible output interface template provided in an embodiment of the present application;

[0021] Figure 5 A flowchart of a memory aging method provided in an embodiment of the present application.

[0022] Figure numerals: 1 - control backplane; 101 - first signal port; 102 - processor; 2 - driver board; 201 - second signal port; 3 - burn-in board; 301 - third signal port; 4 - memory. DETAILED DESCRIPTION

[0023] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0024] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0025] As an important type of digital product in digital integrated circuits, memory devices are so important in digital integrated circuits that they cannot be replaced by other digital circuits. Burn-in is a means of testing the reliability of components. By accelerating burn-in, components can quickly pass through the peak period of failure rate, expose various potential defects, and eliminate components that fail early.

[0026] Component aging is divided into dynamic aging and static aging. Static aging only applies power supply voltage to the device, and the aging effect is very limited. Dynamic aging test is a very ideal test form, which organically combines aging and electrical performance testing, achieving two goals at one stroke. However, there are also some disadvantages, such as high requirements for test conditions, high test costs, and poor versatility.

[0027] Currently, the equipment used for burn-in is mainly universal burn-in boxes, but such equipment usually has poor performance for the sake of universality, which is reflected in the problems of limited test channels, limited signal speed, large size, and difficult programming.

[0028] Memory devices have many pins and fast speeds, so it is difficult to develop using conventional general-purpose burn-in boxes. Because a large number of test channels are occupied, large-scale batch burn-in cannot be achieved, and the test efficiency is seriously insufficient. At the same time, there are many types of memory devices, and the communication protocols used are different. The programming method of general-purpose burn-in boxes cannot implement complex communication protocols.

[0029] like Figure 1 As shown, an embodiment of the present application provides a memory aging device, including: a control backplane 1, at least one driving board 2, at least one aging board 3 and at least one memory 4.

[0030] The control backplane 1 includes a processor 102 and at least one first signal port 101 , the at least one driver board 2 includes at least one second signal port 201 , and the at least one burn-in board 3 includes at least one third signal port 301 .

[0031] At least one output pin of the processor is connected to at least one first signal port, at least one first signal port is detachably connected to at least one driver board, at least one second signal port is detachably connected to at least one aging board, and at least one third signal port is detachably connected to at least one memory.

[0032] The control backplane is configured to input a preset aging requirement to the processor, and the processor outputs a first control signal to at least one driving board through at least one first signal port in response to the aging requirement.

[0033] The at least one driving board is configured to generate a second control signal and aging data according to the first control signal, and output the second control signal and aging data to the at least one aging board through the at least one second signal port.

[0034] At least one aging board is configured to transmit aging data to a pin corresponding to at least one memory through at least one third signal port in response to a second control signal, and to read status information of at least one memory and transmit the status information to at least one driver board through at least one second signal port.

[0035] In this embodiment, the control backplane is used to output a first control signal to the driver board according to the aging requirements of the memory, so that the driver board generates a preset amount of aging data. The control backplane is equipped with a SOC (system on chip) processor, a cache, an external communication interface, and a power supply system. The SOC processor is responsible for control signal processing, backcheck signal processing, ADC (analog-to-digital converter) data processing, etc. The cache is a DDR3 (third generation double data rate synchronous dynamic random access memory) memory, which is used to provide a cache for the SOC chip and temporarily buffer the data collected by the high-speed ADC.

[0036] The driver board is used to randomly generate a predetermined amount of aging data according to the first control signal, transmit the aging data to the aging board, and write the aging data to the memory through the corresponding interface on the aging board. The aging data can be generated by a controller independently set on the driver board or by a processor.

[0037] The burn-in board is connected to the memory via the third signal port, is connected to the memory via the pins of the third signal port, and writes burn-in data into the memory.

[0038] The second control signal is used to control the start, pause and end of memory aging, and to control the memory to periodically output status information to the driving board, so as to determine whether the memory is damaged.

[0039] Preferably, the first signal port is connected to the driving board via a flexible cable, the second signal port is connected to the aging board via a flexible cable, and the third signal port is connected to the memory via a detachable data interface corresponding to the memory.

[0040] Preferably, in order to improve the aging efficiency, a control backplane can be used to connect multiple driver boards, multiple driver boards can be used to provide aging signals for multiple aging boards, and multiple memories can be connected to a single aging board to increase the number of memories for a single aging.

[0041] In some embodiments, at least one driving board further includes a microcontroller, and a corresponding pin of the microcontroller is connected to at least one second signal port.

[0042] The microcontroller is configured to generate aging data in response to the first control signal, and output the aging data to a pin corresponding to at least one second signal port.

[0043] In this embodiment, the type and model of the microcontroller are not limited, and it can be one of ESP32, ESP8266, and STM32, and can be reasonably selected according to actual application needs.

[0044] Preferably, Figure 2 As shown, the microcontroller may be an STM32 MCU microcontroller. After receiving the first control signal, the microcontroller randomly generates aging data corresponding to the first control signal and generates a second control signal. The aging data and the second control signal are output to the aging board through the second signal port, thereby realizing the timed aging of the memory and the reading of the status information.

[0045] In some embodiments, at least one driving board further includes a voltage acquisition module and a current acquisition module.

[0046] The voltage acquisition module and the current acquisition module are connected to the microcontroller.

[0047] The voltage acquisition module is used to collect voltage data from at least one memory, and input the voltage data into the microcontroller, so as to monitor the voltage data in real time through the microcontroller.

[0048] The current acquisition module is used to collect current data from at least one memory, and input the current data into the microcontroller, and the microcontroller is used to monitor the current data in real time.

[0049] In this embodiment, the voltage acquisition module is preferably a high-precision ADC, which is used to monitor the voltage of the aging board to prevent voltage anomalies; the current acquisition module is preferably a current acquisition module that converts the current signal into a voltage signal and collects it together with the ADC. After calculation, the current value can be obtained to monitor the current and prevent current anomalies. By setting the voltage acquisition module and the current acquisition module to monitor the voltage data and current data of the aging board in real time, the aging condition of the memory can be judged according to the monitoring results. Preferably, the voltage and / or current thresholds can also be set. When the voltage and / or current of the aging board exceeds the set threshold, the microcontroller will immediately issue an alarm and / or disconnect the aging signal, thereby preventing the aging equipment from being damaged due to memory failure.

[0050] In some embodiments, at least one driving board further includes a logic analysis module, the logic analysis module is connected to the at least one second signal port, and the logic analysis module is connected to the processor through the at least one first signal port.

[0051] The logic analysis module is configured to generate a test pattern in response to a first test instruction output by the processor, write the test pattern into at least one memory through at least one second signal port, read the test pattern stored in the at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result to the processor.

[0052] In this embodiment, the logic analysis module is used to generate a test pattern according to the first test instruction of the processor, by writing the test pattern into the memory, reading the test pattern stored in the memory, and comparing the read test pattern with the original test pattern. When the comparison results are consistent, the memory currently being tested is not faulty, and when the comparison results are inconsistent, the memory currently being tested is faulty.

[0053] Preferably, the test pattern may adopt test patterns such as "all 0 code", "all 1 code", "chessboard code", "reverse chessboard code", "row and column code", "reverse row and column code" and the like.

[0054] In some embodiments, the memory aging device further includes a host computer, which is connected to the control backplane.

[0055] The host computer is configured to: output the burn-in requirement to the control backplane in response to the user setting, and record the voltage data, current data and comparison results.

[0056] In this embodiment, the host computer includes a host computer software, which is used to process the human-computer interaction between the memory aging device and the operator. The host computer software is preferably a graphical interface developed based on the LABVIEW (laboratory virtual instrument engineering platform) block diagram, which can be used to set aging parameters, view aging progress, monitor voltage, current and temperature during aging, and generate and export data reports after the test. The user sends aging requirements to the host computer, and the host computer transmits the aging requirements to the control backplane. The control backplane parses the aging requirements and sets the first control signal according to the aging requirements, thereby controlling the driver board to generate aging data.

[0057] In some embodiments, at least one second signal port includes at least two compatible output ports, and the compatible output ports are configured to determine a corresponding wiring mode according to at least one connected memory.

[0058] In this embodiment, since different types of memories have different wiring modes, multiple compatible output ports are provided so that the memory aging device can perform aging on different types of memories.

[0059] like Figure 3As shown, in an optional embodiment of the present application, according to the interface characteristics of the parallel memory, two interface templates are set to adapt to the pins of NOR FLASH (non-volatile flash memory), NAND FLASH (non-volatile flash memory) memory and SRAM (static random access memory).

[0060] like Figure 4 In an optional embodiment of the present application, two interface templates are provided according to the interface characteristics of the serial memory, for adapting the pins of the EEPROM (erasable programmable read-only memory) and the serial FLASH (serial flash memory) memory.

[0061] In an optional embodiment of the present application, the pins of the microcontroller can be brought out according to the above four interface templates at the same time, thereby achieving compatibility with multiple memories.

[0062] In some embodiments, at least one of the burn-in plates includes a signal distribution device, and at least one of the third signal ports includes at least 2 compatible stations.

[0063] The compatible workstation is configured to determine a corresponding wiring mode according to at least one connected memory.

[0064] The signal distribution device is configured to copy the aging data according to the second control signal, and transmit the copied aging data to at least two compatible workstations respectively.

[0065] In this embodiment, compatibility with different types of memories is achieved by setting compatible stations for different memories on the burn-in board. The signal distribution device is used to copy the burn-in signal. By setting the signal distribution device, multiple memories can be burned in using a single burn-in signal, thereby improving the burn-in efficiency of the memory burn-in device.

[0066] In an optional embodiment of the present application, burn-in boards with different compatible interfaces can be provided for different types of memories, or a plurality of different compatible interfaces can be integrated on one burn-in board. Preferably, in order to fully utilize the compatible interfaces and simplify the circuit design of the burn-in board, a solution of only providing a compatible interface for one type of memory on one burn-in board can be adopted.

[0067] In some embodiments, the memory aging device further includes a power module, the power module includes a first power supply interface, the control backplane further includes at least one second power supply interface, and the at least one driver board further includes at least one third power supply interface.

[0068] The first power supply interface is detachably connected to the control backplane, and the power supply module supplies power to the control backplane through the first power supply interface.

[0069] At least one second power supply interface is detachably connected to at least one driving board, and the control backplane supplies power to the at least one driving board through the second power supply interface.

[0070] The third power supply interface is detachably connected to at least one aging board, and at least one driving board supplies power to at least one aging board through the third power supply interface.

[0071] In this embodiment, if Figure 1 As shown, in actual applications, a large number of memories need to be aged at one time, so an additional power module needs to be set up to power the driver board, the aging board and the memory, so as to ensure the stability of the aging process. Among them, the power module can power the control backplane through the first power supply interface, the first power supply interface can power the driver board through the second power supply interface, and the driver board can power the aging board through the third power supply interface.

[0072] As a preferred implementation, the second power supply interface can be integrated with the first signal interface to simultaneously output the first control signal to the driving board and connect to the power supply.

[0073] As a preferred implementation, the third power supply interface can be integrated with the second signal interface to simultaneously output the second control signal and the burn-in data to the burn-in board and connect to the power supply.

[0074] As a preferred implementation, in order to simplify the components of the memory burn-in device, the first power supply interface can be used to simultaneously power the control backplane, the driver board, and the burn-in board. Specifically, the power module can connect the first power supply interface with the second power supply interface through an independent driver board power supply circuit integrated on the control backplane, so that the power module can directly power the driver board; the first power supply interface can also be connected to the second power supply interface through an independent first burn-in board power supply circuit integrated on the control backplane, and then the second power supply interface can be connected to the third power supply interface through an independent second burn-in board power supply circuit integrated on the driver board, so that the power module can directly power the burn-in board.

[0075] In some embodiments, the storage aging device also includes an aging box, at least one aging plate is arranged inside the aging box, and the aging box is configured to heat the internal space of the aging box in response to a set temperature curve, and detect the temperature of the internal space so that the temperature of the internal space changes according to the temperature curve.

[0076] In this embodiment, an aging box is provided and the temperature inside the aging box is adjusted according to a preset temperature curve, so as to control the temperature of the external space of the memory to be aged. During the aging process, by maintaining the corresponding aging temperature and writing data into the memory, the memory is aged faster and the peak period of failure rate is quickly passed, so that components with early failure can be eliminated.

[0077] In some embodiments, Figure 5 As shown, the present application also provides a memory aging method, comprising:

[0078] Step S1, setting an aging temperature curve, and adjusting the ambient temperature of the storage device according to the temperature curve.

[0079] Step S2, generating aging data, setting aging parameters, and writing aging data into at least one memory according to the aging parameters.

[0080] Step S3, generating a test pattern, writing the test pattern into at least one memory, reading the test pattern stored in the at least one memory, comparing the test pattern in the memory with the written test pattern, and outputting the comparison result.

[0081] Step S4, in response to the comparison result that the test pattern in the memory is the same as the written test pattern, at this time, at least one memory burn-in is completed.

[0082] In this embodiment, by setting a temperature curve and adjusting the environment of the memory according to the temperature curve, and then writing aging data into the memory, the memory is placed in a relatively harsh working environment, accelerating the aging of the memory, and causing the defective memory to fail quickly, thereby obtaining a memory with stable working performance. Then, by writing a test pattern into the memory and detecting whether the test pattern in the memory is the same as the written test pattern, it is possible to determine whether the memory is faulty.

[0083] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0084] The present application divides the aging equipment into a control backplane, a drive board and an aging board, and sets a first signal port on the control backplane, a second signal port on the drive board and a third signal port on the aging board, so that the control backplane, the drive board and the aging board can be detachably connected, so that the memory aging equipment can adapt to different types of memories by replacing the corresponding aging board during the aging process of the memory. And by using the control backplane to control the drive board and the drive board to generate aging signals, when a large number of memories need to be aged, the number of drive boards and aging boards can be freely increased or decreased according to actual needs, thereby improving the aging efficiency of the memory.

[0085] The present application also sets a microcontroller on the driver board, which can randomly generate aging data according to the first control signal sent by the control backplane, and monitor the voltage and current of the aging board by setting a voltage acquisition module and a current acquisition module to prevent the aging board from failing and causing damage to the aging equipment; and also sets a logic analysis module to detect the memory to determine whether the memory is invalid; by setting the host computer to output the test results and voltage and current monitoring data, and using the host computer to transmit the user's aging requirements, the management of the aging equipment is facilitated.

[0086] In an optional embodiment of the present application, by configuring the second output interface to include multiple compatible output ports, during the aging process of different types of memories, it is only necessary to connect the aging board of the corresponding type of memory to the corresponding compatible output port, thereby achieving aging of different types of memories, thereby enabling the driver board to be reused.

[0087] In an optional embodiment of the present application, by setting a signal distribution device on the aging board and setting a plurality of compatible workstations on the aging board, a single-channel aging signal can be copied into multiple channels for aging a plurality of memories of the same type, thereby increasing the number of memories that can be aged at a single time.

[0088] In an optional embodiment of the present application, a power supply module is set up, and the first power supply interface of the power supply module is used to power the control backplane, and a second power supply interface is set on the control backplane to power the drive board, and a third power supply interface is set on the drive board to power the aging board. By using the power supply module to power the control backplane, the drive board and the aging board at the same time, the power supply lines of the memory aging device are reduced and the device structure is simplified.

[0089] In an optional embodiment of the present application, an aging box is provided to heat the external space of the storage device, so that the aging temperature of the storage device can be accurately controlled according to the aging requirements of the storage device, thereby improving the consistency of the storage device aging process.

[0090] It should be noted that the embodiments of the present application can be further described in the following manner:

[0091] The present application provides a memory aging device, comprising: a control backplane, at least one driver board, at least one aging board and at least one memory. The control backplane comprises a processor and at least one first signal port, at least one driver board comprises at least one second signal port, and at least one aging board comprises at least one third signal port. At least one output pin of the processor is connected to at least one first signal port, at least one first signal port is detachably connected to at least one driver board, at least one second signal port is detachably connected to at least one aging board, and at least one third signal port is detachably connected to at least one memory. The control backplane is configured to input a preset aging requirement to the processor, and the processor outputs a first control signal to at least one driver board through at least one first signal port in response to the aging requirement. At least one driver board is configured to generate a second control signal and aging data according to the first control signal, and output the second control signal and aging data to at least one aging board through at least one second signal port. At least one aging board is configured to transmit the aging data to the pin corresponding to at least one memory through at least one third signal port in response to the second control signal, and read the status information of at least one memory, and transmit the status information to at least one driver board through at least one second signal port.

[0092] In some embodiments, at least one driver board further comprises a microcontroller, a corresponding pin of the microcontroller is connected to at least one second signal port, and the microcontroller is configured to generate aging data in response to the first control signal, and output the aging data to a pin corresponding to the at least one second signal port.

[0093] In some embodiments, at least one driver board further includes a voltage acquisition module and a current acquisition module. The voltage acquisition module and the current acquisition module are connected to the microcontroller. The voltage acquisition module is used to acquire voltage data of at least one memory, and input the voltage data into the microcontroller, and the voltage data is monitored in real time by the microcontroller. The current acquisition module is used to acquire current data of at least one memory, and input the current data into the microcontroller, and the current data is monitored in real time by the microcontroller.

[0094] In some embodiments, at least one driver board further comprises a logic analysis module, the logic analysis module is connected to at least one second signal port, and the logic analysis module is connected to the processor via at least one first signal port. The logic analysis module is configured to generate a test pattern in response to a first test instruction output by the processor, write the test pattern into at least one memory via at least one second signal port, read the test pattern stored in at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result to the processor.

[0095] In some embodiments, the memory aging device further comprises a host computer connected to the control backplane and configured to: output aging requirements to the control backplane in response to user settings, and record voltage data, current data and comparison results.

[0096] In some embodiments, at least one second signal port includes at least two compatible output ports, and the compatible output ports are configured to determine a corresponding wiring mode according to at least one connected memory.

[0097] In some embodiments, at least one burn-in board includes a signal distribution device, and at least one third signal port includes at least two compatible stations. The compatible station is configured to determine a corresponding wiring mode according to at least one connected memory. The signal distribution device is configured to copy the burn-in data according to the second control signal, and transmit the copied burn-in data to the at least two compatible stations respectively.

[0098] In some embodiments, the memory aging device further includes a power module, the power module includes a first power supply interface, the control backplane further includes at least one second power supply interface, and the at least one driver board further includes at least one third power supply interface. The first power supply interface is detachably connected to the control backplane, and the power module supplies power to the control backplane through the first power supply interface. At least one second power supply interface is detachably connected to at least one driver board, and the control backplane supplies power to at least one driver board through the second power supply interface. The third power supply interface is detachably connected to at least one aging board, and at least one driver board supplies power to at least one aging board through the third power supply interface.

[0099] In some embodiments, the storage aging device also includes an aging box, at least one aging plate is arranged inside the aging box, and the aging box is configured to heat the internal space of the aging box in response to a set temperature curve, and detect the temperature of the internal space so that the temperature of the internal space changes according to the temperature curve.

[0100] The present application also provides a memory aging method, comprising: the method uses any of the above-mentioned memory aging devices to perform memory aging. The method comprises: setting an aging temperature curve, and adjusting the ambient temperature of the memory according to the temperature curve. Generate aging data, set aging parameters, and write aging data into at least one memory according to the aging parameters. Generate a test pattern, write the test pattern into at least one memory, read the stored test pattern in at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result. In response to the comparison result that the test pattern in the memory is the same as the written test pattern, then the aging of at least one memory is completed.

[0101] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0102] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0103] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0104] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A memory aging device, comprising: A control backplane, at least one driver board, at least one aging board and at least one memory; The control backplane includes a processor and at least one first signal port, the at least one driver board includes at least one second signal port, and the at least one burn-in board includes at least one third signal port; At least one output pin of the processor is connected to the at least one first signal port, the at least one first signal port is detachably connected to the at least one driver board, the at least one second signal port is detachably connected to the at least one aging board, and the at least one third signal port is detachably connected to the at least one memory; The control backplane is configured to input a preset aging requirement to the processor, and the processor outputs a first control signal to the at least one driving board through the at least one first signal port in response to the aging requirement; The at least one driving board is configured to generate a second control signal and burn-in data according to the first control signal, and output the second control signal and the burn-in data to the at least one burn-in board through the at least one second signal port; The at least one aging board is configured to transmit the aging data to the pin corresponding to the at least one memory through the at least one third signal port in response to the second control signal, and read the status information of the at least one memory, and transmit the status information to the at least one driving board through the at least one second signal port.

2. The memory aging device according to claim 1, wherein: The at least one driving board further comprises a microcontroller, and a corresponding pin of the microcontroller is connected to the at least one second signal port; The microcontroller is configured to generate the aging data in response to the first control signal, and output the aging data to a pin corresponding to the at least one second signal port.

3. The memory aging device according to claim 2, wherein: The at least one driving board further includes a voltage acquisition module and a current acquisition module; The voltage acquisition module and the current acquisition module are connected to the microcontroller; The voltage acquisition module is used to acquire voltage data of the at least one memory, and input the voltage data into the microcontroller, and monitor the voltage data in real time through the microcontroller; The current acquisition module is used to acquire current data of the at least one memory, and input the current data into the microcontroller, so that the current data is monitored in real time by the microcontroller.

4. The memory aging device according to claim 3, wherein: The at least one driver board further comprises a logic analysis module, the logic analysis module is connected to the at least one second signal port, and the logic analysis module is connected to the processor via the at least one first signal port; The logic analysis module is configured to generate a test pattern in response to a first test instruction output by the processor, write the test pattern into the at least one memory through the at least one second signal port, read the test pattern stored in the at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result to the processor.

5. The memory aging device according to claim 4, wherein: The memory aging device further includes a host computer, which is connected to the control backplane; The host computer is configured to: output a burn-in requirement to the control backplane in response to a user setting, and record the voltage data, the current data and the comparison result.

6. The memory aging device according to claim 1, wherein: The at least one second signal port includes at least two compatible output ports, and the compatible output ports are configured to determine a corresponding wiring mode according to the at least one connected memory.

7. The memory aging device according to claim 1, wherein: The at least one burn-in plate includes a signal distribution device, and the at least one third signal port includes at least 2 compatible stations; Wherein, the compatible station is configured to determine a corresponding wiring mode according to the at least one memory connected; The signal distribution device is configured to copy the aging data according to the second control signal, and transmit the copied aging data to the at least two compatible workstations respectively.

8. The memory aging device according to claim 1, wherein: The memory aging device further includes a power module, the power module includes a first power supply interface, the control backplane further includes at least one second power supply interface, and the at least one driver board further includes at least one third power supply interface; The first power supply interface is detachably connected to the control backplane, and the power module supplies power to the control backplane through the first power supply interface; The at least one second power supply interface is detachably connected to the at least one driving board, and the control backplane supplies power to the at least one driving board through the second power supply interface; The third power supply interface is detachably connected to the at least one aging plate, and the at least one driving plate supplies power to the at least one aging plate through the third power supply interface.

9. The memory aging device according to claim 1, wherein: The storage aging equipment also includes an aging box, the at least one aging plate is arranged inside the aging box, and the aging box is configured to heat the internal space of the aging box in response to a set temperature curve and detect the temperature of the internal space so that the temperature of the internal space changes according to the temperature curve.

10. A memory aging method, comprising: The method uses the memory aging device according to any one of claims 1 to 9 to perform memory aging; The method comprises: Setting an aging temperature curve, and adjusting the ambient temperature of the storage device according to the temperature curve; generating aging data, setting aging parameters, and writing aging data into the at least one memory according to the aging parameters; Generate a test pattern, write the test pattern into the at least one memory, read the test pattern stored in the at least one memory, compare the test pattern in the memory with the written test pattern, and output the comparison result; In response to the comparison result that the test pattern in the memory is the same as the written test pattern, then at this time, the at least one memory burn-in is completed.

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