Package structure

Abstract

A package structure includes: a substrate; the chip is positioned on the substrate and is electrically connected with the substrate; the heat dissipation cover is provided with a cavity, is positioned on the substrate and covers the chip through the cavity; the heat conduction layer is located between the surface, back to the substrate, of the chip and the heat dissipation cover; the blocking structure is located in the cavity and fixed to the portion, on the side portion of the chip, of the heat dissipation cover, the blocking structure comprises a first blocking part fixed to the heat dissipation cover and an elastic second blocking part connected with the first blocking part, and the second blocking part extends from the first blocking part in the direction towards one side of the chip; the second blocking part is provided with a first face facing the top of the heat dissipation cover and spaced from the top of the heat dissipation cover, and the distance between the first face and the substrate is smaller than or equal to the distance between the bottom face of the heat conduction layer and the substrate. The blocking structure with the elastic second blocking part is arranged in the cavity of the heat dissipation cover, so that the reliability of the packaging structure is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor packaging technology, and in particular to a packaging structure. Background Art

[0002] With the development of technology, the computing speed of chips in the package structure has been significantly improved, but this also causes the chips to generate more heat during operation. The increase in heat may reduce the working performance of the chip or even cause damage to the chip, thus affecting the performance of the package structure.

[0003] In order to solve the heat dissipation problem of the package structure, mounting a heat dissipation cover has become an effective solution. The heat dissipation cover mainly increases the heat dissipation area to improve the heat dissipation efficiency, thereby protecting the chip from overheating.

[0004] However, although mounting a heat dissipation cover alleviates the heat dissipation problem to a certain extent, the reliability of the packaging structure still faces challenges. Summary of the invention

[0005] The problem solved by the embodiment of the present invention is to provide a packaging structure to improve the reliability of the packaging structure.

[0006] To solve the above problems, an embodiment of the present invention provides a packaging structure, including: a substrate; a chip, located on the substrate and electrically connected to the substrate; a heat dissipation cover having a cavity, located on the substrate and covering the chip through the cavity; a thermal conductive layer, located between the surface of the chip facing away from the substrate and the heat dissipation cover; a blocking structure, located in the cavity and fixed on the heat dissipation cover at the side of the chip, the blocking structure including a first blocking portion fixed on the heat dissipation cover, and an elastic second blocking portion connected to the first blocking portion, the second blocking portion extending from the first blocking portion in a direction toward one side of the chip, the second blocking portion having a first surface facing the top of the heat dissipation cover and spaced from the top of the heat dissipation cover, and a distance between the first surface and the substrate is less than or equal to a distance between a bottom surface of the thermal conductive layer and the substrate.

[0007] Optionally, the heat dissipation cover includes a top cover plate, and a support portion located between the top cover plate and the substrate, wherein the support portion is located on the peripheral side of the top cover plate and connected to the top cover plate; the first blocking portion is fixed to the top cover plate and the support portion, or the first blocking portion is fixed to the top cover plate and spaced apart from the support portion.

[0008] Optionally, the blocking structure is in a ring shape surrounding the chip, and the first blocking portion, the second blocking portion and the heat dissipation cover form an accommodating space, and the accommodating space at least accommodates the heat conducting layer therein.

[0009] Optionally, the second annular blocking portion forms an opening, and in a direction parallel to the top surface of the substrate, a lateral dimension of the opening is smaller than or equal to a lateral dimension of the chip.

[0010] Optionally, the second blocking portion contacts a side wall of the chip.

[0011] Optionally, along an extension direction of the second blocking portion and along a direction away from the first blocking portion, a thickness of the second blocking portion decreases gradually.

[0012] Optionally, the second blocking portion further has a second surface facing the substrate, and at least one of the first surface and the second surface of the second blocking portion is an inclined surface, a concave surface or a stepped surface.

[0013] Optionally, the first blocking portion and the second blocking portion are in an integrated structure; or, the first blocking portion is a heat-conducting structure.

[0014] Optionally, when the first barrier portion is a heat-conducting structure, the material of the first barrier portion includes one or more of stainless steel, copper, aluminum, iron, tungsten, molybdenum, diamond and graphene.

[0015] Optionally, the first blocking portion is fixed to the heat dissipation cover via an adhesive layer; or, when the first blocking portion is a metal heat-conducting structure, the first blocking portion is welded to the heat dissipation cover.

[0016] Optionally, the melting point of the barrier structure is higher than 250 degrees Celsius.

[0017] Optionally, the material of the second blocking part includes rubber or silicone.

[0018] Optionally, the material of the second blocking portion includes one or more of fluororubber, silicone rubber, borosilicate rubber, fluorosilicone rubber, silicon nitrogen rubber or methyl vinyl silicone.

[0019] Optionally, the material of the heat conductive layer includes indium, indium silver alloy, silver, tin, tin silver alloy or tin lead alloy.

[0020] Optionally, the packaging structure further includes: components located in the cavity, wherein the components are located on a substrate at the bottom or side of the blocking structure and are electrically connected to the substrate.

[0021] Optionally, the chip is a first chip, and the components include one or both of passive components and a second chip.

[0022] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0023] In the packaging structure provided by the embodiment of the present invention, a chip and a heat dissipation cover covering the chip are arranged on the substrate, and a blocking structure is arranged inside the cavity of the heat dissipation cover, wherein the blocking structure comprises a first blocking portion fixed on the heat dissipation cover, and an elastic second blocking portion connected to the first blocking portion, wherein the second blocking portion extends from the first blocking portion in a direction toward one side of the chip, and the second blocking portion has a first surface facing the top of the heat dissipation cover and spaced from the top of the heat dissipation cover, and the distance between the first surface and the substrate is less than or equal to the distance between the bottom surface of the heat conductive layer and the substrate, therefore, the blocking structure can limit the heat conductive layer to the area surrounded by the blocking structure and the heat dissipation cover, and the blocking structure can prevent the material generated by the melting of the heat conductive layer in the high temperature process from sputtering toward the substrate, thereby reducing the probability of adverse effects on the substrate or other components on the substrate, and the second blocking portion is elastic, which is conducive to reducing the alignment accuracy requirements for the second blocking portion and the chip; in summary, by arranging the blocking structure in the cavity of the heat dissipation cover, it is conducive to improving the reliability of the packaging structure.

[0024] In an optional solution, the second annular blocking portion forms an opening, and in a direction parallel to the top surface of the substrate, the lateral dimension of the opening is less than or equal to the lateral dimension of the chip, thereby improving the sealing effect of the accommodating space.

[0025] In an optional solution, the thickness of the second blocking portion decreases along the extension direction of the second blocking portion and in the direction away from the first blocking portion, which makes it easy for the heat conductive layer above the chip to enter the space above the first surface of the second blocking portion through the second blocking portion, thereby reducing the packaging difficulty and improving the packaging reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the structure of a packaging structure;

[0027] Figure 2 and Figure 3 is a schematic structural diagram of a first embodiment of a packaging structure of the present invention;

[0028] Figure 4 is a structural schematic diagram of a second embodiment of a packaging structure of the present invention;

[0029] Figure 5 is a schematic structural diagram of a third embodiment of a packaging structure of the present invention;

[0030] Figure 6 is a schematic structural diagram of a fourth embodiment of a packaging structure of the present invention;

[0031] Figure 7 It is a schematic structural diagram of the fifth embodiment of the packaging structure of the present invention. DETAILED DESCRIPTION

[0032] As can be seen from the background technology, the performance of the packaging structure still needs to be improved. Now, combined with a schematic diagram of a packaging structure, the reasons why the performance of the packaging structure needs to be improved are analyzed.

[0033] refer to Figure 1 , Figure 1 It is a structural diagram of a packaging structure.

[0034] The packaging structure includes: a substrate 10; a heat dissipation cover 11, the heat dissipation cover 11 includes a top cover plate 12 and a support portion 13 connected to the top cover plate 12, the support portion 13 is located between the top cover plate 12 and the substrate 10 and is located on the peripheral side of the top cover plate 12, and the heat dissipation cover 11 and the substrate 10 form a cavity 14; a chip 15 is located in the cavity 14, the chip 15 is welded on the substrate 10 and is electrically connected to the substrate 10; a heat conductive layer 16 is located between the top of the chip 15 and the top cover plate 12 and is combined with the top cover plate 12; a metal plating layer 18 is located between the heat conductive layer 16 and the chip 15; a component 17 is located in the cavity 14 and on the side of the chip 15, the component 17 is welded on the substrate 10 and is electrically connected to the substrate 10.

[0035] It has been found through research that the packaging process usually includes a high-temperature process (for example, the process of welding the heat dissipation cover 11 and the substrate 10, the process of implanting the solder balls on the back of the substrate 10, and the subsequent process of welding the solder balls on the back of the substrate in the packaging structure to the PCB board all need to undergo high-temperature reflow). In the high-temperature process, if the melting point of the thermal conductive layer 16 is low (for example, the thermal conductive layer 16 usually adopts an indium layer, and the melting point of indium is low), it is easy to cause the material of the thermal conductive layer 16 to melt and sputter, which is easy to have an adverse effect on the substrate 10. Moreover, when there are components 17 on the substrate 10 on the side of the chip 15, it is also easy to cause the components 17 to be damaged, thereby affecting the reliability of the packaging structure.

[0036] In order to solve the technical problem, in the packaging structure provided by the embodiment of the present invention, a chip and a heat dissipation cover covering the chip are arranged on the substrate, and a blocking structure is arranged inside the cavity of the heat dissipation cover, wherein the blocking structure includes a first blocking portion fixed on the heat dissipation cover, and an elastic second blocking portion connected to the first blocking portion, wherein the second blocking portion extends from the first blocking portion in a direction toward one side of the chip, and the second blocking portion has a first surface facing the top of the heat dissipation cover and spaced from the top of the heat dissipation cover, and the distance between the first surface and the substrate is less than or equal to the distance between the bottom surface of the thermal conductive layer and the substrate, therefore, the blocking structure can prevent the material generated by the melting of the thermal conductive layer in the high-temperature process from sputtering toward the substrate, thereby reducing the probability of adverse effects on the substrate or other components on the substrate, and the second blocking portion is elastic, which is beneficial to reducing the alignment accuracy requirements for the second blocking portion and the chip; in summary, by arranging the blocking structure in the cavity of the heat dissipation cover, it is beneficial to improve the reliability of the packaging structure.

[0037] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0038] Figure 2 and Figure 3 1 is a schematic diagram of the structure of the first embodiment of the packaging structure of the present invention. Figure 3 is Figure 2 A schematic diagram showing only the substrate, heat dissipation cover, thermal conductive layer and barrier structure is shown on the basis.

[0039] Combined with reference Figure 2 and Figure 3 The packaging structure includes: a substrate 100; a chip 110, which is located on the substrate 100 and electrically connected to the substrate 100; a heat dissipation cover 101 having a cavity 105, which is located on the substrate 100 and covers the chip 110 through the cavity 105; a heat conducting layer 130, which is located between the surface of the chip 110 facing away from the substrate 100 and the heat dissipation cover 101; a blocking structure 104, which is located in the cavity 105 and fixed on the heat dissipation cover 101 at the side of the chip 110, and the blocking structure 104 includes a heat dissipation cover 101 fixed to the heat dissipation cover 101. A first blocking portion 1041 on the cover 101, and an elastic second blocking portion 1042 connected to the first blocking portion 1041, the second blocking portion 1042 extends from the first blocking portion 1041 in a direction toward the chip 110, the second blocking portion 1042 has a first surface 107 facing the top of the heat dissipation cover 101 and spaced from the top of the heat dissipation cover 101, and a distance d1 between the first surface 107 and the substrate 100 is less than or equal to a distance d2 between the bottom surface of the thermal conductive layer 130 and the substrate 100.

[0040] The substrate 100 serves as a packaging carrier, and is used to provide support for the chip 110 , and to provide an electrical connection path between the chip 110 and an external circuit, thereby achieving packaging integration and electrical integration of the chip 110 .

[0041] The substrate 100 may include a package substrate, an interposer, or a printed circuit board (PCB). As an example, the substrate 100 is a package substrate.

[0042] In this embodiment, the chip 110 is a first chip.

[0043] Specifically, the type of the first chip is determined according to actual functional requirements or application scenarios. For example, the first chip may include one or more of a radio frequency chip, a memory chip, an ASIC (Application-Specific Integrated Circuit) chip, a CPU (Central Processing Unit) chip, a GPU (Graphics Processing Unit) chip, and an FPGA (Field-Programmable Gate Array) chip. In other embodiments, the first chip may also be other chips according to actual process requirements.

[0044] In this embodiment, the chip 110 is soldered to the substrate 100 by flip chip packaging technology. Accordingly, the packaging structure further includes: a conductive bump 150 located between the chip 110 and the substrate 100 and electrically connecting the chip 110 and the substrate 100 .

[0045] The conductive bumps 150 are used to achieve heat conduction of the chip 110 and also to achieve electrical connection between the chip 110 and the substrate 100 .

[0046] The material of the conductive bump 150 may include one or more of copper, aluminum, gold, nickel, silver, palladium and tin. As an example, the material of the conductive bump 150 is tin.

[0047] In other embodiments, the packaging structure further includes: an underfill layer. The underfill layer is located between the chip 110 and the substrate 100 , and is also filled in gaps between the conductive bumps 150 .

[0048] The bottom filling layer can reduce the impact of the mismatch in thermal expansion coefficients between the chip 110 and the substrate 100, redistribute stress and strain, avoid failure of the conductive bumps 150, and help improve the reliability of welding between the chip 110 and the substrate 100, thereby helping to improve the reliability of the obtained packaging structure.

[0049] As an example, the material of the bottom filling layer includes epoxy resin. In other embodiments, the material of the bottom filling layer can also be made of other thermosetting materials, which can be selected by those skilled in the art according to actual needs and are not limited here.

[0050] In this embodiment, the packaging structure further includes: a component 140 , which is located on the substrate 100 at a side of the chip 110 and is electrically connected to the substrate 100 .

[0051] The component 140 includes one or both of a passive component and a second chip. As an example, the component 140 is a passive component.

[0052] It should be noted that the components may be active components or passive components, wherein the active components may include chips and the passive components may include capacitors, resistors or inductors.

[0053] The heat dissipation cover 101 is fixed on the substrate 100 and covers the chips and components on the substrate 100, thereby achieving chip packaging and heat dissipation.

[0054] The heat dissipation cover 101 has a cavity 105 so as to be covered on the substrate 100 at the side of the chip and components.

[0055] It should be noted that the thermal conductive layer 130 is located between the surface of the chip 110 facing away from the substrate 100 and the heat dissipation cover 101, so that the heat generated during the operation of the chip 110 is conducted to the heat dissipation cover 101 through the thermal conductive layer 130, and then the heat is conducted to the outside through the heat dissipation cover 101, thereby realizing the heat dissipation of the packaging structure, which correspondingly helps to extend the reliability and life of the packaging structure.

[0056] In this embodiment, the heat dissipation cover 101 also covers the component 140 . In other words, the component 140 is also located in the cavity 105 .

[0057] The material of the heat dissipation cover 101 is a heat conductive material, so that the heat dissipation cover 101 has a good thermal conductivity coefficient, which is conducive to quickly conducting heat from the packaging structure to the outside, thereby improving the heat dissipation efficiency of the packaging structure. For example, the material of the heat dissipation cover 101 may include one or more of stainless steel, copper, aluminum, iron, tungsten, molybdenum, diamond and graphene.

[0058] As an example, the material of the heat dissipation cover 101 may be a metal thermal conductive material, so as to facilitate the processing and forming of the heat dissipation cover 101. For example, the heat dissipation cover 101 may be formed by a stamping process.

[0059] In this embodiment, the heat dissipation cover 101 includes a top cover plate 102 and a support portion 103 located between the top cover plate 102 and the substrate 100. The support portion 103 is located on the peripheral side of the top cover plate 102 and connected to the top cover plate 102. The top cover plate 102 and the support portion 103 enclose a cavity 105.

[0060] The top cover plate 102 is used to achieve heat conduction with the heat conducting layer 130 on the top of the chip 110 , so that the heat generated by the chip 110 during operation can be transferred to the top cover plate 102 via the heat conducting layer 130 .

[0061] The support part 103 is fixed on the substrate 100. For example, the support part 103 is welded on the substrate 100, or the support part 103 is fixed on the substrate 100 by a heat conductive adhesive.

[0062] A blocking structure 104 is disposed inside the cavity 105 of the heat dissipation cover 101. The blocking structure 104 is fixed to the heat dissipation cover 101 at the side of the chip 110. The blocking structure 104 includes a first blocking portion 1041 fixed to the heat dissipation cover 101, and an elastic second blocking portion 1042 connected to the first blocking portion 1041. The second blocking portion 1042 extends from the first blocking portion 1041 in a direction toward one side of the chip 110. The distance d1 between the first surface 107 of the second blocking portion 1042 and the substrate 100 is less than or equal to the distance d2 between the bottom surface of the heat conducting layer 130 and the substrate 100. The distance d2 is, therefore, the blocking structure 104 can limit the heat-conducting layer 130 to the area surrounded by the blocking structure 104 and the heat dissipation cover 101, and the blocking structure 104 can prevent the material generated by the melting of the heat-conducting layer 130 in the high-temperature process from sputtering toward the substrate 100, thereby reducing the probability of adverse effects on the substrate 100 or other components on the substrate 100, and the second blocking portion 1042 is elastic, which is conducive to reducing the alignment accuracy requirements for the second blocking portion 1042 and the chip 110; in summary, by arranging the blocking structure 104 in the cavity 105 of the heat dissipation cover 101, it is beneficial to improve the reliability of the packaging structure.

[0063] It should be noted that in order to distinguish the first blocking portion 1041 from the second blocking portion 1042, Figure 2 and Figure 3 The dotted line in FIG. 1 represents the boundary position between the first blocking portion 1041 and the second blocking portion 1042 .

[0064] The first blocking portion 1041 may be fixed to one or both of the top cover plate 102 and the supporting portion 103 .

[0065] In this embodiment, the first blocking portion 1041 is fixed to the top cover plate 102 and the support portion 103, thereby improving the bonding strength between the first blocking portion 1041 and the heat dissipation cover 101. In other embodiments, the first blocking portion is fixed to the top cover plate and spaced apart from the support portion.

[0066] In this embodiment, the blocking structure 104 is in a ring shape surrounding the chip 110 , and the first blocking portion 1041 , the second blocking portion 1042 and the heat dissipation cover 101 form an accommodating space 106 , and the accommodating space 106 at least accommodates the heat conducting layer 130 therein.

[0067] By adopting the annular blocking structure 104 , the sputtered material of the heat conducting layer 130 can be blocked from all directions, thereby improving the blocking effect of the blocking structure 104 .

[0068] In other embodiments, according to actual needs, the blocking structure may also be located at a local position on the heat dissipation cover to block the material of the heat conducting layer 130 at a specific position, or the blocking structure may also be discretely arranged along the circumference of the chip.

[0069] like Figure 3 As shown, in this embodiment, the annular second blocking portion 1042 forms an opening 108 .

[0070] As an example, the shape of the projection of the opening 108 on the substrate 100 matches the shape of the projection of the chip 110 on the substrate 100 , thereby facilitating the heat conducting layer 130 or the chip 110 to pass through the opening 108 and enter the accommodating space 106 .

[0071] In one embodiment, in a direction parallel to the top surface of the substrate 100 , the lateral dimension of the opening 108 is equal to the lateral dimension of the chip 110 , thereby improving the sealing effect of the accommodating space 106 and further improving the blocking effect of the blocking structure 104 .

[0072] In another embodiment, in a direction parallel to the top surface of the substrate 100 , a lateral dimension (not indicated) of the opening 108 is smaller than a lateral dimension (not indicated) of the chip 110 , so that an end of the second blocking portion 1042 can be compressed, thereby further improving the sealing effect of the accommodating space 106 .

[0073] In this embodiment, the second blocking portion 1042 contacts the sidewall of the chip 110 , which is beneficial for the blocking structure 104 to completely block the heat conducting layer 130 , thereby further improving the material blocking effect of the blocking structure 104 on the heat conducting layer 130 .

[0074] In other embodiments, there may also be a gap between the second blocking portion and the sidewall of the chip.

[0075] In this embodiment, the first blocking portion 1041 and the second blocking portion 1042 are integrated into one structure, thereby improving the overall elasticity of the blocking structure 104 .

[0076] In other embodiments, the materials of the first barrier portion and the second barrier portion may also be different. For example, the first barrier portion is a heat-conducting structure. For another example, the material of the first barrier portion is the same as the material of the heat dissipation cover.

[0077] In this embodiment, the first blocking portion 1041 is fixed to the heat dissipation cover 101 through an adhesive layer (not shown), so that the fixing method of the first blocking portion 1041 is simple.

[0078] In other embodiments, when the first blocking portion is a metal heat-conducting structure, the first blocking portion may also be welded to the heat dissipation cover.

[0079] It should be noted that the blocking structure 104 is fixed on the heat dissipation cover 101 , and thus has little impact on the preparation process of the heat dissipation cover 101 itself.

[0080] In this embodiment, the melting point of the blocking structure 104 is higher than 250 degrees Celsius, which improves the high temperature resistance of the blocking structure 104 in the high temperature process of the packaging process, thereby ensuring the integrity and structural stability of the blocking structure 104 while reducing the restrictions on the high temperature process of the packaging process (for example, the high temperature reflow process in the process of welding the heat dissipation cover 101 and the substrate 100, the high temperature reflow process when implanting the solder balls on the back of the substrate 100, and the subsequent high temperature reflow process when welding the solder balls on the back of the substrate 100 in the packaging structure to the PCB board).

[0081] In this embodiment, the material of the second blocking portion 1042 includes rubber or silicone. Rubber or silicone has good flexibility and can be easily manufactured into products of various shapes and sizes.

[0082] As an example, the second blocking portion 1042 may be made of high temperature resistant rubber or high temperature resistant silicone, so as to improve the reliability of the second blocking portion 1042. As an example, the material of the second blocking portion 1042 may include one or more of fluororubber, silicone rubber, borosilicate rubber, fluorosilicone rubber, silicon nitrogen rubber or methyl vinyl silicone.

[0083] It should be noted that, in other embodiments, the second blocking portion may also be made of other suitable rubber materials or silicone materials. In other embodiments, the second blocking portion may also be made of other suitable elastic materials.

[0084] It should also be noted that the first blocking portion 1041 can be fixed to one or both of the top cover plate 102 and the support portion 103. Accordingly, the component 140 is located on the bottom or side of the substrate 100 of the blocking structure 104. Figure 2 , which illustrates the situation where the component 140 is located below the blocking structure 104 .

[0085] The heat conducting layer 130 is used to conduct heat to the chip 110 during operation of the chip 110 , thereby transferring the heat generated by the chip 110 to the heat dissipation cover 101 .

[0086] In this embodiment, the heat conducting layer 130 is fixedly connected to the chip 110 by welding, and the heat conducting layer 130 is fixedly connected to the heat dissipation cover 101 by welding, so as to improve the heat conduction effect of the heat conducting layer 130 .

[0087] The material of the heat-conducting layer 130 includes indium, indium-silver alloy, silver, tin, tin-silver alloy or tin-lead alloy. The above materials have excellent thermal conductivity coefficients and improve the thermal conductivity of the heat-conducting layer 130. As an example, the material of the heat-conducting layer 130 is indium.

[0088] In this embodiment, the packaging structure further includes: a metal plating layer 120 located between the heat conducting layer 130 and the chip 110 .

[0089] The metal coating 120 and the thermal conductive layer 130 have better wettability. Under the influence of high-temperature process, the metal coating 120 and the thermal conductive layer 130 usually form a eutectic layer at the interface due to mutual diffusion between the materials. Therefore, the metal coating 120 can be used to improve the bonding strength between the chip 110 and the thermal conductive layer 130, thereby correspondingly improving the heat dissipation efficiency.

[0090] The material of the metal plating layer 120 includes one or more of gold, silver and copper. It should be noted that gold, silver or copper have excellent thermal conductivity, which is conducive to transferring the heat generated by the chip 110 to the heat conducting layer 130. As an example, the metal plating layer 120 is a gold plating layer.

[0091] It should be noted that, in other embodiments, the metal plating layer may also be located between the heat conductive layer and the heat dissipation cover.

[0092] Figure 4 It is a structural schematic diagram of the second embodiment of the packaging structure of the present invention.

[0093] The difference between this embodiment and the above embodiment is that: in the blocking structure 204, along the extension direction of the second blocking portion 2042 and along the direction away from the first blocking portion 2041, the thickness of the second blocking portion 2042 decreases gradually.

[0094] The thickness of the second barrier portion 2042 decreases gradually, which makes it easy for the heat-conducting layer above the chip to enter the space above the first surface 205 of the second barrier portion 2042 through the second barrier portion 2042, which is beneficial to reducing packaging difficulty and improving packaging reliability.

[0095] The second blocking portion 2042 has a first surface 205 facing the top of the heat dissipation cover and spaced apart from the top of the heat dissipation cover. The second blocking portion 2042 also has a second surface 206 facing the substrate. At least one of the first surface 205 and the second surface 206 is an inclined surface, a concave surface or a stepped surface, so that the thickness of the second blocking portion 2042 decreases gradually.

[0096] For example, Figure 4 The case where the first surface 205 of the second blocking portion 2042 is an inclined surface is shown. In other embodiments, the second surface 206 of the second blocking portion is an inclined surface, or the first surface 205 and the second surface 206 of the second blocking portion are both inclined surfaces.

[0097] like Figure 4 As shown, as an example, the first surface 205 and the second surface 206 of the second blocking portion 2042 intersect, thereby further reducing the thickness of the second blocking portion 2042 at the end position on the side away from the first blocking portion 2041. In other embodiments, the second blocking portion may also have an end surface on the side away from the first blocking portion.

[0098] Figure 5 It is a schematic structural diagram of the third embodiment of the packaging structure of the present invention.

[0099] The similarities between this embodiment and the above embodiment are not repeated here. The difference between this embodiment and the above embodiment is that: in the blocking structure 304, the second blocking portion 3042 and the first blocking portion 3041 are made of different materials.

[0100] The second blocking portion 3042 and the first blocking portion 3041 are non-integrated structures, so that the material of the first blocking portion 3041 can be flexibly selected.

[0101] In this embodiment, the first blocking portion 3041 is a heat-conducting structure, thereby further improving the heat dissipation performance of the packaging structure.

[0102] In this embodiment, the material of the first blocking portion 3041 may include one or more of stainless steel, copper, aluminum, iron, tungsten, molybdenum, diamond and graphene.

[0103] As an example, the first blocking portion 3041 may be a metal heat-conducting structure, so as to facilitate processing and forming. The metal heat-conducting structure includes one or more of stainless steel, copper, aluminum, iron, tungsten and molybdenum.

[0104] The first blocking portion 3041 may be fixed to the heat dissipation cover 301 via an adhesive layer, or the first blocking portion 3041 may be welded to the heat dissipation cover 301 .

[0105] In this embodiment, the first blocking portion 3041 is a metal heat-conducting structure, and the first blocking portion 3041 is welded to the heat dissipation cover 301 , thereby improving the bonding strength between the first blocking portion 3041 and the heat dissipation cover 301 .

[0106] As an example, the material of the first blocking portion 3041 may be the same as that of the heat dissipation cover 301 , which is beneficial to improving the combination reliability of the first blocking portion 3041 and the heat dissipation cover 301 .

[0107] As an example, the first blocking portion 3041 is fixed to the top cover plate 302 and the supporting portion 303 of the heat dissipation cover 301 .

[0108] Figure 6 It is a structural schematic diagram of a fourth embodiment of the packaging structure of the present invention.

[0109] The differences between this embodiment and the above embodiment are as follows: the first blocking portion 4041 is fixed on the top cover plate 402 of the heat dissipation cover 401 and is spaced apart from the support portion 403 .

[0110] The first blocking portion 4041 is spaced apart from the supporting portion 403 , which is beneficial to saving materials on the one hand, and is beneficial to reducing the occupied area of ​​the space above the substrate 100 on the other hand, and correspondingly beneficial to reducing the impact on the layout or height of components.

[0111] like Figure 6 As shown, in this embodiment, the component 440 is located on the substrate 100 at the bottom or side of the blocking structure 104 .

[0112] In this embodiment, in the blocking structure 404 , the first blocking portion 4041 and the second blocking portion 4042 are in an integrated structure.

[0113] In other embodiments, the first blocking portion and the second blocking portion may also be non-integrated structures.

[0114] For example, combined with reference Figure 7 , Figure 7 1 is a schematic diagram of the structure of the fifth embodiment of the packaging structure of the present invention. The similarities between this embodiment and the fourth embodiment are not repeated here. The difference between this embodiment and the fourth embodiment is that in the blocking structure 504, the first blocking portion 5041 and the second blocking portion 5042 are made of different materials.

[0115] Specifically, the first blocking portion 5042 is a heat-conducting structure.

[0116] For the detailed description of the first blocking portion 5042 , reference may be made to the relevant contents in the third embodiment, which will not be repeated here.

[0117] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A packaging structure, characterized in that: include: substrate; A chip, located on the substrate and electrically connected to the substrate; A heat dissipation cover having a cavity, located on the substrate and covering the chip through the cavity; A heat-conducting layer, located between the surface of the chip facing away from the substrate and the heat-dissipating cover; A blocking structure is located in the cavity and fixed on the heat dissipation cover at the side position of the chip, the blocking structure includes a first blocking portion fixed on the heat dissipation cover, and an elastic second blocking portion connected to the first blocking portion, the second blocking portion extends from the first blocking portion in a direction toward one side of the chip, the second blocking portion has a first surface facing the top of the heat dissipation cover and spaced from the top of the heat dissipation cover, and the distance between the first surface and the substrate is less than or equal to the distance between the bottom surface of the thermal conductive layer and the substrate.

2. The packaging structure according to claim 1, characterized in that: The heat dissipation cover comprises a top cover plate and a support portion located between the top cover plate and a base plate, wherein the support portion is located on a peripheral side of the top cover plate and connected to the top cover plate; The first blocking portion is fixed on the top cover plate and the supporting portion, or the first blocking portion is fixed on the top cover plate and spaced apart from the supporting portion.

3. The packaging structure according to claim 1, characterized in that: The blocking structure is in a ring shape surrounding the chip, and the first blocking portion, the second blocking portion and the heat dissipation cover form an accommodating space, and the accommodating space at least accommodates the heat conducting layer.

4. The packaging structure according to claim 3, characterized in that: The second annular blocking portion forms an opening, and in a direction parallel to the top surface of the substrate, a lateral dimension of the opening is smaller than or equal to a lateral dimension of the chip.

5. The packaging structure according to claim 1, characterized in that: The second blocking portion contacts a side wall of the chip.

6. The packaging structure according to claim 1, characterized in that: The thickness of the second blocking portion decreases along an extending direction of the second blocking portion and in a direction away from the first blocking portion.

7. The packaging structure according to claim 6, characterized in that: The second blocking portion further has a second surface facing the substrate, and at least one of the first surface and the second surface of the second blocking portion is an inclined surface, a concave surface or a stepped surface.

8. The packaging structure according to claim 1, characterized in that: The first blocking portion and the second blocking portion are in an integrated structure; or, the first blocking portion is a heat-conducting structure.

9. The packaging structure according to claim 8, characterized in that: In the case where the first barrier portion is a heat-conducting structure, the material of the first barrier portion includes one or more of stainless steel, copper, aluminum, iron, tungsten, molybdenum, diamond and graphene.

10. The packaging structure according to claim 8, characterized in that: The first blocking portion is fixed to the heat dissipation cover via an adhesive layer; Alternatively, when the first blocking portion is a metal heat-conducting structure, the first blocking portion is welded to the heat dissipation cover.

11. The packaging structure according to claim 1, characterized in that: The melting point of the barrier structure is above 250 degrees Celsius.

12. The packaging structure according to any one of claims 1 to 11, characterized in that: The material of the second blocking part includes rubber or silicone.

13. The packaging structure according to claim 12, characterized in that: The material of the second blocking portion includes one or more of fluororubber, silicone rubber, borosilicate rubber, fluorosilicone rubber, silane rubber or methyl vinyl silicone.

14. The packaging structure according to claim 1, wherein: The material of the heat conducting layer includes indium, indium silver alloy, silver, tin, tin silver alloy or tin lead alloy.

15. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: components located in the cavity, wherein the components are located on a substrate at the bottom or side of the blocking structure and are electrically connected to the substrate.

16. The packaging structure according to claim 15, characterized in that: The chip is a first chip, and the components include one or both of a passive component and a second chip.

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