Semiconductor laser chip and preparation method thereof, semiconductor laser chip packaging assembly

Abstract

The present invention relates to the field of semiconductor technology, and discloses a semiconductor laser chip and a preparation method thereof, and a semiconductor laser chip packaging component. The semiconductor laser chip comprises a semiconductor chip substrate; a first electrode layer, a first electrode bonding layer, a cavity film coating layer, a first electrode transition layer and a first welding layer located on the first surface of the semiconductor chip substrate; a second electrode layer located on the second surface of the semiconductor chip substrate; the cavity film coating layer is located on the side of the semiconductor laser chip and covers the edge of the first electrode bonding layer on the side facing away from the first electrode layer; the first electrode bonding layer covers the cavity film coating layer on the side facing away from the semiconductor chip substrate and the side of the cavity film coating layer; the first electrode transition layer is also located on the side of the first electrode transition layer on the side facing away from the cavity film coating layer; and the material of the first welding layer is a precious metal. Compared with the related art, the present invention can improve the packaging reliability and heat dissipation performance of the semiconductor laser chip.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor laser chip and a preparation method thereof, and a semiconductor laser chip packaging component. Background Art

[0002] During the packaging process of semiconductor laser chips, solder is usually used to weld at least one side of the positive or negative electrode of the chip to the heat sink. The welding surface not only serves as an electrode contact, but also serves as the main heat dissipation path for the chip. The integrity of the welding surface directly affects the heat dissipation capacity of the chip packaging structure. When the laser chip is optically coated on the cavity surface, due to the gap and misalignment between the chip and the companion film, a part of the optical film will be coated on the positive and negative metal composite layers of the laser chip to form a coating layer. The coating layer of the optical film is usually an inorganic non-metallic material such as oxides and nitrides.

[0003] At present, laser chip packaging usually uses solders such as gold tin (AuSn), indium (In), tin silver copper (SAC) or nano silver paste. The above solders usually cannot wet inorganic non-metallic materials. Therefore, during packaging, empty solder joints will be formed in the chip near the cavity surface area above the wrapping coating. Since the wrapping coating is close to the cavity surface of the chip, this empty solder joint will extend the heat dissipation path of the chip cavity surface, seriously affecting the reliability of the chip. Summary of the invention

[0004] In view of this, the present invention provides a semiconductor laser chip and a preparation method thereof, so as to solve the problem in the related art that when the semiconductor laser chip is welded and packaged with a heat sink, the inorganic non-metallic material on the surface of the semiconductor laser chip cannot be wetted by the solder, and an empty solder joint will be formed above the coating, resulting in the extension of the heat dissipation path of the chip cavity surface and the reduction of the reliability of the chip.

[0005] In a first aspect, the present invention provides a semiconductor laser chip, the semiconductor laser chip comprising:

[0006] A semiconductor chip substrate having a first surface and a second surface opposite to each other;

[0007] A first electrode layer is located on a first surface of the semiconductor chip substrate;

[0008] A second electrode layer is located on the second surface of the semiconductor chip substrate;

[0009] A first electrode bonding layer is located on a surface of the first electrode layer facing away from the semiconductor chip substrate;

[0010] The cavity surface film coating is located on the side of the semiconductor chip substrate, the side of the first electrode layer, the side of the second electrode layer and the side of the first electrode bonding layer, and covers the edge of the first electrode bonding layer on the side facing away from the first electrode layer; the material of the cavity surface film coating is an inorganic non-metallic material;

[0011] The first electrode transition layer is located on the surface of the first electrode bonding layer facing away from the first electrode layer, and covers the surface of the cavity film coating layer facing away from the semiconductor chip substrate and the side surface of the cavity film coating layer;

[0012] The first welding layer is located on the surface of the first electrode transition layer facing away from the first electrode bonding layer, and is also located on the surface of the first electrode transition layer facing away from the cavity film coating layer; the material of the first welding layer is a precious metal.

[0013] The semiconductor laser chip provided by the present invention, on the one hand, by setting the first welding layer as the outermost layer of the semiconductor laser chip, the material of the first welding layer is a precious metal, so that the packaging solder can wet, spread and form a good interface metallurgical bond on the surface of the first welding layer; at the same time, the first welding layer covers the cavity surface film around the coating layer, so that the solder can wet the surface of the first welding layer corresponding to the cavity surface film around the coating layer, eliminating the problem of empty welding caused by the poor wettability of the cavity surface film around the coating layer, so that after the semiconductor laser chip is packaged with the heat sink, the heat in the cavity surface area can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip. On the other hand, by setting the first electrode bonding layer between the cavity surface film around the coating layer and the first electrode layer, and setting the first electrode transition layer between the cavity surface film around the coating layer and the first welding layer, the interface bonding strength between the cavity surface film around the coating layer and the first electrode layer, the cavity surface film around the coating layer and the first welding layer can be improved, and the first electrode layer, the cavity surface film around the coating layer and the first welding layer can be effectively bonded together, reducing the risk of packaging cracking between each interface, thereby improving the reliability of the semiconductor laser chip packaging structure. Therefore, the semiconductor laser chip provided by the present invention can improve the interface bonding strength between the first electrode layer, the cavity surface film coating layer and the first welding layer, so that the solder can easily wet and spread on the surface of the semiconductor laser chip, so that the solder can effectively fill the chip near the cavity surface area, shorten the heat dissipation path of the cavity surface, effectively improve the chip packaging reliability, and improve the stability, reliability and heat dissipation performance of the semiconductor laser chip packaging structure.

[0014] In an optional embodiment, the first electrode bonding layer includes a stacked first active metal bonding layer and a first compound bonding layer; the first active metal bonding layer is in contact with the first electrode layer; the first compound bonding layer is in contact with the cavity mask coating layer;

[0015] The first electrode transition layer includes a stacked first compound transition layer and a first active metal transition layer; the first compound transition layer is in contact with the cavity surface film coating layer; the first active metal transition layer is in contact with the first welding layer;

[0016] The material of the first active metal bonding layer and the material of the first active metal transition layer are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB;

[0017] The material of the first compound bonding layer and the material of the first compound transition layer are intermetallic compounds corresponding to the active metal; wherein the material of the first compound bonding layer is a carbide or nitride corresponding to the material of the first active metal bonding layer; the material of the first compound transition layer is a carbide or nitride corresponding to the material of the first active metal transition layer;

[0018] The material of the first electrode layer is metal;

[0019] The noble metal is Au, Ag, Pt or Pd.

[0020] The semiconductor laser chip provided by the present invention has the following characteristics: on the one hand, the material of the first active metal bonding layer is an active metal, which can contact with the first electrode layer (metal) and form a good metal bond, and the interface bonding strength is relatively high; the material of the first compound bonding layer is an intermetallic compound, which has both metallic and non-metallic properties, and can contact with the cavity surface mask coating layer and form a good interface bonding; at the same time, the compatibility between the first active metal bonding layer and the first compound bonding layer is relatively high, and the interface bonding strength is relatively high; on the other hand, the material of the first active metal transition layer is an active metal, which can contact with the first welding layer (metal) and form a good metal bond, and the interface bonding strength is relatively high; the material of the first compound transition layer is an intermetallic compound, which has both metallic and non-metallic properties, and can contact with the cavity surface mask coating layer and form a good interface bonding; at the same time, the compatibility between the first active metal transition layer and the first compound transition layer is relatively high, and the interface bonding strength is relatively high. Therefore, the interface bonding strength between the cavity surface mask coating and the first electrode layer, and between the cavity surface mask coating and the first welding layer can be improved by the first electrode bonding layer and the first electrode transition layer, and the first electrode layer, the cavity surface mask coating and the first welding layer can be effectively bonded together, reducing the risk of package cracking between the interfaces, thereby improving the reliability of the semiconductor laser chip packaging structure. In addition, the material of the first welding layer is Au, Ag, Pt or Pd, which has strong chemical stability and is not easily oxidized in the atmosphere, which can promote the wetting of the solder on the surface of the first welding layer, eliminate the problem of empty soldering caused by the poor wettability of the cavity surface mask coating, so that the heat of the cavity surface area of ​​the semiconductor laser chip can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip.

[0021] In an optional embodiment, the active metal is Cr, Ti or Zr;

[0022] The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN;

[0023] The thickness of the first compound bonding layer is 5nm~50nm;

[0024] The thickness of the first active metal bonding layer is 10nm~100nm;

[0025] The thickness of the first compound transition layer is 5nm~50nm;

[0026] The thickness of the first active metal transition layer is 10nm~100nm.

[0027] In an optional implementation, the semiconductor laser chip further includes:

[0028] The second electrode bonding layer is located on the side surface of the second electrode layer facing away from the semiconductor chip substrate; the cavity film coating also covers the side surface of the second electrode bonding layer and covers the edge portion of the side surface of the second electrode bonding layer facing away from the second electrode layer;

[0029] The second electrode transition layer is located on the surface of the second electrode bonding layer facing away from the second electrode layer, and covers the surface of the cavity film coating layer facing away from the semiconductor chip substrate and the side surface of the cavity film coating layer;

[0030] The second welding layer is located on a side surface of the second electrode transition layer that is away from the second electrode bonding layer, and the second welding layer is also located on a side surface of the second electrode transition layer that is away from the cavity surface film coating layer.

[0031] In an optional embodiment, the second electrode bonding layer includes a stacked second active metal bonding layer and a second compound bonding layer; the second active metal bonding layer is in contact with the second electrode layer; the second compound bonding layer is in contact with the cavity mask coating layer;

[0032] The second electrode transition layer includes a stacked second compound transition layer and a second active metal transition layer; the second compound transition layer is in contact with the cavity film coating layer; the second active metal transition layer is in contact with the second welding layer;

[0033] The material of the second active metal bonding layer and the material of the second active metal transition layer are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB;

[0034] The material of the second compound bonding layer and the material of the second compound transition layer are intermetallic compounds corresponding to the active metal; wherein the material of the second compound bonding layer is a carbide or nitride corresponding to the material of the second active metal bonding layer; the material of the second compound transition layer is a carbide or nitride corresponding to the material of the second active metal transition layer;

[0035] The material of the second electrode layer is metal;

[0036] The material of the second welding layer is Au, Ag, Pt or Pd.

[0037] The semiconductor laser chip provided by the present invention has the following characteristics: on the one hand, the material of the second active metal bonding layer is an active metal, which can contact with the second electrode layer (metal) and form a good metal bond, and the interface bonding strength is relatively high; the material of the second compound bonding layer is an intermetallic compound, which has both metallic and non-metallic properties, and can contact with the cavity surface mask coating and form a good interface bonding; at the same time, the compatibility between the second active metal bonding layer and the second compound bonding layer is relatively high, and the interface bonding strength is relatively high; on the other hand, the material of the second active metal transition layer is an active metal, which can contact with the second welding layer (metal) and form a good metal bond, and the interface bonding strength is relatively high; the material of the second compound transition layer is an intermetallic compound, which has both metallic and non-metallic properties, and can contact with the cavity surface mask coating and form a good interface bonding; at the same time, the compatibility between the second active metal transition layer and the second compound transition layer is relatively high, and the interface bonding strength is relatively high. Therefore, the interface bonding strength between the cavity surface mask coating and the second electrode layer, and between the cavity surface mask coating and the second welding layer can be improved by the second electrode bonding layer and the second electrode transition layer, and the second electrode layer, the cavity surface mask coating and the second welding layer can be effectively bonded together, reducing the risk of package cracking between the interfaces, thereby improving the reliability of the semiconductor laser chip packaging structure. In addition, the material of the second welding layer is Au, Ag, Pt or Pd, which has strong chemical stability and is not easily oxidized in the atmosphere, which can promote the wetting of the solder on the surface of the second welding layer, eliminate the problem of empty soldering caused by the poor wettability of the cavity surface mask coating, so that the heat of the cavity surface area of ​​the semiconductor laser chip can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip.

[0038] In an optional embodiment, the active metal is Cr, Ti or Zr;

[0039] The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN;

[0040] The thickness of the second compound bonding layer is 5nm~50nm;

[0041] The thickness of the second active metal bonding layer is 10nm~100nm;

[0042] The thickness of the second compound transition layer is 5nm~50nm;

[0043] The thickness of the second active metal transition layer is 10nm~100nm.

[0044] In an optional embodiment, the semiconductor chip substrate is a functional layer of a semiconductor laser chip, and the semiconductor chip substrate includes an active region, a P-type layer, an N-type layer and a dielectric layer;

[0045] The structure of the first electrode layer is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure;

[0046] The structure of the second electrode layer is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure;

[0047] The structure of the cavity surface mask coating is one or more layers of silicon oxide layer, aluminum oxide layer, titanium oxide layer, tantalum oxide layer, silicon nitride layer, aluminum nitride layer and titanium nitride layer.

[0048] In a second aspect, the present invention provides a method for preparing a semiconductor laser chip, which is used to prepare the semiconductor laser chip of the first aspect. The method comprises:

[0049] Providing a semiconductor chip substrate having a first surface and a second surface opposite to each other;

[0050] forming a first electrode layer on a first surface of the semiconductor chip substrate;

[0051] forming a second electrode layer on a second surface of the semiconductor chip substrate;

[0052] forming a first electrode adhesive layer on a surface of the first electrode layer facing away from the semiconductor chip substrate;

[0053] Forming a cavity surface film-wrapped plating layer, the cavity surface film-wrapped plating layer is located on the side of the semiconductor chip substrate, the side of the first electrode layer, the side of the second electrode layer and the side of the first electrode bonding layer, and covers the edge portion of the surface of the first electrode bonding layer facing away from the first electrode layer;

[0054] Forming a first electrode transition layer, the first electrode transition layer is located on a surface of the first electrode adhesive layer facing away from the first electrode layer, and covers a surface of the cavity film coating layer facing away from the semiconductor chip substrate and a side surface of the cavity film coating layer;

[0055] A first welding layer is formed, which is located on the surface of the first electrode transition layer facing away from the first electrode bonding layer, and is also located on the surface of the first electrode transition layer facing away from the cavity film coating layer; the material of the first welding layer is a precious metal.

[0056] In an optional embodiment, the preparation method further comprises:

[0057] A second electrode bonding layer is formed, and the second electrode bonding layer is located on a side surface of the second electrode layer facing away from the semiconductor chip substrate; the cavity surface film coating also covers the side surface of the second electrode bonding layer and covers the edge portion of the side surface of the second electrode bonding layer facing away from the second electrode layer;

[0058] A second electrode transition layer is formed, the second electrode transition layer is located on the surface of the second electrode bonding layer facing away from the second electrode layer, and covers the surface of the cavity film coating layer facing away from the semiconductor chip substrate and the side surface of the cavity film coating layer;

[0059] A second welding layer is formed, and the second welding layer is located on a side surface of the second electrode transition layer facing away from the second electrode bonding layer, and the second welding layer is also located on a side surface of the second electrode transition layer facing away from the cavity surface film coating layer.

[0060] In a third aspect, the present invention provides a semiconductor laser chip packaging assembly, the semiconductor laser chip packaging assembly comprising the semiconductor laser chip and a heat sink as described in the first aspect above;

[0061] The heat sink is located on one side of the first welding layer of the semiconductor laser chip, and solder is included between the conductor laser chip and the heat sink; the material of the solder is gold-tin, indium, tin-silver-copper or nano silver paste.

[0062] The semiconductor laser chip packaging assembly provided by the present invention, on the one hand, the packaging solder can wet, spread and form a good interface metallurgical bond on the surface of the first welding layer of the precious metal material; at the same time, the first welding layer covers the cavity surface film coating, which can make the solder wet the surface of the first welding layer corresponding to the cavity surface film coating, eliminating the problem of empty soldering caused by the poor wettability of the cavity surface film coating, so that after the semiconductor laser chip is packaged with the heat sink, the heat in the cavity surface area can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip. On the other hand, the interface adhesion between the first electrode layer, the cavity surface film coating and the first welding layer of the semiconductor laser chip is strong, which reduces the risk of packaging cracking between the interfaces in the packaging structure, thereby improving the reliability of the semiconductor laser chip packaging structure. Therefore, the semiconductor laser chip packaging assembly provided by the present invention can improve the interface bonding strength between the first electrode layer, the cavity surface film coating layer and the first welding layer, so that the solder can easily wet and spread on the surface of the semiconductor laser chip, so that the solder can effectively fill the chip near the cavity surface area, shorten the heat dissipation path of the cavity surface, and effectively improve the stability, reliability and heat dissipation performance of the semiconductor laser chip packaging assembly. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the related technologies, the drawings required for use in the specific embodiments or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0064] Figure 1A It is a structural schematic diagram of a semiconductor laser chip packaging structure according to the related technology.

[0065] Figure 1B This is a scanning electron microscope photograph of a semiconductor laser chip packaging structure in the related art.

[0066] Figure 2 Schematic diagram of the structure of a semiconductor laser chip according to an embodiment of the present invention.

[0067] Figure 3A It is a schematic structural diagram of a first electrode bonding layer in a semiconductor laser chip according to an embodiment of the present invention.

[0068] Figure 3B It is a schematic structural diagram of a first electrode transition layer in a semiconductor laser chip according to an embodiment of the present invention.

[0069] Figure 3C It is a schematic structural diagram of a second electrode bonding layer in a semiconductor laser chip according to an embodiment of the present invention.

[0070] Figure 3D It is a schematic structural diagram of a second electrode transition layer in a semiconductor laser chip according to an embodiment of the present invention.

[0071] Figure 4 It is a schematic flow chart of a method for preparing a semiconductor laser chip according to an embodiment of the present invention.

[0072] Figure 5 It is a schematic flow chart of another method for preparing a semiconductor laser chip according to an embodiment of the present invention.

[0073] Fig. 6A Schematic diagram of the structure of a semiconductor laser chip according to an embodiment of the present invention.

[0074] Figure 6B is a scanning electron microscope photograph of a semiconductor laser chip according to an embodiment of the present invention.

[0075] Reference numerals:

[0076] 1. Semiconductor substrate; 2. Positive electrode layer; 3. Negative electrode layer; 4. Wrap-around coating; 5. Solder; 6. Heat sink; 7. Empty soldering area; 10. Semiconductor chip substrate; 20. First electrode layer; 21. First electrode bonding layer; 211. First active metal bonding layer; 212. First compound bonding layer; 22. First electrode transition layer; 221. First active metal transition layer; 222. First compound transition layer; 23. First soldering layer; 30. Second electrode layer; 31. Second electrode bonding layer; 311. Second active metal bonding layer; 312. Second compound bonding layer; 32. Second electrode transition layer; 321. Second active metal transition layer; 322. Second compound transition layer; 33. Second soldering layer; 40. Cavity mask wrap-around coating; 50. Solder; 60. Heat sink. DETAILED DESCRIPTION

[0077] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0078] In the following description, the description of known structures and technologies is omitted to avoid unnecessary confusion of the concept of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified for the purpose of clear expression, and some details may be omitted. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships between them are only exemplary, and may be deviated due to manufacturing tolerances or technical limitations in practice, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be a middle layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element.

[0079] During the packaging process of semiconductor laser chips, solder is usually used to weld at least one side of the positive or negative electrode of the chip to the heat sink. The welding surface not only serves as an electrode contact, but also serves as the main heat dissipation path for the chip. The integrity of the welding surface directly affects the heat dissipation capacity of the chip packaging structure. When the laser chip is optically coated on the cavity surface, due to the gap and misalignment between the chip and the companion film, a part of the optical film will be coated on the positive and negative metal composite layers of the laser chip to form a coating layer. The coating layer of the optical film is usually an inorganic non-metallic material such as oxides and nitrides.

[0080] At present, laser chip packaging usually uses solders such as AuSn, SAC and In. The above solders usually cannot wet inorganic non-metallic materials. Therefore, empty solder will be formed above the wrapping layer during packaging. Since the wrapping layer is close to the cavity surface of the chip, this empty solder will extend the heat dissipation path of the chip cavity surface, seriously affecting the reliability of the chip. Figure 1A and Figure 1B As shown. Figure 1A The schematic diagram of the semiconductor laser chip packaging structure forming an empty solder joint above the wrapping layer is shown in FIG. The semiconductor laser chip includes a semiconductor substrate 1 and a positive electrode layer 2 and a negative electrode layer 3 on both sides thereof. The positive electrode layer 2 is soldered to a heat sink 6 through a solder 5. Since the solder 5 cannot wet the wrapping layer 4 at the edge of the positive electrode layer 2, an empty solder joint area 7 is formed above the wrapping layer 4. Figure 1B This is a scanning electron microscope photo of a hollow solder joint formed above the wrap-around coating in a semiconductor laser chip packaging structure. It can be seen that the AuSn solder in the figure can wet the positive electrode metal well, but cannot wet the wrap-around coating, resulting in a hollow solder joint in the chip near the cavity surface area.

[0081] like Figure 2 As shown, this embodiment provides a semiconductor laser chip, the semiconductor laser chip includes:

[0082] A semiconductor chip substrate 10, wherein the semiconductor chip substrate 10 has a first surface and a second surface opposite to each other;

[0083] The first electrode layer 20 is located on the first surface of the semiconductor chip substrate 10;

[0084] The second electrode layer 30 is located on the second surface of the semiconductor chip substrate 10;

[0085] A first electrode adhesive layer 21 is located on a surface of the first electrode layer 20 facing away from the semiconductor chip substrate 10;

[0086] The cavity surface film coating 40 is located on the side of the semiconductor chip substrate 10, the side of the first electrode layer 20, the side of the second electrode layer 30 and the side of the first electrode bonding layer 21, and covers the edge of the first electrode bonding layer 21 on the side facing away from the first electrode layer 20; the material of the cavity surface film coating 40 is an inorganic non-metallic material;

[0087] The first electrode transition layer 22 is located on the surface of the first electrode adhesive layer 21 facing away from the first electrode layer 20 and covers the surface of the cavity film coating layer 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity film coating layer 40;

[0088] The first welding layer 23 is located on the side surface of the first electrode transition layer 22 facing away from the first electrode bonding layer 21, and the first welding layer 23 is also located on the side surface of the first electrode transition layer 22 facing away from the cavity mask coating layer 40; the material of the first welding layer 23 is a precious metal.

[0089] In specific implementations, the first electrode layer 20 and the second electrode layer 30 can be the positive electrode or the negative electrode of the semiconductor laser chip. In some examples, the first electrode layer 20 is the positive electrode and the second electrode layer 30 is the negative electrode. In other examples, the first electrode layer 20 is the negative electrode and the second electrode layer 30 is the positive electrode.

[0090] When packaging semiconductor laser chips, considering the solderability issue, it is necessary to ensure that the entire surface of the chip's positive and negative electrodes (including the position above the winding coating) is made of precious metal materials such as Au, Ag, Pt and Pd. Precious metals have strong chemical stability and are not easily oxidized in the atmosphere. Solders such as AuSn, In, SAC and nano silver paste commonly used in semiconductor laser chip packaging can wet, spread and form good interface metallurgical bonding on the surface of the above-mentioned precious metal materials. The present invention arranges a first welding layer of precious metal material on the surface of the first electrode layer, and ensures that the first welding layer covers the winding coating, so that the first welding layer of precious metal material can promote the wetting of the solder on the chip surface, thereby eliminating the problem of empty soldering caused by poor wettability of the winding coating.

[0091] The semiconductor laser chip provided in this embodiment, on the one hand, by setting a first welding layer as the outermost layer of the semiconductor laser chip, the material of the first welding layer is a precious metal, so that the packaging solder can wet and spread on the surface of the first welding layer and form a good interface metallurgical bond; at the same time, the first welding layer covers the cavity surface mask coating, which can make the solder wet the surface of the first welding layer corresponding to the cavity surface mask coating, thereby eliminating the problem of empty soldering caused by poor wettability of the cavity surface mask coating, so that after the semiconductor laser chip is packaged with the heat sink, the heat in the cavity surface area can be directly conducted to the heat sink along the solder, thereby shortening the heat dissipation path and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip. On the other hand, by providing a first electrode bonding layer between the cavity mask coating and the first electrode layer, and providing a first electrode transition layer between the cavity mask coating and the first welding layer, the interface bonding strength between the cavity mask coating and the first electrode layer, and between the cavity mask coating and the first welding layer can be improved, and the first electrode layer, the cavity mask coating and the first welding layer can be effectively bonded together, reducing the risk of package cracking, delamination and bubbling between the interfaces, thereby improving the reliability of the semiconductor laser chip packaging structure. Therefore, the semiconductor laser chip provided in this embodiment can improve the interface bonding strength between the first electrode layer, the cavity mask coating and the first welding layer, so that the solder can easily wet and spread on the surface of the semiconductor laser chip, so that the solder can effectively fill the chip near the cavity surface area, shorten the heat dissipation path of the cavity surface, effectively improve the chip packaging reliability, and improve the stability, reliability and heat dissipation performance of the semiconductor laser chip packaging structure.

[0092] In some optional embodiments, the first electrode bonding layer 21 includes a first active metal bonding layer 211 and a first compound bonding layer 212 stacked, such as Figure 3A As shown; the first active metal bonding layer 211 is in contact with the first electrode layer 20; the first compound bonding layer 212 is in contact with the cavity surface film coating layer 40;

[0093] The first electrode transition layer 22 includes a stacked first compound transition layer 222 and a first active metal transition layer 221. Figure 3B As shown; the first compound transition layer 222 is in contact with the cavity surface film coating 40; the first active metal transition layer 221 is in contact with the first welding layer 23;

[0094] The material of the first active metal bonding layer 211 and the material of the first active metal transition layer 221 are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB;

[0095] The material of the first compound bonding layer 212 and the material of the first compound transition layer 222 are intermetallic compounds corresponding to the active metals; wherein the material of the first compound bonding layer 212 is the carbide or nitride corresponding to the material of the first active metal bonding layer 211; the material of the first compound transition layer 222 is the carbide or nitride corresponding to the material of the first active metal transition layer 221;

[0096] The material of the first electrode layer 20 is metal;

[0097] The noble metal is Au, Ag, Pt or Pd.

[0098] In a specific implementation, the material of the first active metal bonding layer 211 and the material of the first active metal transition layer 221 can be the same active metal or different active metals.

[0099] In some examples, the material of the first active metal bonding layer 211 and the material of the first active metal transition layer 221 are Cr, Ti or Zr; the material of the first compound bonding layer 212 and the material of the first compound transition layer 222 are intermetallic compounds corresponding to Cr, Ti or Zr. In one example, the material of the first active metal bonding layer 211 is Cr, and the material of the first compound bonding layer 212 is CrC or CrN; in another example, the material of the first active metal transition layer 221 is Ti, and the material of the first compound transition layer 222 is TiC or TiN.

[0100] The semiconductor laser chip provided in this embodiment has, on the one hand, a first active metal bonding layer made of an active metal, which can contact the first electrode layer (metal) and form a good metal bond, and has a high interface bonding strength; a first compound bonding layer made of an intermetallic compound, which has both metallic and non-metallic properties, can contact the cavity mask coating and form a good interface bonding; at the same time, the first active metal bonding layer and the first compound bonding layer have high compatibility, and have a high interface bonding strength; on the other hand, a first active metal transition layer made of an active metal, which can contact the first welding layer (metal) and form a good metal bond, and has a high interface bonding strength; a first compound transition layer made of an intermetallic compound, which has both metallic and non-metallic properties, can contact the cavity mask coating and form a good interface bonding; at the same time, the first active metal transition layer and the first compound transition layer have high compatibility, and have a high interface bonding strength. Therefore, the interface bonding strength between the cavity surface mask coating and the first electrode layer, and between the cavity surface mask coating and the first welding layer can be improved by the first electrode bonding layer and the first electrode transition layer, and the first electrode layer, the cavity surface mask coating and the first welding layer can be effectively bonded together, reducing the risk of package cracking between the interfaces, thereby improving the reliability of the semiconductor laser chip packaging structure. In addition, the material of the first welding layer is Au, Ag, Pt or Pd, which has strong chemical stability and is not easily oxidized in the atmosphere, which can promote the wetting of the solder on the surface of the first welding layer, eliminate the problem of empty soldering caused by the poor wettability of the cavity surface mask coating, so that the heat of the cavity surface area of ​​the semiconductor laser chip can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip.

[0101] In some optional embodiments, the active metal is Cr, Ti or Zr;

[0102] The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN;

[0103] The thickness of the first compound adhesive layer 212 is 5 nm to 50 nm, for example, 5 μm, 15 μm, 27.5 μm, 40 μm or 50 μm;

[0104] The thickness of the first active metal bonding layer 211 is 10 nm to 100 nm, for example, 10 μm, 30 μm, 55 μm, 75 μm or 100 μm;

[0105] The thickness of the first compound transition layer 222 is 5 nm to 50 nm, for example, 5 μm, 15 μm, 27.5 μm, 40 μm or 50 μm;

[0106] The thickness of the first active metal transition layer 221 is 10 nm-100 nm, for example, 10 μm, 30 μm, 55 μm, 75 μm or 100 μm.

[0107] During specific implementation, the material of the cavity mask coating 40 is an inorganic non-metallic material, and the bonding strength with most metal materials is relatively weak. Due to the mismatch of thermal expansion coefficients between the heat sink, solder and chip, packaging stress is inevitably generated. Therefore, after packaging, there is a great risk of cracking at the interface between the cavity mask coating 40-first electrode layer 20 / second electrode layer 30, and at the interface between the cavity mask coating 40-first welding layer 23 / second welding layer 33, which affects heat dissipation. The present invention sets a first electrode bonding layer / second electrode bonding layer at the interface between the cavity mask coating 40-first electrode layer 20 / second electrode layer 30 to improve the interface bonding strength.

[0108] The first electrode bonding layer 21 and the second electrode bonding layer 31 are collectively referred to as electrode bonding layers, the first electrode transition layer 22 and the second electrode transition layer 32 are collectively referred to as electrode transition layers, the first electrode layer 20 and the second electrode layer 30 are collectively referred to as electrode layers, and the first welding layer 23 and the second welding layer 33 are collectively referred to as welding layers. Both the electrode bonding layer and the electrode transition layer are divided into two layers: an active metal bonding layer and a compound bonding layer. First, the material in contact with the electrode layer and the welding layer whose material is metal is selected from Cr, Ti and Zr metals with high activity. It is easier to form a good metal bond between metals, and the interface bonding strength is high. Then, the material in contact with the cavity mask winding coating 40 is an intermetallic compound material such as CrN, CrC, CrN, TiN and TiC. The intermetallic compound has both metallic and non-metallic properties, and can form a good interface bonding with the cavity mask winding coating. Finally, the two layers of materials of the electrode bonding layer and the electrode transition layer are metal and its corresponding intermetallic compound, respectively. The two layers have good compatibility and high interface bonding strength. Therefore, the present invention uses the electrode bonding layer and the electrode transition layer as a link to bond the first electrode layer 20 / the second electrode layer 30, the cavity surface film coating layer 40 and the first welding layer 23 / the second welding layer 33 together, which can effectively reduce the risk of package cracking between the interfaces.

[0109] In some optional embodiments, the semiconductor laser chip further includes:

[0110] The second electrode bonding layer 31 is located on the side surface of the second electrode layer 30 facing away from the semiconductor chip substrate 10; the cavity surface film coating layer 40 also covers the side surface of the second electrode bonding layer 31 and covers the edge portion of the side surface of the second electrode bonding layer 31 facing away from the second electrode layer 30;

[0111] The second electrode transition layer 32 is located on the surface of the second electrode adhesive layer 31 facing away from the second electrode layer 30 and covers the surface of the cavity film coating layer 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity film coating layer 40;

[0112] The second welding layer 33 is located on a surface of the second electrode transition layer 32 that is away from the second electrode bonding layer 31 , and the second welding layer 33 is also located on a surface of the second electrode transition layer 32 that is away from the cavity surface film coating layer 40 .

[0113] In some optional embodiments, the second electrode bonding layer 31 includes a stacked second active metal bonding layer 311 and a second compound bonding layer 312, such as Figure 3C As shown; the second active metal bonding layer 311 is in contact with the second electrode layer 30; the second compound bonding layer 312 is in contact with the cavity surface film coating layer 40;

[0114] The second electrode transition layer 32 includes a stacked second compound transition layer 322 and a second active metal transition layer 321, such as Figure 3D As shown; the second compound transition layer 322 is in contact with the cavity surface film around the plating layer 40; the second active metal transition layer 321 is in contact with the second welding layer 33;

[0115] The materials of the second active metal bonding layer 311 and the second active metal transition layer 321 are active metals, and the active metals are metals of group IVB, group VB or group VIB;

[0116] The materials of the second compound bonding layer 312 and the second compound transition layer 322 are intermetallic compounds corresponding to the active metals; wherein the material of the second compound bonding layer 312 is the carbide or nitride corresponding to the material of the second active metal bonding layer 311; the material of the second compound transition layer 322 is the carbide or nitride corresponding to the material of the second active metal transition layer 321;

[0117] The material of the second electrode layer 30 is metal;

[0118] The material of the second welding layer 33 is Au, Ag, Pt or Pd.

[0119] In a specific implementation, the material of the second active metal bonding layer 311 and the material of the second active metal transition layer 321 can be the same active metal or different active metals.

[0120] In some examples, the material of the second active metal bonding layer 311 and the second active metal transition layer 321 is Cr, Ti or Zr; the material of the second compound bonding layer 312 and the second compound transition layer 322 is an intermetallic compound corresponding to Cr, Ti or Zr. In one example, the material of the second active metal bonding layer 311 is Cr, and the material of the second compound bonding layer 312 is CrC or CrN; in another example, the material of the second active metal transition layer 321 is Ti, and the material of the second compound transition layer 322 is TiC or TiN.

[0121] The semiconductor laser chip provided in this embodiment has, on the one hand, a second active metal bonding layer made of an active metal, which can contact the second electrode layer (metal) and form a good metal bond, and has a high interface bonding strength; a second compound bonding layer made of an intermetallic compound, which has both metallic and non-metallic properties, can contact the cavity mask coating and form a good interface bonding; at the same time, the second active metal bonding layer and the second compound bonding layer have high compatibility, and have a high interface bonding strength; on the other hand, a second active metal transition layer made of an active metal, which can contact the second welding layer (metal) and form a good metal bond, and has a high interface bonding strength; a second compound transition layer made of an intermetallic compound, which has both metallic and non-metallic properties, can contact the cavity mask coating and form a good interface bonding; at the same time, the second active metal transition layer and the second compound transition layer have high compatibility, and have a high interface bonding strength. Therefore, the interface bonding strength between the cavity surface mask coating and the second electrode layer, and between the cavity surface mask coating and the second welding layer can be improved by the second electrode bonding layer and the second electrode transition layer, and the second electrode layer, the cavity surface mask coating and the second welding layer can be effectively bonded together, reducing the risk of package cracking between the interfaces, thereby improving the reliability of the semiconductor laser chip packaging structure. In addition, the material of the second welding layer is Au, Ag, Pt or Pd, which has strong chemical stability and is not easily oxidized in the atmosphere, which can promote the wetting of the solder on the surface of the second welding layer, eliminate the problem of empty soldering caused by the poor wettability of the cavity surface mask coating, so that the heat of the cavity surface area of ​​the semiconductor laser chip can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip.

[0122] In some optional embodiments, the active metal is Cr, Ti or Zr;

[0123] The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN;

[0124] The thickness of the second compound adhesive layer 312 is 5 nm to 50 nm, for example, 5 μm, 15 μm, 27.5 μm, 40 μm or 50 μm;

[0125] The thickness of the second active metal bonding layer 311 is 10 nm to 100 nm, for example, 10 μm, 30 μm, 55 μm, 75 μm or 100 μm;

[0126] The thickness of the second compound transition layer 322 is 5 nm to 50 nm, for example, 5 μm, 15 μm, 27.5 μm, 40 μm or 50 μm;

[0127] The thickness of the second active metal transition layer 321 is 10 nm-100 nm, for example, 10 μm, 30 μm, 55 μm, 75 μm or 100 μm.

[0128] In some optional embodiments, the semiconductor chip substrate 10 is a functional layer of a semiconductor laser chip, and the semiconductor chip substrate 10 includes an active region, a P-type layer, an N-type layer, and a dielectric layer;

[0129] The structure of the first electrode layer 20 is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure;

[0130] The structure of the second electrode layer 30 is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure;

[0131] The structure of the cavity surface mask coating layer 40 is one or more layers selected from the group consisting of a silicon oxide layer, an aluminum oxide layer, a titanium oxide layer, a tantalum oxide layer, a silicon nitride layer, an aluminum nitride layer and a titanium nitride layer.

[0132] like Figure 4 As shown, this embodiment provides a method for preparing a semiconductor laser chip, and the preparation method includes but is not limited to steps S101 to S106.

[0133] Step S101 : providing a semiconductor chip substrate 10 , wherein the semiconductor chip substrate 10 has a first surface and a second surface opposite to each other.

[0134] Step S102 , forming a first electrode layer 20 on a first surface of the semiconductor chip substrate 10 ; and forming a second electrode layer 30 on a second surface of the semiconductor chip substrate 10 .

[0135] Step S103 , forming a first electrode adhesive layer 21 on a surface of the first electrode layer 20 that faces away from the semiconductor chip substrate 10 .

[0136] Step S104, forming a cavity surface mask coating 40, the cavity surface mask coating 40 is located on the side of the semiconductor chip substrate 10, the side of the first electrode layer 20, the side of the second electrode layer 30 and the side of the first electrode bonding layer 21, and covers the edge portion of the surface of the first electrode bonding layer 21 facing away from the first electrode layer 20.

[0137] Step S105 , forming a first electrode transition layer 22 , the first electrode transition layer 22 is located on the surface of the first electrode adhesive layer 21 facing away from the first electrode layer 20 , and covers the surface of the cavity surface film coating 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity surface film coating 40 .

[0138] Step S106, forming a first welding layer 23, the first welding layer 23 is located on the side surface of the first electrode transition layer 22 facing away from the first electrode bonding layer 21, and the first welding layer 23 is also located on the side surface of the first electrode transition layer 22 facing away from the cavity mask coating layer 40; the material of the first welding layer 23 is a precious metal.

[0139] In some optional embodiments, the preparation method further comprises:

[0140] A second electrode bonding layer 31 is formed, and the second electrode bonding layer 31 is located on a side surface of the second electrode layer 30 facing away from the semiconductor chip substrate 10; the cavity surface film surrounding plating layer 40 also covers the side surface of the second electrode bonding layer 31 and covers the edge portion of the side surface of the second electrode bonding layer 31 facing away from the second electrode layer 30;

[0141] A second electrode transition layer 32 is formed, the second electrode transition layer 32 is located on the surface of the second electrode adhesive layer 31 facing away from the second electrode layer 30, and covers the surface of the cavity film-wrapped coating layer 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity film-wrapped coating layer 40;

[0142] A second welding layer 33 is formed, and the second welding layer 33 is located on a side surface of the second electrode transition layer 32 that is away from the second electrode bonding layer 31 , and the second welding layer 33 is also located on a side surface of the second electrode transition layer 32 that is away from the cavity surface film coating layer 40 .

[0143] In some optional embodiments, the first electrode bonding layer 21 includes a first active metal bonding layer 211 and a first compound bonding layer 212 stacked, such as Figure 3A As shown; the first active metal bonding layer 211 is in contact with the first electrode layer 20; the first compound bonding layer 212 is in contact with the cavity surface film coating layer 40;

[0144] The first electrode transition layer 22 includes a stacked first compound transition layer 222 and a first active metal transition layer 221. Figure 3BAs shown; the first compound transition layer 222 is in contact with the cavity surface film coating 40; the first active metal transition layer 221 is in contact with the first welding layer 23;

[0145] The material of the first active metal bonding layer 211 and the material of the first active metal transition layer 221 are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB;

[0146] The material of the first compound bonding layer 212 and the material of the first compound transition layer 222 are intermetallic compounds corresponding to the active metals; wherein the material of the first compound bonding layer 212 is the carbide or nitride corresponding to the material of the first active metal bonding layer 211; the material of the first compound transition layer 222 is the carbide or nitride corresponding to the material of the first active metal transition layer 221;

[0147] The material of the first electrode layer 20 is metal;

[0148] The noble metal is Au, Ag, Pt or Pd.

[0149] In some optional embodiments, the second electrode bonding layer 31 includes a stacked second active metal bonding layer 311 and a second compound bonding layer 312, such as Figure 3C As shown; the second active metal bonding layer 311 is in contact with the second electrode layer 30; the second compound bonding layer 312 is in contact with the cavity surface film coating layer 40;

[0150] The second electrode transition layer 32 includes a stacked second compound transition layer 322 and a second active metal transition layer 321, such as Figure 3D As shown; the second compound transition layer 322 is in contact with the cavity surface film around the plating layer 40; the second active metal transition layer 321 is in contact with the second welding layer 33;

[0151] The materials of the second active metal bonding layer 311 and the second active metal transition layer 321 are active metals, and the active metals are metals of group IVB, group VB or group VIB;

[0152] The materials of the second compound bonding layer 312 and the second compound transition layer 322 are intermetallic compounds corresponding to the active metals; wherein the material of the second compound bonding layer 312 is the carbide or nitride corresponding to the material of the second active metal bonding layer 311; the material of the second compound transition layer 322 is the carbide or nitride corresponding to the material of the second active metal transition layer 321;

[0153] The material of the second electrode layer 30 is metal;

[0154] The material of the second welding layer 33 is Au, Ag, Pt or Pd.

[0155] like Figure 5As shown, the present invention also provides a schematic flow chart of another method for preparing a semiconductor laser chip, including but not limited to steps S201 to S206.

[0156] Step S201 : providing a semiconductor chip substrate 10 , wherein the semiconductor chip substrate 10 has a first surface and a second surface opposite to each other.

[0157] Step S202 , forming a first electrode layer 20 on the first surface of the semiconductor chip substrate 10 ; and forming a second electrode layer 30 on the second surface of the semiconductor chip substrate 10 .

[0158] Step S203 , forming a first electrode adhesive layer 21 on a surface of the first electrode layer 20 facing away from the semiconductor chip substrate 10 ; forming a second electrode adhesive layer 31 on a surface of the second electrode layer 30 facing away from the semiconductor chip substrate 10 .

[0159] Step S204, forming a cavity surface mask coating 40, the cavity surface mask coating 40 is located on the side of the semiconductor chip substrate 10, the side of the first electrode layer 20, the side of the second electrode layer 30, the side of the first electrode bonding layer 21 and the side of the second electrode bonding layer 31, and covers the edge portion of the surface of the first electrode bonding layer 21 facing away from the first electrode layer 20 and the edge portion of the surface of the second electrode bonding layer 31 facing away from the second electrode layer 30.

[0160] Step S205, forming a first electrode transition layer 22 and a second electrode transition layer 32, the first electrode transition layer 22 is located on the surface of the first electrode bonding layer 21 facing away from the first electrode layer 20, and covers the surface of the cavity mask coating 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity mask coating 40; the second electrode transition layer 32 is located on the surface of the second electrode bonding layer 31 facing away from the second electrode layer 30, and covers the surface of the cavity mask coating 40 facing away from the semiconductor chip substrate 10 and the side surface of the cavity mask coating 40.

[0161] Step S206, forming a first welding layer 23 and a second welding layer 33, the first welding layer 23 is located on the side surface of the first electrode transition layer 22 facing away from the first electrode bonding layer 21, and the first welding layer 23 is also located on the side surface of the first electrode transition layer 22 facing away from the cavity mask coating 40; the second welding layer 33 is located on the side surface of the second electrode transition layer 32 facing away from the second electrode bonding layer 31, and the second welding layer 33 is also located on the side surface of the second electrode transition layer 32 facing away from the cavity mask coating 40; the materials of the first welding layer 23 and the second welding layer 33 are precious metals.

[0162] like Fig. 6A As shown, this embodiment provides a semiconductor laser chip packaging assembly, the semiconductor laser chip packaging assembly includes the semiconductor laser chip and a heat sink 60 as described in the first aspect above;

[0163] The heat sink 60 is located on one side of the first welding layer 23 of the semiconductor laser chip. A solder 50 is included between the semiconductor laser chip and the heat sink 60 . The material of the solder 50 is gold tin (AuSn), indium (In), tin-silver-copper (SAC) or nano silver paste.

[0164] like Figure 6B The scanning electron microscope photo of the semiconductor laser chip package assembly of this embodiment. It can be seen that the solder layer promotes the wetting of the solder on the coating layer, eliminating the empty solder joint. Figure 1B The packaging interface of the semiconductor laser chip packaging structure, such as Figure 6B The packaging interface structure of the semiconductor laser chip packaging assembly provided in this embodiment can allow the heat in the cavity surface area to be directly transferred to the heat sink along the solder, shortening the heat dissipation path and significantly improving the chip packaging reliability.

[0165] The semiconductor laser chip packaging assembly provided by this embodiment, on the one hand, the packaging solder can wet, spread and form a good interface metallurgical bond on the surface of the first welding layer of the precious metal material; at the same time, the first welding layer covers the cavity surface mask coating, which can make the solder wet the surface of the first welding layer corresponding to the cavity surface mask coating, eliminating the problem of empty solder joints caused by the poor wettability of the cavity surface mask coating, so that after the semiconductor laser chip is packaged with the heat sink, the heat in the cavity surface area can be directly conducted to the heat sink along the solder, shortening the heat dissipation path, and improving the packaging reliability and heat dissipation performance of the semiconductor laser chip. On the other hand, the interface adhesion between the first electrode layer, the cavity surface mask coating and the first welding layer of the semiconductor laser chip is strong, which reduces the risk of packaging cracking between the interfaces in the packaging structure, thereby improving the reliability of the semiconductor laser chip packaging structure. Therefore, the semiconductor laser chip packaging assembly provided by the present invention can improve the interface bonding strength between the first electrode layer, the cavity surface film coating layer and the first welding layer, so that the solder can easily wet and spread on the surface of the semiconductor laser chip, so that the solder can effectively fill the chip near the cavity surface area, shorten the heat dissipation path of the cavity surface, and effectively improve the stability, reliability and heat dissipation performance of the semiconductor laser chip packaging assembly.

[0166] In the description of this specification, the description with reference to the terms "this embodiment", "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples, unless otherwise clearly and specifically defined. In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" can explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0167] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0168] The above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention is described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may also include more other equivalent embodiments without departing from the concept of the present invention. The scope of protection of the present invention is determined by the scope of the attached claims.

Claims

1. A semiconductor laser chip, characterized in that: include: A semiconductor chip substrate having a first surface and a second surface opposite to each other; A first electrode layer is located on a first surface of the semiconductor chip substrate; A second electrode layer is located on the second surface of the semiconductor chip substrate; A first electrode bonding layer is located on a surface of the first electrode layer facing away from the semiconductor chip substrate; The cavity surface film coating is located on the side of the semiconductor chip substrate, the side of the first electrode layer, the side of the second electrode layer and the side of the first electrode bonding layer, and covers the edge of the first electrode bonding layer on the side facing away from the first electrode layer; the material of the cavity surface film coating is an inorganic non-metallic material; A first electrode transition layer is located on a surface of the first electrode adhesive layer facing away from the first electrode layer, and covers a surface of the cavity film coating layer facing away from the semiconductor chip substrate and a side surface of the cavity film coating layer; The first welding layer is located on the surface of the first electrode transition layer on the side facing away from the first electrode bonding layer, and the first welding layer is also located on the surface of the first electrode transition layer on the side facing away from the cavity mask coating layer; the material of the first welding layer is a precious metal.

2. The semiconductor laser chip according to claim 1, characterized in that The first electrode bonding layer comprises a stacked first active metal bonding layer and a first compound bonding layer; the first active metal bonding layer is in contact with the first electrode layer; the first compound bonding layer is in contact with the cavity mask coating layer; The first electrode transition layer includes a stacked first compound transition layer and a first active metal transition layer; the first compound transition layer is in contact with the cavity surface film coating layer; the first active metal transition layer is in contact with the first welding layer; The material of the first active metal bonding layer and the material of the first active metal transition layer are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB; The material of the first compound bonding layer and the material of the first compound transition layer are intermetallic compounds corresponding to the active metal; wherein the material of the first compound bonding layer is a carbide or nitride corresponding to the material of the first active metal bonding layer; the material of the first compound transition layer is a carbide or nitride corresponding to the material of the first active metal transition layer; The material of the first electrode layer is metal; The noble metal is Au, Ag, Pt or Pd.

3. The semiconductor laser chip according to claim 2, characterized in that: The active metal is Cr, Ti or Zr; The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN; The thickness of the first compound bonding layer is 5nm~50nm; The thickness of the first active metal bonding layer is 10nm~100nm; The thickness of the first compound transition layer is 5nm~50nm; The thickness of the first active metal transition layer is 10 nm to 100 nm.

4. The semiconductor laser chip according to claim 1, characterized in that The semiconductor laser chip further comprises: The second electrode bonding layer is located on a side surface of the second electrode layer facing away from the semiconductor chip substrate; the cavity surface film coating layer also covers the side surface of the second electrode bonding layer and covers the edge portion of the side surface of the second electrode bonding layer facing away from the second electrode layer; A second electrode transition layer is located on a surface of the second electrode adhesive layer facing away from the second electrode layer, and covers a surface of the cavity film coating layer facing away from the semiconductor chip substrate and a side surface of the cavity film coating layer; The second welding layer is located on a surface of the second electrode transition layer that is opposite to the second electrode bonding layer, and the second welding layer is also located on a surface of the second electrode transition layer that is opposite to the cavity surface film coating layer.

5. The semiconductor laser chip according to claim 4, characterized in that: The second electrode bonding layer includes a stacked second active metal bonding layer and a second compound bonding layer; the second active metal bonding layer is in contact with the second electrode layer; the second compound bonding layer is in contact with the cavity mask coating layer; The second electrode transition layer comprises a stacked second compound transition layer and a second active metal transition layer; The second compound transition layer is in contact with the cavity surface film coating layer; the second active metal transition layer is in contact with the second welding layer; The material of the second active metal bonding layer and the material of the second active metal transition layer are active metals, and the active metals are metals of Group IVB, Group VB or Group VIB; The material of the second compound bonding layer and the material of the second compound transition layer are intermetallic compounds corresponding to the active metal; wherein the material of the second compound bonding layer is a carbide or nitride corresponding to the material of the second active metal bonding layer; the material of the second compound transition layer is a carbide or nitride corresponding to the material of the second active metal transition layer; The material of the second electrode layer is metal; The material of the second welding layer is Au, Ag, Pt or Pd.

6. The semiconductor laser chip according to claim 5, characterized in that The active metal is Cr, Ti or Zr; The intermetallic compound is CrC, CrN, TiC, TiN, ZrC or ZrN; The thickness of the second compound bonding layer is 5nm~50nm; The thickness of the second active metal bonding layer is 10nm~100nm; The thickness of the second compound transition layer is 5nm~50nm; The thickness of the second active metal transition layer is 10 nm to 100 nm.

7. The semiconductor laser chip according to claim 1, characterized in that: Also includes: The semiconductor chip substrate is a functional layer of the semiconductor laser chip, and the semiconductor chip substrate includes an active area, a P-type layer, an N-type layer and a dielectric layer; The structure of the first electrode layer is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure; The structure of the second electrode layer is a Ti / Pt / Au structure, a Ti / Ni / Au structure, a Ge / Au structure, a Ni / Au structure, a Pd / Au structure or an electroplated gold structure; The structure of the cavity surface film coating is one or more layers of a silicon oxide layer, an aluminum oxide layer, a titanium oxide layer, a tantalum oxide layer, a silicon nitride layer, an aluminum nitride layer and a titanium nitride layer.

8. A method for preparing a semiconductor laser chip, for preparing the semiconductor laser chip as claimed in claim 1, characterized in that: include: Providing a semiconductor chip substrate having a first surface and a second surface opposite to each other; forming a first electrode layer on a first surface of the semiconductor chip substrate; forming a second electrode layer on the second surface of the semiconductor chip substrate; forming a first electrode adhesive layer on a surface of the first electrode layer facing away from the semiconductor chip substrate; forming a cavity surface film-wrapped coating, wherein the cavity surface film-wrapped coating is located on the side surface of the semiconductor chip substrate, the side surface of the first electrode layer, the side surface of the second electrode layer and the side surface of the first electrode bonding layer, and covers the edge portion of the surface of the first electrode bonding layer facing away from the first electrode layer; Forming a first electrode transition layer, the first electrode transition layer is located on a surface of the first electrode adhesive layer facing away from the first electrode layer, and covers a surface of the cavity surface film-wrapped layer facing away from the semiconductor chip substrate and a side surface of the cavity surface film-wrapped layer; A first welding layer is formed, and the first welding layer is located on a surface of the first electrode transition layer that is opposite to the first electrode bonding layer, and the first welding layer is also located on a surface of the first electrode transition layer that is opposite to the cavity mask coating layer; the material of the first welding layer is a precious metal.

9. The method for preparing a semiconductor laser chip according to claim 8, characterized in that: The preparation method further comprises: forming a second electrode bonding layer, the second electrode bonding layer being located on a surface of the second electrode layer facing away from the semiconductor chip substrate; the cavity surface film coating layer also covers the side surface of the second electrode bonding layer and covers the edge portion of the surface of the second electrode bonding layer facing away from the second electrode layer; forming a second electrode transition layer, the second electrode transition layer being located on a surface of the second electrode adhesive layer facing away from the second electrode layer, and covering a surface of the cavity film coating layer facing away from the semiconductor chip substrate and a side surface of the cavity film coating layer; A second welding layer is formed, and the second welding layer is located on a side surface of the second electrode transition layer facing away from the second electrode bonding layer, and the second welding layer is also located on a side surface of the second electrode transition layer facing away from the cavity surface mask coating layer.

10. A semiconductor laser chip packaging assembly, characterized in that: The semiconductor laser chip packaging assembly comprises the semiconductor laser chip and a heat sink as claimed in any one of claims 1 to 7; The heat sink is located at one side of the first welding layer of the semiconductor laser chip, and solder is included between the conductor laser chip and the heat sink; the material of the solder is gold-tin, indium, tin-silver-copper or nano silver paste.

Images