A Low Common-Mode PWM Modulation Method for Power Conversion Modules

Abstract

This invention discloses a low common-mode PWM modulation method for a power conversion module. The method selects the center switching frequency based on factors such as the power conversion module's control performance, device losses, and output filtering characteristics, and calculates the carrier register period value and the initial phases of carriers 0 and 1. Vector control is used to calculate the voltage setpoint and comparison register value, which are then sorted in three-phase units. The voltage setpoints within a given unit in the natural coordinate system are also sorted, and the corresponding carrier is selected based on whether the voltage is an intermediate value. The bias processing of the comparison register value is based on the current carrier number and the carrier number of the previous period to avoid narrow pulses. Finally, the updated comparison register value is applied to the pulse width PWM modulation of the N-level H-bridge converter. This patented method can achieve low common-mode PWM modulation for rectifier or inverter power conversion modules under an H-bridge topology.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, specifically relating to a low common-mode PWM modulation method for power conversion modules. It is applicable to high-quality power conversion modules based on high-frequency power semiconductor devices such as third-generation SiC and GaN, and is particularly suitable for applications with strict electromagnetic compatibility requirements, such as emergency UPS power supplies and electric propulsion systems. Background Technology

[0002] With the development of third-generation semiconductor material manufacturing processes and production design, new power devices represented by high power density SiC and GaN are widely used in fields with strict requirements for efficiency and harmonic characteristics due to their advantages such as lower conduction losses and faster switching frequencies.

[0003] Technological development is often not comprehensive, and changes in the characteristics of new power semiconductors also bring new problems. Compared to traditional IGBT and IGCT silicon devices, the parasitic distributed capacitance between the power module and the motor windings, frame, and core exhibits lower impedance at high frequencies. Under the influence of the common-mode component of the power conversion module, this leads to a series of problems such as increased leakage current and reduced efficiency.

[0004] To suppress the high-frequency problems caused by unipolar frequency-doubled SPWM modulation, many researchers have proposed a series of low common-mode PWM modulation methods while maintaining the differential-mode component unchanged, utilizing degrees of freedom such as switching frequency and multi-phase output. However, existing two-level H-bridge switching frequency modulation methods have the following drawbacks:

[0005] 1. The problem of low impedance in local frequency bands of the winding can be solved by optimizing the switching frequency; however, the switching frequency is also constrained by the control performance and efficiency of the equipment, so simply avoiding it does not solve the problem.

[0006] 2. Using three phases as the smallest unit, common-mode interference problems of components such as motor bearings can be suppressed by carrier phase shifting between units. However, the interference problems of the inverter power conversion module and motor windings still need to be considered. Summary of the Invention

[0007] The purpose of this invention is to address the above problems by proposing a reliable and easy-to-implement low common-mode PWM modulation method for power conversion modules.

[0008] The technical solution adopted by this invention to solve its technical problem is: a low common-mode PWM modulation method for a power conversion module, used in a power module with a two-level H-bridge topology, based on a control system composed of a basic carrier initialization setting stage, a vector control stage, a carrier selection stage, a pulse optimization stage, and a modulation stage, the steps of which are as follows:

[0009] Step 1, Select the center switching frequency f cAnd calculate the period value T of the carrier register. pr The initial phase values ​​T of carriers 0 and 1 respectively 0_phase T 1_phase ;

[0010] Step 2: Calculate the voltage setpoint and comparison register values ​​using vector control, and sort them by three phases, numbered as m.

[0011] Step 3: Sort the voltage values ​​within a certain unit in the natural coordinate system, and select the corresponding carrier based on whether the voltage is the median value;

[0012] Step 4, based on the current carrier number S n and the previous period carrier number S n-1 This involves biasing the comparison register values.

[0013] Step 5: Apply the updated comparison register value to the pulse width PWM modulation of the N-level H-bridge converter.

[0014] Furthermore, step 1 specifically includes:

[0015] Step 1.1: Select the center switching frequency f based on factors such as the control performance of the power conversion module, device losses, and output filtering characteristics. c ;

[0016] Step 1.2, based on the chip crystal oscillator frequency f N Calculate the carrier register period value T pr =f N / (2f c );

[0017] Step 1.3, set the initial phase T of carriers numbered 0 and 1. 0_phase =0 and T 1_phase =T pr .

[0018] Furthermore, step 2 specifically includes:

[0019] Step 2.1: Collect information such as position and current, and calculate the voltage command u in the three-phase coordinate system using closed-loop control. a1b1c1 ......u anbncn Comparison register C to be updated mpra1b1c1 ......C mpranbncn ; where C mpra1b1c1 To give u based on voltage a1b1c1 The calculated comparison register value, C mpranbncn To give u based on voltage anbncn The calculated value of the comparison register;

[0020] Step 2.2: Number the three phases as units m, m = 1, 2, 3...

[0021] Furthermore, step 3 specifically includes:

[0022] Step 3.1: Sort the voltage references in the three-phase natural coordinate system;

[0023] Step 3.2: Determine if the voltage is an intermediate value. If the voltage is an intermediate value, then the carrier number S selected for this voltage is... n =1-[(-1) m +1] / 2, otherwise S n =[(-1) m +1] / 2.

[0024] Furthermore, step 4 specifically includes:

[0025] Step 4.1, record the current carrier number S n and the previous period carrier number S n-1 ;

[0026] Step 4.2: Determine the carrier number change, perform offset processing on the comparison register value, if S n-1 =0, S n If = 1, then the largest comparison register value will be moved up to T. pr If S n-1 =1,S n If the value is 0, then the smallest comparison register value will be shifted down to 0.

[0027] The beneficial effects of this invention are: this invention makes full use of the degrees of freedom of switching pulses and multi-phase outputs, optimizes PWM output, balances the contradiction between common mode suppression and control performance and efficiency indicators, further expands control ideas, and is highly practical and easy to program and implement in engineering. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the modulation method of the present invention;

[0029] The labels for each figure are as follows: 1—basic carrier initialization setting stage, 2—vector control stage, 3—carrier selection stage, 4—pulse optimization stage, 5—modulation stage. Detailed Implementation

[0030] The specific embodiments of the present invention will now be described in conjunction with the accompanying drawings and examples.

[0031] Example 1

[0032] like Figure 1As shown, the power module of the present invention for a two-level H-bridge topology consists of a control system comprising a basic carrier initialization setting stage 1, a vector control stage 2, a carrier selection stage 3, a pulse optimization stage 4, and a modulation stage 5. The modulation method includes the following steps.

[0033] Step 1, Select the center switching frequency f c And calculate the period value T of the carrier register. pr The initial phase values ​​T of carriers 0 and 1 respectively 0_phase T 1_phase The specific steps are as follows.

[0034] Step 1.1: Select the center switching frequency f based on factors such as the control performance of the power conversion module, device losses, and output filtering characteristics. c .

[0035] Step 1.2, based on the chip crystal oscillator frequency f N Calculate the carrier register period value T pr =f N / (2f c ).

[0036] Step 1.3, set the initial phase T of carriers numbered 0 and 1. 0_phase =0 and T 1_phase =T pr .

[0037] Step 2: Calculate the voltage setpoint and comparison register values ​​using vector control, and sort them by three phases, numbered m. The specific steps are as follows.

[0038] Step 2.1: Collect information such as position and current, and calculate the voltage command u in the three-phase coordinate system using closed-loop control. a1b1c1 ......u anbncn Comparison register C to be updated mpra1b1c1 ......C mpranbncn C mpra1b1c1 To give u based on voltage a1b1c1 The calculated value of the comparison register; C mpranbncn To give u based on voltage anbncn The calculated value of the comparison register.

[0039] Step 2.2: Number the three phases as units m, m = 1, 2, 3...

[0040] Step 3: Sort the voltage values ​​within a given cell in the natural coordinate system, and select the corresponding carrier wave based on whether the voltage is the median value. The specific steps are as follows.

[0041] Step 3.1: Sort the voltage settings in the three-phase natural coordinate system.

[0042] Step 3.2: Determine if the voltage is an intermediate value. If the voltage is an intermediate value, then the carrier number S selected for this voltage is... n =1-[(-1) m +1] / 2, otherwise S n =[(-1) m +1] / 2.

[0043] Step 4, based on the current carrier number S n and the previous period carrier number S n-1 The bias processing of the comparison register values ​​is performed. The specific steps are as follows.

[0044] Step 4.1, record the current carrier number S n and the previous period carrier number S n-1 ;

[0045] Step 4.2: Determine the carrier number change, perform offset processing on the comparison register value, if S n-1 =0, S n If = 1, then the largest comparison register value will be moved up to T. pr If S n-1 =1,S n If the value is 0, then the smallest comparison register value will be shifted down to 0.

[0046] Step 5: Apply the updated comparison register value to the pulse width PWM modulation of the N-level H-bridge converter.

[0047] Example 2

[0048] As a second embodiment of the present invention, the difference from the first embodiment is that the carrier selection based on the intermediate voltage value can be changed to be generated based on the maximum voltage value, minimum voltage value, or fixed phase.

[0049] The specific embodiments described herein are merely illustrative examples illustrating the spirit of the invention. Those skilled in the art to which this invention pertains may make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of the invention or exceeding the scope defined by the appended claims.

Claims

1. A low common-mode PWM modulation method for a power conversion module, based on a control system consisting of a basic carrier initialization setting stage (1), a vector control stage (2), a carrier selection stage (3), a pulse optimization stage (4), and a modulation stage (5), characterized in that, The steps are as follows Step 1, Select the center switching frequency f c And calculate the period value of the carrier register. T pr The initial phase values ​​of carriers 0 and 1 respectively T 0_phase , T 1_phase ; Step 2: Calculate the voltage setpoint and comparison register values ​​using vector control, and sort them by three phases, numbering them as follows: m ; Step 3: Sort the voltage values ​​within a certain unit in the natural coordinate system, and select the corresponding carrier based on whether the voltage is the median value; Step 4, based on the current carrier number S n and the previous period carrier number S n-1 This involves biasing the comparison register values. Step 5: Apply the updated comparison register value to the pulse width PWM modulation of the N-level H-bridge converter.

2. The low common-mode PWM modulation method for a power conversion module according to claim 1, characterized in that, Step 1 specifically includes: Step 1.1: Select the center switching frequency based on the control performance, component losses, and output filtering characteristics of the power conversion module. f c ; Step 1.2, determined by the chip crystal oscillator frequency f N Calculate the carrier register period value T pr = f N / (2 f c ); Step 1.3: Set the initial phase of carriers numbered 0 and 1. T 0_ phase =0 and T 1_ phase = T pr .

3. The low common-mode PWM modulation method for a power conversion module according to claim 2, characterized in that, Step 2 specifically includes: Step 2.1: Collect position and current information, and calculate the voltage setpoint in three-phase coordinates using closed-loop control. u a1b1c1 ...... u anbncn Comparison register to be updated C mpra1b1c1 ...... C mpranbncn ;in C mpra1b1c1 To be based on voltage u a1b1c1 The calculated comparison register value, C mpranbncn To be based on voltage u anbncn The calculated value of the comparison register; Step 2.2: Number the three phases as units m, m = 1, 2, 3...

4. The low common-mode PWM modulation method for a power conversion module according to claim 3, characterized in that, Step 3 specifically includes: Step 3.1: Sort the voltage references in the three-phase natural coordinate system; Step 3.2: Determine if the voltage is an intermediate value. If the voltage is an intermediate value, then select the carrier number for that voltage. S n =1-[(-1) m +1] / 2, otherwise S n =[(-1) m +1] / 2.

5. A low common-mode PWM modulation method for a power conversion module according to claim 4, characterized in that, Step 4 specifically includes: Step 4.1, record the current carrier number. S n and the previous period carrier number S n-1 ; Step 4.2: Determine the carrier number change, perform offset processing on the comparison register value, if... S n-1 =0, S n =1, then the largest comparison register value will be moved up to T pr ;like S n-1 =1, S n ＝0 If so, the smallest comparison register value will be shifted down to 0.

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