HfZrO4 memristor and manufacturing method thereof

Abstract

The invention discloses an HfZrO4 memristor and a manufacturing method, relates to the technical field of memristors, can realize bidirectional resistance adjustment in a homopolar voltage region without the combination of a plurality of memristor units, and is simple in structure and convenient to manufacture. The HfZrO4 memristor comprises a Pt top electrode, an HfZrO4 resistive layer and a Pt bottom electrode which are sequentially arranged from top to bottom, the Pt bottom electrode and the Pt top electrode are conductive and then form a loop with the HfZrO4 resistive layer, and the resistance of the loop is changed by a voltage signal applied to the HfZrO4 resistive layer; the manufacturing method comprises the following steps: cutting a silicon wafer with a silicon oxide layer on the surface as a substrate, and taking the silicon oxide layer as an insulating layer; after the insulating layer is cleaned, a layer of metal Pt serves as a Pt bottom electrode through magnetron sputtering; cleaning and activating the Pt bottom electrode by adopting a plasma cleaning machine; multiple atomic layer deposition is carried out on the cleaned and activated bottom electrode according to the sequence of Hf-> H2O-> Zr-> H2O so as to generate an HfZrO4 resistive layer; and sputtering a plurality of metal Pt on the HfZrO4 resistive layer through magnetron sputtering to serve as a Pt top electrode so as to form the HfZrO4 memristor.

Description

Technical Field

[0001] The present invention relates to the technical field of memristors, and in particular to a HfZrO4 memristor and a manufacturing method thereof. Background Art

[0002] In the era of big data, the contradiction between the growing demand for artificial intelligence and insufficient computing power is becoming increasingly prominent. The current von Neumann architecture has a serious problem of separation of storage and computing in intelligent computing. When the access speed of memory lags behind the computing speed of the central processing unit (CPU), this will reduce the utilization rate of the CPU. This problem is called the "memory wall". When performing intelligent computing tasks, the huge power consumption loss of the computer array cannot be ignored. The energy consumption problem also restricts the development of artificial intelligence. This problem is called the "power consumption wall". As the size of transistors continues to shrink, the operating speed of computers has been greatly improved, which has alleviated the von Neumann bottleneck, but it has also approached the limit of Moore's Law. The von Neumann problem has not been solved.

[0003] Currently, new computing systems without von Neumann architecture have become a research hotspot, especially brain-inspired memristors, which can integrate storage and computing architectures. When an electric field is applied, the resistance of the memristor can be adjusted continuously, so it is an ideal synaptic bionic device. Complementary memristors inherit the advantages of memristors, and complementary memristors have bidirectional resistance adjustment capabilities when the same polarity voltage is applied. Complementary memristors have a variety of resistance control methods, which gives them a larger operating space in practical applications, thereby avoiding problems such as misoperation in the array.

[0004] Most of the complementary memristors reported so far are composed of two bipolar memristors connected in reverse polarity, so that when a voltage is applied to one end, the resistance of one memristor increases and the resistance of the other memristor decreases, and vice versa. These complementary memristors have the behavior of set and reset resistance switching in the same polarity voltage region, but they still require multiple memristor units to be combined, making the structure complex and greatly increasing the difficulty of manufacturing. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a HfZrO4 memristor, which has the basic characteristics of a memristor, can realize information storage and bionic synapse simulation, and has the function of a complementary memristor, using the same polarity voltage to increase or decrease resistance. At the same time, a manufacturing method of the above HfZrO4 memristor is also provided.

[0006] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0007] Disclosed is a HfZrO4 memristor, comprising a Pt top electrode, a HfZrO4 resistive switching layer and a Pt bottom electrode arranged in sequence from top to bottom. The Pt bottom electrode and the Pt top electrode form a loop with the HfZrO4 resistive switching layer after being conductive, and the resistance of the loop is changed by a voltage signal applied to the HfZrO4 resistive switching layer. The bidirectional resistance can be adjusted by controlling the voltage signal of the loop.

[0008] Preferably, the Pt bottom electrode is arranged on the insulating layer.

[0009] Preferably, the insulating layer is arranged on the substrate.

[0010] Preferably, the thickness of the Pt top electrode is 20 nm, the thickness of the HfZrO4 resistive layer is 10 nm, the thickness of the Pt bottom electrode is 20 nm, and the thickness of the insulating layer is 50 nm.

[0011] Also disclosed is a method for manufacturing the HfZrO4 memristor, comprising the following steps:

[0012] S1, cutting a silicon wafer with a silicon oxide layer on the surface as a substrate, and the silicon oxide layer as an insulating layer;

[0013] S2, after cleaning the insulating layer, a layer of metal Pt is deposited by magnetron sputtering as a Pt bottom electrode;

[0014] S3, using a plasma cleaning machine to clean and activate the Pt bottom electrode;

[0015] S4, performing multiple atomic layer depositions on the cleaned and activated bottom electrode in the order of Hf→H2O→Zr→H2O to form a HfZrO4 resistive switching layer;

[0016] S5. A plurality of metal Pt electrodes are deposited on the HfZrO4 resistive layer by magnetron sputtering as Pt top electrodes to form a HfZrO4 memristor.

[0017] Preferably, the HfZrO4 memristor in S5 is placed in a rapid annealing furnace, annealed at 500° C. for 1 min with argon gas.

[0018] Preferably, when magnetron sputtering a plurality of metal Pts on the HfZrO4 resistive switching layer in S5, a mask plate is detachably mounted on the HfZrO4 resistive switching layer, and a plurality of sputtering holes are evenly opened on the mask plate.

[0019] Preferably, when cleaning the insulating layer in S2, water, ethanol and acetone are ultrasonically treated for 20 minutes each.

[0020] Preferably, when the plasma cleaning machine in S3 cleans and activates the Pt bottom electrode, oxygen is passed through with a power of 50 W and a time of 5 min.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] 1. The resistance value of the HfZrO4 memristor disclosed in the present invention changes with the voltage signal, and bidirectional resistance adjustment in the same polarity voltage region can be achieved without combining multiple memristor units, thereby showing the characteristics of a complementary memristor, with a simple structure and easy manufacturing.

[0023] 2. The HfZrO4 memristor disclosed in the present invention has high and low resistance states. Different resistance states are used as "0" and "1" in binary storage to store information during application.

[0024] 3. The present invention utilizes the metal Pt and HfZrO4 to form a gold-semiconductor contact, and then adjusts the input voltage of the circuit to make the HfZrO4 memristor have the largest high-to-low resistance ratio, making the distance between "0" and "1" farther during binary storage, thereby avoiding the signal crosstalk problem. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a schematic diagram of the cross-sectional structure of the HfZrO4 memristor;

[0026] Figure 2 It is a schematic diagram of the structure of the mask;

[0027] Figure 3 This is a diagram of the electrical performance measurement results of the HfZrO4 memristor;

[0028] Figure 4 This is a diagram showing the results of a high- and low-resistance cycle measurement of the HfZrO4 memristor;

[0029] Figure 5 This is the current peak value diagram when a set of -5V pulse voltage is applied when measuring the resistance change performance of the HfZrO4 memristor;

[0030] Figure 6 This is a graph of the current peak when a set of -3V pulse voltage is applied during the resistance change performance measurement of the HfZrO4 memristor.

[0031] Figure symbols: 1. Pt top electrode, 2. HfZrO4 resistive layer, 3. Pt bottom electrode, 4. Insulating layer, 5. Substrate, 6. Mask, 61. Sputtering hole. DETAILED DESCRIPTION

[0032] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention.

[0033] Example 1

[0034] This embodiment discloses a HfZrO4 memristor having two resistance states, high and low, and the resistance can be increased or decreased by using the same polarity voltage, and has the characteristics of a complementary memristor, specifically Figure 1 As shown, it includes a Pt top electrode 1, a HfZrO4 resistive layer 2 and a Pt bottom electrode 3 arranged in sequence from top to bottom. The above-mentioned Pt bottom electrode 3 and Pt top electrode 1 form a loop with the HfZrO4 resistive layer 2 after conduction, and the resistance of the loop is changed by the voltage signal applied to the HfZrO4 resistive layer 2.

[0035] The above voltage signal is a voltage that changes with time; the above Pt top electrode 1 and Pt bottom electrode 3 are made of metal Pt and their main function is to conduct electricity. The work function of metal Pt is the highest, which is 5.36eV. When combined with the HfZrO4 resistive layer 2, it will form a gold-semiconductor contact with a huge barrier height. At this time, the resistance of the HfZrO4 resistive layer 2 is relatively high, which makes the resistance of the HfZrO4 memristor also relatively high; the above HfZrO4 resistive layer 2 contains a large number of oxygen vacancies. When voltage is applied to the Pt top electrode 1 and the Pt bottom electrode 3 , the oxygen vacancies in the HfZrO4 resistive layer 2 are affected by the electric field and move to form conductive filaments. When the oxygen vacancies in the HfZrO4 resistive layer 2 move to the contact surface between the semiconductor HfZrO4 resistive layer 2 and the Pt top electrode 1 or the Pt bottom electrode 3, the contact barrier will be reduced, thereby reducing the resistance of the HfZrO4 resistive layer 2. At this time, the resistance of the HfZrO4 memristor is also reduced. In summary, using metal Pt as an electrode can maximize the high-to-low resistance ratio of the HfZrO4 memristor. Since the chip uses "0" and "1" for data storage, Storage, that is, binary storage, in the application process, the different resistance states of the HfZrO4 memristor are used as "0" and "1" in binary storage to store information. Specifically, the high resistance state of the HfZrO4 memristor can be regarded as "0", and the low resistance state can be regarded as "1". The larger the ratio of high and low resistance states, that is, the more separated "0" and "1", the signal crosstalk can be avoided during binary storage; the resistance of the HfZrO4 resistive layer 2 changes with the history of the voltage or current applied to the loop. Specifically, the Pt top electrode 1 Or a pulse voltage is applied to the Pt bottom electrode 3, the current of the HfZrO4 resistive layer 2 will slowly increase and the resistance will decrease. When the voltage is increased, a conductive channel will be formed in the HfZrO4 resistive layer 2, that is, the above-mentioned conductive filament. At this time, the resistance of the HfZrO4 resistive layer 2 is the lowest. Subsequently, the voltage is continuously increased, the oxygen vacancies in the HfZrO4 resistive layer 2 continue to move, and one end of the conductive filament begins to break. At this time, the resistance of the HfZrO4 resistive layer 2 increases, and the result is that the resistance first decreases and then increases. This phenomenon is consistent with the performance characteristics of the complementary memristor.

[0036] As a preferred solution of the above embodiment, the Pt bottom electrode 3 is arranged on the insulating layer 4 , and the insulating layer 4 plays a role in preventing the Pt bottom electrode 3 from leaking current and short circuit.

[0037] As a preferred solution of the above embodiment, the insulating layer 4 is arranged on the substrate 5 , and the substrate 5 plays a role in supporting the Pt top electrode 1 , the HfZrO 4 resistive switching layer 2 and the Pt bottom electrode 3 .

[0038] Example 2

[0039] A method for manufacturing a HfZrO4 memristor according to any one of claims 1 to 4, characterized in that it comprises the following steps:

[0040] S1, cutting a silicon wafer having a silicon oxide layer on the surface as a substrate 5, and the silicon oxide layer as an insulating layer 4;

[0041] S2. After cleaning the insulating layer 4, a layer of metal Pt is magnetron sputtered as the Pt bottom electrode 3. Specifically, when cleaning the insulating layer 4, water, ethanol, and acetone are ultrasonically applied for 20 minutes each. Ultrasonication can effectively loosen the attachments on the insulating layer 4, and water, ethanol, and acetone remove surface pollutants and organic matter to ensure that the surface of the insulating layer 4 is clean;

[0042] S3, using a plasma cleaning machine to clean and activate the Pt bottom electrode 3. Specifically, when the plasma cleaning machine cleans and activates the Pt bottom electrode 3, oxygen is passed through the plasma cleaning machine at a power of 50W for 5 minutes, which can remove pollutants on the surface of the Pt bottom electrode 3, increase the surface activity of the Pt bottom electrode 3, and introduce hydroxyl groups to prepare for the deposition and growth of the HfZrO4 resistive layer 2.

[0043] S4, performing multiple atomic layer depositions on the cleaned and activated bottom electrode 3 in the order of Hf→H2O→Zr→H2O to form a HfZrO4 resistive switching layer 2;

[0044] S5. A plurality of metal Pt electrodes are formed on the HfZrO4 resistive layer 2 by magnetron sputtering as Pt top electrodes 1 to form a HfZrO4 memristor.

[0045] As a preferred solution of the above embodiment, the HfZrO4 memristor in S5 is placed in a rapid annealing furnace, argon gas is passed through, and annealed at 500°C for 1 minute to crystallize the grown HfZrO4 resistive layer 2 and reduce the defect concentration. Good crystal quality will significantly improve the switching performance, storage density and durability of the HfZrO4 memristor.

[0046] As a preferred solution of the above embodiment, in S5, when magnetron sputtering a plurality of metal Pts on the HfZrO4 resistive switching layer 2, a mask plate 6 is detachably mounted on the HfZrO4 resistive switching layer 2, such as Figure 2The mask plate 6 shown is evenly provided with a plurality of sputtering holes 61 .

[0047] Verification Example

[0048] In the above HfZrO4 memristor, the thickness of the Pt top electrode 1 is 20 nm, the thickness of the HfZrO4 resistive layer 2 is 10 nm, the thickness of the Pt bottom electrode 3 is 20 nm, and the thickness of the insulating layer 4 is 50 nm.

[0049] 1. The electrical performance of the HfZrO4 memristor is measured. The results are as follows: Figure 3 As shown, a voltage of 0V→3V→0V→-5V→0V is applied to the memristor through Keithley2636B and a probe. In the same polarity voltage region, the resistance first decreases and then increases.

[0050] Here’s how it works:

[0051] When voltage is initially applied, oxygen vacancies move under the influence of the electric field to form conductive filaments, and the device resistance decreases. As voltage continues to be applied, oxygen vacancies continue to move in a directional manner, which in turn causes the conductive filament to rupture and the resistance to increase. This phenomenon is consistent with the characteristics of complementary memristors.

[0052] 2. The HfZrO4 memristor is subjected to high and low resistance state cycle measurement. The results are as follows: Figure 4 As shown, the ratio of high to low resistance states is about 100, and 200 cycles were performed, indicating the potential of HfZrO4 memristor in information storage applications and its good cyclability.

[0053] 3. The resistance change performance of the HfZrO4 memristor is measured by applying a series of equal pulse voltages to the memristor using a Keithley4200A-SCS parameter analyzer and a probe, as follows:

[0054] like Figure 5 As shown, when a set of -5V voltage is applied, the current gradually increases, so the resistance gradually decreases.

[0055] like Figure 6 As shown, when a set of -3V voltage is applied, the current obtained gradually decreases, so the resistance gradually increases.

[0056] When the applied voltage pulse stops, a current opposite to the voltage value will appear in the HfZrO4 memristor. This is because the HfZrO4 resistive layer 2 is a high dielectric constant material, which makes the HfZrO4 memristor itself have parasitic capacitance.

[0057] In summary, when a voltage of the same polarity is applied to the HfZrO4 memristor, the current can still be reduced or increased.

[0058] Of course, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, technicians familiar with the field may make various corresponding changes and deformations based on the present invention, but these corresponding changes and deformations should all fall within the scope of protection of the claims attached to the present invention.

Claims

1. A HfZrO4 memristor, characterized in that: The invention comprises a Pt top electrode (1), a HfZrO4 resistive switching layer (2) and a Pt bottom electrode (3) which are arranged in sequence from top to bottom. The Pt bottom electrode (3) and the Pt top electrode (1) form a loop with the HfZrO4 resistive switching layer (2) after being conductive, and the resistance of the loop is changed by a voltage signal applied to the HfZrO4 resistive switching layer (2).

2. The HfZrO4 memristor according to claim 1, characterized in that: The Pt bottom electrode (3) is arranged on the insulating layer (4).

3. The HfZrO4 memristor according to claim 2, characterized in that: The insulating layer (4) is arranged on a substrate (5).

4. The HfZrO4 memristor according to claim 3, characterized in that: The thickness of the Pt top electrode (1) is 20 nm, the thickness of the HfZrO4 resistive layer (2) is 10 nm, the thickness of the Pt bottom electrode (3) is 20 nm, and the thickness of the insulating layer (4) is 50 nm.

5. A method for manufacturing a HfZrO4 memristor according to any one of claims 1 to 4, characterized in that: The steps include: S1, cutting a silicon wafer having a silicon oxide layer on its surface as a substrate (5), wherein the silicon oxide layer serves as an insulating layer (4); S2, cleaning the insulating layer (4) and then magnetron sputtering a layer of metal Pt as a Pt bottom electrode (3); S3, using a plasma cleaning machine to clean and activate the Pt bottom electrode (3); S4, performing multiple atomic layer depositions on the cleaned and activated bottom electrode (3) in the order of Hf→H2O→Zr→H2O to form a HfZrO4 resistive switching layer (2); S5. A plurality of metal Pt electrodes are formed as Pt top electrodes (1) on the HfZrO4 resistive layer (2) by magnetron sputtering to form a HfZrO4 memristor.

6. The method for manufacturing a HfZrO4 memristor according to claim 5, characterized in that: The HfZrO4 memristor in S5 is placed in a rapid annealing furnace, annealed at 500° C. for 1 min with argon gas.

7. The method for manufacturing a HfZrO4 memristor according to claim 6, characterized in that: In S5, when magnetron sputtering a plurality of metal Pts is performed on the HfZrO4 resistive layer (2), a mask plate (6) is detachably mounted on the HfZrO4 resistive layer (2), and a plurality of sputtering holes (61) are evenly formed on the mask plate (6).

8. The method for manufacturing a HfZrO4 memristor according to claim 6, characterized in that: In S2, when cleaning the insulating layer (4), water, ethanol and acetone are ultrasonically treated for 20 minutes each.

9. The method for manufacturing a HfZrO4 memristor according to claim 6, characterized in that: When the plasma cleaning machine in S3 cleans and activates the Pt bottom electrode (3), oxygen is passed through at a power of 50 W for a time of 5 minutes.

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