Process for epitaxially growing PZT film and method for manufacturing PZT device

Abstract

A piezoelectric film stack is created by forming a lower electrode stack on a structured substrate. A pyrochlore lead zirconium titanate (PZT) buffer substrate layer is then formed on the lower electrode stack. And then carrying out rapid thermal annealing on the PZT buffer substrate layer. An epitaxial perovskite (100) PZT film is grown on the PZT buffer substrate layer. An upper electrode stack is formed on the perovskite (100) PZT film.

Description

Technical Field

[0001] The present application relates to methods of forming piezoelectric materials and incorporating them into micro-electro-mechanical systems (MEMS). Background Art

[0002] Piezoelectric materials are widely used in industrial and consumer products. Lead zirconium titanate (PZT) is an important material whose crystal structure has significant piezoelectric properties. Summary of the invention

[0003] Rapid thermal annealing of a pyrochlore (220) PZT buffer layer can transform the entire PZT buffer layer into a single-crystalline perovskite PZT (100) seed layer, which is suitable for subsequent epitaxial growth of perovskite (100) for use as a piezoelectric membrane in MEMS. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The described embodiments and their advantages may be best understood by reference to the following description taken in conjunction with the accompanying drawings, which do not limit any changes in form or detail that may be made to the described embodiments without departing from the spirit and scope of the described embodiments.

[0005] Figure 1 is a diagram of an example process flow for fabricating epitaxial PZT films according to an embodiment of the present application.

[0006] Figure 2 is a graphical representation of an X-ray diffraction pattern of an example piezoelectric PZT layer according to an embodiment of the present application.

[0007] Figure 3 is a cross-sectional view of an example of a MEMS piezoelectric PZT inkjet print head according to some embodiments of the present application.

[0008] Figure 4 is a cross-sectional view of an example of a MEMS piezoelectric ultrasonic transducer according to some embodiments of the present application.

[0009] Figure 5 is a cross-sectional view of an example of a MEMS piezoelectric PZT acoustic transducer according to some embodiments of the present application. DETAILED DESCRIPTION

[0010] The present application describes a method for forming an epitaxially grown piezoelectric film stack comprising a lower electrode and an upper electrode on a structured base wafer for use in a piezoelectric-based MEMS device. The method produces a perovskite (100) PZT buffer layer that supports homoepitaxial growth of a perovskite (100) PZT film. The present application further describes the construction of a radio frequency (RF) magnetron reactive sputtering homoepitaxially grown piezoelectric PZT film for use in fluid dispensing devices such as MEMS piezoelectric PZT inkjet print heads, and MEMS piezoelectric-PZT ultrasonic transducers and acoustic transducers.

[0011] Applying a voltage across a piezoelectric material results in the phenomenon of inverse piezoelectricity, in which the piezoelectric material mechanically deforms. Alternatively, a piezoelectric material can generate a voltage difference when subjected to mechanical stress. Piezoelectrics can be used in electrical and mechanical devices such as inkjet print heads and transducers, such as actuators and sensors. In some cases, multiple transducers can be combined in a MEMS, including a combination of actuators and sensors.

[0012] Piezoelectric materials for fluid dispensing devices or actuators can be obtained by a variety of methods, including sol-gel, ceramic green sheets, layers formed by metal organic chemical vapor deposition (MOCVD), or pre-fired piezoelectric material blocks. However, these different methods can form piezoelectric materials of different qualities and compositions. For example, the sol-gel formation technique may require multiple iterations to produce many individual thin layers to form a thick piezoelectric material. In addition, the formation of sol-gel leaves a bonding agent in the final material. MOCVD can build thin layers of piezoelectric materials and can have very low deposition rates.

[0013] Due to the film substrate properties and technical limitations of the film growth hardware technology, the PZT film can have a perovskite crystal structure that conforms to the formula ABX3 and can include materials with different crystal phase orientations, such as perovskite (100), perovskite (110) and perovskite (111), as well as non-functional pyrochlore (220). The piezoelectric effect of the resulting film may depend on the quality of the PZT film crystallinity and the quality of the PZT material in the interface transition region at the substrate to PZT film interface. It should be noted that when forming a perovskite piezoelectric PZT film on a substrate, the physical properties of the substrate, including its crystal structure, play an important role in determining the quality of the grown PZT. For example, an embodiment of a single crystal piezoelectric device can have a PZT film composed of the highest crystalline phase of perovskite (100) and minimize or eliminate the non-functional pyrochlore (220) phase (preferably single crystal PZT (100)) to maximize the lateral electromechanical response.

[0014] Perovskite PZT films can be grown on some selected metal seed layers of the substrate, such as iridium, platinum, etc. However, due to their different physical properties, especially the lattice mismatch between the seed metal and PZT, the resulting PZT film can be polycrystalline in nature and may contain an inferior transition region at the seed metal to PZT interface. Certain doped metal oxide seed layers have been used as substrates for growing high-quality perovskite PZT films, such as SrRuO3, which can be used to grow high-crystallinity PZT films for various applications. However, although these doped metal oxide seeds provide an improved lattice match with PZT, which may lead to pseudomorphic growth of perovskite PZT materials, they are still imperfect matches, so that interface strain and defects still exist in the interface region at the substrate to PZT interface. Therefore, it is desirable to provide a method for producing a PZT film that is predominantly a perovskite (100) PZT and is free of other unwanted crystalline phases of the PZT by a PZT film stack, which supports an epitaxial PZT growth process that can produce a nearly single-crystalline perovskite PZT (100). Such a PZT film can maximize its piezoelectric effect. In some embodiments, "predominantly" means that the PZT buffer layer is converted so that the peak height of the perovskite PZT (100) is at least twice the peak height of any residual pyrochlore PZT (220) according to an x-ray diffraction (XRD) spectrum.

[0015] In some embodiments, the method involves a rotating RF magnetron physical vapor deposition (PVD) apparatus having a self-biased substrate RF impedance matching network for controlling the substrate DC self-bias voltage. A suitable PVD apparatus is disclosed in U.S. Patent Application No. 12 / 389,253, filed on February 19, 2009, entitled Physical Vapor Deposition with Impedance Matching Network ( Physical Vapor Deposition with Impedance Matching Network ) is described in the application, which is incorporated herein by reference. In some cases, the reactive PVD process uses argon and oxygen (Ar / O2) as the sputtering process gas.

[0016] In some embodiments, a ceramic PZT target may be used, which has a composition of Pb l.00+x (Zr 0.52 Ti 0.48 ) 1.00- y 3Nb y , wherein 0≤x≤0.30 and 0≤y≤0.20. In some embodiments, 0≤x≤0.05 and 0≤y≤0.10.

[0017] In some embodiments, the epitaxial PZT film growth process begins by sputtering a pyrochlore PZT film as a PZT buffer layer on a substrate having a lower electrode stack including an appropriate seed metal layer. In some cases, the seed metal may be platinum or iridium with a thickness of 500Å to 5000Å. In some cases, the seed metal may be iridium with a thickness of 1000 to 2500 angstroms (Å). In some cases, the seed metal may be deposited by reactive sputtering deposition. In some embodiments, where the seed metal is iridium, the iridium may have a (111) crystal plane. In some embodiments, the lower electrode stack may also include an adhesion layer. In some cases, the adhesion layer may be one of titanium, titanium tungsten, chromium, nickel, or molybdenum with a thickness of 100Å to 500Å. In some cases, the adhesion layer may be deposited by PVD.

[0018] In some cases, the PZT film includes a buffer layer of pyrochlore (220) PZT, which does not have piezoelectric properties. Such a PZT buffer layer can be grown by reactive sputtering deposition of the PZT film at a deposition temperature of 400°C to 500°C. In some embodiments, the thickness of the deposition can be 500Å to 3000Å. In a preferred embodiment, the deposition is 1500Å to 2000Å. A rapid thermal annealing process can convert such a pyrochlore PZT into a perovskite PZT (100) seed layer, on which a homoepitaxial thick perovskite (100) PZT can be grown.

[0019] In some cases, reactive sputtering deposition of piezoelectric PZT is carried out at a wafer chuck temperature of 400°C to 750°C. In some cases, the gas (Ar / O2) pressure can be between 1-15mTorr. In some preferred embodiments, the gas pressure is between 2-6 mTorr. In some embodiments, the gas ratio of O2 / (Ar+O2) is between 1.0% and 5.0%. In some preferred embodiments, the gas ratio is 2.5% to 3.5%. In some embodiments, the cathode RF power is between 1000W and 5000W, preferably 4000W. In some cases, the substrate DC self-bias is between +5 and +150V, preferably between +20V and +80V.

[0020] Next, in some embodiments, a rapid thermal annealing process is performed on the substrate on which the pyrochlore PZT buffer layer has been deposited. In some cases, this rapid thermal annealing process can be performed in an oven, a furnace, a rapid thermal annealing furnace, or a hot plate in air, a vacuum, or a partial oxygen atmosphere. In some cases, the rapid thermal annealing process keeps the substrate at a temperature of 550°C to 700°C for 1 to 6 minutes. In some preferred embodiments, the thermal annealing process keeps the substrate at a temperature of 600°C to 650°C for 2 to 4 minutes. In some embodiments, the rapid thermal annealing process converts the pyrochlore PZT buffer layer into a dominant perovskite PZT (100) crystalline phase, thereby producing a perovskite PZT (200) seed layer for subsequent epitaxial growth of a single-phase perovskite PZT film with a (100) crystal structure.

[0021] Then, by selecting the PZT film growth conditions and using reactive sputtering deposition of piezoelectric PZT, in some embodiments, a 0.5-5 micron perovskite (100) film can be epitaxially grown at a deposition temperature of 500° C. to 650° C. Since this growth of the preferred PZT (100) film is initiated on a substrate that already has a PZT (100) seed layer, homoepitaxial growth of the preferred PZT film can be achieved.

[0022] In some embodiments, the composition of the resulting piezoelectric PZT film can be Pb 1.00+x (Zr 0.50+ / - 0.02 Ti 0.50- / +0.02 ) 1.00-y 3Nb y , wherein -0.01≤x≤0.10 and 0≤y≤0.15. In some embodiments, 0≤x≤0.05 and 0≤y≤0.10. In some embodiments, the obtained PZT is perovskite PZT, in particular perovskite PZT (100) and / or perovskite PZT (111), more preferably single crystal perovskite PZT (100) including the entire PZT buffer layer.

[0023] In some embodiments, an upper electrode stack may then be deposited. The upper electrode stack may include an upper electrode including a conductive metal having a thickness of 1000Å to 2 microns, such as platinum, iridium, gold, copper, aluminum, indium tin oxide, etc. In some cases, the upper electrode may be deposited by PVD. In some embodiments, the upper electrode stack may also include an adhesive layer. In some cases, the adhesive layer may be one of titanium, titanium tungsten, chromium, nickel, nickel chromium, etc., and may have a thickness of 100Å to 1000Å. In some cases, the adhesive layer may be a conductive metal oxide, such as indium tin oxide, zinc oxide, etc. In some cases, the adhesive layer may be deposited by PVD.

[0024] Figure 1An example process flow for fabricating an epitaxial PZT film according to an embodiment of the present application is depicted. Figure 1 As shown, method 100 illustrates example functions used by various embodiments. Although specific functional blocks ("blocks") are disclosed in method 100, these blocks are examples. That is, the examples are well suited for executing various other blocks or variations of the blocks described in method 100. It should be understood that the blocks in method 100 may be executed in an order different from the order presented, and some blocks in method 100 may not be executed.

[0025] The method 100 begins at block 110, where a lower electrode stack is formed on a structured substrate. The lower electrode stack may include a seed metal layer and may also include an adhesion layer. The seed metal layer may be platinum or iridium. Other metals are also contemplated. An adhesion layer may also be deposited to reduce the likelihood of delamination of a subsequently deposited buffer PZT layer. The adhesion layer may be titanium, titanium tungsten, chromium, nickel, or molybdenum. Other materials may also be used for the adhesion layer. Both the seed metal layer and the adhesion layer may be deposited by PVD.

[0026] In block 120, a pyrochlore (220) PZT buffer substrate layer is deposited on the lower electrode stack. The buffer substrate layer may be deposited by reactive sputtering deposition. In this example, the pyrochlore buffer substrate layer (220) may be converted to a uniform crystalline perovskite (100) PZT.

[0027] In block 130, the pyrochlore (220) PZT buffer substrate layer is subjected to a rapid thermal anneal. In this example, the thermal annealing process maintains the substrate at a temperature of 600° C. to 650° C. for 2 to 4 minutes. In this example, the rapid thermal annealing substantially converts the pyrochlore (220) PZT buffer layer to perovskite (100) PZT.

[0028] In block 140, an epitaxial growth of a perovskite (100) PZT film is formed on the PZT buffer substrate layer by reactive sputter deposition. In this example, a 0.5-5 micron perovskite (100) film may be epitaxially grown at a deposition temperature of 500°C to 650°C.

[0029] In block 150, an upper electrode stack is formed on the perovskite (100) PZT film. The upper electrode stack may include an upper electrode including a conductive metal such as platinum, iridium, gold, copper, aluminum, indium tin oxide, etc. In this example, the upper electrode may be deposited by PVD. In this example, the upper electrode stack may include an adhesive layer. The adhesive layer may be one of titanium, titanium tungsten, chromium, nickel, nickel chromium, etc. In this example, the adhesive layer may be deposited by PVD.

[0030] Figure 2Depicted is a diagram of an XRD pattern of an example piezoelectric PZT layer according to an embodiment of the present application.

[0031] XRD pattern 210 shows an example of a ceramic target with an iridium lower electrode stack, where pyrochlore (220) is deposited on the iridium lower electrode stack. XRD pattern 210 shows a (111) crystal orientation of the seed metal iridium (IR). X-ray diffraction pattern 210 also shows pyrochlore with a crystal orientation of (220) before rapid thermal annealing.

[0032] An example of the results of rapid thermal annealing is shown in XRD pattern 220. XRD pattern 220 shows that most of the pyrochlore (220) is converted to perovskite (100) and a small amount of perovskite (200).

[0033] XRD pattern 230 shows an example of epitaxial growth of 1.5 micron perovskite (100) PZT on a rapid thermal annealing substrate. The increased height of the perovskite (100) peak (and the decreased height of the iridium (111)) indicates that the film is thicker. The increase in the height of the perovskite (200) peak, i.e., the second-order diffraction peak of the (100) plane, further indicates that the film is primarily composed of perovskite (100).

[0034] Figure 3-5 Shown include Figure 1 Cross-sectional views of examples of MEMS devices of the fabricated piezoelectric PZT membranes. These examples show a piezoelectric membrane stack as described above, located above a deflection membrane and a MEMS body.

[0035] Figure 3 A cross-sectional view of an example of a MEMS piezoelectric PZT inkjet printhead 300 including a piezoelectric PZT film stack according to some embodiments of the present application is shown.

[0036] Example MEMS piezoelectric PZT inkjet printhead 300 shows a lower electrode 304 and an adhesive layer 302. The combination of the lower electrode 304 and the adhesive layer 302 comprises a lower electrode stack. In this example, the lower electrode 302 is iridium. In another example, the lower electrode is platinum.

[0037] The example MEMS piezoelectric PZT inkjet printhead 300 also includes a buffer PZT layer 308. In the example 300, the buffer PZT layer 308 is deposited on the lower electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which does not function as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 308 will be mostly converted to perovskite (100) PZT.

[0038] After converting the buffer PZT layer 308 to the perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 308 to produce the epitaxial growth layer 306. The epitaxial growth layer 306 includes the perovskite (100).

[0039] The example MEMS piezoelectric PZT inkjet printhead 300 also includes an upper electrode 310 and an adhesive layer 312. The combination of the upper electrode 310 and the adhesive layer 312 comprises an upper electrode stack. In this example, the upper electrode 310 is iridium. In another example, the upper electrode is platinum. In another example, the upper electrode is indium tin oxide.

[0040] The example MEMS piezoelectric PZT inkjet printhead 300 also includes a deflection membrane 314. Due to the voltage applied between the upper electrode stack and the lower electrode stack, the deflection membrane 314 will bend, creating a pumping action and forcing a fluid (e.g., ink) out of a body 316 and through a nozzle plate 318 with inkjet nozzles 320. In the example MEMS piezoelectric PZT inkjet printhead 300, the body 316 includes a substrate wafer with ink channels and pumping chambers.

[0041] Figure 4 A cross-sectional view of an example of a MEMS piezoelectric ultrasonic transducer 400 according to some embodiments of the present application is shown.

[0042] Example MEMS piezoelectric ultrasonic transducer 400 shows a lower electrode 404 and an adhesive layer 402. The combination of lower electrode 404 and adhesive layer 402 comprises a lower electrode stack. In this example, lower electrode 404 is iridium. In another example, the lower electrode is platinum.

[0043] The example MEMS piezoelectric ultrasonic transducer 400 also includes a buffer PZT layer 408. In the example 400, the buffer PZT layer 408 is deposited on the lower electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which does not function as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 408 will be mostly converted to perovskite (100) PZT.

[0044] After converting the buffer PZT layer 408 to the perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 408 to produce the epitaxial growth layer 406. The epitaxial growth layer 406 includes the perovskite (100).

[0045] The example MEMS piezoelectric ultrasonic transducer 400 also includes an upper electrode 410 and an adhesive layer 412. The combination of the upper electrode 410 and the adhesive layer 412 includes an upper electrode stack. In this example, the upper electrode 410 is iridium. In another example, the upper electrode is platinum. In another example, the upper electrode is indium tin oxide.

[0046] The example MEMS piezoelectric ultrasonic transducer 400 also includes a deflection membrane 414. Due to the voltage applied between the upper electrode stack and the lower electrode stack, the deflection membrane 414 will bend, generating ultrasonic waves that are emitted through the opening 418 in the body 416. In addition, the returning ultrasonic waves will cause the deflection membrane to bend, generating a voltage between the upper electrode stack and the lower electrode stack. In the example MEMS piezoelectric ultrasonic transducer 400, the body 416 includes a substrate wafer with a backside air gap.

[0047] Figure 5 is a cross-sectional view of an example of a MEMS piezoelectric PZT acoustic transducer according to some embodiments of the present application.

[0048] Example MEMS piezoelectric acoustic transducer 500 shows a lower electrode 504 and an adhesive layer 502. The combination of lower electrode 504 and adhesive layer 502 comprises a lower electrode stack. In this example, lower electrode 504 is iridium. In another example, the lower electrode is platinum.

[0049] The example MEMS piezoelectric acoustic transducer 500 also includes a buffer PZT layer 508. In the example 500, the buffer PZT layer 508 is deposited on the lower electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which does not function as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 508 will be mostly converted to perovskite (100) PZT.

[0050] After converting the buffer PZT layer 508 to the perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 408 to produce the epitaxial growth layer 506. The epitaxial growth layer 506 includes the perovskite (100).

[0051] The example MEMS piezoelectric acoustic transducer 500 also includes an upper electrode 510 and an adhesive layer 512. The combination of the upper electrode 510 and the adhesive layer 512 includes an upper electrode stack. In this example, the upper electrode 510 is iridium. In another example, the upper electrode is platinum. In another example, the upper electrode is indium tin oxide.

[0052] The example MEMS piezoelectric acoustic transducer 500 also includes a deflection membrane 514. Due to the voltage applied between the upper electrode stack and the lower electrode stack, the deflection membrane 514 will bend, generating sound waves, which are emitted through a back plate 518 having a sound hole 520 in a body 516. In addition, the returning sound waves will cause the deflection membrane to bend, generating a voltage between the upper electrode stack and the lower electrode stack. In the example MEMS piezoelectric acoustic transducer 500, the body 516 includes a substrate wafer with a back air gap cavity.

[0053] Various general purpose systems may be used in accordance with the teachings described herein, or it may prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will be as described above.

[0054] The above description is intended to be illustrative rather than limiting. Although the present application has been described with reference to specific illustrative examples, it should be appreciated that the present application is not limited to the described examples. The scope of the present application should be determined with reference to the following claims and the full scope of equivalents to which the claims are entitled.

[0055] Unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" used herein also include the plural forms. It should also be understood that the terms "comprises", "comprising", "containing", and / or "including", when used herein, specify the presence of the features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. Therefore, the terms used herein are only used to describe specific embodiments and are not intended to be limiting.

[0056] It should also be noted that in some alternative implementations, the functions / acts may occur in the order shown in the figures. For example, two figures shown in succession may actually be executed substantially simultaneously, or may sometimes be executed in the reverse order, depending on the functions / acts involved.

[0057] Although method operations are described in a particular order, other operations may be performed between the described operations, the described operations may be adjusted to occur at slightly different times, or the described operations may be distributed in a system that allows the process operations to occur at various intervals associated with the process.

[0058] Various units, circuits, or other components may be described or referred to as being "configured to" or "configurable to" perform one or more tasks. In this case, the phrase "configured to" or "configurable to" is used to indicate a structure, indicating that the unit / circuit / component includes a structure (e.g., a circuit) that performs one or more tasks during operation. Thus, even when a specified unit / circuit / component is not currently operating (e.g., not turned on), it can be said that the unit / circuit or component is configured to perform a task, or is configurable to perform the task. Units / circuits / components used with the "configured to" or "configurable to" language include hardware, such as circuits, memory storing program instructions that can be executed to implement an operation, and the like. The statement that a unit / circuit / component is “configured to” perform one or more tasks, or “configurable to” perform one or more tasks, expressly states that 35 U.S.C. § 112, sixth paragraph, is not to be invoked with respect to that unit / circuit or component. In addition, “configured to” or “configurable to” may include general-purpose structures (e.g., general-purpose circuits) manipulated by software and / or firmware (e.g., an FPGA or a general-purpose processor executing software) to operate in a manner capable of performing the tasks in question. “Configured to” may also include adjusting a manufacturing process (e.g., a semiconductor manufacturing facility) to manufacture a device (e.g., an integrated circuit) suitable for implementing or performing one or more tasks. “Configurable to” expressly states that it does not apply to blank media, an unprogrammed processor or an unprogrammed general-purpose computer, or an unprogrammed programmable logic device, programmable gate array, or other unprogrammed device, unless accompanied by a programming medium that enables the unprogrammed device to be configured to perform the disclosed functionality.

[0059] For the purpose of explanation, the above description has been described with reference to specific embodiments. However, the above illustrative discussion is not intended to be exhaustive or to limit the invention to the precise form disclosed. In view of the above teachings, many modifications and variations are possible. The embodiments are selected and described in order to best explain the principles of the embodiments and their practical application, so that other technicians in the field can best utilize the embodiments and various modifications that may be suitable for the intended specific use. Therefore, the present embodiment should be regarded as illustrative rather than restrictive, and the invention is not limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims

1. A method for creating a piezoelectric stack, the method comprising: forming a lower electrode stack on the structured substrate; forming a pyrochlore lead zirconium titanate (PZT) buffer substrate layer on the lower electrode stack; Performing rapid thermal annealing on the PZT buffer substrate layer; epitaxially growing perovskite (100) PZT on the PZT buffer substrate layer; and An upper electrode stack is formed on the perovskite (100) PZT. 2 . The method of claim 1 , wherein forming the lower electrode stack comprises depositing a metal seed layer of iridium or platinum. 3 . The method according to claim 1 , wherein the rapid thermal annealing of the PZT buffer substrate is performed at a temperature of 600° C. to 650° C. The method according to claim 1 , wherein the rapid thermal annealing of the PZT buffer substrate is performed for a period of 2 to 4 minutes.

5. The method of claim 1, wherein the rapid thermal annealing of the PZT buffer substrate converts the PZT buffer substrate layer into a perovskite (100) PZT.

6. The method according to claim 1, wherein the epitaxial growth of the perovskite (100) PZT is performed at a temperature of 500°C to 650°C. 7 . The method of claim 1 , wherein forming the lower electrode stack comprises depositing an adhesion layer comprising titanium, titanium tungsten, chromium, nickel, or molybdenum. 8 . The method of claim 1 , wherein the pyrochlore lead zirconium titanate (PZT) buffer base layer is formed on the lower electrode stack by RF magnetron sputtering.

9. An apparatus comprising: a structured substrate having a first surface; a lower electrode stack, the lower electrode stack comprising a metal seed layer deposited on the first surface of the structured substrate; a pyrochlore lead zirconate titanate (PZT) buffer substrate layer deposited on the lower electrode stack and opposite the structured substrate, wherein the buffer substrate layer substantially comprises perovskite (100) PZT as a result of rapid thermal annealing; An epitaxial growth layer of perovskite (100) PZT, wherein the epitaxial growth layer of perovskite (100) PZT is deposited on the buffer substrate layer and opposite to the structured substrate; and An upper electrode stack, comprising a metal seed layer, is deposited on the epitaxial growth layer of the perovskite (100) and is opposite to the structured substrate.

10. The device of claim 9, wherein the metal seed layer of the lower electrode stack further comprises one of iridium or platinum.

11. The device of claim 9, wherein the metal seed layer of the upper electrode stack comprises one of platinum, iridium, gold, copper, aluminum, or indium tin oxide.

12. The device of claim 9, wherein the lower electrode stack further comprises an adhesive layer.

13. The device of claim 12, wherein the adhesion layer comprises one of titanium, titanium tungsten, chromium, nickel, or molybdenum.

14. The device of claim 9, wherein the upper electrode stack further comprises an adhesion layer.

15. The device of claim 14, wherein the adhesion layer comprises one of titanium, titanium tungsten, chromium, nickel, or molybdenum.

16. A micro-electromechanical system (MEMS), comprising: a body having a compressible chamber formed therein; and An actuator adjacent the chamber, wherein the actuator comprises a piezoelectric stack formed by the method of claim 1.

17. The MEMS according to claim 16, wherein: A nozzle plate having inkjet nozzles is adjacent to the chamber and opposite the actuator.

18. A micro-electromechanical system (MEMS), comprising: a body having a chamber formed therein; and A transducer is adjacent to the chamber, wherein the transducer comprises a piezoelectric stack formed by the method of claim 1.

19. The MEMS of claim 18, wherein the transducer is an acoustic transducer.

20. The MEMS of claim 18, wherein the transducer is an ultrasonic transducer.

Images