Forming Schottky contact in electronic device and electronic device having same

Abstract

The embodiment of the invention relates to forming a Schottky contact in an electronic device and the electronic device with the Schottky contact. A method of forming a metal-semiconductor contact includes forming a first metal layer on a semiconductor body, the semiconductor body having a first conductivity; a heat treatment is performed on at least a portion of the first metal layer by a laser beam, the laser beam having an incidence direction on the first metal layer, the heat treatment including heating the portion of the first metal layer along the incidence direction at a temperature between 1500 DEG C and 3000 DEG C.

Description

Technical Field

[0001] The present disclosure relates to methods of forming metal-semiconductor contacts, and electronic devices including metal-semiconductor contacts. Background Art

[0002] In the past, many studies have been conducted on the surge current resistance of silicon carbide (SiC) diodes. Today, new power applications require better performance in terms of the ability to withstand surge currents. Surge currents together with high leakage currents at high temperatures represent the main limitations of pure Schottky diodes. Therefore, the best compromise for high-voltage diodes is represented by junction barrier Schottky (JBS) or merged PN Schottky (MPS) devices. This combination has a beneficial effect on the peak current capability, because the bipolar activation limits the voltage drop across the diode and therefore the power dissipation. Controlling the Schottky barrier height (SBH) is fundamental to the performance of these devices.

[0003] 4H-SiC is often used as a substrate due to its easier fabrication compared to other polytypes. However, the band gap of 4H-SiC (3.2 eV) is larger than the corresponding band gap of 3C-SiC (2.3 eV) or the corresponding band gap of silicon (1.12 eV), making 4H-SiC less attractive for some electronic applications compared to 3C-SiC or compared to silicon. For example, in the case of Schottky barrier diodes, the possibility of controlling the SBH value is an important aspect in order to reduce energy consumption and minimize conduction losses.

[0004] There are many variables involved in the formation of the Schottky barrier, including the choice of the metal in contact with the surface of the epitaxially grown drift layer and its evolution in the formation of the contact, especially with regard to the annealing step. Several studies have analyzed the electrical properties of various metallization patterns for Schottky contacts on 4H-SiC, with particular attention to the value of the Schottky barrier height and the mechanism of current transmission through the metal / semiconductor interface. However, some technical issues remain unresolved and deserve further research. For example, the possibility of controlling and reducing the Schottky barrier height is an important point for reducing the energy consumption of the device. As mentioned above, one of the metals currently most commonly used for the Schottky barrier of rectifiers based on 4HSiC is titanium, which generally provides a barrier height value of the order of 1.25eV. Molybdenum provides similar performance. However, since further reducing conduction losses is beneficial in many applications, reducing the barrier height is one of the current challenges. Summary of the invention

[0005] The present disclosure provides methods of forming metal-semiconductor contacts and electronic devices including metal-semiconductor contacts to overcome the shortcomings of the prior art and, in particular, methods that allow for lower SBH values.

[0006] According to the present disclosure, a method for forming a metal-semiconductor contact is provided. The method for forming a metal-semiconductor contact first includes: forming a first metal layer on a semiconductor body having a first electrical conductivity, wherein the first metal layer is included in an anode terminal. Then, a heat treatment of a portion of the first metal layer by a laser (LASER) beam having an incident direction on the metal layer is performed, including heating the portion of the first metal layer along the incident direction at a temperature between 1500° C. and 3000° C.

[0007] According to the present disclosure, an electronic device comprising a metal-semiconductor contact is provided. The electronic device comprises: a solid body, in particular silicon carbide, having a first electrical conductivity; and an implanted region having a second electrical conductivity opposite to the first electrical conductivity and formed at the front side of the solid body. In addition, the electronic device comprises a first metal layer, which is both formed on the front side of the solid body and in electrical contact with the solid body, wherein the formation of the first metal layer comprises a heat treatment at a temperature between 1500°C and 3000°C by a laser beam. Finally, the electronic device comprises a second metal layer, which is both formed on the first metal layer and in direct electrical contact with the first metal layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] For a better understanding of the present disclosure, preferred embodiments will now be described, by way of non-limiting examples only, with reference to the accompanying drawings, in which:

[0009] Figure 1 A JBS or MPS device according to an embodiment, which is not the subject of the present disclosure, is shown in cross-sectional view;

[0010] FIG. 2A to FIG. 2E illustrates in cross-sectional views the steps of fabricating a JBS or MPS device according to an embodiment of the present disclosure, with particular reference to the fabrication of metal-semiconductor contacts of such a device;

[0011] Figure 3 A JBS or MPS device according to an embodiment of the present disclosure is shown in cross-sectional view. DETAILED DESCRIPTION

[0012] Figure 1 A JBS (similarly MPS) device is shown in a transverse cross-sectional view of a Cartesian (three-axis) reference system of the X, Y, Z axes, identified with reference numeral 1. In the following, without loss of generality, reference will be made to the JBS device 1.

[0013] The JBS device 1 comprises: a substrate 3 of N-type doped 4H-SiC having a first dopant concentration (for example, comprised between 1·1019 and 1·1022 atoms / cm3), a resistivity comprised between, for example, 2 mΩ·cm and 40 mΩ·cm, the substrate being provided with a surface 3a opposite to a surface 3b and having a thickness comprised between 50 μm and 350 μm, more specifically between 160 μm and 200 μm, for example equal to 180 μm; a drift layer (epitaxial growth) 2 of N-type 4H-SiC having a second dopant concentration lower than the first dopant concentration (for example, comprised between 1·1014 and 5·1016 atoms / cm3), the drift layer being located on the surface 3a of the substrate 3 and having a thickness comprised between 5 and 15 μm; an ohmic contact region 6 (e.g., an ohmic contact region of nickel silicide), which is located on the surface 3b of the substrate 3; a cathode metallization 7 (e.g., a cathode metallization of Ti / NiV / Ag or Ti / NiV / Au), which is located on the ohmic contact region 6; an anode metallization 8, for example, comprising a stack of Ti and AlSiCu, or Ni and AlSiCu, or Mo and AlSiCu, which is located on the upper surface of the drift layer 2; a passivation layer 19 on the anode metallization 8, for protecting the anode metallization 8; a plurality of junction barrier (JB) elements 9 in the drift layer 2, facing the upper surface of the drift layer 2 and comprising corresponding P-type implant regions 9′ and ohmic contacts 9″; and an edge termination region or guard ring 10, in particular a P-type implant region, which may completely or partially surround the JB element 9.

[0014] A Schottky diode 12 is formed at the interface between the drift layer 2 and the anode metallization 8. In particular, a Schottky junction (semiconductor-metal) is formed by portions of the drift layer 2 that are in direct electrical contact with corresponding portions of the anode metallization 8.

[0015] The region of the JBS device 1 including the JB element 9 and the Schottky diode 12 (ie, the region contained within the guard ring 10 ) is the active region 4 of the JBS device 1 .

[0016] According to the embodiments of the present disclosure, and with reference to FIG. 2A to FIG. 2E , a method for manufacturing an electronic device 20 (particularly a JBS type electronic device) will now be described. FIG. 2A to FIG. 2E The electronic device 20 is shown in the figure in a three-axis system in which the X, Y, and Z axes are transverse to each other.

[0017] refer to Figure 2A, an electronic device 20, specifically a JBS device, is illustrated as being in an intermediate manufacturing step. The device 20 includes a substrate 22 of semiconductor material, specifically silicon carbide 4H-SiC. However, the present disclosure also finds application to other SiC polytypes such as cubic polytype (3C-SiC), hexagonal polytype (6H-SiC), and rhombohedral polytype (15R-SiC).

[0018] The substrate 22 is doped with a dopant substance having a first conductivity (particularly N-type). The substrate 22 has a conductivity of, for example, 1·10 19 and 1.10 22 The substrate 22 has an upper surface 22a opposite to a lower surface 22b along the Z direction, and a thickness (along the Z direction) between 50 μm and 350 μm, more specifically between 160 μm and 200 μm, for example equal to 180 μm.

[0019] The device 20 also includes a drift layer (e.g., epitaxially grown) 24, which is specifically N-type 4H-SiC (similarly, it can be 3C-SiC, 6H-SiC, 15H-SiC or other SiC polytypes). The drift layer 24 is located on the surface 22a of the substrate 22 and has its own upper surface 24a opposite to the lower surface 24b along the Z direction; the lower surface 24b of the drift layer is in contact with the upper surface 22a of the substrate 22. The dopant concentration of the drift layer 24 is lower than the dopant concentration of the substrate 22 (e.g., at 1·10 14 The thickness of the drift layer 24 (along the Z direction) is between 3 and 30 μm.

[0020] The substrate 22 and the drift layer 24 as a whole form a solid of semiconductor material, in particular SiC. Furthermore, it becomes apparent that one or more further semiconductor layers may be present between the substrate 22 and the drift layer 24; alternatively, the drift layer 24 may not be present; in this case, the following steps apply to the substrate 22.

[0021] The device 20 further comprises a plurality of junction barrier (JB) elements 26 in the drift layer 24, facing the upper surface 24a of the drift layer 24. The junction barrier (JB) elements 26 further comprise respective implantation regions 28' having a second conductivity (here P-type) opposite to the first conductivity; ohmic contacts 28" are also present at the implantation regions 28' in a manner known per se.

[0022] The device 20 further optionally comprises an edge termination region or guard ring 30. The edge termination region 30 is in particular an implanted region of the second conductivity (P-type) and surrounds the JB element 26 (completely or partially).

[0023] refer to Figure 2B A hard mask 35 is formed on the surface 24a of the drift layer 24, lateral to and surrounding the JB element 26, and partially overlapped on the edge termination region 30 (if any). The hard mask 35 is, for example, silicon oxide (SiO2).

[0024] Then, in Figure 2C In the process, a conductive layer 32 of a metal material, particularly titanium or titanium nitride (TiN), or other metals and related nitrides (eg, Mo, MoN) is formed on the upper surface 24a of the drift layer 24 and the hard mask 35.

[0025] Conductive layer 32 is formed, for example, by depositing titanium or titanium nitride. In particular, conductive layer 32 (e.g., TiN) is deposited by a sputtering process reacting in an N2 and Ar atmosphere. The percentage of N2 in the gas mixture can vary between 0% (in this case, a metallic Ti layer is deposited instead of a TiN layer) and 90%. In particular, in a non-limiting embodiment, the percentage of N2 in the gas mixture is about 75%.

[0026] The conductive layer 32 has a thickness along the Z direction comprised between 10 and 100 nm.

[0027] The conductive layer 32 has an exposed upper surface 32a for reference. Figure 2D Subsequent fabrication steps are described.

[0028] Conductive layer 32 is in electrical contact with JB element 26 and drift layer 24, forms a Schottky contact (metal-semiconductor junction) with drift layer 24, and thus forms a corresponding Schottky diode 36. The region of device 20 that includes JB element 26 and the Schottky contact (i.e., the region contained within guard ring 30, if present) is an active region 38 of device 20.

[0029] Therefore, in Figure 2D In the present disclosure, an annealing step of the conductive layer 32 is provided, thereby adjusting the Figure 2C According to one aspect of the present disclosure, the annealing is performed using a laser source 40 (eg, an excimer laser) configured to emit a light beam 42 .

[0030] The configuration and operating parameters of the laser source 40 are as follows:

[0031] a wavelength between 290 nm and 370 nm, in particular equal to 308 nm;

[0032] the duration of the pulse, which is between 100 ns and 300 ns, in particular 160 ns;

[0033] the number of pulses, which is between 1 and 5, in particular 2;

[0034] The energy density, which is measured at the level of the upper surface 32a of the conductive layer 32, is between 1 and 3 J / cm 2 Between, especially 2J / cm 2 .

[0035] At the level of the surface of the conductive layer 32 , the area of ​​the spot of the light beam 42 is, for example, comprised between 0.7 and 2.25 cm 2 Such spot area values ​​can be obtained, for example, with the aid of a suitable focusing lens 43 in a manner known per se.

[0036] In one embodiment, the laser beam is oriented along the Z direction; in other words, it reaches the upper surface 32a of the conductive layer 32 transversely to the surface 32a. However, it will be apparent that in other embodiments, the laser beam may have a different orientation, for example, it may form an angle with the direction Z. The angle is formed by the portion of the surface 32a of the conductive layer 32 that it strikes.

[0037] Using laser beam parameters, conductive layer 32 is heated uniformly transversely or orthogonally to the beam in X and Y directions and longitudinally to the beam in Z direction. The annealing temperature reached at the level of surface 32a of conductive layer 32 is in particular comprised between 1800 and 3000°C.

[0038] It is obvious that the surface 32a of the conductive layer 32 may be covered by a further layer (eg a protective layer or a further conductive layer, such as a carbon-containing or carbon-containing layer or multiple layers), provided that the further layer does not affect the aforementioned annealing step.

[0039] The annealing step allows the SBH value to be adjusted. In particular, it allows the SBH value to be reduced in a controlled, rapid and easily integrated into the production process.

[0040] Then, in Figure 2EIn the method, the method continues with forming a further conductive layer 46 (anode terminal) above the conductive layer 32 and in electrical contact with the conductive layer 32. The further conductive layer 46 is, for example, of a metallic material, such as Al or an Al alloy, such as AlCu or AlSiCu, and is formed by physical vapor deposition (PVD), in particular sputtering, at a temperature comprised between 200° C. and 500° C., in particular 400° C. The conductive layer 46 has, for example, a thickness between 3 and 5 μm. The applicant has verified that deposition temperature values ​​outside the above range result in poor stiction between the conductive layers 32 and 46.

[0041] Conductive layer 46 improves contact with the package and may therefore optionally be included. AlSiCu is particularly suitable for wire bonding processes. Furthermore, due to both the thickness (typically in the range between 3 and 5 μm) and the low resistivity of the material, the present disclosure ensures that current flowing through the layer has low resistance.

[0042] In FIG. 2A to FIG. 2E In a manner not shown in the figure, the described manufacturing process may also provide a step of forming a cathode electrical terminal at the lower surface 22b of the substrate 22, for example, including an ohmic contact (e.g., nickel silicide) 50 on the lower surface 22b and a metallization (e.g., Figure 3 shown).

[0043] In addition, the manufacturing method may further include a step of removing a selective portion of the conductive layers 32 and 46, wherein the selective portion of the conductive layers 32 and 46 has no function. In addition, the method may include a step of forming a passivation layer 52, such as Figure 3 4, to protect device 20. A passivation layer is located over conductive layer 46, except for portions of conductive layer 46 that are used during a subsequent step of forming electrical contact by bonding (eg, wire bonding).

[0044] Figure 3 by FIG. 2A to FIG. 2E A lateral cross-sectional view in a Cartesian (three-axis) reference system of the X, Y, and Z axes of FIG. 2 shows a device 20 (JBS diode) according to an embodiment of the present disclosure. Figure 3 The views of may similarly relate to MPS (diode) devices. In the following, without loss of generality, reference will be made exclusively to JBS devices.

[0045] The JBS device 20 includes: an N-type 4H-SiC substrate 22 having a first dopant concentration; an (epitaxial) drift layer 24 of N-type 4H-SiC having a second doping concentration; a conductive layer 32 on the surface 24a; a conductive layer 46 on the conductive layer 32; and a cathode terminal 50 on the back side of the substrate 22.

[0046] As reference Figure 2A As depicted, the drift layer 24 includes a plurality of implant regions 26 facing an upper surface 24 a of the drift layer 24 at an interface with the conductive layer 32 . Figure 3 Also illustrated is an ohmic contact 28 ″ which is located at the (P-type) implant region 28 ′ and forms a corresponding JB element 26 together with the (P-type) implant region 28 ′.

[0047] An edge termination region or guard ring 30 (optional), in particular a P-type implant region, completely or partially surrounds the JB element 26 .

[0048] One or more Schottky diodes 36 are located at the interface between conductive layer 32 and drift layer 24, lateral to implant region 26. In particular, one or more Schottky junctions (semiconductor-metal) are formed by portions of conductive layer 32 being in direct electrical contact with corresponding portions of drift layer 24.

[0049] The region of the JBS device 20 that includes the JB element 26 and the Schottky diode 36 (ie, the region contained within the guard ring 30 , if present) is the active region 38 of the JBS device 20 .

[0050] Advantages thereof are apparent from an inspection of the features of the disclosure provided in accordance with this specification.

[0051] Finally, it is evident that modifications and variations may be made to what has been described and illustrated herein without departing from the scope of the present disclosure, as defined in the appended claims.

[0052] In particular, the present disclosure is not limited to the fabrication of SiC JBS or MPS devices, but extends to the general formation of metal-semiconductor contacts (Schottky contacts).

[0053] A method for forming a metal-semiconductor contact comprises the following steps: forming a first metal layer (32) on a semiconductor body (22, 24) having a first electrical conductivity (N); performing a heat treatment of at least a portion of the first metal layer (32) by a laser beam (42) having an incident direction (Z) on the first metal layer (32), comprising heating the portion of the first metal layer (32) along the incident direction at a temperature between 1500° C. and 3000° C.

[0054] Performing the heat treatment includes performing one or more scans of the portion of the first metal layer (32) by the laser beam (42).

[0055] The incident direction (Z) is transverse to the surface (32a) of the first metal layer (32).

[0056] The portion of the first metal layer (32) extends in electrical contact with the semiconductor body.

[0057] The portion of the first metal layer (32) forms a metal-semiconductor junction or a Schottky junction with the semiconductor body (22, 24).

[0058] The step of performing the heat treatment comprises: generating a laser beam (42) having the following parameters: a wavelength of the laser beam between 290 and 370 nm; a duration of the laser beam pulse between 100 ns and 300 ns; a number of pulses of the laser beam between 1 and 5; and a heat release rate between 1 and 3 J / cm 2 The energy density of the laser beam between .

[0059] The pulse of the laser beam (42) impinges on the surface (32a) of the conductive layer (32), and the surface (32a) of the conductive layer (32) has a surface area between 0.7 and 2.25 cm 2 The area between.

[0060] The wavelength of the laser beam is equal to 308 nm, the duration of the pulse of the laser beam is equal to 160 ns; the number of pulses of the laser beam is between 1 and 5; and the energy density of the laser beam is between 1 and 3 J / cm 2 between.

[0061] The thermal treatment is configured to generate uniform heating of the portion of the first metal layer (32) along the incident direction.

[0062] The first metal layer (32) is made of the following materials: Ti, TiN, Mo, MoN.

[0063] The first metal layer (32) has a thickness between 10 nm and 100 nm.

[0064] The method further comprises: after the step of performing the heat treatment, a step of forming a second metal layer (46) on the first metal layer (32), the step of forming the second metal layer (46) comprising: depositing Al or an Al alloy, including AlCu or AlSiCu, with a thickness comprised between 3 and 5 μm.

[0065] The semiconductor body (22, 24) is made of silicon carbide SiC, in particular 4H-SiC.

[0066] A metal semiconductor contact is formed.

[0067] An electronic device (20) comprises: a solid (22, 24), in particular SiC, having a first electrical conductivity (N); at least one implanted region (28'), the at least one implanted region having a second electrical conductivity (P) opposite to the first electrical conductivity (N), extending at the front side (24a) of the solid body (22, 24); a first metal layer (32) on the front side (24a), in electrical contact with the solid body (22, 24) at the front side (24a), the first metal layer having a thickness between 10nm and 100nm and made of a material selected from Ti, TiN, Mo, MoN; a second metal layer (46) on the first metal layer (32) and in direct electrical contact with the first metal layer, made of a material selected from Al or an Al alloy (including AlCu or AlSiCu), and having a thickness between 3 and 5μm.

[0068] The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide further embodiments.

[0069] Based on the above detailed description, the above and other changes can be made to the embodiments. Generally, in the appended claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full range of equivalents to which these claims are entitled. Therefore, the claims are not limited by this disclosure.

Claims

1. A method for forming a metal-semiconductor contact, comprising: forming a first metal layer on a semiconductor body, the semiconductor body having a first electrical conductivity, the first metal layer being included in an anode terminal; as well as Performing a heat treatment of a portion of the first metal layer by a laser beam having an incident direction on the first metal layer includes heating the portion of the first metal layer along the incident direction at a temperature between 1500° C. and 3000° C.

2. The method of claim 1 , wherein performing the heat treatment comprises: One or more scans of the portion of the first metal layer by the laser beam are performed. The method of claim 1 , wherein the incident direction is transverse to a surface of the first metal layer. The method of claim 1 , wherein the portion of the first metal layer is in electrical contact with the semiconductor body. The method of claim 4 , wherein the portion of the first metal layer forms a metal-semiconductor junction or a Schottky junction with the semiconductor body.

6. The method of claim 1 , wherein performing the thermal treatment comprises: The laser beam is generated, and the laser beam has the following parameters: a wavelength of the laser beam between 290 and 370 nm; a duration of the pulses of the laser beam between 100 ns and 300 ns; a number of pulses of the laser beam between 1 and 5; as well as At 1 and 3 J / cm 2 The energy density of the laser beam is between .

7. The method of claim 6, wherein the pulse of the laser beam impinges on the surface of the conductive layer, the surface of the conductive layer having a 2 The area between.

8. The method according to claim 6, wherein the wavelength of the laser beam is equal to 308 nm, the duration of the pulses of the laser beam is equal to 160 ns; the number of the pulses of the laser beam is between 1 and 5; and the energy density of the laser beam is between 1 and 3 J / cm 2 between. 9 . The method of claim 1 , wherein the thermal treatment is configured to generate uniform heating of the portion of the first metal layer along the incident direction. 10 . The method according to claim 1 , wherein the first metal layer comprises one or more of titanium (Ti), titanium nitride (TiN), molybdenum (Mo), and molybdenum nitride (MoN). The method of claim 1 , wherein the first metal layer has a thickness between 10 nm and 100 nm.

12. The method according to claim 1, further comprising: After performing the heat treatment, forming a second metal layer on the first metal layer, and The step of forming the second metal layer further comprises: depositing aluminum Al or aluminum alloys, including aluminum copper AlCu and aluminum silicon copper AlSiCu, with a thickness between 3 and 5 μm.

13. The method according to claim 1, wherein the semiconductor body is silicon carbide SiC, in particular 4H-SiC.

14. A method comprising: forming a hard mask on a portion of a semiconductor body having exposed areas not covered by the hard mask; forming a first metal layer on the hard mask and the semiconductor body, the first metal layer contacting the semiconductor body in the exposed area; A heat treatment is performed on the first metal layer by using a laser beam, wherein the first metal layer is heated to a temperature between 1500° C. and 3000° C.

15. The method of claim 14, wherein the step of performing the heat treatment comprises: The laser beam is generated, and the laser beam has the following parameters: a wavelength of the laser beam between 290 and 370 nm; a duration of the pulses of the laser beam between 100 ns and 300 ns; a number of pulses of the laser beam between 1 and 5; as well as At 1 and 3 J / cm 2 The energy density of the laser beam is between . 16 . The method according to claim 14 , wherein the first metal layer comprises one or more of titanium Ti, titanium nitride TiN, molybdenum Mo, and molybdenum nitride MoN, and forms a Schottky contact with the semiconductor body.

17. The method of claim 14, wherein the hard mask comprises silicon oxide and the semiconductor body comprises silicon carbide SiC, including 4H-SiC material.

18. An electronic device, comprising: The solid, in particular silicon carbide SiC, has a first electrical conductivity; an implantation region having a second conductivity opposite to the first conductivity and formed at the front side of the solid; a first metal layer formed on the front side of the solid and in electrical contact with the solid, wherein the formation of the first metal layer comprises: a heat treatment at a temperature between 1500° C. and 3000° C. by a laser beam; as well as The second metal layer is on the first metal layer and is in direct electrical contact with the first metal layer. 19 . The electronic device of claim 18 , wherein the first metal layer has a thickness between 10 nm and 100 nm and comprises one or more of titanium Ti, titanium nitride TiN, molybdenum Mo, and molybdenum nitride MoN. 20 . The electronic device of claim 18 , wherein the second metal layer has a thickness between 3 and 5 μm and comprises one or more of aluminum (Al), aluminum copper (AlCu), and aluminum silicon copper (AlSiCu).

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