Plasma processing method

Abstract

In order to provide a plasma processing method capable of achieving both suppression of pattern collapse and a vertical processing shape, a plasma processing method for plasma etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, the plasma processing method comprising: a first step in which the mask of the carbon-containing film and the mask of the inorganic film are used; performing plasma etching on the film to be etched by using the mask of the carbon-containing film and the mask of the inorganic film; a second step of trimming the mask of the carbon-containing film after the first step; and a third step in which, after the second step, the film to be etched is over-etched.

Description

Technical Field

[0001] The present invention relates to a plasma processing method for processing a semiconductor element using plasma. Background Art

[0002] As the processing speed of semiconductor devices increases, pattern miniaturization is progressing year by year, and as the pitch size decreases, high-precision miniaturization processing technology is required. In the field of so-called dry etching, which uses plasma to etch a film to be processed, the following method is generally used: in order to miniaturize the pattern, a carbon-based mask is trimmed by dry etching before processing the etched material, thereby reducing the processing size of the etched material (for example, see Patent Document 1). In addition, by reducing the processing size during the processing of the etched material, the pattern collapse is suppressed (for example, see Patent Document 2).

[0003] Prior Art Literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2013-89827

[0006] Patent Document 2: Japanese Patent Application Publication No. 2007-234870 Summary of the invention

[0007] -Problems to be solved by the invention-

[0008] In recent years, the pitch size reduction has progressed to a pattern with a high aspect ratio. If the carbon mask is trimmed using the technology described in Patent Document 1, the carbon mask pattern is thinned, and thus the plasma resistance is significantly reduced, and the semiconductor material as the etched material is etched, thereby increasing the probability of the so-called pattern collapse in which the semiconductor wiring collapses laterally. Therefore, the reduction amount of the processing size is limited.

[0009] In addition, the technique described in Patent Document 2 is insufficient in suppressing pattern tilting with respect to the high aspect ratio structure in recent years. In addition, when the above technique is used, it is difficult to advance etching of the lower part of the etched film, resulting in a so-called hem shape in which the lower part of the pattern expands in the width direction, and vertical processing may not be possible.

[0010] An object of the present invention is to provide a plasma processing method capable of achieving both suppression of pattern collapse and vertical processing shape.

[0011] -Methods for solving problems-

[0012] The structure of the present invention for achieving the above-mentioned object is as follows.

[0013] A plasma processing method is provided, which uses a carbon-containing film mask and an inorganic film mask to plasma-etch an etched film, and the plasma processing method comprises: a first step, using the carbon-containing film mask and the inorganic film mask to plasma-etch the etched film; a second step, after the first step, trimming the carbon-containing film mask; and a third step, after the second step, over-etching the etched film.

[0014] -Effects of the Invention-

[0015] According to the present invention, it is possible to provide a plasma processing method capable of achieving both suppression of pattern collapse and a vertical processed shape. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a schematic cross-sectional view of a plasma etching device according to the present invention.

[0017] Figure 2 It is a schematic diagram showing the structure of a sample used in Examples of the present invention.

[0018] Figure 3 It is a diagram showing the progress of etching of a semiconductor substrate according to an embodiment of the present invention.

[0019] Figure 4 It is a diagram showing the progress of etching of a semiconductor substrate when the conventional technology is used.

[0020] Figure 5 This is a diagram showing a comparison of etching results based on the conventional technique and the technique of the present invention. DETAILED DESCRIPTION

[0021] A plasma processing apparatus used in an embodiment of the present invention will be described with reference to the drawings. Figure 1 A schematic longitudinal cross-sectional view of an ECR (Electoron Cycrotron Rezonance) microwave plasma etching device used in this embodiment is shown. A shower plate 105 (e.g., made of quartz) and a dielectric window 106 (e.g., made of quartz) for introducing a processing gas into the vacuum container 101 are provided at the upper portion of the vacuum container 101 whose upper portion is open, and a processing chamber 107 is formed by sealing.

[0022] The shower plate 105 is provided with a plurality of holes for allowing the process gas to flow therethrough, and the gas supplied from the gas supply device 108 is introduced into the process chamber 107 through the plurality of holes. In addition, a vacuum exhaust device (not shown) is connected to the vacuum container 101 via a vacuum exhaust port 109. In order to transmit power for generating plasma to the process chamber 107, a waveguide 110 for transmitting electromagnetic waves is provided above the dielectric window 106.

[0023] The high frequency (plasma generation high frequency) transmitted to the waveguide 110 is oscillated from the oscillator 103 under the control of the first high frequency power source 104. The first high frequency power source 104 includes a pulse oscillator and can oscillate a time-modulated intermittent high frequency or a continuous high frequency.

[0024] The frequency of the high frequency is not particularly limited, and in this embodiment, a 2.45 GHz microwave (high frequency for plasma generation) is used. A magnetic field generating coil 111 for forming a magnetic field is provided at the periphery of the processing chamber 107, and the power oscillated from the oscillator 103 interacts with the formed magnetic field to generate high-density plasma in the processing chamber 107.

[0025] In addition, the magnetic field generating coil 111 is covered by a coil housing 112. In addition, a sample stage 102 is provided at the lower part of the vacuum container 101 so as to face the shower plate 105. The electrode surface of the sample stage 102 is covered by a sprayed film (not shown), and a DC power supply 117 is connected via a high-frequency filter 116. Furthermore, a second high-frequency power supply 115 as a high-frequency power supply for bias is connected to the sample stage 102 via a matching circuit (matching device) 114.

[0026] A temperature regulator (not shown) is also connected to the sample stage 102. The wafer 113 is transported to the processing chamber 107 of the vacuum container 101 by a transport unit (not shown) and placed on the sample stage 102. The wafer 113, which is a sample transported to the processing chamber 107, is adsorbed on the sample stage 102 by the electrostatic force of the DC voltage applied from the DC power supply 117, and the temperature is adjusted.

[0027] After the desired processing gas is supplied to the processing chamber 107 through the gas supply device 108, the vacuum container 101 is controlled to a given pressure through the vacuum exhaust device, and a high frequency is supplied to the processing chamber 107 from the oscillator 103, and plasma is generated in the processing chamber 107. By applying high-frequency power from the second high-frequency power supply 115 connected to the sample stage 102, ions are attracted from the plasma to the wafer, and the wafer 113 is plasma-processed (etched).

[0028] Furthermore, since the second high-frequency power source 115 includes a pulse oscillator, it is possible to apply time-modulated intermittent high-frequency power or continuous high-frequency power to the sample stage 102 .

[0029] Example 1

[0030] Hereinafter, an embodiment of the present invention using the above-mentioned plasma processing apparatus will be described. Figure 2 It is a schematic diagram showing the structure of a sample used in Examples of the present invention. Figure 2 (a) is a three-dimensional diagram of the test sample, which has a line pattern structure. Figure 2 (b) is a cross-sectional view of the test sample.

[0031] From the top, on a silicon substrate with a diameter of 12 inches, there are ACL (Atomic Carbon Layer, film thickness 100nm) 201, SiN (film thickness 40nm) 202, Poly Si (film thickness 90nm) 203, and SiO (film thickness 300nm) 204. ACL is a mask with a line pattern with a line width of 25nm.

[0032] use Figure 3 (a) and thereafter represent the process of etching treatment performed in one embodiment of the present invention. Figure 3 (b) represents a step of etching SiN as a mask for an inorganic film using ACL as a carbon-containing film as a mask (pretreatment for plasma treatment, hereinafter sometimes referred to as "pretreatment"), Figure 3 (c) represents the first step of the present invention in which Poly Si as an etched film is etched in the vertical direction (depth direction) and the horizontal direction (width direction) using ACL and SiN as masks, Figure 3 (d) represents the second step of the present invention of trimming the ACL as a mask of the carbon-containing film to the width of Poly Si, Figure 3 (e) shows the third step of the present invention of over-etching Poly Si as the etched film.

[0033] Table 1 shows examples of treatment conditions for the pretreatment steps and the first to third steps of the present invention.

[0034] [Table 1]

[0035] Table 1

[0036]

[0037] In the pretreatment step, a mixed gas of CHF3, Ar, and O2 is used as an etching gas, and SiN serving as a mask for an inorganic film is etched using ACL as a mask. The content (volume %) of the etching gas, i.e., CHF3, in the mixed gas is preferably 20 to 50% (under the conditions described in Table 1, the content of CHF3 is (70 / (170+70+5))*100≈28.6%). If the content exceeds 50%, the etching rate becomes too high, so it is not preferred. If the content is less than 20%, the etching rate is too slow, resulting in a problem of time-consuming process. The pressure of the mixed gas is set to 0.8 Pa in Table 1, which can be implemented under the conditions of a general etching gas pressure range of 0.1 to 3.0 Pa.

[0038] From the viewpoint of shape control, the RF bias execution power (the cumulative value of power and duty cycle, for example, if the power is 800 W and the duty cycle is 25% as shown in Table 1, the execution power is 200 W) is preferably in the range of 100 W to 300 W. If the execution power is less than 100 W, it is difficult to ensure the verticality of etching, and if the execution power is greater than 300 W, it is difficult to ensure the mask selectivity.

[0039] The specific processing conditions of the steps of the present invention are described below. The first step of the present invention uses a mixed gas of N2 and O2 added to CF4 as an etching gas. Then, while using ACL and SiN as masks to advance the longitudinal etching of Poly Si as the etched material, SiN as a mask of the inorganic film and Poly Si as the etched material are etched laterally, thereby reducing the pattern size. By adjusting the mixing ratio of N2 and O2, the etching ratio of the lateral direction to the longitudinal direction can be adjusted. N2 is preferably used at 10% to 30% (volume %), and O2 is preferably used at 5% to 15% (volume %) (under the conditions described in Table 1, N2: about 27%, O2: about 8%). From the viewpoint of in-plane uniformity, the processing pressure is preferably 0.4 to 0.8 Pa. From the viewpoint of shape control, the microwave output is preferably used at the lower limit of 400W to 600W. If the microwave output is above 600W, the deviation is strong and it is difficult to control the vertical shape. Regarding RF bias, it is preferable to adjust the power and duty ratio so that the execution power is 80 W to 120 W. If it is less than 80 W, the lateral etching is slower than the vertical etching, and if it is greater than 120 W, the lateral etching is faster than the vertical etching, so a vertical shape cannot be obtained.

[0040] The second step of the present invention uses O2, N2, and Ar as etching gases, applies a small RF bias (10W in Table 1), and trims the ACL mask, which is a mask for the carbon film, to a line width of 15nm. From the viewpoint of etching rate control, the mixing ratio of O2 is preferably 20 to 40% (volume %). From the viewpoint of uniformity of the trimming width, regarding the RF bias, it is preferred to use a power of 5W to 20W. If it is less than 5W, a slow trimming area will be generated due to the adhesion of deposits (deposition: precipitates), and if it is greater than 20W, the height of the ACL mask will be excessively reduced.

[0041] The third step of the present invention uses CF4, SF6, N2, and He as etching gases, and uses the ACL of the carbon film as a mask to over-etch the Poly Si of the etched material to remove the hem shape at the bottom of the Poly Si generated in the first step. Regarding the mixing ratio of the etching gas, in order to ensure the verticality of the etching, CF4 is used at 15 to 30% (volume %), and He is used at 30 to 60% (volume %). In order to ensure the etching rate and remove the hem shape, it is preferred to add 2 to 7% (volume %) of SF6. Regarding the RF bias, in order to ensure the verticality of the etching and remove the hem shape at the etching rate, it is preferred to use a duty cycle of 25% or more. If the duty cycle is less than 25%, it is difficult to achieve the removal of the hem shape and ensure verticality. Under the etching conditions used here, in order not to cause lateral etching of polysilicon, the etching process is performed while maintaining the processing dimensions formed on the upper layer unchanged.

[0042] <Comparative Example>

[0043] Figure 4 The figure shows the shape when etching is performed using the conventional technology. In the conventional technology, when the line width of PolySi is reduced to 15nm, the ACL mask is trimmed (the second step) to make it thinner before etching SiN and PolySi (the first step). Therefore, since the aspect ratio of the ACL mask becomes higher, the plasma resistance is significantly reduced, and there is a problem of the ACL mask falling down during the etching of PolySi (the first step). In addition, there is the following problem: during the etching of PolySi (the first step), a height difference is generated between the carbon-based mask (ACL) and the inorganic film (SiN and PolySi) due to the difference in the reduction ratio, and the height difference becomes a mask while the lower part of PolySi is not etched, resulting in a hem shape.

[0044] The present invention is characterized in that the second step of trimming is added in the middle of the first step of etching Poly Si, and the pattern size is reduced after the ACL mask height is reduced, so that the pattern does not fall. Furthermore, after the ACL mask size is reduced, over etching is added as the third step to remove the hem shape and obtain a vertical shape.

[0045] Thus, in this experiment, using a mask pattern showing an initial size of 25 nm, it was possible to realize Poly Si wiring processing with a line width of 15 nm and a film thickness of 90 nm without disconnection or bending.

[0046] Similarly, if we only use Figure 4The initial ACL mask was trimmed under the conditions to achieve Poly Si wiring processing with a line width of 15nm and a film thickness of 90nm. However, during the etching of Poly Si, the photoresist pattern of the ACL mask would collapse, resulting in problems such as disconnection and bending of the polysilicon wiring.

[0047] Figure 5 A comparison of etching results between the conventional technique and the technique using the present invention is shown. Figure 5 (a) shows that the horizontal axis is the Inline CD indicating the pattern size, and the vertical axis is the LER (line edge roughness) which is an index of the size of the pattern collapse. It can be seen that in the conventional technology, the smaller the Inline CD is, the more the LER deteriorates. In contrast, in the technology of the present invention, the deterioration of the LER is suppressed.

[0048] also, Figure 5 (b) shows the comparison of the LER and hem shape results of the conventional technology and the technology of the present invention when the Inline CD is 15nm in this test. By using the technology of the present invention, the LER is improved from 3.6nm to 1.4nm, and the hem shape is also improved from 2.6nm of the conventional technology to 0.6nm. Therefore, the technology of the present invention suppresses the pattern tilting and hem shape.

[0049] This embodiment optimizes the process conditions for the test samples of semiconductor devices. The processing methods of Poly Si, SiN, and ACL are not limited to the implementation conditions of this embodiment.

[0050] The present invention describes the wiring processing process of Poly Si, but is not limited to this. In the semiconductor device manufacturing process, the method of the present invention can also be applied to the wiring processing of materials other than Poly Si, for example, it can also be applied to the wiring processing of Si, SiN, SiO, SiON, TiN, WSi, etc. In addition, the processing of the inorganic film of the mask is not limited to SiN, for example, it can also be applied to the processing of Si, SiO, SiON, TiN, WSi, etc. It is preferable to find the appropriate values ​​of the gas used and the processing conditions according to the material to be processed.

[0051] In addition, the present invention uses a plasma etching device using microwaves and magnetic fields, but can be applied regardless of the method of generating plasma. For example, the same effect can be achieved by implementing it using a spiral wave etching device, an inductively coupled etching device, a capacitively coupled etching device, etc.

[0052] -Description of Reference Numerals-

[0053] 101 vacuum container, 102 electrode for mounting a chip, 103 power supply for generating electromagnetic waves, 104 first high-frequency power supply, 105 shower plate, 106 dielectric window, 107 processing chamber, 108 gas supply device, 109 vacuum exhaust port, 110 waveguide, 111 coil for generating a magnetic field, 112 coil housing, 113 chip, 114 matching circuit, 115 second high-frequency power supply, 116 high-frequency filter, 117 direct current power supply, 201 carbon film, 202 inorganic film, 203 etched film, 204 base film.

Claims

1. A plasma processing method, wherein a mask containing a carbon film and a mask containing an inorganic film are used to perform plasma etching on an etched film, characterized in that: have: In the first step, the etched film is plasma-etched using the mask of the carbon-containing film and the mask of the inorganic film; A second step, after the first step, trimming the mask of the carbon-containing film; as well as The third step is to over-etch the etched film after the second step.

2. The plasma processing method according to claim 1, wherein: The size of the mask of the inorganic film is reduced through the second step.

3. The plasma processing method according to claim 1, wherein: The high frequency power supplied to the sample stage on which the sample having the film to be etched is placed in the third step is greater than the high frequency power in the first step, or The duty ratio of the pulse-modulated high-frequency power supplied to the sample stage in the third step is greater than the duty ratio in the first step.

4. The plasma processing method according to claim 1, wherein: The inorganic film is a silicon nitride film SiN, a silicon film Si, or a silicon oxide film SiO.

5. The plasma processing method according to claim 1, wherein: The film to be etched is a polysilicon film Poly-Si.

6. The plasma processing method according to claim 1, wherein: The inorganic film is a silicon nitride film SiN, The film to be etched is a polysilicon film Poly-Si.

7. The plasma processing method according to claim 1, wherein: The plasma in the first step is generated by a mixed gas of fluorine-containing gas, N2 gas and O2 gas.

8. The plasma processing method according to claim 6, wherein: The plasma in the first step is generated by a mixed gas of fluorine-containing gas, N2 gas and O2 gas.

9. The plasma processing method according to claim 7, wherein: The fluorine-containing gas is CF4 gas.

10. The plasma processing method according to claim 8, wherein: The fluorine-containing gas is CF4 gas.

11. The plasma processing method according to claim 5, wherein: The over-etching is performed using plasma generated by a mixed gas of CF 4 gas, He gas, SF 6 gas, and N 2 gas.

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