Silicon substrate-chalcogenide glass-plasmon hybrid integrated waveguide structure and preparation method thereof

Abstract

The invention discloses a silicon substrate-chalcogenide glass-plasmon hybrid integrated waveguide structure and a preparation method thereof, and belongs to the technical field of integrated optics, the silicon substrate-chalcogenide glass-plasmon hybrid integrated waveguide structure comprises an SOI substrate, a dielectric layer is arranged on top silicon of the SOI substrate, metal and chalcogenide glass are arranged on the dielectric layer, a plasmon slit waveguide structure is formed between the metal, and the chalcogenide glass is arranged between the metal and the plasmon slit waveguide structure. The end parts of the metal slit are respectively connected with the end parts of different chalcogenide glass, and extend outwards along the extension line of the slit to form a chalcogenide glass-metal slit-chalcogenide glass structure. Silicon-based-chalcogenide-plasmon waveguides are combined, the tolerance of an overlay process is increased in an interlayer mode conversion mode, the transmission loss of the plasmon waveguides is improved in a silicon-based-plasmon mixed waveguide mode, the robustness of the device is improved, and the device functions of low loss and high mode conversion efficiency are achieved. And the application of the plasmon integrated optical waveguide device in hybrid integrated optoelectronic devices and nonlinear optical regulation and control is promoted.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated optics, and in particular relates to a silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure with low transmission loss and large preparation tolerance and a preparation method thereof. Background Art

[0002] With the rapid development of information processing technology, the growing application demand is driving the development of integrated optoelectronic devices towards lower power consumption, larger bandwidth and smaller size. Plasmonic waveguide structures can confine light waves in an area much smaller than the wavelength of free space, achieve light field enhancement and control and manipulate light information. At the same time, the strong light field localization characteristics of plasmon structures have very obvious advantages over other integrated optical structures in enhancing the interaction between light and matter. Introducing plasmon waveguide structures into the core components of integrated optoelectronic links, modulators and detectors, plasmon waveguides act as both electrical and optical structures, which can achieve maximum overlap between light and electric fields, improve the device's photoelectric conversion efficiency and reduce device power consumption, and will help realize high-speed, low-power optoelectronic information conversion functions. In addition, strong photon-photon interactions are required to excite optical nonlinear effects. The field localization effect of plasmon waveguides brings about light field enhancement and ultra-high sensitivity to changes in the optical properties of the surrounding medium, which has particularly outstanding advantages in achieving optical nonlinear regulation.

[0003] The coupling schemes between dielectric silicon waveguides and surface plasmon waveguides can be divided into end-face coupling and directional coupling. End-face coupling uses a tapered gradient structure to gradually focus and couple the light field in the silicon waveguide to the surface plasmon waveguide. Directional coupling uses the optical tunneling effect of the evanescent wave to couple the light field in the silicon waveguide to the surface plasmon waveguide with higher light field localization. Compared with the end-face coupling scheme, the directional coupling scheme can achieve lower coupling loss. The existing silicon-plasmon waveguide structure usually includes a pair of tapered mode converters and plasmon waveguides. The light mode conversion uses an ordinary tapered waveguide coupler, and the light transmission uses a plasmon slit waveguide. This type of device has a small overlay tolerance in the mode conversion area (30nm), and the transmission loss of the plasmon slit waveguide is large (0.3dB / μm~1.2dB / μm). The device is greatly affected by the cladding material, which limits the integration improvement and large-scale application of related devices.

[0004] A Chinese patent document with publication number CN117075256A discloses a hybrid plasmon waveguide Bragg grating polarizer with an interlaced grating, which includes a silicon-based hybrid plasmon waveguide structure, and the silicon-based hybrid plasmon waveguide structure includes a silicon substrate layer, a buried oxide layer, a silicon waveguide layer, a low refractive index waveguide layer, and a metal waveguide layer of an SOI wafer arranged from bottom to top; the invention combines the polarization characteristics of the hybrid plasmon waveguide and the wavelength screening property of the Bragg grating structure to achieve wavelength selection under different polarization states, but the plasmon structure in the device is difficult to enhance the interaction between light and matter, which hinders the application of such structures in active devices. Summary of the invention

[0005] In order to address the deficiencies in the prior art, the present invention provides a silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure with low transmission loss and large preparation tolerance. The corresponding structure improves the robustness of such devices, increases the overlay tolerance of the devices, reduces the transmission loss of the devices, and maintains a relatively high interlayer mode conversion efficiency.

[0006] The specific technical solutions adopted are as follows:

[0007] A silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure comprises an SOI substrate, a dielectric layer is provided on the top silicon layer of the SOI substrate, a metal (which can be in the form of a metal film) and a chalcogenide glass are provided on the dielectric layer, a slit (plasmon slit waveguide structure) is formed between the metals, ends of the slit are respectively in contact with ends of different chalcogenide glasses, and the chalcogenide glass extends outwardly along the direction of the slit extension line to form a chalcogenide glass-metal slit-chalcogenide glass structure.

[0008] Among them, chalcogenide glass, dielectric layer and SOI substrate form chalcogenide-silicon-based hybrid waveguide; metal slit, dielectric layer and SOI substrate form silicon-plasmon hybrid waveguide; starting from the direction of light incidence, light passes through the chalcogenide-silicon-based hybrid waveguide, silicon-chalcogenide-plasmon mode conversion region, silicon-plasmon hybrid waveguide in sequence, and the length of the silicon-chalcogenide-plasmon mode conversion region is related to the incident wavelength.

[0009] Chalcogenide glass acts as a chalcogenide waveguide to guide light transmission in a silicon-based substrate (SOI substrate), and the waveguide transmission mode is single-mode transmission; light is transmitted in the silicon-plasmon hybrid waveguide along the area where the bottom of the plasmon slit (metal slit) waveguide contacts the silicon-based waveguide; a Strip-loaded waveguide structure is formed in the transition area of ​​the two waveguides, which has a certain coupling length along the direction of light transmission, and the light is converted from the dielectric mode to the plasmon slit waveguide mode that is strongly localized in the metal slit waveguide. The dielectric layer is used as a buffer layer to control the mode conversion efficiency. The light mode volume in the plasmon optical waveguide is small, and the remaining light in the silicon can be continuously coupled with the upper metal slit waveguide along the propagation direction.

[0010] The upper layer of the silicon-plasmon hybrid waveguide, that is, the top of the plasmon slot waveguide structure, can be combined with active materials in various forms to realize the functions of optoelectronic devices.

[0011] The SOI substrate is a silicon-on-insulator substrate compatible with the CMOS process, and the thickness of the upper silicon layer is 220-400nm, further 220-340nm, specifically 220nm or 340nm, depending on the change of the wavelength of the incident light.

[0012] The thickness of the dielectric layer is 5-30 nm, and the phase matching condition of the mode conversion process can be met within the corresponding thickness range. The dielectric layer material is selected from aluminum oxide or silicon oxide.

[0013] Furthermore, the refractive index of the chalcogenide glass is lower than that of silicon, and the chalcogenide glass material is Ge 28 Sb 12 Se 60 ,Ge 23 S7S 70 or GeSbS, etc., preferably Ge 28 Sb 12 Se 60 .

[0014] Preferably, the chalcogenide glass has a width of 0.8-1.6 μm and a height of 350-500 nm.

[0015] Further preferably, under the condition that the incident light wavelength is 1550nm, the chalcogenide glass Ge 28 Sb 12 Se 60 The width is 800nm ​​and the height is 400nm. Under the condition of incident light wavelength of 3450nm, the chalcogenide glass Ge 28 Sb 12 Se 60 The width is 1.6μm and the height is 400nm.

[0016] Furthermore, the metal may be gold (Au), silver (Ag), titanium (Ti), aluminum (Al), etc., and the thickness of the metal is 100-200 nm.

[0017] Preferably, the metal slit has a width of 50-160 nm and a length of 3-30 μm.

[0018] Most preferably, under the condition that the incident light wavelength is 1550nm, the chalcogenide glass is Ge 28 Sb 12 Se 60 , the width of the chalcogenide glass is 800nm ​​and the height is 400nm; and / or, the dielectric layer material is selected from aluminum oxide, and the thickness of the dielectric layer is 5nm; and / or, the metal is gold, and the width of the metal slit is 100nm and the length is 10μm.

[0019] The chalcogenide-silicon-based hybrid waveguide and the silicon-plasmon hybrid waveguide are connected, and the center of the plasmon slit waveguide is aligned with the center of the chalcogenide waveguide; specifically, the vertical misalignment tolerance between the center of the plasmon slit waveguide and the center of the chalcogenide waveguide is within 500nm, and the horizontal misalignment tolerance is within 100nm.

[0020] The present invention also provides a method for preparing the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure, comprising:

[0021] (1) Preparing a dielectric layer on the top silicon of the SOI substrate;

[0022] (2) Spin-coating photoresist on the dielectric layer to complete the patterning of the chalcogenide waveguide;

[0023] (3) depositing chalcogenide glass on the device obtained in step (2), and forming a chalcogenide waveguide after peeling;

[0024] (4) spin coating photoresist on the device obtained in step (3), and completing the patterning of the plasmon slit waveguide by an overlay process;

[0025] (5) depositing a metal film on the device obtained in step (4), and forming the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure after peeling.

[0026] In step (1), the dielectric layer is prepared by electron beam evaporation, thermal evaporation, atomic layer deposition or magnetron sputtering.

[0027] Specifically, the chalcogenide waveguide pattern can be exposed on the dielectric layer by electron beam exposure or ultraviolet lithography, and the chalcogenide glass can be deposited after development, and the chalcogenide waveguide can be obtained by peeling off. Alternatively, the chalcogenide waveguide pattern can be exposed on the SOI substrate on which the chalcogenide glass has been deposited by electron beam exposure or ultraviolet lithography, and the chalcogenide waveguide can be obtained by dry etching after development.

[0028] In steps (2) and (4), the photoresist selected is PMMA495K photoresist.

[0029] In step (4), the size accuracy of the engraved mark is 500nm.

[0030] In step (5), the metal film materials are titanium Ti and gold Au, which are prepared by electron beam evaporation, titanium is used as an adhesion layer, gold is used as an electrode layer, and acetone is used as a reagent for stripping.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] The present invention provides a silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure with low transmission loss and large preparation tolerance. The structure reduces the transmission loss of a plasmon waveguide device in the form of a silicon-based-plasmon hybrid waveguide, improves the robustness of the device, and realizes the device function of low loss and high mode conversion efficiency. The structure releases the preparation tolerance of the mode conversion region of the plasmon slit waveguide through an interlayer mode conversion device without etching and chemical mechanical polishing processes, and can be used for high-performance silicon-based-chalcogenide-plasmon hybrid integrated optoelectronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic diagram of the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure;

[0034] Figure 2 Schematic diagram of optical mode fields of different parts in Example 1;

[0035] Figure 3 The whole and local scanning electron microscope images of Example 1;

[0036] Figure 4 Statistical graph of transmittance of plasmon waveguides of different lengths received by the overall structure at the coupled output end in Example 1;

[0037] Figure 5 It is a scatter diagram of coupling efficiency variation under overlay deviations in different directions in Example 1;

[0038] Figure 6 This is a graph showing the change in transmission loss of the silicon-plasmon hybrid waveguide of the device under different dielectric layer thicknesses in Example 2;

[0039] Figure 7 This is a graph showing the change in mode conversion loss of the silicon-plasmon hybrid waveguide of the device under different dielectric layer thicknesses in Example 2. DETAILED DESCRIPTION

[0040] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the following is a detailed description through specific embodiments. In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below. The technical features in each embodiment of the present invention can be combined accordingly without conflicting with each other.

[0041] The operating methods in the following examples without specifying specific conditions are usually carried out under conventional conditions or according to the conditions recommended by the manufacturer. The contents not described in detail in this specification belong to the prior art known to professionals in the field. The experimental materials used in the following examples, unless otherwise specified, can be purchased from conventional biochemical reagent companies.

[0042] Example 1

[0043] like Figure 1 As shown in the schematic diagram, the silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure of this embodiment includes an SOI substrate (a silicon-on-insulator substrate compatible with CMOS process, with an upper silicon layer thickness of 220nm), a dielectric layer (the dielectric layer material is aluminum oxide, with a thickness of d) is provided on the top silicon of the SOI substrate, and metal and chalcogenide glass Ge are provided on the dielectric layer. 28 Sb 12 Se 60 (height is 400nm), the thickness of the metal is 100nm, and a plasmon slit (length is L, width is 100nm) is formed between the metals. The ends of the slit are in contact with the ends of non-identical chalcogenide glasses respectively, and the chalcogenide glass extends outward along the direction of the slit extension line to form a structure of chalcogenide glass-metal slit-chalcogenide glass.

[0044] Considering that gold has low absorption loss at 1550nm incident light wavelength, gold is selected as the metal; chalcogenide glass Ge 28 Sb 12 Se 60 The width is set according to the single-mode working conditions in different incident light bands. The width is set to 800nm ​​at an incident wavelength of 1550nm.

[0045] The method for preparing the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure comprises:

[0046] (1) A dielectric layer - aluminum oxide film was prepared by atomic layer deposition on the top silicon of a clean 220nm SOI substrate with overlay marks;

[0047] (2) Spin-coating PMMA495K photoresist on the dielectric layer and completing the patterning of the chalcogenide waveguide using electron beam exposure technology;

[0048] (3) thermally evaporating and depositing chalcogenide glass on the device obtained in step (2), and forming a chalcogenide waveguide after peeling;

[0049] (4) spin coating PMMA495K photoresist on the device obtained in step (3), and completing the patterning of the plasmon slit waveguide by an overlay process using electron beam exposure technology; the overlay mark size accuracy is 500 nm;

[0050] (5) Preparing a metal film on the device obtained in step (4) by electron beam evaporation, and forming the above-mentioned silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure after peeling.

[0051] Figure 2 is a cross-sectional view of the optical mode field of the device at different positions of the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure in this embodiment, Figure 2 The dotted lines in the middle represent the locations of the various structural parts.

[0052] The finite element analysis method is used to simulate the proposed embodiment 1. Specifically, the light is confined by the chalcogenide glass in the high-refractive-index SOI and propagates with low loss. The light is transmitted to the silicon-based-chalcogenide-plasmon mode conversion region. Its working mechanism is based on the mode coupling theory, that is, a Strip-loaded waveguide structure is formed in the overlapping area of ​​the two waveguides, and has a certain coupling length along the direction of light transmission. The transmission process supports two characteristic modes, namely even symmetry and odd symmetry, which are mainly generated by the coupling of photons and plasmon modes. These two modes are realized by transmitting from the dielectric waveguide to the plasmon slit waveguide through even-odd interference, as shown in FIG. Figure 2 The top view of the optical mode field of the device (xy direction) and the side view of the optical mode field perpendicular to the device (yz direction) are shown. The beat length of the odd-even interference is L c , in Example 1, the length L c Close to 450nm. After the mode conversion is completed, the mode size of the dielectric waveguide mode is about ~μm 2 , which can be converted into a plasmonic hybrid waveguide mode with a mode size of about 100nm×100nm. Due to the small volume of the optical mode in the plasmonic waveguide, the optical field of the hybrid plasmonic waveguide is much higher than the optical mode field in the dielectric waveguide, and the remaining light in the silicon can be continuously coupled with the upper metal slit waveguide along the propagation direction.

[0053] Figure 3 Field emission scanning electron microscope image showing the silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure of Example 1, the width w of the plasmon slit waveguide slotThe waveguide thickness is 100 nm, the length L is 10 μm, and the overlay error between the chalcogenide-silicon-based hybrid waveguide and the silicon-plasmon hybrid waveguide is 0.

[0054] Adjust the length of different plasmon slit waveguides to 10μm, 15μm and 20μm, and calculate the transmission loss of the device, such as Figure 4 As shown, the transmission loss of the silicon-plasmon hybrid waveguide region is calculated to be 0.46 dB / μm by the difference in transmission loss, and the mode conversion loss of the device is 1.05 dB. The preparation success rate of this type of device is greatly increased compared with the traditional silicon-plasmon planar mode. The conversion efficiency of this mode converter is higher than that of the ordinary silicon-plasmon coupler, and the interlayer coupling process is completed in the waveguide and is not affected by the cladding refractive index. The optical loss of 90% of the devices can be maintained at a similar level, and the silicon-plasmon waveguide loss is reduced to 0.46 dB / μm, which provides a mass production solution for the wide application of plasmon waveguide devices in miniaturized, large bandwidth, high-efficiency optoelectronic devices and nonlinear optical regulation.

[0055] The effect of the misalignment between the chalcogenide waveguide and the plasmon slit waveguide on the transmission loss of the device in the scheme of Example 1 was evaluated. The change in the transmission loss of the device with a misalignment between the center of the chalcogenide waveguide and the center of the slit waveguide ranging from 0nm to 500nm was tested. Figure 5 As shown, the device loss variation is 0.5dB when the left-right misalignment Δx is in the range of 100nm and the upper-lower misalignment Δy is in the range of 500nm. In a typical electron lithography system, the overlay matching error below 500nm can be easily maintained. Therefore, the device improves the robustness of the light-plasmon mode converter and thus achieves higher manufacturing efficiency.

[0056] Example 2

[0057] The only difference between Example 2 and Example 1 is that a dielectric layer of Al2O3 with different thicknesses, 0 nm, 5 nm, and 10 nm, is deposited on the top silicon layer of the SOI substrate. The dielectric layer is used to reduce the parasitic resistance of the active device prepared based on the structure and couple more optical power into the metal waveguide in the hybrid structure. slot , the light is more concentrated in the slit, but as the thickness d of the dielectric layer Al2O3 increases, the light field energy gradually moves down to the dielectric layer, and then concentrates in the dielectric layer, the metal absorption loss of the mode conversion loss device decreases, and then the mode conversion loss increases. The transmission loss change of Example 2 is as follows Figure 6 As shown in , the mode conversion loss is Figure 7 As shown, when the incident light wavelength is 1550nm, the plasmon slit waveguide width w slotWhen d is 100nm and d is 5nm, the mode conversion loss is 1.71dB and the transmission loss is 0.63dB / μm; when d is 10nm, the conversion loss is 2.37dB and the transmission loss is 0.53dB / μm.

[0058] The corresponding device is prepared according to Example 2, the length L of the plasmon slit waveguide is 10 μm, and w slot When d is 100nm and d is 5nm, the device loss at the output port is about -11.75dB; when d is 10nm, the device loss at the output port is about -11.43dB.

[0059] In the scheme of Example 2, the mode conversion loss increases with the increase of the thickness d of the dielectric layer, and the transmission loss decreases with the increase of the thickness d of the dielectric layer. This requires weighing the mode conversion loss and the transmission loss according to the application scenario of the device. In order to increase the interaction length between the active material and the light field to 20μm and make the light field more concentrated in the plasmon waveguide area, the Al2O3 thickness is preferably 5nm for device preparation to reduce the total transmission loss of the device.

[0060] The above-described embodiments provide a detailed description of the technical solutions of the present invention. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, supplements or similar substitutions made within the scope of the principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure, comprising an SOI substrate, characterized in that: A dielectric layer is provided on the top silicon layer of the SOI substrate, and metal and chalcogenide glass are provided on the dielectric layer. A plasmon slit waveguide structure is formed between the metals. The ends of the slit are respectively connected to the ends of different chalcogenide glasses. The chalcogenide glass extends outward along the direction of the slit extension line to form a chalcogenide glass-metal slit-chalcogenide glass structure.

2. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The SOI substrate is a silicon-on-insulator substrate compatible with the CMOS process, and the thickness of the upper silicon layer is 220-400nm.

3. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The thickness of the dielectric layer is 5-30 nm, and the material of the dielectric layer is selected from aluminum oxide or silicon oxide.

4. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The refractive index of the chalcogenide glass is lower than that of silicon. The chalcogenide glass material is Ge 28 Sb 12 Se 60 ,Ge 23 S7S 70 or GeSbS.

5. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The width of chalcogenide glass is 0.8-1.6μm and the height is 350-500nm.

6. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The metal is gold, silver, titanium or aluminum, and the thickness of the metal is 100-200nm.

7. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: The slits formed between the metals have a width of 50-160 nm and a length of 3-30 μm.

8. The silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 1, characterized in that: When the incident light wavelength is 1550nm, the chalcogenide glass is Ge 28 Sb 12 Se 60 , the width of the chalcogenide glass is 800nm ​​and the height is 400nm; and / or, the dielectric layer material is selected from aluminum oxide, and the thickness of the dielectric layer is 5nm; and / or, the metal is gold, and the width of the metal slit is 100nm and the length is 10μm.

9. The method for preparing the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure according to any one of claims 1 to 8, characterized in that: include: (1) Preparing a dielectric layer on the top silicon of the SOI substrate; (2) Spin-coating photoresist on the dielectric layer to complete the patterning of the chalcogenide waveguide; (3) depositing chalcogenide glass on the device obtained in step (2), and forming a chalcogenide waveguide after peeling; (4) spin coating photoresist on the device obtained in step (3), and completing the patterning of the plasmon slit waveguide by an overlay process; (5) depositing a metal film on the device obtained in step (4), and forming the silicon-based-chalcogenide glass-plasmon hybrid integrated waveguide structure after peeling.

10. The method for preparing the silicon-chalcogenide glass-plasmon hybrid integrated waveguide structure according to claim 9, characterized in that: The method for preparing the dielectric layer is electron beam evaporation, thermal evaporation, atomic layer deposition or magnetron sputtering.

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