A method, device, equipment and storage medium for optimizing solder ball arrangement
By introducing the evaluation of temperature factors in the welding ball layout design, determining the layout area of the power ball and planning the layout method of signal balls, the problem of insufficient evaluation of temperature factors in the prior art is solved, and effective protection of signal integrity of high-power consumption products is achieved.
Patent Information
- Application Number
- CN202510262946.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-06
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2045-03-06
AI Technical Summary
The existing solder ball layout design lacks a detailed evaluation of temperature factors when considering signal integrity, resulting in the temperature rise area of high-power consumption products affecting signal integrity, increasing the risk of the product.
By determining the arrangement area of the power ball and simulating the power supply temperature rise area based on this area, the temperature distribution of the power supply is determined. Then, according to the temperature distribution of the power supply, plan the arrangement method of the signal ball in the welding ball layout area to ensure that the signal ball is arranged in the lower temperature area.
It effectively solves the impact of the temperature rise area of high-power products on signal integrity, eliminates the risk of the product from the source, and improves the reliability and electrical performance of solder ball layout.
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Figure CN119761298B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a method, device, equipment and storage medium for optimizing solder ball arrangement. Background Art
[0002] BGA (Ball Grid Array) arrangement refers to the layout of solder balls at the bottom of the package in ball grid array packaging technology. BGA packaging connects to the PCB (Printed Circuit Board) through a series of solder balls at the bottom. These solder balls are arranged in a certain array, which can provide more input / output pins than traditional packaging types. At the same time, because the solder balls are directly located at the bottom of the package, it is beneficial to improve the assembly density and electrical performance of the circuit.
[0003] Generally speaking, solder balls mainly include power balls and signal balls:
[0004] Power balls refer to solder balls that are specifically used to connect power and ground. These solder balls are responsible for providing power and reference ground for the chip in the BGA package, which is essential to ensure the stable operation of the circuit. Power balls are generally designed to be larger than signal balls based on current requirements to withstand higher currents.
[0005] Signal balls refer to solder balls used to transmit data signals and control signals. Signal balls connect the input / output pins of the chip to the corresponding solder joints on the PCB and are responsible for data transmission. The arrangement of signal balls needs to consider factors such as signal integrity, electromagnetic compatibility, and heat distribution.
[0006] When designing BGA layout, it is usually necessary to pay attention to signal integrity. However, the existing solder ball layout is more based on the experience of related products, whether the routing is unobstructed, and the distribution of related structural parts, which brings certain risks to subsequent products. Summary of the invention
[0007] The present application provides a method, device, equipment and storage medium for optimizing solder ball arrangement, which introduces temperature factors to more meticulously evaluate the arrangement of solder balls and eliminate product risks from the source.
[0008] In a first aspect, an embodiment of the present application provides a method for optimizing solder ball arrangement, the method for optimizing solder ball arrangement comprising the following steps:
[0009] Determine the layout area of the power balls;
[0010] Based on the arrangement area of the power ball, the temperature rise area of the power supply is simulated to determine the temperature distribution of the power supply;
[0011] According to the temperature distribution of the power supply, plan the arrangement of the signal balls in the solder ball arrangement area.
[0012] In combination with the first aspect, in one implementation, determining the arrangement area of the power balls includes:
[0013] According to the preliminary layout of the chip floorplan, estimate the layout area of the power ball.
[0014] In combination with the first aspect, in one implementation, the temperature rise area simulation of the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply includes:
[0015] Determine the type of power supply based on the power consumption information;
[0016] Based on the power type and the corresponding power ball arrangement area, determine the temperature distribution of each type of power supply;
[0017] The temperature distribution of all power supply types is combined to determine the final total power supply temperature distribution.
[0018] In combination with the first aspect, in one implementation, when the arrangement area of the signal balls is insufficient, the position of the power bump on the floorplan is adjusted so that the temperature impact of the power supply is more concentrated.
[0019] In combination with the first aspect, in one implementation, planning the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply includes:
[0020] According to the temperature distribution of the power supply, the temperature level of the solder ball arrangement area is divided, and a critical temperature level is determined;
[0021] Arrange the signal balls whose speed is not lower than the set value in the area whose temperature level is not higher than the critical temperature level.
[0022] In a second aspect, an embodiment of the present application provides a device for optimizing solder ball arrangement, the device for optimizing solder ball arrangement comprising:
[0023] A calculation module, which is used to determine the arrangement area of the power balls;
[0024] A simulation module, which performs temperature rise area simulation on the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply;
[0025] The planning module plans the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply.
[0026] In conjunction with the second aspect, in one implementation, the calculation module determines the arrangement area of the power balls, including:
[0027] According to the preliminary layout of the chip floorplan, estimate the layout area of the power ball.
[0028] In combination with the second aspect, in one implementation, the simulation module performs temperature rise area simulation on the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply, including:
[0029] Determine the type of power supply based on the power consumption information;
[0030] Based on the power type and the corresponding power ball arrangement area, determine the temperature distribution of each type of power supply;
[0031] The temperature distribution of all power supply types is combined to determine the final total power supply temperature distribution.
[0032] In a third aspect, an embodiment of the present application provides a device for optimizing solder ball arrangement, wherein the device for optimizing solder ball arrangement comprises a processor, a memory, and a program for optimizing solder ball arrangement stored in the memory and executable by the processor, wherein when the program for optimizing solder ball arrangement is executed by the processor, the steps of the above-mentioned method for optimizing solder ball arrangement are implemented.
[0033] In a fourth aspect, a computer-readable storage medium stores a program for optimizing solder ball arrangement, wherein when the program for optimizing solder ball arrangement is executed by a processor, the steps of the above-mentioned method for optimizing solder ball arrangement are implemented.
[0034] The beneficial effects brought by the technical solution provided by the embodiment of the present application include at least:
[0035] The method for optimizing solder ball arrangement in this application determines the arrangement area of the power ball; simulates the temperature rise area of the power supply based on the arrangement area of the power ball to determine the temperature distribution of the power supply; and plans the arrangement of the signal ball in the solder ball arrangement area according to the temperature distribution of the power supply. That is, the temperature factor is introduced to evaluate the arrangement of the solder balls in a more detailed manner, which can well solve the impact of the temperature rise area of high-power products on signal integrity and eliminate product risks from the source. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Figure 1 A schematic diagram of a flow chart of an embodiment of a method for optimizing solder ball arrangement of the present application;
[0037] Figure 2 This is a flow chart of step S2 of this application;
[0038] Figure 3 This is a flow chart of step S3 of this application;
[0039] Figure 4 A schematic diagram of the temperature distribution of the power supply for this application;
[0040] Figure 5 A structural block diagram of an embodiment of a device for optimizing solder ball arrangement of the present application;
[0041] Figure 6 Schematic diagram of the hardware structure of the device for optimizing solder ball arrangement involved in the embodiment of the present application. DETAILED DESCRIPTION
[0042] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0043] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0044] In a first aspect, an embodiment of the present application provides a method for optimizing solder ball arrangement.
[0045] In one embodiment, referring to Figure 1 , Figure 1 This is a flow chart of an embodiment of a method for optimizing solder ball arrangement in this application. Figure 1 As shown, the method of optimizing solder ball arrangement includes:
[0046] S1. Determine the layout area of the power balls;
[0047] It is worth noting that the power balls and signal balls are arranged in the solder ball arrangement area at the bottom of the BGA package. In this embodiment, the arrangement area of the power balls needs to be determined first. Usually, the arrangement area of the power balls can be estimated based on the preliminary arrangement of the chip layout floorplan.
[0048] Chip layout planning refers to the physical layout and wiring planning of each functional module inside the chip when designing an integrated circuit. The purpose is to achieve the best balance between performance, power consumption and cost within a limited chip area.
[0049] S2. Based on the arrangement area of the power ball, the temperature rise area of the power supply is simulated to determine the temperature distribution of the power supply;
[0050] It is understandable that after knowing the arrangement area of the power balls, the temperature rise area simulation of the power supply can be performed to determine the temperature distribution of the power supply.
[0051] Generally speaking, due to different power consumption, the parameters of each power supply will be different. To accurately determine the temperature distribution of the power supply, refer to Figure 2 As shown, step S2 specifically includes:
[0052] S21, determining the type of power supply according to the power consumption information;
[0053] S22, determining the temperature distribution of each type of power supply based on the power supply type and the arrangement area of the corresponding power supply ball;
[0054] S23. Integrate the temperature distribution of all power supply types to determine the final temperature distribution of the total power supply.
[0055] That is to say, the final temperature distribution must take into account the impact of all power sources.
[0056] S3. Plan the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply.
[0057] Specifically, see Figure 3 As shown, step S3 includes:
[0058] S31, dividing the temperature level of the solder ball arrangement area according to the temperature distribution of the power supply, and determining a critical temperature level;
[0059] See also Figure 4 As shown in the figure, the power ball corresponding to the power source is the affected area in the figure, and then the solder ball arrangement area is divided by different colors, among which the red area has the highest temperature, and then the farther away from the power source, the lower the temperature gradually. In this embodiment, a critical temperature level will be divided according to the actual situation to plan the position of the signal ball.
[0060] S32. Arrange the signal balls whose speed is not lower than the set value in the area whose temperature level is not higher than the critical temperature level.
[0061] It is worth noting that, in this embodiment, after the temperature distribution is determined, the main thing to do is to avoid arranging the high-speed signal balls in areas with higher temperature rise, such as the red area.
[0062] There is no fixed value for the speed of the high-speed signal ball, because it depends on many factors, including signal type, circuit design, packaging characteristics, PCB materials, manufacturing process, etc.
[0063] Taking PCIe (Peripheral Component Interconnect Express) as an example, the speed of the first generation is 2.5 Gbps, the speed of the second generation is 5 Gbps, and the speed of the third generation is 8 Gbps.
[0064] To this end, the set value in this embodiment may be 5 Gbps or 8 Gbps, etc. This embodiment does not impose any limitation on this, and it may be reasonably set according to actual conditions.
[0065] After the set value is determined, the signal ball that meets the conditions will not be arranged in the area where the temperature is too high. This can effectively prevent the temperature rise from affecting the signal. This application is equivalent to optimizing the arrangement of the signal ball from the source before the product is produced. Compared with the thermal isolation and additional heat dissipation device adopted after the product comes out in the prior art, it is more forward-looking.
[0066] In addition, if the signal ball arrangement area is insufficient based on the current floorplan, the position of the power bump on the floorplan is adjusted to make the temperature impact of the power more concentrated. It is understandable that if the distribution of the power balls is too dispersed, the area it will affect will be wider. If the power balls are relatively concentrated, the area they cover will become smaller, and there will be more area available for arranging the signal balls.
[0067] It is worth mentioning that the bump refers to a tiny protrusion on the chip body, which is used to connect the chip and the package. The size of the bump is smaller than the ball (power ball, signal ball), and usually multiple bumps are connected to one ball. If the arrangement area of the signal ball is not sufficient, it is necessary to adjust the position of the power bump at the source, and then adjust the position of the power ball, so as to make room for the signal ball. In other words, through the arrangement of the signal ball, the design of the power bump on the floorplan can be optimized in turn, so that the structure of the chip is more reasonable.
[0068] In summary, the method for optimizing solder ball arrangement in the present application determines the arrangement area of the power ball; simulates the temperature rise area of the power supply based on the arrangement area of the power ball to determine the temperature distribution of the power supply; and plans the arrangement of the signal ball in the solder ball arrangement area according to the temperature distribution of the power supply. That is, by introducing the temperature factor and evaluating the arrangement of the solder balls in a more detailed manner, it can well solve the impact of the temperature rise area of high-power products on signal integrity and eliminate product risks from the source.
[0069] In a second aspect, an embodiment of the present application also provides a device for optimizing solder ball arrangement.
[0070] In one embodiment, referring to Figure 5 , Figure 5 This is a functional module diagram of an embodiment of a device for optimizing solder ball arrangement in this application. Figure 5 As shown, the device for optimizing solder ball arrangement includes a collection module, a simulation module and a planning module.
[0071] Among them, the calculation module is used to determine the layout area of the power ball; the simulation module simulates the temperature rise area of the power supply based on the layout area of the power ball to determine the temperature distribution of the power supply; the planning module plans the layout of the signal ball in the solder ball layout area according to the temperature distribution of the power supply.
[0072] Furthermore, in one embodiment, the calculation module determines the arrangement area of the power balls, including:
[0073] According to the preliminary layout of the chip floorplan, estimate the layout area of the power ball.
[0074] Further, in one embodiment, the simulation module performs temperature rise area simulation on the power supply based on the arrangement area of the power supply balls to determine the temperature distribution of the power supply, including:
[0075] Determine the type of power supply based on the power consumption information;
[0076] Based on the power type and the corresponding power ball arrangement area, determine the temperature distribution of each type of power supply;
[0077] The temperature distribution of all power supply types is combined to determine the final total power supply temperature distribution.
[0078] Furthermore, in one embodiment, the planning module plans the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply, including:
[0079] According to the temperature distribution of the power supply, the temperature level of the solder ball arrangement area is divided, and a critical temperature level is determined;
[0080] Arrange the signal balls whose speed is not lower than the set value in the area whose temperature level is not higher than the critical temperature level.
[0081] The functional implementation of each module in the above-mentioned device for optimizing solder ball arrangement corresponds to each step in the above-mentioned method embodiment for optimizing solder ball arrangement, and its functions and implementation processes are not described one by one here.
[0082] In a third aspect, an embodiment of the present application provides a device for optimizing solder ball arrangement. The device for optimizing solder ball arrangement may be a personal computer (PC), a laptop computer, a server, or other device with data processing function.
[0083] Reference Figure 6 , Figure 6 Schematic diagram of the hardware structure of the device for optimizing solder ball arrangement involved in the embodiment of the present application. In the embodiment of the present application, the device for optimizing solder ball arrangement may include a processor, a memory, a communication interface and a communication bus.
[0084] The communication bus may be of any type and is used to interconnect the processor, the memory, and the communication interface.
[0085] The communication interface includes input / output (I / O) interface, physical interface and logical interface, etc., which are used to interconnect the devices inside the device for optimizing solder ball arrangement, and the interface for interconnecting the device for optimizing solder ball arrangement with other devices (such as other computing devices or user devices). The physical interface can be an Ethernet interface, a fiber optic interface, an ATM interface, etc.; the user device can be a display, a keyboard, etc.
[0086] The memory can be various types of storage media, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), flash memory, optical storage, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), etc.
[0087] The processor may be a general-purpose processor, which may call the program for optimizing solder ball arrangement stored in the memory and execute the method for optimizing solder ball arrangement provided in the embodiment of the present application. For example, the general-purpose processor may be a central processing unit (CPU). The method executed when the program for optimizing solder ball arrangement is called may refer to the various embodiments of the method for optimizing solder ball arrangement of the present application, which will not be described in detail here.
[0088] Those skilled in the art will understand that Figure 6 The hardware structure shown in the figure does not constitute a limitation on the present application, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.
[0089] In a fourth aspect, an embodiment of the present application also provides a readable storage medium.
[0090] The readable storage medium of the present application stores a program for optimizing solder ball arrangement, wherein when the program for optimizing solder ball arrangement is executed by a processor, the steps of the method for optimizing solder ball arrangement as described above are implemented.
[0091] The method implemented when the program for optimizing solder ball arrangement is executed can refer to the various embodiments of the method for optimizing solder ball arrangement of the present application, and will not be described in detail here.
[0092] It should be noted that the serial numbers of the above-mentioned embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.
[0093] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD) as described above, and includes a number of instructions for a terminal device to execute the methods described in each embodiment of the present application.
[0094] The terms "including" and "having" and any variations thereof in the specification and claims of this application and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices. The terms "first", "second" and "third" are used to distinguish different objects, etc., and do not represent a sequence, nor do they limit "first", "second" and "third" to different types.
[0095] In the description of the embodiments of the present application, "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a specific way.
[0096] In the description of the embodiments of the present application, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; the “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, “multiple” refers to two or more than two.
[0097] In some processes described in the embodiments of the present application, multiple operations or steps that appear in a specific order are included, but it should be understood that these operations or steps may not be executed in the order in which they appear in the embodiments of the present application or in parallel, and the sequence number of the operation is only used to distinguish the different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed in sequence or in parallel, and these operations or steps may be combined.
[0098] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
[0099] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A method for optimizing solder ball arrangement, characterized in that: The method for optimizing solder ball arrangement comprises: Determine the layout area of the power balls; Based on the arrangement area of the power ball, the temperature rise area of the power supply is simulated to determine the temperature distribution of the power supply; According to the temperature distribution of the power supply, plan the arrangement of the signal balls in the solder ball arrangement area.
2. The method for optimizing solder ball arrangement according to claim 1, characterized in that: The step of determining the arrangement area of the power balls includes: According to the preliminary layout of the chip floorplan, estimate the layout area of the power ball.
3. The method for optimizing solder ball arrangement according to claim 1 or 2, characterized in that: The method of simulating the temperature rise area of the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply includes: Determine the type of power supply based on the power consumption information; Based on the power type and the corresponding power ball arrangement area, determine the temperature distribution of each type of power supply; The temperature distribution of all power supply types is combined to determine the final total power supply temperature distribution.
4. The method for optimizing solder ball arrangement according to claim 2, wherein: When the arrangement area of the signal balls is not sufficient, adjust the position of the power bump on the floorplan to make the temperature impact of the power supply more concentrated.
5. The method for optimizing solder ball arrangement according to claim 1, characterized in that: The method of planning the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply includes: According to the temperature distribution of the power supply, the temperature level of the solder ball arrangement area is divided, and a critical temperature level is determined; Arrange the signal balls whose speed is not lower than the set value in the area whose temperature level is not higher than the critical temperature level.
6. A device for optimizing solder ball arrangement, characterized in that: The device for optimizing solder ball arrangement comprises: A calculation module, which is used to determine the arrangement area of the power balls; A simulation module, which performs temperature rise area simulation on the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply; The planning module plans the arrangement of the signal balls in the solder ball arrangement area according to the temperature distribution of the power supply.
7. The device for optimizing solder ball arrangement according to claim 6, characterized in that: The calculation module determines the arrangement area of the power balls, including: According to the preliminary layout of the chip floorplan, estimate the layout area of the power ball.
8. The device for optimizing solder ball arrangement according to claim 6 or 7, characterized in that: The simulation module performs temperature rise area simulation on the power supply based on the arrangement area of the power supply ball to determine the temperature distribution of the power supply, including: Determine the type of power supply based on the power consumption information; Based on the power type and the corresponding power ball arrangement area, determine the temperature distribution of each type of power supply; The temperature distribution of all power supply types is combined to determine the final total power supply temperature distribution.
9. A device for optimizing solder ball arrangement, characterized in that: The device for optimizing solder ball arrangement includes a processor, a memory, and a program for optimizing solder ball arrangement stored in the memory and executable by the processor, wherein when the program for optimizing solder ball arrangement is executed by the processor, the steps of the method for optimizing solder ball arrangement as described in any one of claims 1 to 5 are implemented.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a program for optimizing solder ball arrangement, wherein when the program for optimizing solder ball arrangement is executed by a processor, the steps of the method for optimizing solder ball arrangement according to any one of claims 1 to 5 are implemented.
Citation Information
Patent Citations
Electrical and thermal joint modeling simulation-based power amplification chip design optimization method
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